Готові списки джерел за темами / Mixed analogue digital integrate circuit

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Автор: Grafiati
Опубліковано: 14 березня 2023

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Статті в журналах з теми "Mixed analogue digital integrate circuit"

1

Kobayashi, Haruo, and Anna Kuwana. "Study of analog-to-digital mixed integrated circuit configuration using number theory." Impact 2022, no. 3 (June 30, 2022): 9–11. http://dx.doi.org/10.21820/23987073.2022.3.9.

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Анотація:
Electronic circuits form the basis of much of the technology we use today. Professor Haruo Kobayashi and Assistant Professor Anna Kuwana, Division of Electronics and Informatics, Gunma University, Japan, are utilising classical mathematics, including theorems such as number theory and control theory in their design of circuits that contain elements of analogue signalling. Analogue circuit planning is regarded as an art as these circuits are typically designed based on mature designers' intuition and experiences in a process that is less systematic for coming up with new architectures and more designing than digital circuit design and Kobayashi and Kuwana firmly believe that 'beautiful' mathematics can facilitate truly great circuit design. Additional mathematics techniques employed by Kobayashi and the team are statistics, coding theory, modulation and signal processing algorithms and pairing pure mathematics theorems with electrical engineering is a key feature of the researchers' work. The team utilises theoretical analysis and simulations such as the circuit simulator (SPICE) and system simulator (MATLAB) to test its work and collaborates with semiconductor companies and electronic measurement instrument companies in Japan for smart circuit design and effective circuit testing. So far, results include that using SAR ADC configurations with Fibonacci sequence weights can improve the speeds and reliability of the SAR ADC. Also several new DAC architecutures and waveform sampling methods are derived based on mathematics.
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2

Ramsay, E. P., D. T. Clark, J. D. Cormack, A. E. Murphy, D. A. Smith, R. F. Thompson, R. A. R. Young, and S. Finney. "Digital and Analogue Integrated Circuits in Silicon Carbide for High Temperature Operation." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, HITEC (January 1, 2012): 000373–77. http://dx.doi.org/10.4071/hitec-thp11.

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Анотація:
A need for high temperature integrated circuits is emerging in a number of application areas. As Silicon Carbide power discrete devices become more widely available, there is a growing need for control ICs capable of operating at the same temperatures and mounted on the same modules. Also, the use of high temperature sensors, in, for example, aero engines and in deep hydrocarbon and geothermal drilling applications results in a demand for high temperature sensor interface ICs. This paper presents new results on a range of simple logic and analogue circuits fabricated on a developing Silicon Carbide CMOS process which is intended for mixed signal integrated circuit applications such as those above. A small family of logic circuits, pin compatible with the 74xx series TTL logic parts, has been designed, fabricated and tested and includes, for example, a Quad Nand gate and a Dual D-type flip-flop. These have been found to be functional from room temperature up to 400°C. Analogue blocks have been investigated with a view to using switched capacitor or autozero techniques to compensate for temperature and time induced drifts, allowing very high temperature operation.
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3

Breslin, Catherine, and Adrian O'Lenskie. "Neuromorphic hardware databases for exploring structure–function relationships in the brain." Philosophical Transactions of the Royal Society of London. Series B: Biological Sciences 356, no. 1412 (August 29, 2001): 1249–58. http://dx.doi.org/10.1098/rstb.2001.0904.

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Neuromorphic hardware is the term used to describe full custom–designed integrated circuits, or silicon ‘chips’, that are the product of neuromorphic engineering—a methodology for the synthesis of biologically inspired elements and systems, such as individual neurons, retinae, cochleas, oculomotor systems and central pattern generators. We focus on the implementation of neurons and networks of neurons, designed to illuminate structure–function relationships. Neuromorphic hardware can be constructed with either digital or analogue circuitry or with mixed–signal circuitry—a hybrid of the two. Currently, most examples of this type of hardware are constructed using analogue circuits, in complementary metal–oxide–semiconductor technology. The correspondence between these circuits and neurons, or networks of neurons, can exist at a number of levels. At the lowest level, this correspondence is between membrane ion channels and field–effect transistors. At higher levels, the correspondence is between whole conductances and firing behaviour, and filters and amplifiers, devices found in conventional integrated circuit design. Similarly, neuromorphic engineers can choose to design Hodgkin–Huxley model neurons, or reduced models, such as integrate–and–fire neurons. In addition to the choice of level, there is also choice within the design technique itself; for example, resistive and capacitive properties of the neuronal membrane can be constructed with extrinsic devices, or using the intrinsic properties of the materials from which the transistors themselves are composed. So, silicon neurons can be built, with dendritic, somatic and axonal structures, and endowed with ionic, synaptic and morphological properties. Examples of the structure–function relationships already explored using neuromorphic hardware include correlation detection and direction selectivity. Establishing a database for this hardware is valuable for two reasons: first, independently of neuroscientific motivations, the field of neuromorphic engineering would benefit greatly from a resource in which circuit designs could be stored in a form appropriate for reuse and re–fabrication. Analogue designers would benefit particularly from such a database, as there are no equivalents to the algorithmic design methods available to designers of digital circuits. Second, and more importantly for the purpose of this theme issue, is the possibility of a database of silicon neuron designs replicating specific neuronal types and morphologies. In the future, it may be possible to use an automated process to translate morphometric data directly into circuit design compatible formats. The question that needs to be addressed is: what could a neuromorphic hardware database contribute to the wider neuroscientific community that a conventional database could not? One answer is that neuromorphic hardware is expected to provide analogue sensory–motor systems for interfacing the computational power of symbolic, digital systems with the external, analogue environment. It is also expected to contribute to ongoing work in neural–silicon interfaces and prosthetics. Finally, there is a possibility that the use of evolving circuits, using reconfigurable hardware and genetic algorithms, will create an explosion in the number of designs available to the neuroscience community. All this creates the need for a database to be established, and it would be advantageous to set about this while the field is relatively young. This paper outlines a framework for the construction of a neuromorphic hardware database, for use in the biological exploration of structure–function relationships.
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Young, R. A. R., David T. Clark, Jennifer D. Cormack, A. E. Murphy, Dave A. Smith, Robin F. Thompson, Ewan P. Ramsay, and S. Finney. "High Temperature Digital and Analogue Integrated Circuits in Silicon Carbide." Materials Science Forum 740-742 (January 2013): 1065–68. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.1065.

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Анотація:
Silicon Carbide devices are capable of operating as a semiconductor at high temperatures and this capability is being exploited today in discrete power components, bringing system advantages such as reduced cooling requirements [1]. Therefore there is an emerging need for control ICs mounted on the same modules and being capable of operating at the same temperatures. In addition, several application areas are pushing electronics to higher temperatures, particularly sensors and interface devices required for aero engines and in deep hydrocarbon and geothermal drilling. This paper discusses a developing CMOS manufacturing process using a 4H SiC substrate, which has been used to fabricate a range of simple logic and analogue circuits and is intended for power control and mixed signal sensor interface applications [2]. Test circuits have been found to operate at up to 400°C. The introduction of a floating capacitor structure to the process allows the use of switched capacitor techniques in mixed signal circuits operating over an extended temperature range.
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5

Strle, Drago, та Janez Trontelj. "On Self-Aware Mixed-Signal Systems Based on S-Δ ADC". International Journal of Embedded and Real-Time Communication Systems 3, № 2 (квітень 2012): 92–110. http://dx.doi.org/10.4018/jertcs.2012040105.

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In this paper the authors discuss the issues related to the self-awareness of high-resolution, mixed-signal circuits and systems, based on S-? ADC, which is the most important and sensitive module and the key element for analogue to digital conversion. The basic methodology and framework for improving the self-awareness of such systems are presented. The methodology is based on efficient real-time measurements of a high-resolution, mixed-signal system using pseudo random signal source, real-time calculation of a distance between responses, the possibility to adapt measured circuit to minimize the distance, and changing the parameters of a reference system according to learning rules. The use of pseudo-random noise as a signal source leads to efficient and cost-effective measurements that run in parallel to the main signal processing. The calculation of the distance between the system and its reference are theoretically analysed and verified using Matlab model. The response of a system together with the response of high precision analogue to digital converter (ADC) is compared to the response of a bit-true model of a reference digital circuit. The differences are calculated using simple area-efficient cross-correlation algorithm. Together with adaptation strategy and tuning circuitry it forms the basis for self-awareness of mixed-signal circuits.
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6

Ellinger, Frank, David Fritsche, Gregor Tretter, Jan Dirk Leufker, Uroschanit Yodprasit, and C. Carta. "Review of Millimeter-Wave Integrated Circuits With Low Power Consumption for High Speed Wireless Communications." Frequenz 71, no. 1-2 (January 1, 2017): 1–9. http://dx.doi.org/10.1515/freq-2016-0119.

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Abstract In this paper we review high-speed radio-frequency integrated circuits operating up to 210 GHz and present selected state-of-the-art circuits with leading-edge performance, which we have designed at our chair. The following components are discussed employing bipolar complementary metal oxide semiconductors (BiCMOS) technologies: a 200 GHz amplifier with 17 dB gain and around 9 dB noise figure consuming only 18 mW, a 200 GHz down mixer with 5.5 dB conversion gain and 40 mW power consumption, a 190 GHz receiver with 47 dB conversion gain and 11 dB noise figure and a 60 GHz power amplifier with 24.5 dBm output power and 12.9 % power added efficiency (PAE). Moreover, we report on a single-core flash CMOS analogue-to-digital converter (ADC) with 3 bit resolution and a speed of 24 GS/s. Finally, we discuss a 60 GHz on-off keying (OOK) BiCMOS transceiver chip set. The wireless transmission of data with 5 Gb/s at 42 cm distance between transmitter and receiver was verified by experiments. The complete transceiver consumes 396 mW.
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7

Al-Qutayri, Mahmoud A., and Peter R. Shepherd. "Application of Dynamic Supply Current Monitoring to Testing Mixed-Signal Circuits." VLSI Design 5, no. 3 (January 1, 1997): 223–40. http://dx.doi.org/10.1155/1997/47423.

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This paper applies the time-domain testing technique and compares the effectiveness of transient voltage and dynamic power supply current measurements in detecting faults in CMOS mixed-signal circuits. The voltage and supply current (iDDT) measurements are analyzed by three methods to detect the presence of a fault, and to establish which measurement achieves higher confidence in the detection. Catastrophic, soft and stuck-at single fault conditions were introduced to the circuit-under-test (CUT). The time-domain technique tests a mixed-signal CUT in a unified fashion, thereby eliminating the need to partition the CUT into separate analogue and digital modules.
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Dualibe, Carlos, Paul Jespers, and Michel Verleysen. "Designing Mixed-Signal Programmable Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS Technologies." Journal of Integrated Circuits and Systems 1, no. 1 (November 16, 2004): 14–22. http://dx.doi.org/10.29292/jics.v1i1.250.

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A digitally programmable analog Fuzzy Logic Controller (FLC) is presented. Input and output signals are processed in the analog domain whereas the parameters of the controller are stored in a built-in digital memory. Some new functional blocks have been designed whereas others were improved towards the optimization of the power consumption, the speed and the modularity while keeping a reasonable accuracy, as it is needed in several analogue signal processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4μ technology, showing good agreement with the expected performances, namely: a 2.7% RMSE, from 2.22 to 5.26 Mflips (Mega fuzzy logic inferences per second) at the pin terminals (@CL=13pF), 933 μW power consumption per rule (@Vdd=5V) and 5 bits of resolution. Since the circuit is intended for a subsystem embedded in an application chip (@CL≤ 5pF) up to 8 Mflips may be expected.
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Morais, Flávio, Pedro Carvalhaes-Dias, Yu Zhang, Andreu Cabot, Fábio S. Flosi, Luis Caparroz Duarte, Adelson Dos Santos, and José A. Siqueira Dias. "Low-Cost Control and Measurement Circuit for the Implementation of Single Element Heat Dissipation Soil Water Matric Potential Sensor Based on a SnSe2 Thermosensitive Resistor." Sensors 21, no. 4 (February 21, 2021): 1490. http://dx.doi.org/10.3390/s21041490.

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A low-cost signal processing circuit developed to measure and drive a heat dissipation soil matric potential sensor based on a single thermosensitive resistor is demonstrated. The SnSe2 has a high thermal coefficient, from −2.4Ω/°C in the 20 to 25 °C to −1.07Ω/°C in the 20 to 25 °C. The SnSe2 thermosensitive resistor is encapsulated with a porous gypsum block and is used as both the heating and temperature sensing element. To control the power dissipated on the thermosensitive resistor and keep it constant during the heat pulse, a mixed analogue/digital circuit is used. The developed control circuit is able to maintain the dissipated power at 327.98±0.3% mW when the resistor changes from 94.96Ω to 86.23Ω. When the gravimetric water content of the porous block changes from dry to saturated (θw=36.7%), we measured a variation of 4.77Ω in the thermosensitive resistor, which results in an end-point sensitivity of 130 mΩ/%. The developed system can easily meet the standard requirement of measuring the gravimetric soil water content with a resolution of approximately Δθw=1%, since the resistance is measured with a resolution of approximately μ31μΩ, three orders of magnitude smaller than the sensitivity.
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de Bolla, Peter, Ewan Jones, Paul Nulty, Gabriel Recchia, and John Regan. "The Conceptual Foundations of the Modern Idea of Government in the British Eighteenth Century: A Distributional Concept Analysis." International Journal for History, Culture and Modernity 7, no. 1 (November 2, 2019): 619–52. http://dx.doi.org/10.18352/hcm.575.

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This essay sets out a new method for the history of ideas. Using a mixed approach combining computer assisted reading methods with more traditional close reading, the essay tracks the evolution of a set of terms over the eighteenth century that have become central to how we think about government in particular and political concepts in general. The essay is offered as an example of how data mining very large digital archives allows us to see trends and patterns that are invisible at the granular level of human scale reading, and it proposes that these largescale observations can both complement and complicate our hitherto analogue histories of ideas. The findings of this mixed approach indicate that ‘despotism’ functioned as a type of gate in an electronic circuit, sometimes allowing the connection to liberty and government and on others blocking those connections. Most significantly ‘despotism’ is shown to be an essential ingredient in the conceptual foundations of a theory of rights, liberty and government in the period and that this structure underpins contemporary theories of government.
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Більше джерел

Дисертації з теми "Mixed analogue digital integrate circuit"

1

Garagate, C. "Simulation backplane : an integrated environment for mixed-mode simulation of multiple analogue, digital and behavioural circuit simulators." Thesis, University of Southampton, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241981.

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2

Chang, Yu-Hsu Henry. "Macromodeling and simulation of high-performance mixed Analog/Digital circuits /." Thesis, Connect to this title online; UW restricted, 1994. http://hdl.handle.net/1773/5956.

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3

Wemple, Ivan L. "Parasitic substrate modeling for monolithic mixed analog/digital circuit design and verification /." Thesis, Connect to this title online; UW restricted, 1996. http://hdl.handle.net/1773/5944.

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4

Kasturi, Prasan. "A CAD tool for analog and mixed signal CMOS circuits /." View online ; access limited to URI, 2006. http://0-digitalcommons.uri.edu.helin.uri.edu/dissertations/AAI3248232.

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5

Hirschman, Karl D. "Process development of an analog/digital mixed-mode BiCMOS system at RIT /." Online version of thesis, 1992. http://hdl.handle.net/1850/11238.

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6

VALLICELLI, ELIA ARTURO. "Design of Mixed-Signal Electronic Instrumentation for Proton Sound Detectors." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301978.

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Анотація:
La tecnica acustica di verifica sperimentale del range di protoni (ionoacustica) si basa sul rilevamento del debole segnale termoacustico emesso dalla rapida deposizione di energia che avviene alla fine range del fascio, in corrispondenza del picco di Bragg. In questo contesto, questa tesi presenta le principali caratteristiche della strumentazione microelettronica utilizzata per i Proton Sound Detector introducendo specifiche tecniche di progettazione fortemente orientate sia alla massimizzazione del Rapporto Segnale Rumore SNR (a livello di sensore acustico) che minimizzazione della figura di rumore (a livello di amplificatore analogico). La prima parte di questa tesi tratta delle sfide strumentali relative agli esperimenti ionoacustici fornendo dettagli tecnici specifici riguardanti sia la progettazione del sensore acustico (ovvero come costruire il sensore massimizzando l'SNR) sia il design dell'amplificatore a basso rumore (LNA). Verranno presentati i risultati sperimentali di un primo esperimento effettuato presso il Laboratorio Maier-Leibniz di Garching, Monaco, con un fascio di protoni a 20 MeV (scenario preclinico) e verrà mostrato come una progettazione elettronica dedicata a segnali misti permetta di migliorare significativamente il rapporto segnale-rumore e l'accuratezza della localizzazione del picco di Bragg di 6 dB. In questo contesto, questo primo sviluppo del rivelatore raggiunge due importanti obiettivi: il miglioramento dell'SNR a parità di dose e una forte semplificazione della strumentazione del rivelatore rispetto allo stato dell'arte, consentendo una maggiore precisione della misurazione dell'impulso acustico, e allo stesso tempo incrementando la portabilità e la compattezza del dispositivo. Nelle applicazioni cliniche di adroterapia, l'energia del fascio (da 65 MeV fino a 200 MeV) e la dose vengono scelte in funzione dello specifico scenario clinico. Ciò comporta segnali acustici di ampiezza e larghezza di banda diverse, costringendo l’adozione di soluzioni tecnologiche avanzate in grado di gestire un ampio spettro di segnali in termini di larghezza di banda, ampiezza e rumore. Per questo motivo, la seconda parte di questa tesi propone un modello Matlab efficiente e innovativo del fenomeno fisico ionoacustico, che condensa in un unico sistema lineare tempo invariante tutti i processi di conversione dell'energia coinvolti. Il modello ionoacustico proposto sostituisce i complessi strumenti di simulazione classici (usati per caratterizzare il segnale acustico indotto dal fascio di protoni) e facilita lo sviluppo di rivelatori dedicati fornendo una descrizione precisa del segnale acustico nei diversi scenari. Infine, verrà presentato il progetto di una seconda versione del Proton Sound Detector che introduce il concetto di media nel dominio dello spazio (invece della media nel dominio del tempo, basata sull’elaborazione di più shot del fascio che comporta una significativa extra-dose). Questo rilevatore utilizza un sensore multicanale per eseguire una media spaziale dei segnali acquisiti e aumentare l'SNR di 18 dB a parità di dose rispetto al classico approccio monocanale. Questo approccio tuttavia richiede lo sviluppo di elettronica altamente miniaturizzata che non può essere implementata con componenti standard su circuiti stampati. Viene quindi presentato il progetto e la caratterizzazione di un front-end analogico multicanale implementato su un Application-Specified-Integrated-Circuit (ASIC) in tecnologia CMOS 28 nm che permette di elaborare in parallelo tutti i 64 canali del sensore acustico. Questo High-Resolution Proton Sound Detector (HR-ProSD) è completato da un circuito digitale dedicato implementato su FPGA (Field Programmable Gate Array) che consente di mappare in tempo reale e 2D la deposizione di dose nello spazio.
Acoustic proton range experimental verification technique (iono-acoustics) is based on sensing the weak thermoacoustic signal emitted by the fast energy deposition (and/or the heating process) at the end of the beam range (Bragg Peak). In this context, this thesis presents the main characteristics of the micro-electronics instrumentation used for proton sound detectors introducing specific design techniques strongly oriented to both maximization of the acoustic Signal-to-Noise-Ratio (at the Acoustic Sensor level) and Noise-Figure minimization (at analog amplifier level). The first part of this thesis addresses all the instrumentation challenges related to iono-acoustic experiments providing specific technical details regarding both acoustic sensor design (i.e. how to build the sensor while maximizing the SNR) and the LNA design. The experimental results of a first experiment carried out at Maier-Leibniz Laboratory in Garching, Munich, with a proton beam at 20 MeV (sub-clinical energy) will be presented and it will be shown how a dedicated mixed-signal electronics design allows to significantly improve the signal-to-noise ratio and the accuracy of the BP localization by 6 dB. In this context, this first detector development achieves two important objectives: the improvement of the acoustic SNR and a strong simplification of the detector instrumentation w.r.t. state-of-the-art, enabling increasing accuracy of the acoustic pulse measurement, and at the same time the portability and compactness of the device. In clinical hadron-therapy applications, variable beam energy (from 65 MeV up to 200 MeV) and variable doses are used as a function of the selected medical treatment. This induces different acoustic pulses amplitude and bandwidth, forcing advanced technological solutions capable of handling a wide spectrum of signals in terms of bandwidth, amplitude, and noise. For this reason, the second part of this thesis proposes an efficient and innovative Matlab Model of the ionoacoustic physical phenomenon, based on englobing in a single mathematical Linear-Time-Invariant-System all energy conversion processes involved in iono-acoustics. The proposed ionoacoustics model replaces classical and complex simulation tools (used to characterize the proton induced acoustic signal) and facilitates the development of dedicated detectors. Finally, the design of a second version of the Proton Sound Detector will be presented that introduces the concept of space-domain averaging (instead of time-domain averaging based on multiple beam shot processing for noise attenuation and thus extra-doses). This detector uses a multi-channel sensor to perform a spatial average of the acquired signals and increase the SNR by 18 dB at the same dose compared to the classic single channel approach. This approach however requires the development of highly miniaturized electronics that cannot be implemented with off-the-shelf components on Printed Circuit Boards. The design and characterization of a multichannel analog front-end implemented on a CMOS 28 nm Application-Specified-Integrated-Circuit (ASIC) which allows to process the 64 channels of the acoustic sensor in parallel is then presented. This High-Resolution Proton Sound Detector (HR-ProSD) is completed by digital circuits implemented on Field Programmable Gate Array (FPGA) that allow to locate in real time the deposition of energy in space.
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7

Toner, Michael F. "MADBIST : a scheme for built-in self-test of mixed analog-digital integrated circuits." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=40451.

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Consumers are demanding more and more value for each dollar spent on new electronic equipment. Built-In Self-Test (BIST) of electronic circuits and equipment will help to satiate the demand for self test, self diagnostics, and self repair. This dissertation explores a technique for a Mixed Analog Digital BIST (MADBIST) on a mixed-signal Integrated Circuit (IC). Specifically, on-chip tests for the Analog-to-Digital Converter and Digital-to-Analog Converter on the mixed-signal IC are developed. (The digital portion of the IC can be tested using digital BIST techniques). The tests implemented include Frequency Response, Signal-to-Noise Ratio, Gain Tracking, Inter-Modulation Distortion, and Harmonic Distortion. A precision analog test stimulus is efficiently generated on-chip using digital circuitry. The test stimulus itself is encoded within a Pulse-Density-Modulated bit stream. A narrow-band digital filter is employed to extract the measurement results. Experimental results from a test chip and a prototype circuit board are provided. Some of the engineering and economical trade-offs associated with the design of the tests are considered. The overhead required to implement several types of tests is dealt with. We also explore the relationship between the accuracy achieved by the test and the amount of resources required to implement it.
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8

al-Sarʻāwī, Said Fares. "Design techniques for low power mixed analog-digital circuits with application to smart wireless systems /." Title page, contents and abstract only, 2003. http://web4.library.adelaide.edu.au/theses/09PH/09pha461.pdf.

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9

Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range.

QC 20170905

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10

Sadeghifar, Mohammad Reza. "On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters." Licentiate thesis, Linköpings universitet, Elektroniska Kretsar och System, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-114274.

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High-speed and high-resolution digital-to-analog converters (DACs) are vital components in all telecommunication systems. Radio-frequency digital-to-analog converter (RFDAC) provides high-speed and high-resolution conversion from digital domain to an analog signal. RFDACs can be employed in direct-conversion radio transmitter architectures. The idea of RFDAC is to utilize an oscillatory pulse-amplitude modulation instead of the conventional zero-order hold pulse amplitude modulation, which results in DAC output spectrum to have high energy high-frequency lobe, other than the Nyquist main lobe. The frequency of the oscillatory pulse can be chosen, with respect to the sample frequency, such that the aliasing images of the signal at integer multiples of the sample frequency are landed in the high-energy high-frequency lobes of the DAC frequency response. Therefore the high-frequency images of the signal can be used as the output of the DAC, i.e., no need to the mixing stage for frequency up-conversion after the DAC in the radio transmitter. The mixing stage however is not eliminated but it is rather moved into the DAC elements and therefore the local oscillator (LO) signal with high frequency should be delivered to each individual DAC element. In direct-conversion architecture of IQ modulators which utilize the RFDAC technique, however, there is a problem of finite image rejection. The origin of this problem is the different polarity of the spectral response of the oscillatory pulse-amplitude modulation in I and Q branches. The conditions where this problem can be alleviated in IQ modulator employing RFDACs is also discussed in this work. ΣΔ modulators are used preceding the DAC in the transmitter chain to reduce the digital signal’s number of bits, still maintain the same resolution. By utilizing the ΣΔ modulator now the total number of DAC elements has decreased and therefore the delivery of the high-frequency LO signal to each DAC element is practical. One of the costs of employing ΣΔ modulator, however, is a higher quantization noise power at the output of the DAC. The quantization noise is ideally spectrally shaped to out-of-band frequencies by the ΣΔ modulator. The shaped noise which usually has comparatively high power must be filtered out to fulfill the radio transmission spectral mask requirement. Semi-digital FIR filter can be used in the context of digital-to-analog conversion, cascaded with ΣΔ modulator to filter the out-of-band noise by the modulator. In the same time it converts the signal from digital domain to an analog quantity. In general case, we can have a multi-bit, semi-digital FIR filter where each tap of the filter is realized with a sub-DAC of M bits. The delay elements are also realized with M-bit shift registers. If the output of the modulator is given by a single bit, the semi-digital FIR filter taps are simply controlled by a single switch assuming a current-steering architecture DAC. One of the major advantages is that the static linearity of the DAC is optimum. Since there are only two output levels available in the DAC, the static transfer function, regardless of the mismatch errors, is always given by a straight line. In this work, the design of SDFIR filter is done through an optimization procedure where the ΣΔ noise transfer function is also taken into account. Different constraints are defined for different applications in formulation of the SDFIR optimization problem. For a given radio transmitter application the objective function can be defined as, e.g., the hardware cost for SDFIR implementation while the constraint can be set to fulfill the radio transmitter spectral emission mask.
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Книги з теми "Mixed analogue digital integrate circuit"

1

Hurst, S. L. VLSI testing: Digital and mixed analogue/digital techniques. London: Institution of Electrical Engineers, 1998.

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C, Sansen Willy M., Huijsing Johan H. 1938-, and Plassche, Rudy J. van de., eds. Analog circuit design: Mixed A/D circuit design, sensor interface circuits and communication circuits. Boston: Kluwer Academic, 1994.

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Workshop of Advances in Analogue Circuit Design (11th 2002 Spa, Belgium). Analog circuit design: Structured mixed-mode design, multi-bit sigma-delta converters, short range RF circuits. Boston: Kluwer Academic Publishers, 2002.

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Plassche, Rudy J. Analog Circuit Design: High-Speed Analog-to-Digital Converters; Mixed Signal Design; PLL's and Synthesizers. Boston, MA: Springer US, 2000.

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5

Arizona, University of, and IEEE Circuits and Systems Society., eds. 2003 Southwest Symposium on Mixed-Signal Design: SSMSD : February 23-25, 2003, Las Vegas, Nevada, U.S.A. Piscataway, N.J: IEEE, 2003.

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6

Plassche, Rudy J. van de., Huijsing Johan H. 1938-, and Sansen Willy M. C, eds. Analog circuit design: High-speed analog-to-digital converters, mixed-signal design, PLL's and synthesizers. Boston, MA: Kluwer Academic Publishers, 2000.

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7

Re-use based methodologies and tools in the design of analog and mixed-signal integrated circuits. Dordrecht: Springer, 2005.

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8

Switched-current signal processing and A/D conversion circuits: Design and implementation. Boston, MA: Kluwer Academic, 2000.

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9

Jonsson, Bengt E. Switched-current signal processing and A/D conversion circuits: Design and implementation. Boston, MA: Kluwer Academic, 2000.

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10

J, Plassche Rudy, and Sansen Willy M. C, eds. Analog Circuit Design: Low-Noise, Low-Power, Low-Voltage; Mixed-Mode Design with CAD Tools; Voltage, Current and Time References. Boston, MA: Springer US, 1996.

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Частини книг з теми "Mixed analogue digital integrate circuit"

1

Salmani, Hassan. "Hardware Trojans in Analog and Mixed-Signal Integrated Circuits." In Trusted Digital Circuits, 121–31. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-79081-7_9.

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2

Bizzarri, Federico, Angelo Brambilla, Giambattista Gruosso, and Giancarlo Storti Gajani. "Steady State Simulation of Mixed Analog/Digital Circuits." In Integrated Circuits for Analog Signal Processing, 243–70. New York, NY: Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-1383-7_11.

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3

Bretthauer, U., and E. H. Horneber. "Mixed Analog Digital Simulation of Integrated Circuits with BRASIL." In Analog Design Issues in Digital VLSI Circuits and Systems, 41–51. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6101-9_4.

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4

Simancas-García, José L., Farid A. Meléndez-Pertuz, Ramón E. R. González, César A. Cárdenas, and Carlos Andrés Collazos-Morales. "Digital Analog Converter for the Extraction of Test Signals from Mixed Integrated Circuits." In Computational Science and Its Applications – ICCSA 2021, 207–23. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-86653-2_15.

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5

Vandersteen, Gerd, Piet Wambacq, Stéphane Donnay, Wolfgang Eberle, and Yves Rolain. "Fast: An Efficient High-Level Dataflow Simulator of Mixed-Signal Front-Ends of Digital Telecom Transceivers." In Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits, 43–59. Boston, MA: Springer US, 2001. http://dx.doi.org/10.1007/0-306-48089-1_3.

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6

"Analog, Digital and Mixed-Mode Signal Processing." In Signal Processing and Integrated Circuits, 3–6. Chichester, UK: John Wiley & Sons, Ltd, 2012. http://dx.doi.org/10.1002/9781119942306.ch1.

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7

"Simulation of Mixed SwitchedCapacitor/Digital Networks with SignalDriven Switches." In Computer-Aided Design of Analog Integrated Circuits and Systems. IEEE, 2009. http://dx.doi.org/10.1109/9780470544310.ch48.

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8

Wambacq, Piet, Charlotte Soens, Geert Van der Plas, Mustafa Badaroglu, and Stéphane Donnay. "Substrate Noise Coupling from Digital to Analog Circuits in Mixed-Signal Integrated Circuits." In Wireless Technologies, 567–88. CRC Press, 2017. http://dx.doi.org/10.1201/9780849379970-23.

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9

Donnay, St√©phane, Charlotte Soens, Mustafa Badaroglu, Piet Wambacq, and Geert Van der Plas. "Substrate Noise Coupling from Digital to Analog Circuits in Mixed-Signal Integrated Circuits." In Wireless Technologies, 567–88. CRC Press, 2007. http://dx.doi.org/10.1201/9780849379970.ch20.

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Тези доповідей конференцій з теми "Mixed analogue digital integrate circuit"

1

Karki, Sagar. "Systematic EFA Approach in Locating Floating Nodes in Analog Mixed Signal Devices." In ISTFA 2011. ASM International, 2011. http://dx.doi.org/10.31399/asm.cp.istfa2011p0359.

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Abstract With advancements in technology, it is nearly impossible to find the defects in integrated circuits without applying appropriate failure isolation techniques. Failure isolation is a critical step in identifying the physical defect on integrated circuits. This paper addresses the challenges imposed by floating node conditions on both analog and digital circuitry, and a case study for each circuit type is presented. Different approaches along with the challenges involved in isolating each case in a very timely manner are addressed. Finally, the usefulness of global isolation tools, such as PEM (Photon Emission Microscopy), FIB (Focused Ion Beam), and micro-probing, is also discussed.
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2

Seo, Kuhn, Brent Wahl, Myrna Mayonte, and Young Gon Kim. "Methodologies for Isolating Faults in Multi Chip Fiber Optic Transceivers That Use GHz Mixed Signal ICs." In ISTFA 2002. ASM International, 2002. http://dx.doi.org/10.31399/asm.cp.istfa2002p0251.

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Abstract This paper outlines a methodology which accurately identifies fault locations in Mixed Signal Integrated Circuits (ICs). The architecture of Mixed Signal ICs demands more attention during failure analysis because of the complexity of measuring both the analog and digital signals in a compact circuit. In this paper, the GHz range of data signal or radio frequency (RF) signal from an internal IC circuit will be extracted by a high-impedance active single probe in order to find the internal IC circuit failure locations. The advantages of using a single probe is that it can maneuver to extract data almost anywhere in the circuit, providing ranges of bandwidth in GHz with no loading effect on the circuits during measurement. The process of preparing a sample and extracting a signal will be described.
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3

Acuna, E. L., J. P. Dervenis, A. J. Pagones, and R. A. Saleh. "iSPLICE3: a new simulator for mixed analog/digital circuits." In 1989 Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE, 1989. http://dx.doi.org/10.1109/cicc.1989.56745.

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4

Trontelj, J., L. Trontelj, T. Slivnik, T. Pletersek, and G. Shenton. "Automatic circuit and layout design for mixed analog/digital ASICs." In 1989 Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE, 1989. http://dx.doi.org/10.1109/cicc.1989.56773.

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5

Skrzypiec, Pawel, and Zbigniew Marszalek. "Linux Kernel Driver for External Analog-to-Digital and Digital-to-Analog Converters." In 2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2020. http://dx.doi.org/10.23919/mixdes49814.2020.9155842.

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6

Jinglong Li, Masuda Motohiko, Winter Wang, Joe Yu, and Grace Song. "Failure analysis of digital-analog mixed integrated circuit at high temperature." In 2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA). IEEE, 2009. http://dx.doi.org/10.1109/ipfa.2009.5232628.

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7

He, Michel, Jacques-Olivier Klein, and Eric Belhaire. "Mixed analog-digital design of a learning nano-circuit for neuronal architectures." In Technology of Integrated Systems in Nanoscale Era (DTIS). IEEE, 2008. http://dx.doi.org/10.1109/dtis.2008.4540247.

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Kalyani-garimella, Lalitha, Annajirao Garimella, Jaime Ramirez-Angulo, R. G. Carvajal, and A. j. Lopez-Martin. "Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs." In IEEE Custom Integrated Circuits Conference 2006. IEEE, 2006. http://dx.doi.org/10.1109/cicc.2006.320936.

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Kim, Minsu, Joo-Young Kim, Seungjin Lee, Jinwook Oh, and Hoi-Jun Yoo. "A 54GOPS 51.8mW analog-digital mixed mode Neural Perception Engine for fast object detection." In 2009 IEEE Custom Integrated Circuits Conference (CICC). IEEE, 2009. http://dx.doi.org/10.1109/cicc.2009.5280749.

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Chacon, Oscar Morales, Jacob Wikner, Atila Alvandpour, and Liter Siek. "Comparative Analysis of CMOS Latch-Driver Circuits for Current-Steering Digital-to-Analog Converters." In 2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2022. http://dx.doi.org/10.23919/mixdes55591.2022.9837990.

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