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Статті в журналах з теми "Integrated Computer Modeling"
Delen, Dursun, Nikunj P. Dalal, and Perakath C. Benjamin. "Integrated modeling." Communications of the ACM 48, no. 4 (April 2005): 107–12. http://dx.doi.org/10.1145/1053291.1053296.
Повний текст джерелаEngelke, H., J. Grotrian, C. Scheuing, A. Schmackpfeffer, W. Schwarz, B. Solf, and J. Tomann. "Integrated Manufacturing Modeling System." IBM Journal of Research and Development 29, no. 4 (July 1985): 343–55. http://dx.doi.org/10.1147/rd.294.0343.
Повний текст джерелаPopov, Vladimir, and Tatjana Grigorjeva. "INTEGRATED COMPUTER – AIDED DESIGN OF BUILDING STRUCTURES." Engineering Structures and Technologies 2, no. 1 (March 31, 2010): 31–37. http://dx.doi.org/10.3846/skt.2010.04.
Повний текст джерелаBennett, James F., Walter R. Johnson, and Charles F. Marshall. "Integrated Spill Modeling for Impact Analysis." International Oil Spill Conference Proceedings 2003, no. 1 (April 1, 2003): 943–46. http://dx.doi.org/10.7901/2169-3358-2003-1-943.
Повний текст джерелаHorváth, László, and Imre J. Rudas. "Emerging Intelligent Technologies in Computer-Aided Engineering." Journal of Advanced Computational Intelligence and Intelligent Informatics 4, no. 4 (July 20, 2000): 268–78. http://dx.doi.org/10.20965/jaciii.2000.p0268.
Повний текст джерелаLin, Ying-Tsong, Timothy F. Duda, Weifeng G. Zhang, and Arthur Newhall. "Integrated ocean acoustics and dynamics modeling with computer clusters." Journal of the Acoustical Society of America 143, no. 3 (March 2018): 1926. http://dx.doi.org/10.1121/1.5036291.
Повний текст джерелаKunigahalli, Raghavan. "3D Modeling for Computer-Integrated Construction of RC Structures." Journal of Computing in Civil Engineering 11, no. 2 (April 1997): 92–101. http://dx.doi.org/10.1061/(asce)0887-3801(1997)11:2(92).
Повний текст джерелаGalle, Per. "Towards integrated, “intelligent”, and compliant computer modeling of buildings." Automation in Construction 4, no. 3 (October 1995): 189–211. http://dx.doi.org/10.1016/0926-5805(95)00004-k.
Повний текст джерелаAli, Adel L., Dia L. Ali, and Kamal S. Ali. "The role of geometric modeling in computer integrated manufacturing." Computers & Industrial Engineering 15, no. 1-4 (January 1988): 24–30. http://dx.doi.org/10.1016/0360-8352(88)90059-9.
Повний текст джерелаSun, Q., R. Z. Gan, K. H. Chang, and K. J. Dormer. "Computer-integrated finite element modeling of human middle ear." Biomechanics and Modeling in Mechanobiology 1, no. 2 (October 1, 2002): 109–22. http://dx.doi.org/10.1007/s10237-002-0014-z.
Повний текст джерелаДисертації з теми "Integrated Computer Modeling"
Wu, SunMan Patrick. "Modeling of micro-electro-mechanical integrated test structures." Thesis, Massachusetts Institute of Technology, 1995. http://hdl.handle.net/1721.1/36044.
Повний текст джерелаIncludes bibliographical references (leaf 38).
by SunMan Patrick Wu.
M.Eng.
Michael, Christopher I. "Statistical modeling for computer-aided design of analog MOS integrated circuits /." The Ohio State University, 1991. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487688973683252.
Повний текст джерелаFan, Wei Ph D. Massachusetts Institute of Technology. "Advanced modeling of planarization processes for integrated circuit fabrication." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/78446.
Повний текст джерелаCataloged from PDF version of thesis.
Includes bibliographical references (p. 215-225).
Planarization processes are a key enabling technology for continued performance and density improvements in integrated circuits (ICs). Dielectric material planarization is widely used in front-end-of-line (FEOL) processing for device isolation and in back-end-of-line (BEOL) processing for interconnection. This thesis studies the physical mechanisms and variations in the planarization using chemical mechanical polishing (CMP). The major achievement and contribution of this work is a systematic methodology to physically model and characterize the non-uniformities in the CMP process. To characterize polishing mechanisms at different length scales, physical CMP models are developed in three levels: wafer-level, die-level and particle-level. The wafer-level model investigates the CMP tool effects on wafer-level pressure non-uniformity. The die-level model is developed to study chip-scale non-uniformity induced by layout pattern density dependence and CMP pad properties. The particle-level model focuses on the contact mechanism between pad asperities and the wafer. Two model integration approaches are proposed to connect wafer-level and particle-level models to the die-level model, so that CMP system impacts on die-level uniformity and feature size dependence are considered. The models are applied to characterize and simulate CMP processes by fitting polishing experiment data and extracting physical model parameters. A series of physical measurement approaches are developed to characterize CMP pad properties and verify physical model assumptions. Pad asperity modulus and characteristic asperity height are measured by nanoindentation and microprofilometry, respectively. Pad aging effect is investigated by comparing physical measurement results at different pad usage stages. Results show that in-situ conditioning keeps pad surface properties consistent to perform polishing up to 16 hours, even in the face of substantial pad wear during extended polishing. The CMP mechanisms identified from modeling and physical characterization are applied to explore an alternative polishing process, referred to as pad-in-a-bottle (PIB). A critical challenge related to applied pressure using pad-in-a-bottle polishing is predicted.
by Wei Fan.
Ph.D.
Pang, Huey, and 彭栩怡. "Computer modeling of building-integrated photovoltaic systems using genetic algorithms for optimization." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2002. http://hub.hku.hk/bib/B31227764.
Повний текст джерелаLin, Yi-Tzer. "Modeling and analysis for message reachability in distributed manufacturing systems." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/24292.
Повний текст джерелаMa, Min. "Model order reduction for efficient modeling and simulation of interconnect networks." Thesis, McGill University, 2007. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=103269.
Повний текст джерелаIn this thesis, a number of new reduction techniques were developed in order to address the key shortcomings of current model order reduction methods. Specifically a new approach for handling macromodels with a very large number of ports was developed, a multi-level reduction and sprasification method was proposed for regular as well as parametric macromodels, and finally a new time domain reduction method was presented for the macromodeling of nonlinear parametric systems. Using these approaches, CPU speedups of 1 to 2 orders of magnitude were obtained.
Short, Kristin Ilene 1971. "Towards integrated Intranet services : modeling the costs of corporate IP technology." Thesis, Massachusetts Institute of Technology, 1997. http://hdl.handle.net/1721.1/43530.
Повний текст джерелаAbrokwah, Kwaku O. "Characterization and modeling of plasma etch pattern dependencies in integrated circuits." Thesis, Massachusetts Institute of Technology, 2006. http://hdl.handle.net/1721.1/37054.
Повний текст джерелаLeaf 108 blank.
Includes bibliographical references (leaves 106-107).
A quantitative model capturing pattern dependent effects in plasma etching of integrated circuits (ICs) is presented. Plasma etching is a key process for pattern formation in IC manufacturing. Unfortunately, pattern dependent non-uniformities arise in plasma etching due to microloading and RIE lag. This thesis contributes a semi-empirical methodology for capturing and modeling microloading, RIE lag, and related pattern dependent effects. We apply this methodology to the study of interconnect trench etching, and show that an integrated model is able to predict both pattern density and feature size dependent non-uniformities in trench depth. Previous studies of variation in plasma etching have characterized microloading (due to pattern density), and RIE lag (aspect ratio dependent etching or ARDE) as distinct causes of etch non-uniformity for individual features. In contrast to these previous works, we present here a characterization and computational methodology for predicting IC etch variation on a chip scale that integrates both layout pattern density and feature scale or ARDE dependencies. The proposed integrated model performs well in predicting etch variation as compared to a pattern density only or feature scale only model.
by Kwaku O. Abrokwah.
M.Eng.
Hickey, Ann Marie. "Integrated scenario and process modeling support for collaborative requirements elicitation." Diss., The University of Arizona, 1999. http://hdl.handle.net/10150/284823.
Повний текст джерелаPark, Tae Hong 1973. "Characterization and modeling of pattern dependencies in copper interconnects for integrated circuits." Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/8082.
Повний текст джерелаIncludes bibliographical references (p. 173-176).
Copper metallization has emerged as the leading interconnect technology for deep sub-micron features, where electroplating and chemical mechanical polish (CMP) processes have a vital role in the fabrication of integrated circuits. The processes both suffer from a similar problem: the copper electroplated profiles and the polished surface exhibit pattern dependent topography. In this thesis, a methodology for the characterization and modeling of pattern dependent problems in copper interconnect topography is developed. For the electroplating process, the methodology consists of test structure and mask design to examine feature scale copper step height and the height of copper array regions as a function of underlying layout parameters. Semi-empirical response surface models are then generated with model parameters extracted from conventional and superfill plating processes. Once the models are calibrated, layout parameters including pattern density, line width distributions, and line length are extracted for each cell in a 40 gm by 40 tm discretization of any random chip layout. Then, a chip-scale prediction is achieved by simulating generalized average heights for each grid cell across the entire chip. The prediction result shows root mean square errors of less than 1000 A for array height and around 500 A for step height. This methodology provides the first known chip-scale prediction of electroplated topography. For pattern dependencies in copper CMP, this thesis focuses on the development of test structures and masks (including multi-level structures) to identify key pattern effects in both single-level and multi-level polishing.
(cont.) Especially for the multi-level studies, electrical test structures and measurements in addition to surface profile scans are seen to be important in accurately determining thickness variations. The developed test vehicle and characterization of copper dishing and oxide erosion serve as a basis for further pattern dependent model development. Finally, integration of electroplating and CMP chip-scale models is illustrated; the simulated step and array heights as well as topography pattern density are used as an input for the initial starting topography for CMP simulation of subsequent polishing profile evolution.
by Tae Hong Park.
Ph.D.
Книги з теми "Integrated Computer Modeling"
Pratt, M. J., R. D. Sriram, and M. J. Wozny, eds. Product Modeling for Computer Integrated Design and Manufacture. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-0-387-35187-2.
Повний текст джерелаDíaz, Carlos H. Modeling of Electrical Overstress in Integrated Circuits. Boston, MA: Springer US, 1995.
Знайти повний текст джерелаAn integrated introduction to computer graphics and geometric modeling. Boca Raton: Taylor & Francis, 2009.
Знайти повний текст джерела1945-, Kang Sung-Mo, and Duvvury Charvaka 1944-, eds. Modeling of electrical overstress in integrated circuits. Boston: Kluwer Academic Publishers, 1995.
Знайти повний текст джерелаChip-level modeling with VHDL. Englewood Cliffs, N.J: Prentice Hall, 1989.
Знайти повний текст джерелаTrond, Ytterdal, and Shur Michael, eds. Introduction to device modeling and circuit simulation. New York: Wiley, 1998.
Знайти повний текст джерелаHines, J. Richard. SPICE modeling guide. Richardson, TX(P.O.Box 851731, Richardson 75081): Oholiab Technology, 1987.
Знайти повний текст джерелаJean-Michel, Bergé, Levia Oz, and Rouillard Jacques, eds. Modeling in analog design. Boston: Kluwer Academic Publishers, 1995.
Знайти повний текст джерелаBergé, Jean-Michel. Modeling in Analog Design. Boston, MA: Springer US, 1995.
Знайти повний текст джерелаBeattie, Michael W. Efficient electromagnetic modeling for gigascale IC interconnect. Pittsburgh, Pa: Center for Electronic Design Automation, Carnegie Mellon University, 2000.
Знайти повний текст джерелаЧастини книг з теми "Integrated Computer Modeling"
Houlding, Simon W. "Features of an Integrated 3D Computer Approach." In 3D Geoscience Modeling, 39–69. Berlin, Heidelberg: Springer Berlin Heidelberg, 1994. http://dx.doi.org/10.1007/978-3-642-79012-6_4.
Повний текст джерелаPottier, Laurent. "“GMU” – An Integrated Microsound Synthesis System." In Computer Music Modeling and Retrieval, 82–88. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-39900-1_9.
Повний текст джерелаHirz, Mario, Wilhelm Dietrich, Anton Gfrerrer, and Johann Lang. "Modeling Techniques in CAD." In Integrated Computer-Aided Design in Automotive Development, 241–308. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-11940-8_4.
Повний текст джерелаRen, Yongjie, K. F. Wong, and B. T. Low. "An Integrated Approach for Flexible Workflow Modeling." In Lecture Notes in Computer Science, 354–59. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/978-3-540-46652-9_36.
Повний текст джерелаOh, Je Yeon, Jae-yoon Jung, Nam Wook Cho, Hoontae Kim, and Suk-Ho Kang. "Integrated Process Modeling for Dynamic B2B Collaboration." In Lecture Notes in Computer Science, 602–8. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11553939_86.
Повний текст джерелаKalachev, V. N., and Ye N. Khobotov. "Some Methods of Modeling for Computer Integrated Workshop." In CAD/CAM Robotics and Factories of the Future ’90, 83–87. Berlin, Heidelberg: Springer Berlin Heidelberg, 1991. http://dx.doi.org/10.1007/978-3-642-58214-1_12.
Повний текст джерелаKalachev, V. N., and Ye N. Khobotov. "Some Methods of Modeling for Computer Integrated Workshop." In CAD/CAM Robotics and Factories of the Future ’90, 667–71. Berlin, Heidelberg: Springer Berlin Heidelberg, 1991. http://dx.doi.org/10.1007/978-3-642-85838-3_84.
Повний текст джерелаKamoso, L. M., and A. Gakwaya. "Integrated Computer Aided Surface Modeling and BEM Analysis." In Boundary Elements XIII, 705–16. Dordrecht: Springer Netherlands, 1991. http://dx.doi.org/10.1007/978-94-011-3696-9_56.
Повний текст джерелаSong, Zhichao, Kai Sheng, Peng Zhang, Zhen Li, Bin Chen, and Xiaogang Qiu. "An Integrated Network Modeling for Road Maps." In Communications in Computer and Information Science, 17–27. Singapore: Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-2158-9_2.
Повний текст джерелаBaek, Yeul-Min, Joong-Geun Kim, Dong-Chan Cho, Jin-Aeon Lee, and Whoi-Yul Kim. "Integrated Noise Modeling for Image Sensor Using Bayer Domain Images." In Computer Vision/Computer Graphics CollaborationTechniques, 413–24. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-01811-4_37.
Повний текст джерелаТези доповідей конференцій з теми "Integrated Computer Modeling"
Karadimas, N. V., O. D. Mavrantza, and V. G. Loumos. "GIS Integrated Waste Production Modeling." In EUROCON 2005 - The International Conference on "Computer as a Tool". IEEE, 2005. http://dx.doi.org/10.1109/eurcon.2005.1630190.
Повний текст джерелаByram, Kevin, David Mar, John Parker, Steven Von der Porten, John Hankinson, Chris Lee, Kai Mayeda, et al. "Computer modeling and analysis of thermal link performance for an optical refrigerator." In Integrated Optoelectronic Devices 2008, edited by Richard I. Epstein and Mansoor Sheik-Bahae. SPIE, 2008. http://dx.doi.org/10.1117/12.764287.
Повний текст джерелаFatemi, B., and J. Wiederrick. "Computer Modeling, Simulation, and Validation at FMC." In ASME 1991 International Computers in Engineering Conference and Exposition. American Society of Mechanical Engineers, 1991. http://dx.doi.org/10.1115/cie1991-0142.
Повний текст джерелаFeng, Lei, Quan-Jun Yin, Ji-Wen Hu, and Ya-Bing Zha. "IBMSE: An Integrated Behavior Modeling and Simulation Environment." In 2010 Second International Conference on Computer Modeling and Simulation (ICCMS). IEEE, 2010. http://dx.doi.org/10.1109/iccms.2010.227.
Повний текст джерела"Integrated Modeling of Road Environments for Driving Simulation." In International Conference on Computer Graphics Theory and Applications. SCITEPRESS - Science and and Technology Publications, 2015. http://dx.doi.org/10.5220/0005308600700080.
Повний текст джерелаXu, Jianyuan, and Jingjing Zhao. "Information Fusion Algorithms in Ins/Smns Integrated Navigation System." In 2nd International Conference on Computer Application and System Modeling. Paris, France: Atlantis Press, 2012. http://dx.doi.org/10.2991/iccasm.2012.350.
Повний текст джерелаHuber, Bernhard, and Roman Obermaisser. "Model-Based Development of Integrated Computer Systems: Modeling the Execution Platform." In 2007 Fifth Workshop on Intelligent Solutions in Embedded Systems. IEEE, 2007. http://dx.doi.org/10.1109/wises.2007.4408502.
Повний текст джерелаXiao, Jin, Chengtao Zhao, Xiaoguang Hu, Guofeng Zhang, and Lei Liu. "Modeling of Peripheral Circuit of Bus-integrated Computer Based on Saber." In 2021 IEEE 16th Conference on Industrial Electronics and Applications (ICIEA). IEEE, 2021. http://dx.doi.org/10.1109/iciea51954.2021.9516194.
Повний текст джерелаZhang, Wenlei, and Yushun Fan. "A Generic Multi-domain Integrated Product Modeling Framework." In 2006 10th International Conference on Computer Supported Cooperative Work in Design. IEEE, 2006. http://dx.doi.org/10.1109/cscwd.2006.253002.
Повний текст джерелаLaias, Elmabruk, Irfan Awan, and Pauline M. L. Chan. "An Integrated Uplink Scheduler in IEEE 802.16." In 2008 Second UKSIM European Symposium on Computer Modeling and Simulation (EMS). IEEE, 2008. http://dx.doi.org/10.1109/ems.2008.31.
Повний текст джерелаЗвіти організацій з теми "Integrated Computer Modeling"
Hanley, C. J., and N. L. Marshall. An integrated computer modeling environment for regional land use, air quality, and transportation planning. Office of Scientific and Technical Information (OSTI), April 1997. http://dx.doi.org/10.2172/477695.
Повний текст джерелаNechaev, V., Володимир Миколайович Соловйов, and A. Nagibas. Complex economic systems structural organization modelling. Politecnico di Torino, 2006. http://dx.doi.org/10.31812/0564/1118.
Повний текст джерелаRankin, Nicole, Deborah McGregor, Candice Donnelly, Bethany Van Dort, Richard De Abreu Lourenco, Anne Cust, and Emily Stone. Lung cancer screening using low-dose computed tomography for high risk populations: Investigating effectiveness and screening program implementation considerations: An Evidence Check rapid review brokered by the Sax Institute (www.saxinstitute.org.au) for the Cancer Institute NSW. The Sax Institute, October 2019. http://dx.doi.org/10.57022/clzt5093.
Повний текст джерела