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Статті в журналах з теми "High level Synthesi"
Rajan, S. P., M. Fujita, K. Yuan, and M. T.-C. Lee. "ATM switch design by high-level modeling, formal verification and high-level synthesi." ACM Transactions on Design Automation of Electronic Systems 3, no. 4 (October 1998): 554–62. http://dx.doi.org/10.1145/296333.296342.
Повний текст джерелаYang, Hae-Chan, Sang-Jun Park, Kwoan-Young Park, Jae-Hyun Sa, and Tae-Hwan Kim. "High-level Synthesis Design and Implementation of an Efficient Capsule Network Inference System in an FPGA." Journal of the Institute of Electronics and Information Engineers 58, no. 11 (November 30, 2021): 39–47. http://dx.doi.org/10.5573/ieie.2021.58.11.39.
Повний текст джерелаBolton, Martin. "High-level synthesis." Microprocessors and Microsystems 18, no. 8 (October 1994): 489. http://dx.doi.org/10.1016/0141-9331(94)90097-3.
Повний текст джерелаPawlak, Adam. "High-level synthesis." Microprocessing and Microprogramming 35, no. 1-5 (September 1992): 261. http://dx.doi.org/10.1016/0165-6074(92)90325-2.
Повний текст джерелаYAMAMOTO, Takahiro. "Safety assessment of high-level nuclear waste disposal in Japan from the standpoint of geology." Synthesiology English edition 4, no. 4 (2012): 202–11. http://dx.doi.org/10.5571/syntheng.4.202.
Повний текст джерелаRavi, Selvaraj, and M. Joseph. "High-Level Test Synthesis." ACM Transactions on Design Automation of Electronic Systems 19, no. 4 (August 2014): 1–27. http://dx.doi.org/10.1145/2627754.
Повний текст джерелаEwering, Christian, and Gunter Gerhardt. "PASS: High level synthesis." Microprocessing and Microprogramming 30, no. 1-5 (August 1990): 103–8. http://dx.doi.org/10.1016/0165-6074(90)90225-x.
Повний текст джерелаXing, Xianwu, and Ching Chuen Jong. "Floorplan-Driven Multivoltage High-Level Synthesis." VLSI Design 2009 (September 6, 2009): 1–10. http://dx.doi.org/10.1155/2009/156751.
Повний текст джерелаDossis, M. "High-level Synthesis Integrated Verification." Engineering, Technology & Applied Science Research 5, no. 5 (October 4, 2015): 864–70. http://dx.doi.org/10.48084/etasr.596.
Повний текст джерелаGajski, D. D., and L. Ramachandran. "Introduction to high-level synthesis." IEEE Design & Test of Computers 11, no. 4 (1994): 44–54. http://dx.doi.org/10.1109/54.329454.
Повний текст джерелаДисертації з теми "High level Synthesi"
Amarasinghe, V. Kosala I. "Distributed high-level synthesis." Thesis, University of Southampton, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.438696.
Повний текст джерелаLanger, Jan. "High-Level-Synthese von Operationseigenschaften." Doctoral thesis, Universitätsbibliothek Chemnitz, 2011. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-79059.
Повний текст джерелаThe complete verification approach using special operation properties is an accepted methodology for the formal verification of digital circuits. Operation properties describe the behavior of a circuit during a certain time interval. They can be sequentially concatenated in order to specify the overall behavior. Additionally, a formal completeness check proves that the sequence of properties consistently determines the exact value of the output signals for every valid sequence of input signal values. This work examines how a circuit description can be automatically derived from a set of operation properties whose completeness has been proven. In contrast to the traditional design flow at register-transfer level (RTL), this method offers two advantages. First, the prove of completeness helps to avoid many design errors. Second, the design of operation properties resembles the design of timing diagrams often used in textual specifications. Therefore, the design level is closer to the specification level and errors caused by refinement steps are avoided. The design tool vhisyn performs the high-level synthesis from a complete set of operation properties to a description at RTL. The results show that both the synthesis algorithms and the generated circuit descriptions are efficient and allow the design of larger applications. This is demonstrated by means of two case studies
Baidas, Zaher Abdulkarim. "High-level floating-point synthesis." Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325049.
Повний текст джерелаAbbas, Naeem. "Acceleration of a bioinformatics application using high-level synthesis." Phd thesis, École normale supérieure de Cachan - ENS Cachan, 2012. http://tel.archives-ouvertes.fr/tel-00847076.
Повний текст джерелаLawrence, Bleddyn Idris. "High level synthesis with interconnect prediction." Thesis, University of Southampton, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.437114.
Повний текст джерелаYeung, Ping F. "High-level synthesis of VLSI circuits." Thesis, University of Edinburgh, 1992. http://hdl.handle.net/1842/11647.
Повний текст джерелаFallside, Hamish. "High level synthesis of memory architectures." Thesis, University of Edinburgh, 1995. http://hdl.handle.net/1842/10882.
Повний текст джерелаFinlay, Iain William. "High-level synthesis using structural input." Thesis, University of Edinburgh, 1992. http://hdl.handle.net/1842/14849.
Повний текст джерелаSchmidt, Marco, Ulrich Möhrke, and Paul Herrmann. "Verhaltensbeschreibung in der High-Level Synthese." Universität Leipzig, 1996. https://ul.qucosa.de/id/qucosa%3A34506.
Повний текст джерелаUguen, Yohann. "High-level synthesis and arithmetic optimizations." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI099.
Повний текст джерелаHigh-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, due to their relatively young nature, they still lack many arithmetic optimizations. This thesis proposes safe arithmetic optimizations that should always be applied. These optimizations are simple operator specializations, following the C semantic. Other require to a lift the semantic embedded in high-level input program languages, which are inherited from software programming, for an improved accuracy/cost/performance ratio. To demonstrate this claim, the sum-of-product of floating-point numbers is used as a case study. The sum is performed on a fixed-point format, which is tailored to the application, according to the context in which the operator is instantiated. In some cases, there is not enough information about the input data to tailor the fixed-point accumulator. The fall-back strategy used in this thesis is to generate an accumulator covering the entire floating-point range. This thesis explores different strategies for implementing such a large accumulator, including new ones. The use of a 2's complement representation instead of a sign+magnitude is demonstrated to save resources and to reduce the accumulation loop delay. Based on a tapered precision scheme and an exact accumulator, the posit number systems claims to be a candidate to replace the IEEE floating-point format. A throughout analysis of posit operators is performed, using the same level of hardware optimization as state-of-the-art floating-point operators. Their cost remains much higher that their floating-point counterparts in terms of resource usage and performance. Finally, this thesis presents a compatibility layer for HLS tools that allows one code to be deployed on multiple tools. This library implements a strongly typed custom size integer type along side a set of optimized custom operators
Книги з теми "High level Synthesi"
Coussy, Philippe, and Adam Morawiec, eds. High-Level Synthesis. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. High — Level Synthesis. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9.
Повний текст джерелаCamposano, Raul, and Wayne Wolf, eds. High-Level VLSI Synthesis. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3966-7.
Повний текст джерелаCamposano, Raul. High-Level VLSI Synthesis. Boston, MA: Springer US, 1991.
Знайти повний текст джерелаWinterstein, Felix. Separation Logic for High-level Synthesis. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-53222-6.
Повний текст джерелаTamás, Visegrády, and Jankovits István, eds. High level synthesis of pipelined datapaths. Chichester, [England]: Wiley, 2001.
Знайти повний текст джерелаWalker, Robert A., and Raul Camposano, eds. A Survey of High-Level Synthesis Systems. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3968-1.
Повний текст джерела1959-, Walker Robert A., and Camposano Raul, eds. A Survey of high-level synthesis systems. Boston: Kluwer, 1991.
Знайти повний текст джерелаKhalid, Ayesha, Goutam Paul, and Anupam Chattopadhyay. Domain Specific High-Level Synthesis for Cryptographic Workloads. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-10-1070-5.
Повний текст джерелаPhilippe, Coussy, and Morawiec Adam, eds. High-level synthesis: From algorithm to digital circuit. [New York]: Springer, 2008.
Знайти повний текст джерелаЧастини книг з теми "High level Synthesi"
Derrien, Steven, Sanjay Rajopadhye, Patrice Quinton, and Tanguy Risset. "High-Level Synthesis of Loops Using the Polyhedral Model." In High-Level Synthesis, 215–30. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_12.
Повний текст джерелаAditya, Shail, and Vinod Kathail. "Algorithmic Synthesis Using PICO." In High-Level Synthesis, 53–74. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_4.
Повний текст джерелаWakabayashi, Kazutoshi, and Benjamin Carrion Schafer. "“All-in-C” Behavioral Synthesis and Verification with CyberWorkBench." In High-Level Synthesis, 113–27. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_7.
Повний текст джерелаCoussy, Philippe, Cyrille Chavet, Pierre Bomel, Dominique Heller, Eric Senn, and Eric Martin. "GAUT: A High-Level Synthesis Tool for DSP Applications." In High-Level Synthesis, 147–69. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_9.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Introduction." In High — Level Synthesis, 1–25. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_1.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Architectural Models in Synthesis." In High — Level Synthesis, 27–61. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_2.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Quality Measures." In High — Level Synthesis, 63–92. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_3.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Design Description Languages." In High — Level Synthesis, 93–135. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_4.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Design Representation and Transformations." In High — Level Synthesis, 137–77. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_5.
Повний текст джерелаGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. "Partitioning." In High — Level Synthesis, 179–212. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_6.
Повний текст джерелаТези доповідей конференцій з теми "High level Synthesi"
"Session 3: High-level synthesis." In 2014 Electronic System Level Synthesis Conference (ESLsyn). IEEE, 2014. http://dx.doi.org/10.1109/eslsyn.2014.6850382.
Повний текст джерела"Proceedings of 7th International Symposium on High-Level Synthesis." In Proceedings of 7th International Symposium on High-Level Synthesis. IEEE, 1994. http://dx.doi.org/10.1109/ishls.1994.302351.
Повний текст джерелаMahapatra, Anushree, and Benjamin Carrion Schafer. "Machine-learning based simulated annealer method for high level synthesis design space exploration." In 2014 Electronic System Level Synthesis Conference (ESLsyn). IEEE, 2014. http://dx.doi.org/10.1109/eslsyn.2014.6850383.
Повний текст джерелаSarma, Robin C., Mark D. Dooley, N. Craig Newman, and Graham Hetherington. "High-level synthesis." In Conference proceedings. New York, New York, USA: ACM Press, 1990. http://dx.doi.org/10.1145/123186.123399.
Повний текст джерелаSinha, Sharad, and Wei Zhang. "SynDFG: Synthetic dataflow graph generator for high-level synthesis." In 2015 6th Asia Symposium on Quality Electronic Design (ASQED). IEEE, 2015. http://dx.doi.org/10.1109/acqed.2015.7274006.
Повний текст джерелаBoule, Marc, and Zeljko Zilic. "Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties." In 2006 IEEE International High Level Design Validation and Test Workshop. IEEE, 2006. http://dx.doi.org/10.1109/hldvt.2006.319966.
Повний текст джерелаNishihara, Tasuku, Takeshi Matsumoto, and Masahiro Fujita. "Equivalence Checking with Rule-Based Equivalence Propagation and High-Level Synthesis." In 2006 IEEE International High Level Design Validation and Test Workshop. IEEE, 2006. http://dx.doi.org/10.1109/hldvt.2006.319984.
Повний текст джерелаSchirner, Gunar. "Modeling, synthesis, and validation of heterogeneous biomedical embedded systems." In 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT). IEEE, 2011. http://dx.doi.org/10.1109/hldvt.2011.6113984.
Повний текст джерелаBonet, Blai, Giuseppe De Giacomo, Hector Geffner, Fabio Patrizi, and Sasha Rubin. "High-level Programming via Generalized Planning and LTL Synthesis." In 17th International Conference on Principles of Knowledge Representation and Reasoning {KR-2020}. California: International Joint Conferences on Artificial Intelligence Organization, 2020. http://dx.doi.org/10.24963/kr.2020/16.
Повний текст джерела"High level synthesis (HLS)." In 2016 International Conference on Field-Programmable Technology (FPT). IEEE, 2016. http://dx.doi.org/10.1109/fpt.2016.7929516.
Повний текст джерелаЗвіти організацій з теми "High level Synthesi"
Bush, William R. High Level Synthesis in ASP. Fort Belvoir, VA: Defense Technical Information Center, August 1986. http://dx.doi.org/10.21236/ada172975.
Повний текст джерелаAmir, Rachel, David J. Oliver, Gad Galili, and Jacline V. Shanks. The Role of Cysteine Partitioning into Glutathione and Methionine Synthesis During Normal and Stress Conditions. United States Department of Agriculture, January 2013. http://dx.doi.org/10.32747/2013.7699850.bard.
Повний текст джерелаJin, Zheming, Hal Finkel, Kazutomo Yoshii, and Franck Cappello. Evaluation of the FIR Example using Xilinx Vivado High-Level Synthesis Compiler. Office of Scientific and Technical Information (OSTI), July 2017. http://dx.doi.org/10.2172/1375449.
Повний текст джерелаDelmer, Deborah P., and Prem S. Chourey. The Importance of the Enzyme Sucrose Synthase for Cell Wall Synthesis in Plants. United States Department of Agriculture, October 1994. http://dx.doi.org/10.32747/1994.7568771.bard.
Повний текст джерелаBerkman, Nancy D., Eva Chang, Julie Seibert, Rania Ali, Deborah Porterfield, Linda Jiang, Roberta Wines, Caroline Rains, and Meera Viswanathan. Management of High-Need, High-Cost Patients: A “Best Fit” Framework Synthesis, Realist Review, and Systematic Review. Agency for Healthcare Research and Quality (AHRQ), October 2021. http://dx.doi.org/10.23970/ahrqepccer246.
Повний текст джерелаGrafi, Gideon, and Brian Larkins. Endoreduplication in Maize Endosperm: An Approach for Increasing Crop Productivity. United States Department of Agriculture, September 2000. http://dx.doi.org/10.32747/2000.7575285.bard.
Повний текст джерелаRocheford, Torbert, Yaakov Tadmor, Robert Lambert, and Nurit Katzir. Molecular Marker Mapping of Genes Enhancing Tocol and Carotenoid Composition of Maize Grain. United States Department of Agriculture, December 1995. http://dx.doi.org/10.32747/1995.7571352.bard.
Повний текст джерелаSisler, Edward C., Raphael Goren, and Akiva Apelbaum. Controlling Ethylene Responses in Horticultural Crops at the Receptor Level. United States Department of Agriculture, October 2001. http://dx.doi.org/10.32747/2001.7580668.bard.
Повний текст джерелаVarga, Gabriella A., Amichai Arieli, Lawrence D. Muller, Haim Tagari, Israel Bruckental, and Yair Aharoni. Effect of Rumen Available Protein, Amimo Acids and Carbohydrates on Microbial Protein Synthesis, Amino Acid Flow and Performance of High Yielding Cows. United States Department of Agriculture, August 1993. http://dx.doi.org/10.32747/1993.7568103.bard.
Повний текст джерелаGinzberg, Idit, Richard E. Veilleux, and James G. Tokuhisa. Identification and Allelic Variation of Genes Involved in the Potato Glycoalkaloid Biosynthetic Pathway. United States Department of Agriculture, August 2012. http://dx.doi.org/10.32747/2012.7593386.bard.
Повний текст джерела