Готові списки джерел за темами / Embedded software design and verification

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Добірка наукової літератури з теми "Embedded software design and verification"

Автор: Grafiati
Опубліковано: 11 березня 2023

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Статті в журналах з теми "Embedded software design and verification"

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Geng, Bo, and Qing Hua Cao. "Design and Realization of Simulation Environment of Embedded Software and Hardware Intergration Based on GEF." Advanced Materials Research 756-759 (September 2013): 2226–30. http://dx.doi.org/10.4028/www.scientific.net/amr.756-759.2226.

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Embedded software and hardware integration simulation platform is developed for simulating the embedded systems design process in current engineering system, which can facilitate finding various problems in system design process. For example, in the system scheme phase, the scheme and design verification are untimely and inadequate. In the early prototype phase, software development lags behind result in deferral of the overall progress of the system. And in the late prototype stage, the problem is lacking configuration item test environment. Embedded software and hardware integration simulation platform can provide verification of hardware and software integration and test development environment. Therefore, the quality of software development in embedded systems can be significantly improved and development cycle can be remarkably shortened by using this simulation platform.
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Dasgupta, Pallab, Mandayam K. Srivas, and Rajdeep Mukherjee. "Formal Hardware/Software Co-Verification of Embedded Power Controllers." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, no. 12 (December 2014): 2025–29. http://dx.doi.org/10.1109/tcad.2014.2354297.

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3

Chen, Ce, Shao Cai Zhao, Yong Hu, and Guo Kai He. "Design and Realization of Universal Integrated Testing Platform for Equipment-Embedded Software." Applied Mechanics and Materials 635-637 (September 2014): 1175–78. http://dx.doi.org/10.4028/www.scientific.net/amm.635-637.1175.

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An universal testing platform for equipment-embedded software is designed and realized to support the dynamic verification test of embedded software on CI level and system level. This Platform, based on LAN and USB bus architecture, has provided the function of system interface modelling, test project management, test case script code, test result control and analysis, and test report generation, and is available for real time, closed-loop and non-invasive dynamic testing on the embedded software with the characteristic of portability, easy operation, flexibility in size configuration and universality of protocol description.
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4

Chen, Xi, Harry Hsieh, Felice Balarin, and Yosinori Watanabe. "Formal Verification for Embedded System Designs." Design Automation for Embedded Systems 8, no. 2/3 (June 2003): 139–53. http://dx.doi.org/10.1023/b:daem.0000003959.60964.4d.

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Chen, Xi, Harry Hsieh, and Felice Balarin. "Verification Approach of Metropolis Design Framework for Embedded Systems." International Journal of Parallel Programming 34, no. 1 (January 25, 2006): 3–27. http://dx.doi.org/10.1007/s10766-005-0002-x.

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Park, Sa-Choun, Gi-Hwon Kwon, and Soon-Hoi Ha. "Automatic Verification of the Control Flow Model for Effective Embedded Software Design." KIPS Transactions:PartA 12A, no. 7 (December 1, 2005): 563–70. http://dx.doi.org/10.3745/kipsta.2005.12a.7.563.

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Dong, Zhijiang, Yujian Fu, and Yue Fu. "Runtime Verification on Robotics Systems." International Journal of Robotics Applications and Technologies 3, no. 1 (January 2015): 23–40. http://dx.doi.org/10.4018/ijrat.2015010102.

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Runtime verification is a technique for generating monitors from formal specification of expected behaviors for the underlying system. It can be applied to automatically evaluate system execution, either on-line or off-line, analyzing extracted execution traces; or it can be used online during operation, potentially steering the application back to a safety region if a property is violated. As a so-called light-weighted formal method, runtime verification bridges the gap between system design and implementation and shorten the distance of software quality assurance between the software testing and model checking and theorem proving. Runtime verification is considered as a highly scalable and automatic technique. Most of current runtime verification research are endeavored on the program context, in other words, on the program side and falls in the implementation level. These applications limited the benefits of runtime verification that bridges the gap among types of applications. With the proliferation of embedded systems and mobile device, dynamically verifying the firmware and mobile apps becomes a new emerging area. Due to the characteristics of runtime verification technique and limitations of the robotics systems, so far, very few research and project are located in the runtime verification on the firmware of embedded systems, which appear in most of robotics systems. Robotics systems are programmed on the firmware and only observed on device. In this paper, the authors first discussed the current runtime verifications on the embedded systems with limitations. After that, a layered runtime verification framework will be presented for the firmware verification. The case study is applied on the commonly recognized educational toolkit – LEGO Mindstorm robotics systems.
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Cunning, Steve J., Stephan Schulz, and Jerzy W. Rozenblit. "An Embedded System's Design Verification Using Object-Oriented Simulation." SIMULATION 72, no. 4 (April 1999): 238–49. http://dx.doi.org/10.1177/003754979907200403.

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Cheddadi, Youssef, Fatima Errahimi, and Najia Es-sbai. "Design and verification of photovoltaic MPPT algorithm as an automotive-based embedded software." Solar Energy 171 (September 2018): 414–25. http://dx.doi.org/10.1016/j.solener.2018.06.085.

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Júnior, José, Alisson Brito, and Tiago Nascimento. "Verification of Embedded System Designs through Hardware-Software Co-Simulation." International Journal of Information and Electronics Engineering 5, no. 1 (2015): 68–73. http://dx.doi.org/10.7763/ijiee.2015.v5.504.

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Дисертації з теми "Embedded software design and verification"

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Todorov, Vassil. "Automotive embedded software design using formal methods." Electronic Thesis or Diss., université Paris-Saclay, 2020. http://www.theses.fr/2020UPASG026.

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La part croissante des fonctions d'assistance à la conduite, leur criticité, ainsi que la perspective d'une certification de ces fonctions, rendent nécessaire leur vérification et leur validation avec un niveau d'exigence que le test seul ne peut assurer.Depuis quelques années déjà d’autres domaines comme l’aéronautique ou le ferroviaire sont soumis à des contextes équivalents. Pour répondre à certaines contraintes ils ont localement mis en place des méthodes formelles. Nous nous intéressons aux motivations et aux critères qui ont conduit à l’utilisation des méthodes formelles dans ces domaines afin de les transposer sur des scénarios automobiles et identifier le périmètre potentiel d'application.Dans cette thèse, nous présentons nos études de cas et proposons des méthodologies pour l'usage de méthodes formelles par des ingénieurs non-experts. Le model checking inductif pour un processus de développement utilisant des modèles, l'interprétation abstraite pour démontrer l'absence d'erreurs d'exécution du code et la preuve déductive pour des cas de fonctions critiques de librairie.Enfin, nous proposons de nouveaux algorithmes pour résoudre les problèmes identifiés lors de nos expérimentations. Il s'agit d'une part d'un générateur d'invariants et d'une méthode utilisant la sémantique des données pour traiter efficacement des propriétés comportant du temps long, et d'autre part d'un algorithme efficace pour mesurer la couverture du modèle par les propriétés en utilisant des techniques de mutation
The growing share of driver assistance functions, their criticality, as well as the prospect of certification of these functions, make their verification and validation necessary with a level of requirement that testing alone cannot ensure. For several years now, other industries such as aeronautics and railways have been subject to equivalent contexts. To respond to certain constraints, they have locally implemented formal methods. We are interested in the motivations and criteria that led to the use of formal methods in these industries in order to transpose them to automotive scenarios and identify the potential scope of application.In this thesis, we present our case studies and propose methodologies for the use of formal methods by non-expert engineers. Inductive model checking for a model-driven development process, abstract interpretation to demonstrate the absence of run-time errors in the code and deductive proof for critical library functions.Finally, we propose new algorithms to solve the problems identified during our experiments. These are, firstly, an invariant generator and a method using the semantics of data to process properties involving long-running timers in an efficient way, and secondly, an efficient algorithm to measure the coverage of the model by the properties using mutation techniques
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Härberg, Martin, and Roberto Chiarito. "Design, Measurement and Verification of Scania’s Platform Software Architecture for Safety Related Embedded Systems." Thesis, KTH, Maskinkonstruktion (Inst.), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-185515.

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The platform software architecture for the safety related embedded systems developed by Scania has become increasingly more complex. High complexity raises both the risk of failures and the time consumed by software developers to understand and debug the source code. This leads to increased software maintenance costs, which according to [24] can be between 60% and 75% of the total cost of software development. The purpose of this Master’s thesis is to investigate how a part of Scania’s current software architectural design can be further developed in order to decrease the complexity and the maintenance costs, without compromising with the essential functionality and performance. Another goal is to provide a solution that complies with the software safety requirements from ISO 26262, which Scania is planning to be able to fulfill in the future. To be able to compare our proposal for the software architecture with Scania’s current solution, a measurement tool has been developed. This tool measures the software quality metrics coupling and cohesion, which together with other software metrics gives an estimation of the architecture’s complexity. The verification of the software architecture with regards to ISO 26262 has been done using contract theory. The thesis work has resulted in alternative solutions for the software architectural design of the pressure sensor driver and the real-time database in one of Scania’s electronic control units. These solutions comply better with ISO 26262 and have lower complexity than Scania’s current solution in terms of coupling, cohesion and size of software components. This has been achieved by restructuring the software architecture and avoiding reuse of common software functions. The main conclusion of the thesis is that there is great potential for Scania to reduce the complexity of the platform software architecture and comply with ISO 26262.
Plattformsarkitekturen för programvaran i de säkerhetsrelaterade inbyggda system som Scania utvecklar har blivit alltmer komplex. Hög komplexitet medför ökad risk för att fel uppstår i programvaran samt att den tid som programvaruutvecklare spenderar med att förstå och debugga (avlusa) källkoden ökar. Detta leder till ökade underhållskostnader, vilket enligt [24] kan utgöra mellan 60 % och 75 % av den totala kostnaden för programvaruutveckling. Syftet med detta examensarbete är att undersöka hur en del av Scanias nuvarande arkitekturdesign kan vidareutvecklas för att minska komplexiteten, utan att kompromissa med någon grundläggande funktionalitet och prestanda. Ett annat mål är att erbjuda en lösning som uppfyller de säkerhetskrav för programvaran som ISO 26262 ställer, vilket Scania förbereder sig för att kunna uppfylla i framtiden. Ett mätverktyg har utvecklats för att kunna jämföra vår programvaruarkitekturlösning med Scanias nuvarande lösning. Detta verktyg mäter kvalitetsmåtten coupling (koppling) och cohesion (samhörighet), vilka tillsammans med andra programvarumått ger en uppskattning av komplexiteten för arkitekturen. Verifieringen av programvaruarkitekturen med avseende på kraven från ISO 26262 har utförts med hjälp av kontraktteori. Examensarbetet har resulterat i alternativa arkitekturlösningar för trycksensorernas drivrutiner samt realtidsdatabasen i en av Scanias styrenheter, där lösningarna både uppfyller kraven från ISO 26262 bättre och har lägre komplexitetän Scanias nuvarande lösning. Detta har uppnåtts genom en omstrukturering av programvaruarkitekturen samt genom att undvika att återanvända gemensamma programvarufunktioner. Huvudslutsatsen som kan dras från examensarbetet är att det finns stor potential för Scania att kunna reducera programvaruarkitekturens komplexitet, samt uppfylla kraven från ISO 26262.
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Ahmad, Noor Azurati Binti. "The impact of software architecture on the cost of design, implementation and verification of reliable embedded systems." Thesis, University of Leicester, 2013. http://hdl.handle.net/2381/28166.

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The concern of this thesis is the development of software for systems utilising embedded processors. In many cases, the safety of users of “embedded systems” (and other people in the immediate vicinity) depends on the correct operation of this software. This project explores the ways in which the cost of designing, implementing and verifying the behaviour of systems that include embedded software can be reduced. More specifically, the goal is to determine the extent to which the use of a time-triggered (TT) architecture - as opposed to an equivalent “event triggered” (ET) architecture - could offer benefits to the developers of reliable embedded systems. To evaluate this, a method of software architecture evaluation was developed and is described. The work detailed in this thesis involved an extensive empirical study of the costs involved in testing TT systems, with and without task pre-emption. Factors considered in this comparison included: [i] implementation costs, including code size, overhead, memory and CPU utilisation of a scheduler; [ii] testing costs, including the ease of obtaining timing data for isolated and in-situ tasks; and [iii] design costs, including execution time, lines of code and number of inputs required to perform a test of schedulability on the task set. The results from empirical studies suggested the use of TT architectures (compared with equivalent designs based on ET architectures) would require greater efforts at the design phase, but lower efforts during the testing phases. The results also suggested systems based on TT designs are likely to have lower implementation costs than equivalent systems based on ET designs. Taken together, the results point to a lower overall cost for TT systems. Execution of the method is described through the presentation of experimental case studies. Throughout these activities, the method has been shown to be a capable tool for software architecture evaluation.
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Mačišák, Martin. "Využití metody „model based design“ pro návrh embedded aplikace." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442458.

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Анотація:
This diploma thesis demonstrates the differences between approaches in software development. A code generation search is performed. The work describes possible tools and methods of code validation and verification. The next part provides information on the use of a design-based model in critical-demanding applications. Further, the work describes the proposal of platforms for controling the BLDC motor. Low leve software is programed for these chosen platforms. The logic of controling and user interface is created. The logic of controling is created and tested in Simulink. Further more whole programmed code is connected with the low level layer. The whole solution of my diploma thesis is tested.
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Kureksiz, Funda. "A Real Time Test Setup Design And Realization For Performance Verification Of Controller Designs For Unmanned Air Vehichles." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/2/12609393/index.pdf.

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In this thesis, a test platform based on real-time facilities and embedded software is designed to verify the performance of a controller model in real time. By the help of this platform, design errors can be detected earlier and possible problems can be solved cost-effectively without interrupting the development process. An unmanned combat air vehicle (UCAV) model is taken as a plant model due to its importance in current and future military operations. Among several autopilot modes, the altitude hold mode is selected since it is an important pilot-relief mode and widely used in aviation. A discrete PID controller is designed in MATLAB/Simulink environment for using in verification studies. To control the dynamic system in wide range, a gain scheduling is employed where the altitude and velocity are taken as scheduling variables. Codes for plant and controller model are obtained by using real time workshop embedded coder (RTWEC) and downloaded to two separate computers, in which xPC kernel and VxWorks operating system are run, respectively. A set of flight test scenarios are generated in Simulink environment. They are analyzed, discussed, and then some of them are picked up to verify the platform. These test scenarios are run in the setup and their results are compared with the ones obtained in Simulink environment. The reusability of the platform is verified by using a commercial aircraft, Boeing 747, and its controller models. The test results obtained in the setup and in Simulink environment are presented and discussed.
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Traub, Johannes [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://d-nb.info/1105472175/34.

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Swart, Riaan. "A language to support verification of embedded software." Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.

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Thesis (MSc)--University of Stellenbosch, 2004.
ENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feasible. Correctness and safety were given highest priority, but without sacrificing efficiency wherever possible. The language is concurrent and includes measures for protecting the address spaces of concurrently running processes. This eliminates the need for expensive run-time memory protection and will benefit resource-strapped embedded systems. The target hardware is assumed to provide no special support for concurrency. The language is designed to be small, simple and intuitive, and to promote compile-time detection of errors. Facilities for abstraction, such as modules and abstract data types support implementation and testing of bigger systems. We have opted for model checking as verification technique, so our implementation language is similar in design to a modelling language for a widely used model checker. Because of this, the implementation code can be used as input for a model checker. However, since the compiler can still contain errors, there might be discrepancies between the implementation code written in our language and the executable code produced by the compiler. Therefore we are attempting to make verification of executable code feasible. To achieve this, our compiler generates code in a special format, comprising a transition system of uninterruptible actions. The actions limit the scheduling points present in processes and reduce the different interleavings of process code possible in a concurrent system. Requirements that conventional hardware places on this form of code are discussed, as well as how the format influences efficiency and responsiveness.
AFRIKAANSE OPSOMMING: Ingebedde rekenaarstelsels maak deel uit van groter stelsels soos vliegtuie of chemiese prosesseerfasiliteite. Hoewel toetsing en ontfouting van sulke stelsels moeilik is, is betroubaarheid dikwels onontbeerlik. Ontwikkeling van ingebedde sagteware kan makliker gemaak word met 'n ontwikkelingsomgewing wat geleenthede vir foutmaak beperk en fasiliteite vir foutbespeuring verskaf. Ons het 'n programmeertaal en vertaler geïmplementeer wat as basis kan dien vir so 'n eksperimentele omgewing. Beide is ontwerp om verifikasie van implementasies haalbaar te maak. Korrektheid en veiligheid het die hoogste prioriteit geniet, maar sonder om effektiwiteit prys te gee, waar moontlik. Die taal is gelyklopend en bevat maatreëls om die adresruimtes van gelyklopende prosesse te beskerm. Dit maak duur looptyd-geheuebeskerming onnodig, tot voordeel van ingebedde stelsels met 'n tekort aan hulpbronne. Daar word aangeneem dat die teikenhardeware geen spesiale ondersteuning vir gelyklopendheid bevat nie. Die programmeertaal is ontwerp om klein, eenvoudig en intuïtief te wees, en om vertaaltyd-opsporing van foute te bevorder. Fasiliteite vir abstraksie, byvoorbeeld modules en abstrakte datatipes, ondersteun implementering en toetsing van groter stelsels. Ons het modeltoetsing as verifikasietegniek gekies, dus is die ontwerp van ons programmeertaal soortgelyk aan dié van 'n modelleertaal vir 'n modeltoetser wat algemeen gebruik word. As gevolg hiervan kan die implementasiekode as toevoer vir 'n modeltoetser gebruik word. Omdat die vertaler egter steeds foute kan bevat, mag daar teenstrydighede bestaan tussen die implementasie geskryf in ons implementasietaal, en die uitvoerbare masjienkode wat deur die vertaler gelewer word. Daarom poog ons om verifikasie van die uitvoerbare masjienkode haalbaar te maak. Om hierdie doelwit te bereik, is ons vertaler ontwerp om 'n spesiale formaat masjienkode te genereer bestaande uit 'n oorgangstelsel wat ononderbreekbare (atomiese) aksies bevat. Die aksies beperk die skeduleerpunte in prosesse en verminder sodoende die aantal interpaginasies van proseskode wat moontlik is in 'n gelyklopende stelsel. Die vereistes wat konvensionele hardeware aan dié spesifieke formaat kode stel, word bespreek, asook hoe die formaat effektiwiteit en reageerbaarheid van die stelsel beïnvloed.
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Traub, Johannes Frederik Jesper [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://nbn-resolving.de/urn:nbn:de:gbv:8-diss-186183.

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Yan, Weiwei. "Software-hardware Cooperative Embedded Verification System Fusing Fingerprint Verification and Shared-key Authentication." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-66677.

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Анотація:
In order to protect the security of the commercial information, personnel information, military information, governmental information on the Internet, the claimed identity should be authenticated. Now there are three main security authentication methods: first: using user PIN, such as password; second: using physical key, such as USBKey; third: using biological authentication technology, such as fingerprint, iris, voice and palm prints, etc. Because of the uniqueness, invariance, and ubiquity properties of biometric authentication, biometric authentication is becoming popular, especially fingerprint recognition. However, when the fingerprint recognition information is transported on the public channel, it may be attacked, such as the fingerprint information is stolen. So a cryptology mechanism is needed to protect the fingerprint recognition information. In the field of embedded security authentication system, the traditional hardware implementation mechanism, such as ASIC, can satisfy requires of functions and performances, but it is not configurable, flexible, and easy to expand; the traditional software implementation mechanism, such as general purpose processor, is flexible, but the cost and the power consumption are higher than hardware implementation. In order to take the advantages of biometrics, cryptology, hardware implementation, and software implementation, a hardware-software cooperating embedded authentication system based on shared-key authentication and fingerprint verification is proposed. First, this system authenticates the identities of client and server by shared-key authentication, creates the current encrypt key and hash key, and then authenticates the identity of them via fingerprint recognition. During fingerprint recognition, the information of fingerprint is not needed to transmit over the public channel, so the security of fingerprint is increased. Theoretic analysis and experiments show that, this system reach very high authentication rate and security. This system can resist replay attack, server template attack, device template attack, effectively.
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Grobler, Leon D. "A kernel to support computer-aided verification of embedded software." Thesis, Stellenbosch : University of Stellenbosch, 2006. http://hdl.handle.net/10019.1/2479.

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Анотація:
Thesis (MSc (Mathematical Sciences)--University of Stellenbosch, 2006.
Formal methods, such as model checking, have the potential to improve the reliablility of software. Abstract models of systems are subjected to formal analysis, often showing subtle defects not discovered by traditional testing.
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Книги з теми "Embedded software design and verification"

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Samar, Abdi, Gerstlauer Andreas 1970-, Schirner Gunar, and SpringerLink (Online service), eds. Embedded System Design: Modeling, Synthesis and Verification. Boston, MA: Springer-Verlag US, 2009.

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2

Co-verification of hardware and software for ARM SoC design. Burlington, MA: Elsevier Newnes, 2005.

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3

Thoen, Filip. Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems. Boston, MA: Springer US, 2000.

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4

Schirner, Gunar. Embedded Systems: Design, Analysis and Verification: 4th IFIP TC 10 International Embedded Systems Symposium, IESS 2013, Paderborn, Germany, June 17-19, 2013. Proceedings. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013.

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5

Lettnin, Djones, and Markus Winterholer, eds. Embedded Software Verification and Debugging. New York, NY: Springer New York, 2017. http://dx.doi.org/10.1007/978-1-4614-2266-2.

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6

Beningo, Jacob. Embedded Software Design. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8279-3.

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7

Richard, Zurawski, ed. Embedded systems handbook: Embedded systems design and verification. 2nd ed. Boca Raton, FL: Taylor & Francis Group, 2009.

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Schirner, Gunar, Marcelo Götz, Achim Rettberg, Mauro C. Zanella, and Franz J. Rammig, eds. Embedded Systems: Design, Analysis and Verification. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38853-8.

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Hsiung, Pao-Ann. Reconfigurable system design and verification. Boca Raton, Fla: CRC Press, 2009.

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Sridar, T. Designing embedded communications software. San Francisco, CA: CMP Books, 2003.

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Частини книг з теми "Embedded software design and verification"

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Beningo, Jacob. "Testing, Verification, and Test-Driven Development." In Embedded Software Design, 197–218. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8279-3_8.

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Balarin, Felice, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Claudio Passerone, et al. "Verification." In Hardware-Software Co-Design of Embedded Systems, 199–246. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6127-9_5.

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Sherwood, George B. "Embedded Functions for Test Design Automation." In Hardware and Software: Verification and Testing, 221–24. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-70389-3_16.

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Zhan, Jinyu, Nan Sang, and Guangze Xiong. "Formal Co-verification for SoC Design with Colored Petri Net." In Embedded Software and Systems, 188–95. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11535409_26.

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Morshed, Bashir I. "Prototyping and Verification of ES." In Embedded Systems – A Hardware-Software Co-Design Approach, 167–75. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-66808-2_5.

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Chandrasekaran, Prakash, Christopher L. Conway, Joseph M. Joy, and Sriram K. Rajamani. "Verifiable Design of Asynchronous Software." In Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 115–16. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_9.

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Hsiung, Pao-Ann, and Shang-Wei Lin. "Formal Design and Verification of Real-Time Embedded Software." In Programming Languages and Systems, 382–97. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30477-7_26.

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Shukla, Sandeep K., Syed M. Suhaib, Deepak A. Mathaikutty, and Jean-Pierre Talpin. "On the Polychronous Approach to Embedded Software Design." In Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 261–73. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_20.

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Adler, Rasmus, Ina Schaefer, Tobias Schuele, and Eric Vecchié. "From Model-Based Design to Formal Verification of Adaptive Embedded Systems." In Formal Methods and Software Engineering, 76–95. Berlin, Heidelberg: Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-76650-6_6.

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Berry, Gérard. "SCADE: Synchronous Design and Validation of Embedded Control Software." In Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 19–33. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_2.

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Тези доповідей конференцій з теми "Embedded software design and verification"

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Behrend, Jörg, D. Lettnin, P. Heckeler, J. Ruf, T. Kropf, and W. Rosenstiel. "Scalable hybrid verification for embedded software." In 2011 Design, Automation & Test in Europe. IEEE, 2011. http://dx.doi.org/10.1109/date.2011.5763039.

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Chao Wang, Malay Ganai, Shuvendu Lahiri, and Daniel Kroening. "Embedded software verification: Challenges and solutions." In 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE, 2008. http://dx.doi.org/10.1109/iccad.2008.4681536.

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Chao Wang, Zijiang Yang, F. Ivancic, and A. Gupta. "Disjunctive Image Computation for Embedded Software Verification." In 2006 Design, Automation and Test in Europe. IEEE, 2006. http://dx.doi.org/10.1109/date.2006.244049.

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Lettnin, Djones, Pradeep K. Nalla, Jurgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schonknecht, and Stephan Reitemeyer. "Verification of Temporal Properties in Automotive Embedded Software." In 2008 Design, Automation and Test in Europe. IEEE, 2008. http://dx.doi.org/10.1109/date.2008.4484680.

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Di Guglielmo, Giuseppe, Luigi Di Guglielmo, Franco Fummi, and Graziano Pravadelli. "Interactive presentation abstract: Assertion-based verification in embedded-software design." In 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT). IEEE, 2011. http://dx.doi.org/10.1109/hldvt.2011.6114169.

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Shedeed, Mohamed, Ghada Bahig, M. Watheq Elkharashi, and Michael Chen. "Functional design and verification of automotive embedded software: An integrated system verification flow." In 2013 18th International Conference on Digital Signal Processing (DSP). IEEE, 2013. http://dx.doi.org/10.1109/siecpc.2013.6550793.

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A, Jay, Paul Urban, and Pat Canny. "Verification and Testing of Embedded Software with Model Based Design." In AIAA Scitech 2019 Forum. Reston, Virginia: American Institute of Aeronautics and Astronautics, 2019. http://dx.doi.org/10.2514/6.2019-1479.

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Di Guglielmo, Giuseppe, Luigi Di Guglielmo, Franco Fummi, and Graziano Pravadelli. "On the use of assertions for embedded-software dynamic verification." In 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2012. http://dx.doi.org/10.1109/ddecs.2012.6219083.

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Schwarz, Michael, Carlos Villarraga, Dominik Stoffel, and Wolfgang Kunz. "Cycle-accurate software modeling for RTL verification of embedded systems." In 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2017. http://dx.doi.org/10.1109/ddecs.2017.7934571.

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Ackermann, Christopher, Arnab Ray, Rance Cleaveland, Charles Shelton, and Chris Martin. "Integrating Functional and Non-Functional Design Verification for Embedded Software Systems." In SAE World Congress & Exhibition. 400 Commonwealth Drive, Warrendale, PA, United States: SAE International, 2009. http://dx.doi.org/10.4271/2009-01-0152.

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Звіти організацій з теми "Embedded software design and verification"

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Santos, Eugene, and Jr. Verification and Validation of Embedded Knowledge-Based Software Systems. Fort Belvoir, VA: Defense Technical Information Center, January 1999. http://dx.doi.org/10.21236/ada419001.

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Bouali, Amar, Bernard Dion, and Kosuke Konishi. Using Formal Verification in Real-Time Embedded Software Development. Warrendale, PA: SAE International, May 2005. http://dx.doi.org/10.4271/2005-08-0319.

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Varma, Amit, and Jungil Seo. Verification of LRFD Bridge Design and Analysis Software for INDOT. West Lafayette, Indiana: Purdue University, 2011. http://dx.doi.org/10.5703/1288284314279.

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Kent Norris. Independent Verification and Validation Of SAPHIRE 8 Software Design and Interface Design Project Number: N6423 U.S. Nuclear Regulatory Commission. Office of Scientific and Technical Information (OSTI), October 2009. http://dx.doi.org/10.2172/968677.

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Kent Norris. Independent Verification and Validation Of SAPHIRE 8 Software Design and Interface Design Project Number: N6423 U.S. Nuclear Regulatory Commission. Office of Scientific and Technical Information (OSTI), March 2010. http://dx.doi.org/10.2172/974773.

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Apostolatos, A., R. Rossi, and C. Soriano. D7.2 Finalization of "deterministic" verification and validation tests. Scipedia, 2021. http://dx.doi.org/10.23967/exaqute.2021.2.006.

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Анотація:
This deliverable focus on the verification and validation of the solvers of Kratos Multiphysics which are used within ExaQUte. These solvers comprise standard body-fitted approaches and novel embedded approaches for the Computational Fluid Dynamics (CFD) simulations carried out within ExaQUte. Firstly, the standard body-fitted CFD solver is validated on a benchmark problem of high rise building - CAARC benchmark and subsequently the novel embedded CFD solver is verified against the solution of the body-fitted solver. Especially for the novel embedded approach, a workflow is presented on which the exact parameterized Computer-Aided Design (CAD) model is used in an efficient manner for the underlying CFD simulations. It includes: A note on the space-time methods Verification results for the body-fitted solver based on the CAARC benchmark Workflow consisting of importing an exact CAD model, tessellating it and performing embedded CFD on it Verification results for the embedded solver based on a high-rise building API definition and usage
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Dash, Z. V., B. A. Robinson, and G. A. Zyvoloski. Software requirements, design, and verification and validation for the FEHM application - a finite-element heat- and mass-transfer code. Office of Scientific and Technical Information (OSTI), July 1997. http://dx.doi.org/10.2172/567506.

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Murphy, Joe J., Michael A. Duprey, Robert F. Chew, Paul P. Biemer, Kathleen Mullan Harris, and Carolyn Tucker Halpern. Interactive Visualization to Facilitate Monitoring Longitudinal Survey Data and Paradata. RTI Press, May 2019. http://dx.doi.org/10.3768/rtipress.2019.op.0061.1905.

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Surveys often require monitoring during data collection to ensure progress in meeting goals or to evaluate the interim results of an embedded experiment. Under complex designs, the amount of data available to monitor may be overwhelming and the production of reports and charts can be costly and time consuming. This is especially true in the case of longitudinal surveys, where data may originate from multiple waves. Other such complex scenarios include adaptive and responsive designs, which were developed to act on the results of such monitoring to implement prespecified options or alternatives in protocols. This paper discusses the development of an interactive web-based data visualization tool, the Adaptive Total Design (ATD) Dashboard, which we designed to provide a wide array of survey staff with the information needed to monitor data collection daily. The dashboard was built using the R programming language and Shiny framework and provides users with a wide range of functionality to quickly assess trends. We present the structure of the data used to populate the dashboard, its design, and the process for hosting it on the web. Furthermore, we provide guidance on graphic design, data taxonomy, and software decisions that can help guide others in the process of developing their own data collection monitoring systems. To illustrate the benefits of the dashboard, we present examples from the National Longitudinal Study of Adolescent to Adult Health (Add Health). We also discuss features of the dashboard to be developed for future waves of Add Health.
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Wu, Yingjie, Selim Gunay, and Khalid Mosalam. Hybrid Simulations for the Seismic Evaluation of Resilient Highway Bridge Systems. Pacific Earthquake Engineering Research Center, University of California, Berkeley, CA, November 2020. http://dx.doi.org/10.55461/ytgv8834.

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Bridges often serve as key links in local and national transportation networks. Bridge closures can result in severe costs, not only in the form of repair or replacement, but also in the form of economic losses related to medium- and long-term interruption of businesses and disruption to surrounding communities. In addition, continuous functionality of bridges is very important after any seismic event for emergency response and recovery purposes. Considering the importance of these structures, the associated structural design philosophy is shifting from collapse prevention to maintaining functionality in the aftermath of moderate to strong earthquakes, referred to as “resiliency” in earthquake engineering research. Moreover, the associated construction philosophy is being modernized with the utilization of accelerated bridge construction (ABC) techniques, which strive to reduce the impact of construction on traffic, society, economy and on-site safety. This report presents two bridge systems that target the aforementioned issues. A study that combined numerical and experimental research was undertaken to characterize the seismic performance of these bridge systems. The first part of the study focuses on the structural system-level response of highway bridges that incorporate a class of innovative connecting devices called the “V-connector,”, which can be used to connect two components in a structural system, e.g., the column and the bridge deck, or the column and its foundation. This device, designed by ACII, Inc., results in an isolation surface at the connection plane via a connector rod placed in a V-shaped tube that is embedded into the concrete. Energy dissipation is provided by friction between a special washer located around the V-shaped tube and a top plate. Because of the period elongation due to the isolation layer and the limited amount of force transferred by the relatively flexible connector rod, bridge columns are protected from experiencing damage, thus leading to improved seismic behavior. The V-connector system also facilitates the ABC by allowing on-site assembly of prefabricated structural parts including those of the V-connector. A single-column, two-span highway bridge located in Northern California was used for the proof-of-concept of the proposed V-connector protective system. The V-connector was designed to result in an elastic bridge response based on nonlinear dynamic analyses of the bridge model with the V-connector. Accordingly, a one-third scale V-connector was fabricated based on a set of selected design parameters. A quasi-static cyclic test was first conducted to characterize the force-displacement relationship of the V-connector, followed by a hybrid simulation (HS) test in the longitudinal direction of the bridge to verify the intended linear elastic response of the bridge system. In the HS test, all bridge components were analytically modeled except for the V-connector, which was simulated as the experimental substructure in a specially designed and constructed test setup. Linear elastic bridge response was confirmed according to the HS results. The response of the bridge with the V-connector was compared against that of the as-built bridge without the V-connector, which experienced significant column damage. These results justified the effectiveness of this innovative device. The second part of the study presents the HS test conducted on a one-third scale two-column bridge bent with self-centering columns (broadly defined as “resilient columns” in this study) to reduce (or ultimately eliminate) any residual drifts. The comparison of the HS test with a previously conducted shaking table test on an identical bridge bent is one of the highlights of this study. The concept of resiliency was incorporated in the design of the bridge bent columns characterized by a well-balanced combination of self-centering, rocking, and energy-dissipating mechanisms. This combination is expected to lead to minimum damage and low levels of residual drifts. The ABC is achieved by utilizing precast columns and end members (cap beam and foundation) through an innovative socket connection. In order to conduct the HS test, a new hybrid simulation system (HSS) was developed, utilizing commonly available software and hardware components in most structural laboratories including: a computational platform using Matlab/Simulink [MathWorks 2015], an interface hardware/software platform dSPACE [2017], and MTS controllers and data acquisition (DAQ) system for the utilized actuators and sensors. Proper operation of the HSS was verified using a trial run without the test specimen before the actual HS test. In the conducted HS test, the two-column bridge bent was simulated as the experimental substructure while modeling the horizontal and vertical inertia masses and corresponding mass proportional damping in the computer. The same ground motions from the shaking table test, consisting of one horizontal component and the vertical component, were applied as input excitations to the equations of motion in the HS. Good matching was obtained between the shaking table and the HS test results, demonstrating the appropriateness of the defined governing equations of motion and the employed damping model, in addition to the reliability of the developed HSS with minimum simulation errors. The small residual drifts and the minimum level of structural damage at large peak drift levels demonstrated the superior seismic response of the innovative design of the bridge bent with self-centering columns. The reliability of the developed HS approach motivated performing a follow-up HS study focusing on the transverse direction of the bridge, where the entire two-span bridge deck and its abutments represented the computational substructure, while the two-column bridge bent was the physical substructure. This investigation was effective in shedding light on the system-level performance of the entire bridge system that incorporated innovative bridge bent design beyond what can be achieved via shaking table tests, which are usually limited by large-scale bridge system testing capacities.
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