Дисертації: "Voltage level converter"

1

Thomas, Stephan [Verfasser]. "A Medium-Voltage Multi-Level DC/DC Converter with High Voltage Transformation Ratio / Stephan Thomas." Aachen : Shaker, 2014. http://d-nb.info/1049383176/34.

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2

Vadlmudi, Tripurasuparna. "A nano-CMOS based universal voltage level converter for multi-VDD SoCs." Thesis, University of North Texas, 2007. https://digital.library.unt.edu/ark:/67531/metadc3602/.

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Power dissipation of integrated circuits is the most demanding issue for very large scale integration (VLSI) design engineers, especially for portable and mobile applications. Use of multiple supply voltages systems, which employs level converter between two voltage islands is one of the most effective ways to reduce power consumption. In this thesis work, a unique level converter known as universal level converter (ULC), capable of four distinct level converting operations, is proposed. The schematic and layout of ULC are built and simulated using CADENCE. The ULC is characterized by performing three analysis such as parametric, power, and load analysis which prove that the design has an average power consumption reduction of about 85-97% and capable of producing stable output at low voltages like 0.45V even under varying load conditions.

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3

Hawley, Joshua Christiaan. "Modeling and Simulation of a Cascaded Three-Level Converter-Based SSSC." Thesis, Virginia Tech, 1999. http://hdl.handle.net/10919/10109.

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This thesis is dedicated to a comprehensive study of static series synchronous compensator (SSSC) systems utilizing cascaded-multilevel converters (CMCs). Among flexible AC transmission system (FACTS) controllers, the SSSC has shown feasibility in terms of cost-effectiveness in a wide range of problem-solving abilities from transmission to distribution levels. Referring to the literature reviews, the CMC with separated DC capacitors is clearly the most feasible topology for use as a power converter in the SSSC applications. The control for the CMC-Based SSSC is complicated. The design of the complicated control strategy was begun with well-defined system transfer functions. The stability of the system was achieved by trial and error processes, which were time-consuming and ineffective. The goal of this thesis is to achieve a reliable controller design for the CMC-based SSSC. Major contributions are addressed as follows: 1) accurate models of the CMC for reactive power compensations in both ABC and DQ0 coordinates, and 2) an effective decoupling power control technique. To simplify the control system design, well-defined models of the CMC-Based SSSC in both ABC and DQ0 coordinates are proposed. The proposed models are for the CMC-Based SSSC focus on only three voltage levels but can be expanded for any number of voltage levels. The key system transfer functions are derived and used in the controller design process. To achieve independent power control capability, the control technique, called the decoupling power control used in the design for the CMC-Based STATCOM is applied. This control technique allows both the real and reactive power components to be independently controlled. With the combination of the decoupling power control and the cascaded PWM, a CMC with any number of voltage levels can be simply modeled as a three-level cascaded converter, which is the simplest topology to deal with. This thesis focuses on the detailed design process needed for a CMC-Based SSSC.
Master of Science

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4

Pan, Jianyu. "Control of Four-Level Hybrid Clamped Converter for Medium-Voltage Variable-Frequency Drives." The Ohio State University, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1562943204567575.

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5

Perera, Lasantha Bernard. "Multi Level Reinjection ac/dc Converters for HVDC." Thesis, University of Canterbury. Electrical and Computer Engineering, 2006. http://hdl.handle.net/10092/1085.

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A new concept, the multi level voltage/current reinjection ac/dc conversion, is described in this thesis. Novel voltage and current source converter configurations, based on voltage and current reinjection concepts are proposed. These converter configurations are thoroughly analyzed in their ac and dc system sides. The fundamentals of the reinjection concept is discussed briefly, which lead to the derivation of the ideal reinjection waveform for complete harmonic cancellation and approximations for practical implementation. The concept of multi level voltage reinjection VSC is demonstrated through two types of configurations, based on standard 12-pulse parallel and series connected VSC modified with reinjection bridges and transformers. Firing control strategies and steady state waveform analysis are presented and verified by EMTDC simulations. The multi level current reinjection CSC is also described using two configurations based on standard 12-pulse parallel and series connected CSC modified with associated reinjection circuitry. Firing control strategies and steady state waveform analysis are presented and verified by EMTDC simulations. Taking the advantage of zero current switching in the main bridge valves, achieved through multi level current reinjection, an advanced multi level current reinjection scheme, consisting thyristor main bridges and self-commutated reinjection circuitry is proposed. This hybrid scheme effectively incorporates self-commutated capability into a conventional thyristor converter. The ability of the main bridge valves to commutate without the assistance of a turn-off pulse or line commutating voltage under the zero current condition is explained and verified by EMTDC simulations. Finally, the applications of the MLCR-CSC are discussed in terms of a back to back HVDC link and a long distance HVDC transmission system. The power and control structures and closed loop control strategies are presented. Dynamic simulation is carried out on PSCAD/EMTDC to demonstrate the two systems ability to respond to varying active and reactive power operating conditions.

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6

Vadlamudi, Tripurasuparna Mohanty Saraju. "A nano-CMOS based universal voltage level converter for multi-V[subscript]DD SoCs." [Denton, Tex.] : University of North Texas, 2007. http://digital.library.unt.edu/permalink/meta-dc-3602.

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7

Schrock, Kenneth C. "A three-level buck converter to regulate a high-voltage DC-to-AC inverter." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/46505.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
Includes bibliographical references (leaves 94-95).
A three-level buck converter is designed and analyzed, and shown to be suitable as a high-voltage down converter as a pre-regulation stage for a 600 watt DC-to-AC power inverter. Topology selection for the inverter is examined, and a three-stage system is chosen to satisfy high voltage (1.1 kV), isolation, size, and efficiency requirements. Control of the buck converter is discussed in detail, including advanced features that allow extremely low output voltages in unloaded conditions. Optimization is included for both magnetics and switching losses. A prototype of the three-level buck converter is shown to perform as expected and meet all specifications.
by Kenneth C. Schrock.
M.Eng.

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8

Efika, Ikenna Bruce. "A multi-level multi-modular flying capacitor voltage source converter for high power applications." Thesis, University of Leeds, 2015. http://etheses.whiterose.ac.uk/12154/.

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Two vital and dynamically changing issues are arising in the electric grid - an increase in electrical power demand, and subsequent reduction in power quality. Power electronics based solutions such as the Static Synchronous Compensator are increasingly deployed to mitigate power quality issues while High Voltage DC Transmission converters are currently installed to support the existing grid transmission capacity. Both applications require high power and high voltage power converters using switching devices with limited voltage ratings. The advent of Modular Multilevel Converters (MMC) is one of the recent responses to this need. These use half or full H-bridge circuits stacked up to form a chain, and hence can withstand high voltages using lower-rated switching devices. This thesis introduces a new member into the MMC family, i.e the Modular Multi-level Flying Capacitor Converter (MMFCC). This uses a three-level flying capacitor full-bridge circuit as a sub-module and offers features of modularity, scalability and fault tolerance. The choice of FC topology in place of the simple H-bridge stems from the FC’s ability to offer two extra voltage levels in the sub-module output and hence more degrees of freedom per module in controlling the voltage waveform. A three-level full-bridge FC sub-module uses three capacitors - an outer one for supporting the sub-module voltage, and two inner floating ones with half of the outer one’s capacitance and voltage rating. This use of slightly more complex FC sub-modules gives the benefits of a modular structure but without using twice as many sub-modules with their associated capacitors for the same total voltage. The thesis presents the principles of this topology, switching states redundancies and a method for capacitor voltage balancing. Also discussed are: the configuration of MMCC including the MMFCC in Single-Star Bridge-Cell (SSBC) or Single-Delta Bridge-Cell (SDBC) for FACTS and Battery Energy Storage System (BESS) applications; and Double-Star Chopper-Cell (DSCC) or Double-Star Bridge-Cell (DSBC) for HVDC systems. A novel overlapping hexagon pulse width modulation scheme is introduced and discussed for switching control of the MMFCC. This uses multiple hexagons all centred on one point, the same in number as the cascaded FC sub-modules, which are phase displaced relative to each other. The approach simplifies the modulation algorithm and brings flexibility in shaping the output voltage waveforms for different applications. An MMFCC experimental rig was designed and built in-house to validate some of the simulation results obtained for the modulation of this new topology. Details of the rig as well as results captured are discussed.

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9

Lee, Dong-Ho. "A Power Conditioning System for Superconductive Magnetic Energy Storage based on Multi-Level Voltage Source Converter." Diss., Virginia Tech, 1999. http://hdl.handle.net/10919/11042.

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A new power conditioning system (PCS) for superconductive magnetic energy storage (SMES) is developed and its prototype test system is built and tested. The PCS uses IGBTs for high-speed PWM operation and has a multi-level chopper-VSC structure. The prototype test system has three-level that can handle up to 250-kVA with a 1800-V DC link, a 200-A maximum load current , and a switching frequency reaching 20-kHz with the help of zero-current-transition (ZCT) soft-switching. This PCS has a great number of advantages over conventional ones in terms of size, speed, and cost. Conventional PCSs use thyristors, due to the power capacity of the SMES system. The speed limit of the thyristor uses a six-pulse operation that generates a high harmonic. To reduce the harmonic, multiple PCSs are connected together with phase-matching transformers that need to be precise to be effective in reducing the harmonics. So, the system becomes large and expensive. In addition, the dynamic range of the PCSs are also limited by the six-pulse operation, because it limits the useful area of the PCS applications. By employing a high-speed PWM, the new PCS can reduce the harmonics without using the transformers reducing size and cost, and has wide dynamic range. However, the speed of a switching device is generally inversely proportional to its power handling capacity. Therefore, employing a multi-level structure is one method of extending the power-handling capability of the high-speed device. Switching loss is another factor that limits the speed of the switch, but it can be reduced by soft-switching techniques. The 20-kHz switching frequency can be obtained with the help of the ZCT soft-switching technique, which can reduce about 90% of switching losses from the IGBT during both turn-on and turn-off transients. There are two different topologies of the PCS; the current source converter (CSC) type and the chopper and voltage source converter (VSC) type. In terms of the SMES system efficiency, the chopper-VSC type shows a less volt-ampere requirement of the power device. Therefore, the new PCS system has a chopper-VSC structure. Since the chopper-VSC structure consists of multiple legs that can be modularized, a power electronics building block (PEBB) leg is a good choice; all of the system problems caused by the high frequency can be solved within the PEBB leg. The VSC is built with three of the PEBB legs. Three-phase AC is implemented with a three-level space vector modulation (SVM) that can reduce the number of switching and harmonic contents from the output current. A closed-loop control system is also implemented for the VSC, and shows 600-Hz control bandwidth. The multi-level structure used requires too many high-speed switches. However, not all of them are used at the same time during normal multi-level operation. A new multi-level topology is suggested that requires only two high-speed switches, regardless of the number of levels. Other switches can be replaced with slow-speed switches that can allow additional cost savings.
Ph. D.

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10

Rankin, Paul Edward. "Modeling and Design of a SiC Zero Common-Mode Voltage Three-Level DC/DC Converter." Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/93176.

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As wide-bandgap devices continue to experience deeper penetration in commercial applications, there are still a number of factors which make the adoption of such technologies difficult. One of the most notable issues with the application of wide-bandgap technologies is meeting existing noise requirements and regulations. Due to the faster dv/dt and di/dt of SiC devices, more noise is generated in comparison to Si IGBTs. Therefore, in order to fully experience the benefits offered by this new technology, the noise must either be filtered or mitigated by other means. A survey of various DC/DC topologies was conducted in order to find a candidate for a battery interface in a UPS system. A three-level NPC topology was explored for its potential benefit in terms of noise, efficiency, and additional features. This converter topology was modeled, simulated, and a hardware prototype constructed for evaluation within a UPS system, although its uses are not limited to such applications. A UPS system is a good example of an application with strict noise requirements which must be fulfilled according to IEC standards. Based on a newly devised mode of operation, this converter was verified to produce no common-mode voltage under ideal conditions, and was able to provide a 6 dB reduction in common-mode voltage emissions in the UPS prototype. This was done while achieving a peak efficiency in excess of 99% with the ability to provide bidirectional power flow between the UPS and battery backup. The converter was verified to operate at the rated UPS conditions of 20 kW while converting between a total DC bus voltage of 800 V and a nominal battery voltage of 540 V.
Master of Science
As material advancements allow for the creation of devices with superior electrical characteristics compared to their predecessors, there are still a number of factors which cause these devices to see limited usage in commercial applications. These devices, typically referred to as wide-bandgap devices, include silicon carbide (SiC) transistors. These SiC devices allow for much faster switching speeds, greater efficiencies, and lower system volume compared to their silicon counterparts. However, due to the faster switching of these devices, there is more electromagnetic noise generated. In many applications, this noise must be filtered or otherwise mitigated in order to meet international standards for commercial use. Consequently, new converter topologies and configurations are necessary to provide the most benefit of the new wide-bandgap devices while still meeting the strict noise requirements. A survey of topologies was conducted and the modeling, design, and testing of one topology was performed for use in an uninterruptible power supply (UPS). This converter was able to provide a noticeable reduction in noise compared to standard topologies while still achieving very high efficiency at rated conditions. This converter was also verified to provide power bidirectionally—both when the UPS is charging the battery backup, and when the battery is supplying power to the load.

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11

Marzoughi, Alinaghi. "Investigating Impact of Emerging Medium-Voltage SiC MOSFETs on Medium-Voltage High-Power Applications." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/81822.

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For decades, the Silicon-based semiconductors have been the solution for power electronics applications. However, these semiconductors have approached their limits of operation in blocking voltage, working temperature and switching frequency. Due to material superiority, the relatively-new wide-bandgap semiconductors such as Silicon-Carbide (SiC) MOSFETs enable higher voltages, switching frequencies and operating temperatures when compared to Silicon technology, resulting in improved converter specifications. The current study tries to investigate the impact of emerging medium-voltage SiC MOSFETs on industrial motor drive application, where over a quarter of the total electricity in the world is being consumed. Firstly, non-commercial SiC MOSFETs at 3.3 kV and 400 A rating are characterized to enable converter design and simulation based on them. In order to feature the best performance out of the devices under test, an intelligent high-performance gate driver is designed embedding required functionalities and protections. Secondly, total of three converters are targeted for industrial motor drive application at medium-voltage and high-power range. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at 4.16-, 6.9- and 13.8 kV voltage ratings and 3- and 5 MVA power ratings. Selection of different voltage and power levels is done to elucidate variation of different parameters within the converters versus operating point. Later, comparisons are done between the surveyed topologies designed at different operating points based on Si IGBTs and SiC MOSFETs. The comparison includes different aspects such as efficiency, power density, semiconductor utilization, energy stored in converter structure, fault containment, low-speed operation capability and parts count (for a measure of reliability). Having the comparisons done based on simulation data, an H-bridge cell is implemented using 3.3 kV 400 A SiC MOSFETs to evaluate validity of the conducted simulations. Finally, a novel method is proposed for series-connecting individual SiC MOSFETs to reach higher voltage devices. Considering the fact that currently the SiC MOSFETs are not commercially available at voltages higher above 1.7 kV, this will enable implementation of converters using medium-voltage SiC MOSFETs that are achieved by stacking commercially-available 1.7 kV MOSFETs. The proposed method is specifically developed for SiC MOSFETs with high dv/dt rates, while majority of the existing solutions could only work merely with slow Si-based semiconductors.
Ph. D.

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12

Francisco, Venustiano Canales Abarca. "Novel DC/DC Converters For High-Power Distributed Power Systems." Diss., Virginia Tech, 2003. http://hdl.handle.net/10919/28612.

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One of the requirements for the next generation of power supplies for distributed power systems (DPSs) is to achieve high power density with high efficiency. In the traditional front-end converter based on the two-stage approach for high-power three-phase DPSs, the DC-link voltage coming from the power factor correction (PFC) stage penalizes the second-stage DC/DC converter. This DC/DC converter not only has to meet the characteristics demanded by the load, but also must process energy with high efficiency, high reliability, high power density and low cost. To meet these requirements, approaches such as the series connection of converters and converters that reduce the voltage stress across the main devices have been proposed. In order to improve the characteristics of these solutions, this dissertation proposes high-efficiency, high-density DC/DC converters for high-power high-voltage applications. In the first part of the dissertation, a DC/DC converter based on a three-level structure and operated with pulse width modulation (PWM) phase-shift control is proposed. This new way to operate the three-level DC/DC converter allows soft-switching operation for the main devices. Zero-voltage switching (ZVS) and zero-voltage and zero-current switching (ZVZCS) soft-switching techniques are studied, analyzed and compared in order to improve the characteristics of the proposed converter. This results in a series of ZVS and ZVZCS three-level DC/DC converters for high-power high-voltage applications. In all cases, results from 6kW prototypes operating at 100 kHz are presented. In addition, with the ultimate goal of improving the power density of the DC/DC converter, a study of several resonant DC/DC converters that can operate at higher switching frequencies is presented. From this study, a three-element ZVS three-level resonant converter for applications with wide input voltage and load variations is proposed. Experimental results at 745 kHz obtained without penalizing the efficiency of the PWM approaches are presented. The second part of the dissertation proposes a quasi-integrated AC/DC three-phase converter that aims to reduce the complexity and cost of the traditional two-stage front-end converter. This converter improves the complexity/low-efficiency tradeoff characteristics evident in the two-stage approach and previous integrated converters. The principle of operation for the converter is analyzed and verified on a 3kW experimental prototype.
Ph. D.

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13

Busquets, Monge Sergio. "A novel pulsewidth modulation for the comprehensive neutral-point voltage control in the three-level three-phase neutral-point-clamped dc-ac converte." Doctoral thesis, Universitat Politècnica de Catalunya, 2006. http://hdl.handle.net/10803/6372.

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Las topologías de convertidores multinivel han recibido una atención especial durante las dos últimas décadas debido a sus notables ventajas en aplicaciones de alta potencia y media/alta tensión. En estas topologías, y comparadas con el convertidor tradicional de dos niveles, el voltaje que soporta cada dispositivo semiconductor es menor, evitando los problemas asociados con la interconexión serie de dispositivos. La distorsión armónica en la tensión de salida es también menor y la eficiencia mayor. Pero incorporan un número superior de dispositivos semiconductores y la estrategia de modulación resultante es, por tanto, más compleja.
Entre estas topologías, el convertidor cc-ca de tres niveles trifásico con conexión al punto neutro del bus de cc es probablemente el más popular. La aplicación a este convertidor de técnicas de modulación convencionales causa una oscilación de la tensión del punto neutro de baja frecuencia (tres veces la frecuencia fundamental de la tensión de salida). Esta oscilación, a su vez, supone un incremento del estrés de tensión de los dispositivos y provoca la aparición de armónicos de baja frecuencia en la tensión de salida.
Esta tesis presenta una nueva técnica de modulación del pulso de conducción de los dispositivos semiconductores para convertidores de tres niveles trifásicos con conexión a punto neutro, capaz de conseguir un control completo de la tensión del punto neutro con una distorsión armónica reducida en la tensión de salida alrededor de la frecuencia de conmutación. Esta nueva técnica de modulación, basada en la definición de unos vectores espaciales virtuales, garantiza el equilibrado de la tensión del punto neutro con cualquier carga (lineal o no, cualquier factor de potencia) y para todo el rango de tensión de salida, con el único requisito de que la suma de corrientes de fase sea nula.
Las características de la técnica de modulación propuesta y sus beneficios con respecto a otras modulaciones se han verificado a través de simulaciones y experimentos tanto en lazo abierto como en lazo cerrado.
Multilevel converter topologies have received special attention during the last two decades due to their significant advantages in high-power medium- and high-voltage applications. In these topologies, and compared to the previous two-level case, the voltage across each semiconductor is reduced, avoiding the problems of the series interconnection of devices. The harmonic distortion of the output voltage is also diminished and the converter efficiency increases. But a larger number of semiconductors is needed and the modulation strategy to control them becomes more complex.
Among these topologies, the three-level three-phase neutral-point-clamped voltage source inverter is probably the most popular. The application of traditional modulation techniques to this converter causes a low frequency (three times the fundamental frequency of the output voltage) oscillation of the neutral-point voltage. This, in turn, increases the voltage stress on the devices and generates low-order harmonics in the output voltage.
This thesis presents a novel pulsewidth modulation for the three-level three-phase neutral-point-clamped converter, able to achieve a complete control of the neutral-point voltage while also having a low output voltage distortion at around the switching frequency. The new modulation, based on a virtual space vector concept, guarantees the balancing of the neutral-point voltage for any load (linear or nonlinear, any load power factor) over the full range of converter output voltage, the only requirement being that the addition of the output three-phase currents equals zero.
The performance of this modulation approach and its benefits over other previously proposed solutions are verified through simulation and experiments in both open- and closed-loop converter configurations.

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14

Lee, Moonhyun. "Digital-Based Zero-Current Switching (ZCS) Control Schemes for Three-Level Boost Power-Factor Correction (PFC) Converter." Diss., Virginia Tech, 2020. http://hdl.handle.net/10919/99694.

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With the increasing demands on electronic loads (e.g. desktop, laptop, monitor, LED lighting and server) in modern technology-driven lives, performance of switched-mode power supply (SMPS) for electronics have been growing to prominence. As front-end converters in typical SMPS structure, ac-dc power-factor correction (PFC) circuits play a key role in regulations of input power factor, harmonics and dc output voltage, which has a decisive effect on entire power-supply performances. Universal ac-line and low-power system (90–264 Vrms, up to 300–400 W) is one of the most common power-supply specifications and boost-derived PFC topologies have been widely used for the purpose. In order to concurrently achieve high efficiency and low-cost system in the PFC stage, zero-current switching (ZCS) control schemes are highly employed in control principles. Representative schemes are discontinuous conduction mode (DCM) and critical conduction mode (CRM). Both modes can realize ZCS turn-on without diode reverse recovery so that low switching losses and low-cost diode utilizations are obtainable. Among various boost-family PFC topologies, three-level boost (TLB) converter has generated considerable research interest in high-voltage high-power applications. It is mainly due to the fact that the topology can have halved component voltage stresses, improved waveform qualities and electromagnetic interference (EMI) from phase interleaved continuous conduction mode (CCM) operations, compared to other two-level boost PFC converters. On the other hand, in the field of universal-line low-power applications, TLB PFC has been thoroughly out of focus since doubled component counts and increased control complexity than two-level topologies are practical burden for the low-cost systems. However, recent researches on TLB PFC with ZCS control schemes have found that cost-competitiveness of the topology is actually comparable to two-level boost PFC converters because the halved component voltage stresses enable usage of low voltage-rating components of which unit prices are cheaper than higher-rating ones. Based on the justification, researches on ZCS control schemes for TLB PFC have been conducted to get enhanced waveform qualities and performance factors. Following the research stream, a three-level current modulation scheme that can be adopted in both DCM and CRM is proposed in Chapter 2 of this dissertation. Main concept of the proposed current modulation is additional degree-of-freedom in current-slope shaping by differentiating on-times of two active switches, which cannot be found from any other single-phase boost-derived PFC topologies. Using the multilevel feature, proposed operations in one switching period consist of three steps: common-switch on-time, single-switch on-time and common-switch off-time. The single-switch on-time step is key design factor of the proposed modulation that can be utilized either in fixed or adjustable form depending on control purpose. Based on the basic modulation concept, three-level CRM control scheme, adjustable three-level DCM control scheme, and spread-spectrum frequency modulation (SSFM) with adjustable three-level DCM scheme are proposed in Chapter 3–5, respectively. In each chapter, implemented control scheme aims to improve different performance factors. In Chapter 3, the proposed three-level CRM scheme uses increased single-switch on-time period to reduce peak inductor current and magnitude of variable switching frequency. It is generally accepted fact that CRM operations suffer from high switching losses and poor efficiency at light load due to considerable increment of switching frequency. Thus, efficiency improvement effect by the proposed CRM scheme becomes remarkable as load condition goes lighter. In experimental verifications, maximum improvement is measured by 1.2% at light load (20%) and overall efficiency is increased by at least 0.4% all over the load range. In Chapter 4, three-level DCM control scheme adopts adjustable single-switch on-time period in fixed switching-frequency framework. The purpose of adjustable control scheme is to widen the length of non-zero inductor current period as much as possible so that discontinued current period and high peak current of DCM operations can be minimized. Experiment results show that, compared to conventional two-level DCM control, full-load peak inductor currents are reduced by 20.2% and 17.1% at 110 and 220 Vrms input voltage conditions, respectively. Moreover, due to turn-off switching energy decrements by the turn-off current reductions, efficiency is also improved by at least 0.4% regardless of input voltage and load conditions. In Chapter 5, a downward SSFM technique is developed first for DCM operations of boosting PFC converters including two-level topologies. This chapter aims to achieve significant reduction of high differential-mode (DM) EMI amplitudes from DCM operations, which is major drawback of DCM control. By using the simple linearized frequency modulation, peak DM EMI noise at full load condition is reduced by 12.7 dBμV than conventional fixed-frequency DCM control. On top of the proposed SSFM, the adjustable three-level DCM control scheme in Chapter 4 is adopted to get further reductions of EMI noises. Experimental results prove that the collaborations of SSFM and adjustable DCM scheme reduce the EMI amplitudes further by 2.5 dBμV than the result of SSFM itself. The reduced EMI amplitudes are helpful to design input EMI filter with higher cut-off frequency and smaller size. Different from two-level boosting PFC converters, TLB PFC topology has two output capacitors in series and inherently suffers from voltage unbalancing issue, which can be noted as topological trade-off. In Chapter 6, two simple but effective voltage balancing schemes are introduced. The balancing schemes can be easily built into the proposed ZCS control schemes in Chapter 3–5 and experimental results validate the effectiveness of the proposed balancing principles. For all the proposed control schemes in this dissertation, detailed operation principles, derivation process of key equations, comparative analyses, implementation method with digital controller and experimental verifications with TLB PFC prototype are provided.
Doctor of Philosophy
Electronic-based devices and loads have been essential parts of modern society founded on rapid advancements of information technologies. Along with the progress, power supplying and charging of electronic products become routinized in daily lives, but still remain critical requisites for reliable operations. In many power-electronics-based supplying systems, ac-dc power-factor correction (PFC) circuits are generally located at front-end to feed back-end loads from universal ac-line sources. Since PFC stages have a key role in regulating ac-side current quality and dc-side voltage control, the importance of PFC performances cannot be emphasized enough from entire system point of view. Thus, advanced control schemes for PFC converters have been developed in quantity to achieve efficient operations and competent power qualities such as high power factor, low harmonic distortions and low electromagnetic interferences (EMI) noises. In this dissertation, a sort of PFC topologies named three-level boost (TLB) converter is chosen for target topology. Based on inherent three-level waveform capability of the topology, multiple zero-current switching (ZCS) control schemes are proposed. Compared to many conventional two-level PFC topologies, TLB PFC can provide additional degree-of-freedom to current modulation. The increased control flexibility can realize improvements of various waveform qualities including peak current stress, switching frequency range, harmonics and EMI amplitude. From the experimental results in this dissertation, improvements of waveform qualities in TLB PFC with the proposed schemes are verified with comparison to two-level current control schemes; in terms of efficiency, the results show that TLB PFC with the proposed schemes can have similar converter efficiency with conventional two-level boost converter in spite of increased component counts in the topology. Further, the proposed three-level control schemes can be utilized in adjustable forms to accomplish different control objectives depending on system characteristics and applications. In each chapter of this dissertation, a novel control scheme is proposed and explained with details of operation principle, key equations and digital implementation method. All the effectiveness of proposals and analyses are validated by a proper set of experimental results with a TLB PFC prototype.

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15

Jiao, Yang. "High Power High Frequency 3-level NPC Power Conversion System." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56653.

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The high penetration of renewable energy and the emerging concept of micro-grid system raises challenges to the high power conversion techniques. Multilevel converter plays the key role in such applications and is studied in detail in the dissertation. The topologies and modulation techniques for multilevel converter are categorized at first by a thorough literature survey. The pros and cons for various multilevel topologies and modulation techniques are discussed. The 3-level neutral point clamped (NPC) topology is selected to build a 200kVA, 20 kHz power conversion system. The modularized phase leg building block of the converter is carefully designed to achieve low loss and stress for high frequency and high power operation. The switching characteristics for all the commutation loops of 3-level phase leg are evaluated by double pulse tests. The switching performance is optimized for loss and stress tradeoff. A detailed loss model is built for system loss distribution and loss breakdown calculation. Loss and stress for the phase leg and 3-phase system are quantified at all power factors. The space vector modulation (SVM) for 3-level NPC converter is investigated to achieve loss reduction, neutral voltage balance and noise reduction. The loss model and simulation model provides a quantitative analysis for loss and neutral voltage ripple tradeoff. An improved SVM method is proposed to reduce NP imbalance and switching loss simultaneously. This method also ensures an evenly distributed device loss in each phase leg and gives a constant system efficiency under different power factors. Based on the improved modulation strategy, a new modulation scheme is then proposed with largely reduced conduction loss and switching stress. Moreover, the device loss and stress distribution on a phase leg is more even. This scheme also features on the simplified implementation. The improved switching characteristics for the proposed method are verified by double pulse tests. Also the system loss breakdown and the phase leg loss distribution analysis shows the loss reduction and redistribution result. The harmonic filter for the grid interface converter is designed with LCL topology. A detailed inductor current ripple analysis derives the maximum inductor current ripple and the ripple distribution in a line cycle. The inverter side inductor is designed with the optimum loss and size trade-off. The grid side inductor is designed based on grid code attenuation requirement. Different damping circuits for LCL filter are evaluated in detail. The filter design is verified by both simulation and hardware experiment. The average model for the 3-level NPC converter and its equivalent circuit is derived with the consideration of damping circuit in both ABC and d-q frame. The modeling and control loop design is verified by transfer function measurement on real hardware. The control loops design is also tested and verified on real hardware. The interleaved DC/DC chopper is introduced at last. The different interleaving methods and their current ripple are analyzed in detail with the coupled and non-coupled inductor. An integrated coupled inductor based on 3-dimentional core structure is proposed to achieve high power density and provide both CM and DM impedance for the inductor current and output current.
Ph. D.

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16

Sedele, Serkan Paki. "A Novel Approach For Synthesising Sinus Waveforms At Power Level." Master's thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12604723/index.pdf.

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In variable speed motor drive and uninterruptible power supply (UPS) applications, taditional method is to employ some kind of a modulation technique at a high frequency typically 6 kHz to 20 kHz range. In these modulation techniques, the switches are hard switched. The result is application of a series of pulses to the load, and if the load is inductive, sine wave current flows into the load. Hard and rapid switching causes a voltage waveform with a very high dv/dt (rate of change in voltage) causing high EMI problems, reduced life expectancy of the motor and additional losses. So a power supply generating pure sinusoidal voltage waveform is very desirable. In industry some low pass filters called sinusoidal filters, are used at the output of the inverters but this comes with additional cost and bulky filter elements. In this study, a novel approach for generating power level sinusoidal waveforms is proposed. The basic structure is a DC-DC converter that produces a rectified DC-link at its output and an H-bridge inverter that inverts the rectified sinusoids to form a sinusoidal voltage. Main advantages of the circuit are that the H-bridge inverter switches have no switching stresses, they are switched at low frequency so the reliability is increased. Throughout the study different circuit topologies have been investigated and the analysis of the chosen topologies is supported with computer simulations. The system is then set up in the laboratory. In order to prove of the concept, only a single phase inverter has been investigated at steady state conditions. Efficiency, distortion level, magnitude error and device stresses have been obtained. The results indicate that the proposed configuration is very promising.

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17

Tan, Jiak-San. "Flexibility in MLVR-VSC back-to-back link." Thesis, University of Canterbury. Electrical and Computer Engineering, 2006. http://hdl.handle.net/10092/1119.

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This thesis describes the flexible voltage control of a multi-level-voltage-reinjection voltage source converter. The main purposes are to achieve reactive power generation flexibility when applied for HVdc transmission systems, reduce dynamic voltage balancing for direct series connected switches and an improvement of high power converter efficiency and reliability. Waveform shapes and the impact on ac harmonics caused by the modulation process are studied in detail. A configuration is proposed embracing concepts of multi level, soft-switching and harmonic cancellation. For the configuration, the firing sequence, waveform analysis, steady-state and dynamic performances and close-loop control strategies are presented. In order not to severely compromise the original advantages of the converter, the modulated waveforms are proposed based on the restrictions imposed mathematically by the harmonic cancellation concept and practically by the synthesis circuit complexity and high switching losses. The harmonic impact on the ac power system prompted by the modulation process is studied from idealistic and practical aspects. The circuit topology being proposed in this thesis is developed from a 12-pulse bridge and a converter used classically for inverting power from separated dc sources. Switching functions are deduced and current paths through the converter are analysed. Safe and steady-state operating regions of the converter are studied in phasor diagrams to facilitate the design of simple controllers for active power transfer and reactive power generations. An investigation into the application of this topology to the back-to-back VSC HVdc interconnection is preformed via EMTDC simulations.

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18

Koganti, Naga Babu. "Modeling and Characterization of Circuit Level Transients in Wide Bandgap Devices." University of Toledo / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=toledo153311831687909.

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19

Gebreel, Abd Almula G. M. "POWER CONVERSION FOR UHVDC TO UHVAC BASED ON USING MODULAR MULTILEVEL CONVERTER." The Ohio State University, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=osu1429358686.

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20

Jaksic, Marko Dragoljub. "Identification of small-signal dq impedances of power electronics converters via single-phase wide-bandwidth injection." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/51222.

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AC and DC impedances of switching power converters are used for the stability analysis of modern power electronics systems at three-phase AC and single-phase DC interfaces. Therefore, a small-signal characterization algorithm for switching power converter, which is based on FFT, will be presented and explained. The presented extraction algorithm is general and can be used to obtain other small-signal transfer functions of arbitrary power converter switching simulation models. Furthermore, FFT algorithm is improved by using cross power spectral density functions for identification, resulting in an algorithm, which is more noise immune. Both small-signal identification algorithms are validated in simulations, and CPSD algorithm is used in experimental measurement procedure. Several wide bandwidth injection signals, among which are chirp, multi-tone, pulse and white noise, are compared and theoretically analyzed. Several hardware examples are included in the analysis. The second part of the dissertation will focus on the modeling of small-signal input dq admittance of multi-pulse diode rectifiers, providing comparison between well-known averaged value models (AVMs), parametric averaged value models (PAVM), the switching simulation model and hardware measurements. Analytical expressions for all four admittances present in the dq matrix are derived and analyzed in depth, revealing the accuracy range of the averaged models. Furthermore, a hardware set-up is built, measured and modeled, showing that the switching simulation model captures nonlinear sideband effects accurately. In the end, a multi-pulse diode rectifier feeding a constant power load is analyzed with modified AVM and through detailed simulations of switching model, proving effectiveness of the proposed modifications. The third part describes implementation and design of a single-phase multi-level single-phase shunt current injection converter based on cascaded H-bridge topology. Special attention is given toward the selection of inductors and capacitors, trying to optimize the selected component values and fully utilize operating range of the converter. The proposed control is extensively treated, including inner current, outer voltage loop and voltage balancing loops. The designed converter is constructed and integrated with measurement system, providing experimental verification. The proposed multi-level single-phase converter is a natural solution for single-phase shunt current injection with the following properties: modular design, capacitor energy distribution, reactive element minimization, higher equivalent switching frequency, capability to inject higher frequency signals, suitable to perturb higher voltage power systems and capable of generating cleaner injection signals. Finally, a modular interleaved single-phase series voltage injection converter, consisting of multiple paralleled H-bridges is designed and presented. The decoupling control is proposed to regulate ac injection voltage, providing robust and reliable strategy for series voltage injection. The designed converter is simulated using detailed switching simulation model and excellent agreement between theory and simulation results are obtained. The presented control analysis treats different loads, examining robustness of the circuit to load variations. Simulation model and hardware prototype results verify the effectiveness of the proposed wide-bandwidth identification of small-signal dq impedances via single-phase injections.
Ph. D.

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21

Boutry, Arthur. "Theoretical and experimental evaluation of the Integrated gate-commutated thyristor (IGCT) as a switch for Modular Multi Level Converters (MMC)." Thesis, Lyon, 2021. http://www.theses.fr/2021LYSEI095.

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Une étude sur la réduction/suppression de l'inductance de limitation di/dt pour IGCTs et du clamp RCD en utilisant des diodes rapides en silicium (Si) et des diodes en carbure de silicium (SiC) dans les convertisseurs multiniveaux modulaires (MMC). Cette thèse contient :- Analyse des sous-modules de MMC HVDC existants.- Évaluation de l'intérêt des IGCTs dans les sous-modules MMC HVDC et comparaison des pertes avec les IGBT, en utilisant des facteurs de mérite spécifiques aux MMC créés dans cette thèse.- Test de double pulse avec diode à récupération rapide dans un module plastique pour tenter de réduire et supprimer l'inductance limitant le di/dt.- Packaging de puces de diodes SiC PiN à haute tension et courant élevé, test avec IGCT dans le même montage, pour tenter de réduire et supprimer l'inductance limite di/dt, et analyser les spécificités de la diode SiC dans ce montage
A study on Integrated gate-commutated thyristors (IGCT) di/dt limiting inductance and RCD-clamp reduction/suppression using plastic module silicon (Si) fast recovery diodes and silicon carbide (SiC) diodes, in Modular Multilevel Converters (MMC). This PhD contains:- Analysis of existing HVDC MMC Submodules.- Assessment of the interest of the IGCT in HVDC MMC Submodules and losses comparison with IGBTs, using MMC-specific figures-of-merit created in this thesis.- Double pulse test with fast recovery diode in plastic module to attempt to reduce and suppress the limiting di/dt inductor.- Packaging of High-Voltage High-Current SiC PiN diode dies, test with IGCT in the same setup to attempt to reduce and suppress the limiting di/dt inductor and analyze the specificities of the SiC diode in this setup

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22

Kleist, Anders. "Theory of super power saving circuits and configurations for mixed signal CPU for smartcard application." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2326.

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Designing an application specific integrated circuit (ASIC) must be starting with careful preparations, otherwise the chip will not be as good as possible. The theoretical studies must cover everything from the chip circuits to the application structure. In mobile applications there is extremely important that the current consumption becomes minimized because the battery power is limited. The power reductions studies must include the most power costing circuits on the chip. When the whole circuit or segments of the circuit is not in use, they must switch fast and simple into another mode that consume nearly none power. This mode is called sleep-mode. If the sleep-mode has very low leakage currents, the lifetime of the application will dramatically increase.

This report studies the most power costing circuits in smartcard application ASIC. The chip should be used to control a LCD display on the smartcard. The circuits that have been investigated are level shifters, charge pumps and LCD drivers, also sleep-mode configuration possibilities have been investigated. Other small preparing work is also included in the thesis.

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23

Сабокар, Олег Сергійович. "Удосконалення магнітно-імпульсного обладнання для технологій ремонту транспортних засобів". Thesis, Харківський національний автомобільно-дорожній університет, 2018. http://repository.kpi.kharkov.ua/handle/KhPI-Press/39634.

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Дисертація на здобуття наукового ступеня кандидата технічних наук за спеціальністю 05.09.13 – техніка сильних електричних та магнітних полів. Національний технічний університет "Харківський політехнічний інститут", Харків 2019. Дисертація присвячена вирішенню завдання поліпшення технічних показників обладнання магнітно-імпульсної обробки металів (міоми) для використання в технологіях металообробки і технологіях ремонту транспортних засобів. У роботі представлена розробка альтернативної конструкції вузла заряду ємнісних накопичувачів енергії та розробка системи індукційного нагріву. Дано числові показники нагріву при варіації часових параметрів збуджуючого струму і конструктивних параметрів інструменту індуктора. Розглянута модель системи збудження струму індуктора доповнена експериментальними дослідженнями системи в режимі резонансу напруги. Запропоновано використання модифікованої часової форми біполярного меандру сигналу збудження для зменшення кількості спектральних складових. Сконструйована система індукційного нагріву, що працює в режимі резонансу напруги, показала свою працездатність і ефективність. Було запропоновано виконувати збудження коливань струму імпульсами напруги модифікованої форми з частотою нижче на 20% від резонансної частоти, що забезпечує прийнятний ККД в режимі роботи системи без навантаження. Розробка система індукційного нагріву пройшла апробацію і випробування на підприємствах "Веда Авто Сервіс" (м. Київ) і АТ "Елеватормлинмаш" (м. Харків). Результати дисертаційної роботи використовують при підготовці бакалаврів та магістрів на кафедрі автомобільної електроніки Харківського національного автомобільно-дорожнього університету.
Thesis for the degree of Candidate of Technical Sciences for specialty 05.09.13 "Equipment of strong electric and magnetic fields" – National Technical University "Kharkiv Polytechnic Institute". Kharkiv, 2019. The thesis is dedicated to the solution of the problem of the technical performance of magnetic-impulse metal processing equipment improving for use in metal-working technologies and vehicle repair technologies. The paper presents the development of an alternative design for the capacitive energy storage charge system and the development of an induction heating system. The numerical heating indicators was given with a variation of the time parameters of the exciting current and the design parameters of the inductor tool. The system model of inductor current excitation in the mode of current resonance was considered and supplemented by experimental studies of the system in voltage resonance mode. The use of a modified time form of the bipolar meander of the excitation signal to reduce the number of spectral components was proposed. The induction heating system designed that operates in the voltage resonance mode has shown its efficiency. It was proposed to perform the excitation of current oscillations by voltage pulses of the modified form with a frequency lower than 20% of the resonant frequency, which ensures acceptable efficiency in the system operation without load. The development of the induction heating system has been tested and implicated at the enterprises of "Veda Auto Service" (Kyiv) and "Elevatormlinmash" (Kharkiv). The results of the thesis are used in the preparation of bachelors and masters degree at the department of automobile electronics of the Kharkiv National Automobile and Highway University.

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24

Dehghanikiadehi, Abbas. "Commande vectorielle innovante pour véhicules électriques ou hybrides." Thesis, Université Clermont Auvergne‎ (2017-2020), 2017. http://www.theses.fr/2017CLFAC012/document.

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Durant ces dernières années, l'intérêt pour les technologies des véhicules à faibles émissions de carbone a fait un bond important à travers l'Union européenne (UE) et au-delà, encouragé en cela par les gouvernements et les constructeurs automobiles. De grands espoirs ont été mis plus récemment dans les véhicules électriques (VE) et les véhicules électriques hybrides (VEH) en tant que technologies clés pour atténuer le changement climatique, améliorer la sécurité énergétique et favoriser une nouvelle branche de l'industrie dans le secteur automobile. Ainsi, l'électrification des transports a été considérée comme une stratégie clé pour réduire les émissions de CO2 dans le secteur des transports. Le principal défi est d’augmenter l’autonomie des véhicules (ce qui a toujours été au coeur de la concurrence des industries du transport), ainsi que la durée de vie des volumineuses et coûteuses batteries. Par conséquent, ceci indique que le rendement du convertisseur de puissance est un des points clés à développer pour les générations des véhicules électriques à venir. L’autre paramètre influant est la qualité de la tension et du courant (en particulier la suppression des harmoniques basses fréquences) qui permet de réduire la taille des filtres d'entrée et de sortie de ces convertisseurs. L'objectif de cette thèse est de parvenir à un meilleur rendement en proposant de nouvelles structures de convertisseur de puissance et des commandes vectorielles modifiées ; le choix de deux onduleurs alimentant un moteur ouvert aux deux extrémités. Après l'analyse étape par étape, modèle théorique, simulation et enfin une mise en oeuvre expérimentale, il a été constaté que les nouvelles méthodes proposées sont compétitives et peuvent s’appliquer aux cas des VEH et des VE afin d’apporter des caractéristiques supérieures en termes d’efficacité et de qualité de tension et de courant
Over the last decade, the interest for low-carbon vehicle technologies has surged among both governments and automotive manufacturers across and beyond the European Union (EU). Great hopes have been put, first, on biofuel vehicles and more recently on electric vehicles (EVs) and hybrid electric vehicles (HEVs) as key technologies to mitigate climate change, enhance energy security and nurture new industry branches within the automotive sector. So electrification of vehicles has been seen as a key strategy to reduce CO2 emissions from the transport sector. The main challenge toward EVs and HEVs is to keep driving for longer distance (which has been always fields for competition among traction industries) as well as lifetime battery cells as storage system. As a result, these indicate importance of power converter efficiency as a key gate for next generations of these up-coming vehicles. The next parameter is the quality of output voltage/current (especially by suppressing low-order harmonics) to reduce the size of filtering. The aim of this thesis is to achieve better efficiency and output voltage/current Total Harmonic Distortion (THD) by proposing novel power converter and associated Pulse Width Modulation (PWM) methods while imposing modification on power converter topology. As a result, dual-inverter is proposed to supply open-end motor from both sides. To this aim, three PWM methods are suggested as: The first one, Modified Space Vector Modulation (MSVM) for dual-inverter supplied by single dc source, improves efficiency by 4-5% (while having lower switching losses), and reduces Common Mode Voltage (CMV) levels by 66%, as well. The voltage/current harmonics are analytically analyzed which shows mainly better performance. Effective switching frequency is also reduced by 66% due to the reduction of number of commutations. In the second one, Near State PWM (NSPWM) is adapted for dual-inverter supplied by single dc source in order to eliminate triplen harmonics (therefore Zero Sequence Voltage, ZSV) and improve efficiency (by 3-4%) compared to Space Vector Modulation (SVM). Additionally due to avoiding use of zero vectors, CMV is improved by 66%. While having 8 commutations instead of 12 in SVM, effective switching frequency is improved by 33%. And finally, the third proposed method deals with NSPWM for dual-inverter supplied by two isolated dc sources wherein efficiency and CMV levels show the same performance as previous one. However, in this method, voltage THD is highly reduced compared to SVM. Triplen harmonics of the output voltage are inherently suppressed by the structure. These 3 proposed methods are analytically studied and their performances are step by step simulated in Matlab/Simulink environment. Then the methods are implemented in dualinverter fed open-end motor in laboratory setup; and the results are compared with these of SVM. Finally, it is found that novel proposed methods are so competitive solutions to be applied in HEVs and EVs and bring superior efficiency and voltage/current harmonic features

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25

Сабокар, Олег Сергійович. "Удосконалення магнітно-імпульсного обладнання для технологій ремонту транспортних засобів". Thesis, Національний технічний університет "Харківський політехнічний інститут", 2019. http://repository.kpi.kharkov.ua/handle/KhPI-Press/39631.

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Анотація:

Дисертація на здобуття наукового ступеня кандидата технічних наук за спеціальністю 05.09.13 – техніка сильних електричних та магнітних полів. Національний технічний університет "Харківський політехнічний інститут", Харків 2019. Дисертація присвячена вирішенню завдання поліпшення технічних показників обладнання магнітно-імпульсної обробки металів (міоми) для використання в технологіях металообробки і технологіях ремонту транспортних засобів. У роботі представлена розробка альтернативної конструкції вузла заряду ємнісних накопичувачів енергії та розробка системи індукційного нагріву. Дано числові показники нагріву при варіації часових параметрів збуджуючого струму і конструктивних параметрів інструменту індуктора. Розглянута модель системи збудження струму індуктора доповнена експериментальними дослідженнями системи в режимі резонансу напруги. Запропоновано використання модифікованої часової форми біполярного меандру сигналу збудження для зменшення кількості спектральних складових. Сконструйована система індукційного нагріву, що працює в режимі резонансу напруги, показала свою працездатність і ефективність. Було запропоновано виконувати збудження коливань струму імпульсами напруги модифікованої форми з частотою нижче на 20% від резонансної частоти, що забезпечує прийнятний ККД в режимі роботи системи без навантаження. Розробка система індукційного нагріву пройшла апробацію і випробування на підприємствах "Веда Авто Сервіс" (м. Київ) і АТ "Елеватормлинмаш" (м. Харків). Результати дисертаційної роботи використовують при підготовці бакалаврів та магістрів на кафедрі автомобільної електроніки Харківського національного автомобільно-дорожнього університету.
Thesis for the degree of Candidate of Technical Sciences for specialty 05.09.13 "Equipment of strong electric and magnetic fields" – National Technical University "Kharkiv Polytechnic Institute". Kharkiv, 2019. The thesis is dedicated to the solution of the problem of the technical performance of magnetic-impulse metal processing equipment improving for use in metal-working technologies and vehicle repair technologies. The paper presents the development of an alternative design for the capacitive energy storage charge system and the development of an induction heating system. The numerical heating indicators was given with a variation of the time parameters of the exciting current and the design parameters of the inductor tool. The system model of inductor current excitation in the mode of current resonance was considered and supplemented by experimental studies of the system in voltage resonance mode. The use of a modified time form of the bipolar meander of the excitation signal to reduce the number of spectral components was proposed. The induction heating system designed that operates in the voltage resonance mode has shown its efficiency. It was proposed to perform the excitation of current oscillations by voltage pulses of the modified form with a frequency lower than 20% of the resonant frequency, which ensures acceptable efficiency in the system operation without load. The development of the induction heating system has been tested and implicated at the enterprises of "Veda Auto Service" (Kyiv) and "Elevatormlinmash" (Kharkiv). The results of the thesis are used in the preparation of bachelors and masters degree at the department of automobile electronics of the Kharkiv National Automobile and Highway University.

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26

Jihad, Hamza El. "Contribution à l'étude des convertisseurs multi-niveaux moyenne tension : réduction d'harmoniques BF et linéarisation de leur tension." Electronic Thesis or Diss., Université de Lorraine, 2019. http://www.theses.fr/2019LORR0175.

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Cette thèse traite des convertisseurs de puissance multi-niveaux destinés aux applications d’entraînements électriques, utilisés notamment dans le domaine de l’Oil & Gas et de la propulsion marine, ou bien aux applications réseaux comme la compensation de l’énergie réactive. L’objectif est l’optimisation des commandes de ces convertisseurs de façon à réduire le contenu harmonique de la tension de sortie et donc du courant, paramètre très important pour le dimensionnement à la fois des filtres de sortie et des machines électriques qui y sont connectées. Dans la première partie de ce mémoire, les différentes topologies multi-niveaux sont analysées et trois topologies cinq niveaux retenues sont comparées en termes de nombre de composants semi-conducteurs, des pertes, du contenu harmonique et de l’énergie stockée dans les éléments passifs. Selon le type de l’application, l’une d’entre elles est préférée aux autres. En deuxième partie, nous avons proposé une méthode de réduction d’harmoniques basse fréquence qui consiste à maîtriser la phase des porteuses MLI pour des ratios entiers des fréquences de découpage et du fondamentale de la tension de référence. La minimisation des harmoniques basse fréquence de la tension de sortie du convertisseur par l’optimisation de la phase des porteuses est validée d’abord par des simulations numériques puis implémentée pratiquement et validée à l’aide d’un simulateur temps réel RT-Lab. Pour pallier aux problèmes de non-linéarités introduites par les méthodes classiques de ”clamping” des tensions de références des convertisseurs multi-niveaux, limitant l’amplitude de la tension de sortie maximale atteignable, nous proposons une nouvelle méthode de linéarisation en dernière partie de ce mémoire. Il s’agit d’ajouter une composante homopolaire optimisée aux tensions de références des convertisseurs multi-niveaux pour linéariser le fondamental de leurs tensions de sortie, ce qui permet d’accroître le maximum de leur amplitude. Cette méthode est testée par simulation numérique dans la commande d’un système d’entraînement électrique complet lui permettant de fonctionner sur toute la plage de vitesse, sans affecter l’équilibrage des tensions des capacités du bus continu principal
This thesis deals with multi-level power converters for electrical drive applications, used in particular in the field of Oil & Gas and marine propulsion, or for network applications such as reactive energy compensation. The objective is to optimize the controls of these converters in order to reduce the harmonic content of the output voltage and therefore of the current, a very important parameter for the sizing of both the output filters and the electrical machines connected to them. In the first part of this thesis, the different multi-level topologies are analyzed and three selected five-level topologies are compared in terms of the number of semiconductor components, losses, harmonic content and the energy stored in the passive elements. Depending on the application type, one of them is preferred over the others. In the second part, we proposed a method for reducing low frequency harmonics of the multilevel converter output voltage, which consists in controlling the phase of the PWM carriers for integer ratios of the switching frequency and the fundamental frequency. The minimization of low-frequency harmonics of the converter output voltage by optimizing the carrier phase is first validated by numerical simulations and then practically implemented and validated using a real time simulator RT-Lab. To overcome the problems of non-linearities introduced by the classical clamping methods of the reference voltages of multi-level converters, limiting the amplitude of the maximum achievable output voltage, we propose a new linearization method in the last part of this thesis. This involves adding an optimized zero-sequence component to the reference voltages of multi-level converters to linearize the fundamental of their output voltages, which makes it possible to increase their amplitude to its maximum achievable value. This method is tested by numerical simulation in the control of a complete electric drive system allowing it to operate over the entire speed range, without affecting the voltage balancing of the main DC bus capacitors

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27

Orfanoudakis, G. I. "Analysis and reduction of dc-link capacitor voltage/current stress in three-level PWM converters." Thesis, University of Southampton, 2012. https://eprints.soton.ac.uk/352195/.

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Power electronic converters are in the heart of modern renewable energy and motor drive systems. This Thesis focuses on the converter dc-link capacitor (bank), which is a costly component and a common source of failures. The Thesis is divided into two parts. The first part examines the voltage and current stress induced on dc-link capacitors by the three most common converter topologies: The conventional two-level converter, the Neutral-Point-Clamped (NPC) three-level converter, and the Cascaded H-Bridge (CHB) three-level converter. The expressions derived for the rms capacitor current and its harmonics can be used as a tool for capacitor sizing. The harmonic analysis is then extended to systems that incorporate multiple converters connected to a common dc-link capacitor. The effect of introducing a phase shift to the converter carrier waveforms is examined, showing that reductions in the order of 30 to 50% in the common capacitor rms current can be achieved using appropriate phase shifts. The second part tackles the dc-link capacitor balancing problem, also known as Neutral Point (NP) balancing problem of the three-level NPC converter. Initially, a circuit that halves the voltage stress caused by the NP voltage oscillations (ripple) on the switching devices the NPC converter is proposed. The circuit consists of low voltage rated components which offer the advantages of lower losses, volume and cost, as compared to other balancing circuits. Subsequently, the study focuses on modulation strategies for the NPC converter. Starting with Nearest-Vector (NV) strategies, it proves that the criterion of the direction of dc-link capacitor imbalance, which is commonly adopted by NV strategies for performing the task of capacitor balancing, poses a barrier in achieving minimum NP voltage ripple. A new criterion is proposed instead, together with an algorithm that incorporates it into existing NV strategies. For the interesting case of NPC converters operating as motor drives, the resulting reduction in the amplitude of NP voltage ripple ranges from 30 to 50%. The study finishes with an extension of the previous concept to create hybrid (combinations of NV and non NV) strategies for the NPC converter. Hybrid strategies are proposed that can eliminate NP voltage ripple, introducing lower switching losses and output voltage distortion as compared to other methods used for the same purpose. The proposed strategies perform equally well when the converter operates with non linear or imbalanced loads. All results are verified by extensive simulations using MATLAB-Simulink.

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28

Yadhati, Vennela. "A comparative study of capacitor voltage balancing techniques for flying capacitor multi-level power electronic converters." Diss., Rolla, Mo. : Missouri University of Science and Technology, 2010. http://scholarsmine.mst.edu/thesis/pdf/Yadhati_09007dcc807d2cc9.pdf.

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Thesis (M.S.)--Missouri University of Science and Technology, 2010.
Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed July 26, 2010) Includes bibliographical references (p. 96-102).

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29

Kulenda, Vít. "Univerzální mikropočítačová jednotka." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-219068.

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Master’s thesis contains description parameters of microcontroller ATMEGA644P, also contains differences between older and newer version of microcontrollers ATMEGA644 and ATMEGA644PA. Inside structure of microcontroller, memories and peripherals are described here. The construction of the universal microcontroller unit is main target of this thesis. The unit contains supply, A/D converter, current loop, communication interfaces, temperature sensor, accelerometer and other. The unit collects and saves data, communicates by interfaces and manages other functions. Using devices and circuits are described in this thesis. Development of software for microcontroller(firmware) are positioned to last part of this thesis. This software control functions of all parts positioned on the unit.

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30

Andler, Daniel [Verfasser]. "Experimental Investigation of Three-Level Active Neutral Point Clamped Voltage Source Converters using Integrated Gate-Commutated Thyristors / Daniel Andler." München : Verlag Dr. Hut, 2014. http://d-nb.info/1051550092/34.

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31

Kucka, Jakub [Verfasser]. "Quasi-two-level PWM operation of modular multilevel converters : implementation, analysis, and application to medium-voltage drives / Jakub Kucka." Hannover : Gottfried Wilhelm Leibniz Universität Hannover, 2019. http://d-nb.info/1187440442/34.

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32

Andler, Osorio Daniel Andrés [Verfasser]. "Experimental Investigation of Three-Level Active Neutral Point Clamped Voltage Source Converters using Integrated Gate-Commutated Thyristors / Daniel Andler." München : Verlag Dr. Hut, 2014. http://d-nb.info/1051550092/34.

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33

Pou, Félix Josep. "Modulation and control of three-phase PWM multilevel converters." Doctoral thesis, Universitat Politècnica de Catalunya, 2002. http://hdl.handle.net/10803/6327.

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La present tesi doctoral estudia els inversors trifàsics multinivell del tipus denominat de díodes de fixació (diode-clamped converters). Aquests convertidors poden generar tres o més nivells de tensió a cada fase de sortida, i normalment s'apliquen a sistemes de gran potència ja que poden treballar amb tensions majors que els inversors clàssics. L'anàlisi es centra fonamentalment en la topologia de tres nivells, tot i que també es realitzen contribucions per a convertidors de més nivells. Els principals objectius són la proposta de nous algorismes de modulació vectorial PWM de processat ràpid, l'estudi i la compensació dels efectes dels desequilibris de les tensions dels condensadors del bus de continua, i l'anàlisi de llaços de control avançat.
S'han desenvolupat diversos models que han permès obtenir resultats de simulació de les tècniques de modulació i control proposades. A més, gràcies a l'estada d'un any de l'autor al Center for Power Electronics Systems (CPES) a Virginia Tech, USA, la tesi també inclou resultats experimentals que consoliden les conclusions i metodologies presentades. Les principals contribucions es resumeixen a continuació.
Es presenta un nou algorisme de modulació vectorial PWM que aprofita simetries del diagrama vectorial per a reduir el temps de processat. S'analitzen i es quantifiquen les oscil·lacions de tensió de baixa freqüència que apareixen en el punt central dels condensadors del convertidor de tres nivells. Aquesta informació permet dimensionar els condensadors donades les especificacions d'una determinada aplicació.
L'algorisme de modulació també s'aplica a convertidors de més nivells. Pel cas concret del convertidor de quatre nivells, es comprova l'existència de corrents continus en els punts mitjos dels condensadors que fan que els sistema sigui inestable. Es determinen gràficament les zones d'inestabilitat.
Es presenta un nou i eficient algorisme de modulació vectorial feedforward en el convertidor de tres nivells que és capaç de generar tensions trifàsiques de sortida equilibrades, malgrat l'existència de desequilibris en les tensions dels condensadors.
S'estudien els efectes negatius de càrregues lineals desequilibrades i càrregues no lineals en el control de les tensions dels condensadors. Es justifica que l'existència d'un quart harmònic en els corrents de càrrega pot inestabilitzar el sistema. És determina la màxima amplitud tolerable d'aquest harmònic.
S'estudia la millora en l'equilibrat de les tensions d'una connexió de dos convertidors de tres nivells al mateix bus de continua (back-to-back connection). Un exemple d'aplicació pràctica és la conversió AC/DC/AC per a l'accionament de motors d'alterna treballant amb factor de potència unitari.
Finalment s'aplica un controlador òptim al convertidor de tres nivells treballant com a rectificador elevador (boost). El llaç de control LQR (Linear Quadratic Regulator) es simplifica donat que la tasca d'equilibrat de les tensions dels condensadors es dur a terme en el mateix modulador.

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34

Wilson, Veas Alan Hjalmar [Verfasser], Steffen [Gutachter] Bernet, Mariusz [Gutachter] Malinowski, and Steffen [Akademischer Betreuer] Bernet. "Investigation of Multi-Level Neutral Point Clamped Voltage Source Converters using Isolated Gate Bipolar Transistor Modules / Alan Hjalmar Wilson Veas ; Gutachter: Steffen Bernet, Mariusz Malinowski ; Betreuer: Steffen Bernet." Dresden : Technische Universität Dresden, 2019. http://d-nb.info/1226899463/34.

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35

Chvátal, Michal. "Řízení dodávky vody v rodinném domě." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442453.

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The diploma thesis deals with the design and implementation of the system that will control the water supply for the family house and its garden. The system aslo allows you to store a history that can be viewed via the web interface. The web interface also allows you to set system parameters and monitor the current status.

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36

Wu, Chia-Hsuan, and 吳佳軒. "Bidirectional Multi-level Converter with Voltage Balance of Batteries." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/69163926143752161728.

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博士
國立彰化師範大學
電機工程學系
104
In this dissertation, a bidirectional multi-level converter with voltage balance of batteries is successfully developed. By combining the battery balancing control and the multi-level converter, bidirectional AC/DC power transmission and battery balancing charging/discharging are achieved without the need of an additional battery balancing circuit. In this dissertation, topologies of commonly used bidirectional multi-level converters are first investigated. Here, the cascaded half bridge multilevel converter is selected because of its smaller number of components and ease of control. The system utilized in this dissertation and its operating principles are then described from the perspective of selective battery balancing control. The system can be operated in rectifier and inverter modes. In the inverter mode, the battery acts as the power source and can produce an AC voltage source at the output with low voltage harmonic to supply the load while achieving balanced discharging. In the rectifier mode, the system can attain a high power factor and allow the battery to store charge while achieving balanced charging. Finally, a 180 W prototype with four battery groups is designed to verify the proposed system. The prototype has three groups of 48/7 Ah batteries acting as normal batteries and a group of 48/5 Ah batteries acting as aging batteries. Experimental results show that when the system is operating in the inverter mode, its available capacity is 20.58% higher and its discharge time is 10.67% longer compared to a system without balance control. When the system is operating in the rectifier mode, its charge capacity is 22.45% higher compared to a system without balance control. The experiment confirms that the system proposed in this dissertation can achieve balanced battery charging and discharging.

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37

Huang, Chien-lan, and 黃建嵐. "Analysis and Implementation of Novel Three-level Zero-Voltage-Switching Converter." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/26943888140113270592.

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Анотація:

博士
雲林科技大學
工程科技研究所博士班
98
This dissertation proposes two kinds of interleaved zero-voltage-switching (ZVS) three-level pulse-width modulation converters with current doubler rectifier. The switches connected in series is adopted to reduce the voltage stress on switches. One fast recovery diode is connected between the middle point of split capacitors and power switch to generate three different voltage levels on the primary side of transformer. All switches can achieve ZVS turn-on at the resonant interval based on the junction capacitance of switches and transformer leakage inductance. Thus the switching losses of power switches can be reduced. The interleaved PWM scheme is used to achieve load current sharing, reduce the ripple current on the input side and regulate the output voltage. The current doubler rectifier is adopted in the secondary side of transformer to reduce the current stress on the transformer secondary winding and achieve the ripple current cancellation on the output capacitor. The advantages of proposed converters are low voltage stresses on switches, low current stresses on switches and diodes and high efficiency. In the dissertation, operation principle, steady state analysis and design consideration of the presented converter are analyzed. Finally, the experimental results are presented to verify the operation principle of the proposed converter.

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38

Chang, Jyun-Jhe, and 張濬哲. "High-voltage Bi-directional Half-bridge Three-level Series Resonant Converter." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/k2jvq8.

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Анотація:

碩士
國立臺灣科技大學
電子工程系
105
This thesis aims to develop a bi-directional half-bridge three-level series resonant converter for high-voltage DC micro-grid. The use of a three-level circuit topology can reduce the device stresses and electromagnetic interference. The clamped diode and capacitor can provide an appropriate current path to achieve zero-voltage switching on power switches. By modulating frequency appropriately, the resonant tank can be operated in SRC region and achieve bi-directional power conversion. With the switching method developed in this thesis, the circuit has a characteristic of transformer decoupling like LLC-SRC region. It achieves quasi-zero-current switching to reduce the switching loss. Synchronous rectifier is also implemented to reduce conduction loss on the secondary side. A laboratory prototype of bi-directional half-bridge three-level series resonant converter was designed and tested for high-voltage applications. The circuit specifications are 3-kW rated power, 1-kV input voltage, and 3 A output current. A digital signal processor (DSP) chip is used to realize the digital controller of this converter. The measured efficiency can be up to 96% under different load conditions.

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39

Zih-Yong, Chen, and 陳子雍. "Study of a Three Level Hybrid Converter for High Input Voltage." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/95875335631400103770.

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Анотація:

碩士
國立雲林科技大學
電機工程系
102
This thesis studies and implements a three level hybrid converter for high input voltage and high load current applications. Power switches in the proposed converter can be achieved at zero voltage switching based on the resonant behavior by resonant inductor and output capacitance of power switches. Thus, the switching losses of power switches are reduced. For high input voltage and high output current applications, two input aluminum capacitors and series power switches are adopted to limit the voltage stress of power switches at Vin/2. Flying capacitor is also adopted to automatically balance the input split capacitor voltages. At the primary side, two three-level hybrid converters are adopted to increase output power and reduce the power switch counts. Finally, a laboratory prototype with input voltage 750Vdc ~ 800Vdc and 1440W rated power (24Vdc/60A) was built and tested to verify the circuit performance of the converter..

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40

Chang, Chen-Han, and 張振漢. "The Study of Multi-Level Converter for Voltage and Current Quality Improvement." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/57674421933262680887.

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Анотація:

碩士
國立雲林科技大學
電機工程系碩士班
94
In the technology developing society, the supply of the power source is needed in many different situations. How to improve the voltage variation and harmonic current in the ac system will be discussed in this thesis. In order to solve these problems, the multi level PWM technology. Which lower voltage stress components, and lower voltage harmonic characteristic, is presented. The cascade circuit can reduce voltage stress components. The current harmonic distortion and voltage variation are very important in the power quality problem. In this thesis, the multi-level neutral point clamped power converter is used to improve the current harmonic and variation voltage. First the Matlab/Simulink tool is used to simulate the proposed control scheme. Finally, the experimental results based on TI DSP (TMS320C32) controller are provided to verity the effectiveness of the control algorithm.

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41

Hou, Xu-Qi, and 侯旭琦. "Implementation of a Three-Level Phase-Shifted Zero-Voltage-Switching Power Converter." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/97531171786776650119.

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Анотація:

碩士
國立成功大學
電機工程學系碩博士班
94
In this thesis, a three-level phase-shifted zero-voltage-switching power converter is studied and implemented. The voltage across the switches is half of the input voltage. Thus, the problem of choosing switches at high power applications is improved. The converter uses the well-known phase-shift control to achieve zero voltage switching (ZVS), and it reduces the switching loss. The detailed operational principle and analysis of the three-level phase-shifted zero-voltage switching power converter are described in this thesis. In addition, the process of designing components in this converter is discussed. Finally, this thesis performs a three-level phase-shifted zero-voltage-switching power converter with 400VDC input voltage and 48VDC/20A output. The experimental results show that the efficiency of the converter is 86.4% at the full-load condition and the maximum efficiency is 90.0%.

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42

Wu, Bo-Han, and 吳柏翰. "Study and Realization of an Interleaved Zero-Voltage Switching Three-Level AC/DC Converter." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/en7772.

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Анотація:

碩士
國立宜蘭大學
電機工程學系碩士班
107
An interleaved zero-voltage switching three-level AC/DC converter is studied and realized in this thesis. The proposed converter integrates boost rectifier and three-level converter into a single-stage converter and adds the LCC resonant technique to make the main power switch operate at ZVS-switching, which can reduce switching losses and improve the total conversion efficiency. The front end adopts boost power factor corrector, which can reduce the conduction losses of the circuit and provide high power factor. In addition, the three-level topology can greatly reduce the voltage stress of the main power switch. The proposed converter is interleaved by two same topologies, in order to increase the output power of the converter and can also cancel partial input and output ripple current. Finally, a design example of 1200W converter is simulated and realized to prove the theory and analysis.

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43

LIN, YUE, and 林岳. "Analysis and Development of Three Level Phase Shift Converter with Wide Input Voltage Range." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/2c56xj.

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Анотація:

碩士
國立雲林科技大學
電機工程系
107
This thesis proposes a three-level phase-shift pulse-width modulation (PWM) converter with 10:1 wide input voltage range. The main advantages of the proposed converter are wide input voltage operation and high output current capability for DC/DC converters. Based on the phase-shift PWM control approach, the leading-leg switches of three-level converter can achieve zero voltage switching (ZVS) from low load to full load. In order to solve the narrow range of input voltage opration on conventional three-level converters, a new three-level converter is proposed in this paper. Two dc split capacitors and one flying capacitor are used on the primary-side to limit the voltage stress of each power switch at one-half of input voltage. Three sets of center-tapped rectifier and three AC switches are used on the secondary-side to realize the wide input voltage operation and regulate load voltage at the desired voltage value. The circuit operation principle of the proposed converter with wide input voltage operation is discussed and analyzed. The design procedure of circuit components is provided based on the input and output electrical specifications. The electric specificatious of the studied circuit are Vin=80V ~ 800V, Vo=12V, Io=25A and Po=300W. Finally, experiments are provided to verify the feasibility of the proposed converter. Keywords: three−level phase-shift PWM converter, AC switch, zero voltage switching

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44

Liao, Jian-Ting, and 廖健廷. "Study and Implementation of a Three-Level Zero-Voltage Switching Converter with Efficiency Improvement." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/18174768644836930309.

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Анотація:

碩士
國立雲林科技大學
電機工程系
102
This paper presents a three-level zero-voltage DC-DC converter with phase-shift pulse-width modulation (PWM) control for high input voltage application. In the proposed converter, power switches can be achievedat zero voltage switching (ZVS). The circuit architecture of the proposed converter includes a three-level circuit with phase-shift PWM schemein the primary side and an auxiliary passive snubber in the secondary side in order to reducethe circulating current and improve circuit efficiency. First, the three-level circuit can reduce the voltage stress of power switches at one-half of input voltage. The phase shift PWM scheme is adopted to achieve power switches turn-on at ZVS by using the switch junction capacitance and transformer leakage inductance. The symmetric PWM scheme can improve transformer flux variation and transformer efficiency.Secondly, two center-tapped rectifiers are parallel to share the load current for low voltage and high load current applications. The auxiliary passive snubber is added at the secondary side to reduce the circulating current and improve the circuit efficiency. In this thesis, the analysis and design example of the proposed converter will discuss in detail.Finally, the prototype circuit was set up and the circuit performance will be verified by the measurement results.

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45

Lien, Wen-Yuan, and 連文源. "A Half-Bridge ZVS Three-Level DC-DC Converter for High Input-Voltage Applications." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/99187620917638491112.

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Анотація:

碩士
國立臺灣科技大學
電子工程系
101
The main purpose of this thesis is to analyze a half-bridge zero-voltage-switching (ZVS) three-level DC-DC converter, which is suitable for high input-voltage applications. The voltage stress of the primary-side power switch is equal to half the input voltage. Therefore, it is easy to choose the power switch device. The control method adopts the commonly-used commercial analog IC UCC3895 to reach ZVS and reduce the switching loss effectively. So the conversion efficiency can be improved. With the aid of the simulation software tool, a 750-W DC-DC converter with an input voltage range of 800 V ~ 1000 V, an output voltage of 48 V is implemented. The full-load efficiency is up to 94 %. The voltage stress of the primary-side power switch device is selected 650 V. As a result, the feasibility for this DC-DC converter architecture is verified.

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46

Freire, Diogo Filipe Martins. "Multi-Level Converter with Predictive Control for Power Conditioning." Master's thesis, 2018. http://hdl.handle.net/10316/86563.

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Dissertação de Mestrado Integrado em Engenharia Electrotécnica e de Computadores apresentada à Faculdade de Ciências e Tecnologia
A estabilidade de tensão e o controlo do factor de potência são dois pontos-chave na operação em regime permanente dos sistemas eléctricos. O static synchronous compensator e o seu sistema de controlo podem ser usados para melhorar o desempenho do sistema energia. Neste trabalho é usado um controlador preditivo com uma nova abordagem de geração de referências e que permite compensar a potência reactiva necessária para manter um fator de potência escolhido no final da linha de transmissão. Os resultados da simulação demonstram que a estratégia de controlo proposta melhora o fator de potência e estabiliza a tensão no final da linha de transmissão. Para avaliar o desempenho do método de controlo proposto, foi simulada uma rede de distribuição de 10kV. Para testar experimentalmente o desempenho do método de controlo proposto, foi construído um protótipo de um conversor trifásico Neutral-Point-Clamped de cinco níveis. O teste experimental foi realizado num nível de tensão inferior, com 130V. Para se ter uma melhor base de comparação foi simulado um sistema mais próximo do realizado experimentalmente. Os resultados obtidos são muito semelhantes, mas não tão perfeitos como nos testes feitos no primeiro sistema simulado (rede de distribuição de 10kV). Isto pode ser justificado pelo elevado tempo de amostragem que teve de ser usado para que o processador de sinal digital pudesse computar toda a informação, mas também pode ser justificado pelas baixas correntes com que o sistema foi testado.
Voltage stability and power factor control are two key points in the steady-state operation of electrical systems. The static synchronous compensator and its control system can be used to improve the performance of the energy system. In this work, a predictive controller model with a new reference generation approach is used. It compensates the reactive power required to maintain a chosen power factor at the end of the transmission line. To evaluate the performance of the proposed control method, a 10kV distribution network was examined in simulation. Simulation results demonstrate that the proposed control strategy improves the power factor and stabilize the voltage at the Point of Common Coupling. The results of the simulation also demonstrate that the proposed control strategy improves the power factor and stabilizes the voltage at the end of the transmission line. To evaluate the performance of the proposed control method, a 10kV distribution network was simulated. In order to experimentally test the performance of the proposed control method, a prototype of a five-phase three-phase Neutral-Point-Clamped converter was constructed. The experimental test was performed at a voltage level of less than 130V. In order to have a better basis of comparison, a simulation system was simulated that was closer to the experimental one. The results are very similar, but not as perfect as in the tests done in the first simulated system (10 kV network). This can be justified by the high sampling time that had to be used so that the digital signal processor could compute all the information but could also be substantiated by the low currents that the system was tested.
FCT

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47

Tsung-HsunLee and 李宗勳. "Implementation of the Three-Level DC-DC Converter Applied in Medium-Voltage Solid-State Transformer." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/pkw867.

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碩士
國立成功大學
電機工程學系
106
As the progress of wide-bandgap (WBG) semiconductor devices and the rise of distributed energy resources (DER), medium-voltage solid-state transformer (SST) becomes more and more popular in recent years. Medium-voltage SST features high-performance and fantastic functionality. The SST proposed in this thesis is applied in 11.4 kVAC distribution system, and the DC stage of the SST is composed of 13 modules. Operating principle, steady-state analysis and components design of the converter as well as the parameter design, insulation consideration and loss optimization of the transformer, are described in detail in this thesis. Meanwhile, the simulation software SIMPLIS and COMSOL Multiphysics® are used to ensure the validity. Finally, a prototype converter with input voltage 1.52 kVDC, output voltage 380 VDC and output power 10 kW is designed and realized to verify the feasibility of the module applied in SST.

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48

Huang, Jun-Lin, and 黃俊霖. "Research of Var Compensation and Voltage Balancing Control for the Seven-Level Cascaded H-Bridge Converter." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/61932012580302367251.

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Анотація:

碩士
國立清華大學
電機工程學系
99
High power Var Compensators are usually connected to the gird-side high voltage. Using Multilevel Converters as Var Compensators to connect to the gird side can save the cost of transformers. Due to the benefit of easy expansion, Multi-Level Cascaded H-Bridge Converters is often used. However, each H-Bridge has an independent DC capacitor voltage, but there exist the problems of unbalancing capacitor voltages due to different characteristic of device in each H-Bridge. Unbalanced capacitor voltages can damage devices when the converter operates over the rated voltage of devices. Therefore, it is important to analyze the reason of unbalance capacitor voltages. The control method is adopted to balance capacitor voltages, and therefore, the converter can be well-operated. Firstly, the thesis discusses the reason of unbalanced capacitor voltages by simulation. After that, voltage balancing control is used to solve the unbalancing problem. In the end, the test bench of Seven-Level Cascaded H-Bridge Converter is constructed and testified. At start-up, the converter injects an inductive 1kVAR into the power system and it only took 50 ms to set up the capacitor voltage to 70 V, in the meaning time, the converter also keep capacitor voltages in balancing. In addition, the injection of reactive power can change inductive operation to capacitive operation in 10 ms and capacitor voltages can still be balanced. The experimental result shows that the converter has fast response on reactive power injection. Capacitor voltages can keep balancing under transient state and steady state.

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49

Hunag, Wei-lun, and 黃偉倫. "The design and realization of a digital DC-to-DC converter with three-level voltage output." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/36740632793613605912.

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Анотація:

碩士
國立臺灣科技大學
電子工程系
101
With the ubiquity of mobile devices and the increasing requirements of endurance and efficacy of these devices, power management chips have been popularized. The major component of a power management chip is a voltage regulator, which can be either a linear regulator or switching regulator. The benefits of switching regulators are their low power dissipation and the programmable feature. To maximize the power efficiency of the underlying system, the dynamic voltage scaling technique is widely used in power management chips. Hence, in this thesis, a variable-voltage switching regulator is proposed and implemented. The proposed variable-voltage switching regulator has been implemented with Xilinx Virtex 5 FPGA accompanied with a low-power full-custom ADC (analog-to-digital converter). The output voltage ranges from 1.04 V to 1.32 V at the operating frequency of 25 MHz. The power dissipation is 0.45 ?巰. In addition, the resulting chip is design with the TSMC 0.18-?慆 process and simulated with the CIC mixed-signal flow at the gate level. The chip area is 760 ?慆 ? 760 ?慆, excluding the inductor, capacitor, and power switching MOS transistors. The operating frequency is 25 MHz and the switching frequency is 3.125 MHz.

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50

Parayandeh, Amir. "System Level Energy Optimization Techniques for a Digital Load Supplied with a DC-DC Converter." Thesis, 2013. http://hdl.handle.net/1807/35923.

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The demand to integrate more features has significantly increased the complexity and power consumption of smart portable devices. Therefore extending the battery life-time has become a major challenge and new approaches are required to decrease the power consumed from the source. Traditionally the focus has been on reducing the dynamic power consumption of the digital circuits used in these devices. However as process technologies scale, reducing the dynamic power has become less effective due to the increased impact of the leakage power. Alternatively, a more effective approach to minimize the power consumption is to continuously optimize the ratio of the dynamic and leakage power while delivering the required performance. This works presents a novel power-aware system for dynamic minimum power point tracking of digital loads in portable applications. The system integrates a dc-dc converter power-stage and the supplied digital circuit. The integrated dc-dc converter IC utilizes a mixed-signal current program mode (CPM) controller to regulate the supply voltage of the digital load IC. This embedded converter inherently measures the power consumption of the load in real-time, eliminating the need for additional power sensing circuitry. Based on the information available in the CPM controller, a minimum power point tracking (MiPPT) controller sets the supply and threshold voltages for the digital load to minimize its power consumption while maintaining a target frequency. The 10MHz mixed-signal CPM controlled dc-dc converter and the digital load are fabricated in 0.13µm IBM technology. Experimental results verify that the introduced system results in up to 30% lower power consumption from the battery source.

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