Дисертації з теми "Very large scale motion"
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Sack, Warren. "Design for very large-scale conversations." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/62349.
Повний текст джерелаIncludes bibliographical references (leaves 184-200).
On the Internet there are now very large-scale conversations (VLSCs) in which hundreds, even thousands, of people exchange messages across international borders in daily, many-to-many communications. It is my thesis that VLSC is an emergent communication medium that engenders new social and linguistic connections between people. VLSC poses fundamental challenges to the analytic tools and descriptive methodologies of linguistics and sociology previously developed to understand conversations of a much smaller scale. Consequently, the challenge for software design is this: How can the tools of social science be appropriated and improved upon to create better interfaces for participants and interested observers to understand and critically reflect upon conversation? This dissertation accomplishes two pieces of work. Firstly, the design, implementation, and demonstration of a proof-of-concept, VLSC interface is presented. The Conversation Map system provides a means to explore and question the social and linguistic structure of very large-scale conversations (e.g., Usenet newsgroups). Secondly, the thinking that went into the design of the Conversation Map system is generalized and articulated as an aesthetics, ethics, and epistemology of design for VLSC. The goal of the second, theoretical portion of the thesis is to provide a means to describe the emergent phenomenon of VLSC and a vocabulary for critiquing software designed for VLSC and computer-mediated conversation in general.
Warren Sack.
Ph.D.
Hughes, John Barry. "Analogue techniques for very large scale integrated circuits." Thesis, University of Southampton, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.333583.
Повний текст джерелаGross, Peter Alan. "Rapid single flux quantum very large scale integration." Thesis, Stellenbosch : Stellenbosch University, 2002. http://hdl.handle.net/10019.1/49734.
Повний текст джерелаENGLISH ABSTRACT: Very Large Scale Integration (VLSI) of the Rapid Single Flux Quantum (RSFQ) superconducting logic family is researched. Insight into the design methodologies used for large-scale digital systems and related logistics are reviewed. A brief overview of basic RSFQ logic gates with in mind their application in a cell based layout scheme suited for RSFQ is given. A standard cell model is then proposed, incorporating these cells, on which, a library of low temperature superconducting (L TS) cells are laid out. Research is made into computer techniques for storing and manipulating large-scale circuit netlists. On this base, a method of technology mapping Boolean circuits to an RSFQ equivalent is achieved. Placements on-chip are made, optimized for minimum net length, routed and exported to a popular electronic mask format. Finally, the convergent technology fields of solid state cooling and high-temperature superconducting electronics (HTS) are investigated. This leads to a proposal for a low profile, low cost, HTS cryopackaging concept.
AFRIKAANSE OPSOMMING: Grootskaalse integrasie (VLSI) van die "Rapid Single Flux Quantum" (RSFQ) supergeleidende familie van logiese hekke word uiteengesit. Insig in die ontwerpmetodes vir grootskaaIse digitale stelsels en verwante aspekte word ondersoek. 'n Kort oorsig van basiese RSFQ logiese hekke word gegee, met hulle toepassing in 'n uitlegskema wat geskik is vir RSFQ. 'n Standaard sel model, wat bogenoemde selle insluit, word voorgestel en 'n selbiblioteek word uitgele vir lae temperatuur supergeleidende bane. Ondersoek word ingestel na die manipulasie van die beskrywing van elektroniese bane en 'n manier om logiese Boolese baanbeskrywings om te skakel na fisiese RSFQ bane. Die fisiese plasing van selle word bespreek ten einde die verbindingslengte tussen selle te minimeer. Die finale uitleg word omgeskakel na 'n staandaard elektroniese formaat vir baanuitlegte. Die konvergerende tegnologievelde van "soliede toestand" verkoeling en hoe-temperatuur supergeleidende elektroniese bane word bespreek. Ten slotte word 'n nuwe tipe, lae profiel en lae koste kriogeniese verpakking voorgestel.
Berghold, Gerd. "Towards very large scale DFT electronic structure calculations." [S.l. : s.n.], 2001. http://www.bsz-bw.de/cgi-bin/xvms.cgi?SWB9519379.
Повний текст джерелаRosas, José Humberto Ablanedo. "Algorithms for very large scale set covering problems /." Full text available from ProQuest UM Digital Dissertations, 2007. http://0-proquest.umi.com.umiss.lib.olemiss.edu/pqdweb?index=0&did=1609001671&SrchMode=2&sid=1&Fmt=2&VInst=PROD&VType=PQD&RQT=309&VName=PQD&TS=1244747021&clientId=22256.
Повний текст джерелаQin, Tian. "Nano-electromechanical relay-based very-large-scale integrated circuits." Thesis, University of Bristol, 2017. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.723513.
Повний текст джерелаChen, Wei. "A reconfigurable architecture for very large scale microelectronic systems." Thesis, University of Edinburgh, 1986. http://hdl.handle.net/1842/14510.
Повний текст джерелаSena, Giuseppe A. (Giuseppe Antonio). "Very large scale finite differences in modeling of seismic waves." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/58055.
Повний текст джерелаJha, Krishna Chandra. "Very large-scale neighborhood search heuristics for combinatorial optimization problems." [Gainesville, Fla.] : University of Florida, 2004. http://purl.fcla.edu/fcla/etd/UFE0004352.
Повний текст джерелаAhadian, Joseph F. (Joseph Farzin). "Development of a monolithic very large scale optoelectronic integrated circuit technology." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/9120.
Повний текст джерелаIncludes bibliographical references (p. 507-527).
Optical interconnects have been proposed for use in high-speed digital systems as a means of overcoming the performance limitations of electrical interconnects at length scales ranging from one millimeter to one hundred meters. To achieve this goal, an optoelectronic very large scale integration (OE-VLSI) technology is needed which closely couples large numbers of optoelectronic devices, such as light emitters and photodetectors, with complex electronics. This thesis has been concerned with the development of an optoelectronic integration technology known as Epitaxy-on-Electronics (EoE). EoE produces monolithic optoelectronic integrated circuits (OEICs) by combining conventional epitaxial growth and fabrication techniques with commercial GaAs VLSI electronics. Proceeding from previous feasibility demonstrations, the growth and fabrication practices underlying the EoE integration process have been extensively revised and extended. The effectiveness of the resulting process has been demonstrated by fabricating the first monolithic, VLSI-complexity OEICs featuring light-emitting diodes (LEDs). As part of a research foundry project, components of this type were designed and tested by a number of groups involved in optical interconnect system development. To further realize the potential of the EoE technology, and to make its capabilities accessible to a broader user community, the focus of this work was extended beyond the development of the integration process to encompass a study of high-speed photodetectors implemented in the GaAs VLSI process, to examine the role of the EoE technology within optical interconnect applications, to formulate an analytical framework for the design of digital optical interconnects, and to implement compact, low power laser driver and optical receiver circuitry needed to implement these interconnects.
by Joseph F. Ahadian.
Ph.D.
Bampi, Sergio. "A modified lightly doped drain mosfet for very large scale integration." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 1987. http://hdl.handle.net/10183/17967.
Повний текст джерелаGudmunsson, Gylfi Thor. "Parallelism and distribution for very large scale content-based image retrieval." Thesis, Rennes 1, 2013. http://www.theses.fr/2013REN1S082/document.
Повний текст джерелаThe scale of multimedia collections has grown very fast over the last few years. Facebook stores more than 100 billion images, 200 million are added every day. In order to cope with this growth, methods for content-based image retrieval must adapt gracefully. The work presented in this thesis goes in this direction. Two observations drove the design of the high-dimensional indexing technique presented here. Firstly, the collections are so huge, typically several terabytes, that they must be kept on secondary storage. Addressing disk related issues is thus central to our work. Secondly, all CPUs are now multi-core and clusters of machines are a commonplace. Parallelism and distribution are both key for fast indexing and high-throughput batch-oriented searching. We describe in this manuscript a high-dimensional indexing technique called eCP. Its design includes the constraints associated to using disks, parallelism and distribution. At its core is an non-iterative unstructured vectorial quantization scheme. eCP builds on an existing indexing scheme that is main memory oriented. Our first contribution is a set of extensions for processing very large data collections, reducing indexing costs and best using disks. The second contribution proposes multi-threaded algorithms for both building and searching, harnessing the power of multi-core processors. Datasets for evaluation contain about 25 million images or over 8 billion SIFT descriptors. The third contribution addresses distributed computing. We adapt eCP to the MapReduce programming model and use the Hadoop framework and HDFS for our experiments. This time we evaluate eCP's ability to scale-up with a collection of 100 million images, more than 30 billion SIFT descriptors, and its ability to scale-out by running experiments on more than 100 machines
Agarwal, Richa. "Composite very large-scale neighborhood structure for the vehicle-routing problem." [Gainesville, Fla.] : University of Florida, 2002. http://purl.fcla.edu/fcla/etd/UFE1001111.
Повний текст джерелаGudmundsson, Gylfi Thor. "Parallelism and distribution for very large scale content-based image retrieval." Phd thesis, Université Rennes 1, 2013. http://tel.archives-ouvertes.fr/tel-00926069.
Повний текст джерелаWang, Xing. "Efficient Full-Wave Simulation for Very Large Scale Off-Chip Interconnects." Diss., The University of Arizona, 2006. http://hdl.handle.net/10150/195106.
Повний текст джерелаZhao, Yan Ph D. Massachusetts Institute of Technology. "A hierarchical Markov chain based solver for very-large-scale capacitance extraction." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/71502.
Повний текст джерелаCataloged from PDF version of thesis.
Includes bibliographical references (p. 79-80).
This thesis presents two hierarchical algorithms, FastMarkov and FD-MTM, for computing the capacitance of very-large-scale layout with non-uniform media. Fast- Markov is Boundary Element Method based and FD-MTM is Finite Difference based. In our algorithms, the layout is first partitioned into small blocks and the capacitance matrix of each block is solved using standard deterministic methods, BEM for Fast- Markov and FDM for FD-MTM. We connect the blocks by enforcing the boundary condition on the interfaces, forming a Markov Chain containing the capacitive characteristic of the layout. Capacitance of the full layout is then extracted with the random walk method. By employing the "divide and conquer" strategy, our algorithm does not need to assemble or solve a linear system of equations at the level of the full layout and thus eliminates the memory problem. We also propose a modification to the FastMarkov algorithm (FastMarkov with boundary fix) to address the block interface issue when using the finite difference method. We implemented FastMarkov with boundary fix in C++ and parallelized the solver with Message Passing Interface. Compared with standard FD capacitance solver, our solver is able to achieve a speedup almost linear to the number of blocks the layout is partitioned into. On top of it, FastMarkov is easily parallelizable because the computation of the capacitance matrix of one block is independent of other blocks and one path of random walk is independent of other paths. Results and comparisons are presented for parallel plates example and for a large Intel example.
by Yan Zhao.
S.M.
Smith, Russell Julian. "Streaming motions of Abell clusters : new evidence for a high-amplitude bulk flow on very large scales." Thesis, Durham University, 1998. http://etheses.dur.ac.uk/4826/.
Повний текст джерелаLi, Bo. "Real-time Simulation and Rendering of Large-scale Crowd Motion." Thesis, University of Canterbury. Computer Science and Software Engineering, 2013. http://hdl.handle.net/10092/7870.
Повний текст джерелаPizarro, Oscar. "Large scale structure from motion for autonomous underwater vehicle surveys." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/39185.
Повний текст джерелаIncludes bibliographical references (p. 177-190).
Our ability to image extended underwater scenes is severely limited by attenuation and backscatter. Generating a composite view from multiple overlapping images is usually the most practical and flexible way around this limitation. In this thesis we look at the general constraints associated with imaging from underwater vehicles for scientific applications - low overlap, non-uniform lighting and unstructured motion - and present a methodology for dealing with these constraints toward a solution of the problem of large area 3D reconstruction. Our approach assumes navigation data is available to constrain the structure from motion problem. We take a hierarchical approach where the temporal image sequence is broken into subsequences that are processed into 3D reconstructions independently. These submaps are then registered to infer their overall layout in a global frame. From this point a bundle adjustment refines camera and structure estimates. We demonstrate the utility of our techniques using real data obtained during a SeaBED AUV coral reef survey. Test tank results with ground truth are also presented to validate the methodology.
by Oscar Pizarro.
Ph.D.
Yu, Chen. "SCHEDULING AND RESOURCE MANAGEMENT FOR COMPLEX SYSTEMS: FROM LARGE-SCALE DISTRIBUTED SYSTEMS TO VERY LARGE SENSOR NETWORKS." Doctoral diss., Orlando, Fla. : University of Central Florida, 2009. http://purl.fcla.edu/fcla/etd/CFE0002907.
Повний текст джерелаBoukorca, Ahcène. "Hypergraphs in the Service of Very Large Scale Query Optimization. Application : Data Warehousing." Thesis, Chasseneuil-du-Poitou, Ecole nationale supérieure de mécanique et d'aérotechnique, 2016. http://www.theses.fr/2016ESMA0026/document.
Повний текст джерелаThe emergence of the phenomenon Big-Data conducts to the introduction of new increased and urgent needs to share data between users and communities, which has engender a large number of queries that DBMS must handle. This problem has been compounded by other needs of recommendation and exploration of queries. Since data processing is still possible through solutions of query optimization, physical design and deployment architectures, in which these solutions are the results of combinatorial problems based on queries, it is essential to review traditional methods to respond to new needs of scalability. This thesis focuses on the problem of numerous queries and proposes a scalable approach implemented on framework called Big-queries and based on the hypergraph, a flexible data structure, which bas a larger modeling power and may allow accurate formulation of many problems of combinatorial scientific computing. This approach is the result of collaboration with the company Mentor Graphies. It aims to capture the queries interaction in an unified query plan and to use partitioning algorithms to ensure scalability and to optimal optimization structures (materialized views and data partitioning). Also, the unified plan is used in the deploymemt phase of parallel data warehouses, by allowing data partitioning in fragments and allocating these fragments in the correspond processing nodes. Intensive experimental study sbowed the interest of our approach in terms of scaling algorithms and minimization of query response time
Sayers, I. L. "An investigation of 'design for testability' techniques in very large scale integrated circuits." Thesis, University of Newcastle Upon Tyne, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.370643.
Повний текст джерелаLe, Riguer E. M. J. "Generic VLSI architectures : chip designs for image processing applications." Thesis, Queen's University Belfast, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.368593.
Повний текст джерелаRabbitt, Michael John. "The effect of internal gravity waves on large scale atmospheric flows." Thesis, University of Leeds, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328943.
Повний текст джерелаPark, Dong-Jun. "Video event detection framework on large-scale video data." Diss., University of Iowa, 2011. https://ir.uiowa.edu/etd/2754.
Повний текст джерелаVoo, Thart Fah. "Tunable techniques for robust high frequency analogue VLSI." Thesis, Imperial College London, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.369050.
Повний текст джерелаJafar, Mutaz 1960. "THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/276959.
Повний текст джерелаVoranantakul, Suwan 1962. "CONDUCTIVE AND INDUCTIVE CROSSTALK COUPLING IN VLSI PACKAGES." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/277037.
Повний текст джерелаJian, Yong-Dian. "Support-theoretic subgraph preconditioners for large-scale SLAM and structure from motion." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/52272.
Повний текст джерелаKoelmans, Albertus Maria. "STRICT : a language and tool set for the design of very large scale integrated circuits." Thesis, University of Newcastle Upon Tyne, 1996. http://hdl.handle.net/10443/2076.
Повний текст джерелаHong, Won-kook. "Single layer routing : mapping topological to geometric solutions." Thesis, McGill University, 1986. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=66030.
Повний текст джерелаTaylor, Sylvia C. "Interactions of large-scale tropical motion systems during the 1996-1997 Australian monsoon." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 1998. http://handle.dtic.mil/100.2/ADA356568.
Повний текст джерела"September 1998." Thesis advisor(s): Chih-Pei Chang. Includes bibliographical references (p. 105-106). Also Available online.
Nowrozi, Mojtaba Faiz. "A systematic study of LPCVD refractory metal/silicide interconnect materials for very large scale integrated circuits." Diss., The University of Arizona, 1988. http://hdl.handle.net/10150/184396.
Повний текст джерелаMatsumori, Barry Alan. "QUALIFICATION RESEARCH FOR RELIABLE, CUSTOM LSI/VLSI ELECTRONICS." Thesis, The University of Arizona, 1985. http://hdl.handle.net/10150/275313.
Повний текст джерелаHowells, Michael C. "A cluster-proof approach to yield enhancement of large area binary tree architectures /." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=66194.
Повний текст джерелаHum, Herbert Hing-Jing. "A linear unification processor /." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63790.
Повний текст джерелаDagenais, Michel R. "Timing analysis for MOSFETS, an integrated approach." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=75459.
Повний текст джерелаThe classical simulation approach cannot be used to insure the timing and electrical correctness of the large circuits that are now being designed. The huge number of possible states in large circuits renders this method impractical. Worst-case analysis tools alleviate the problem by restricting the analysis to a limited set of states which correspond to the worst-case operating conditions. However, existing worst-case analysis tools for MOS circuits present several problems. Their accuracy is inherently limited since they use a switch-level model. Also, these procedures have a high computational complexity because they resort to path enumeration to find the latest path in each transistor group. Finally, they lack the ability to analyze circuits with arbitrarily complex clocking schemes.
In this text, a new procedure for circuit-level timing analysis is presented. Because it works at electronic circuit level, the procedure can detect electrical errors, and attains an accuracy that is impossible to attain by other means. Efficient algorithms, based on graph theory, have been developed to partition the circuits in a novel way, and to recognize series and parallel combinations. This enables the efficient computation of worst-case, earliest and latest, waveforms in the circuit, using specially designed algorithms. The new procedure extracts automatically the timing requirements from these waveforms and can compute the clocking parameters, including the maximum clock frequency, for arbitrarily complex clocking schemes.
A computer program was written to demonstrate the effectiveness of the new procedure and algorithms developed. It has been used to determine the clocking parameters of circuits using different clocking schemes. The accuracy obtained on these parameters is around 5 to 10% when compared with circuit-level simulations. The analysis time grows linearly with the circuit size and is approximately 0.5s per transistor, on a microVAX II computer. This makes the program suitable for VLSI circuits.
Chu, Chung-kwan, and 朱頌君. "Computationally efficient passivity-preserving model order reduction algorithms in VLSI modeling." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B38719551.
Повний текст джерелаZhao, Wenhui, and 趙文慧. "Efficient circuit simulation via adaptive moment matching and matrix exponential techniques." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2013. http://hdl.handle.net/10722/197488.
Повний текст джерелаpublished_or_final_version
Electrical and Electronic Engineering
Master
Master of Philosophy
Aaramaa, S. (Sanja). "Developing a requirements architecting method for the requirement screening process in the Very Large-Scale Requirements Engineering Context." Doctoral thesis, Oulun yliopisto, 2017. http://urn.fi/urn:isbn:9789526217079.
Повний текст джерелаTiivistelmä Tutkimus toteutettiin laajamittaisen vaatimusmäärittelyprosessin kontekstissa keskittyen vaatimusten seulontaprosessiin. Vaatimusten seulontaprosessi määritellään tuotekehityksen alkuvaiheen prosessiksi, jossa käsitellään jatkuvana vuona tulevia kehityspyyntöjä. Vaatimusten seulontaprosessissa pyritään tunnistamaan tehokkaasti lupaavimmat pyynnöt jatkoanalyysiä, tuotekehitystä ja toteutusta ajatellen sekä suodattamaan pois niin aikaisessa vaiheessa, kun mahdollista ne pyynnöt, joilla ei ole arvontuotto-odotuksia. Tutkimuksen tavoite oli ymmärtää haasteita, jotka liittyvät vaatimusten seulontaprosessiin sekä kehittää ratkaisuja näihin haasteisiin. Tutkimuksessa käytettiin laadullisen tutkimuksen menetelmiä. Kokonaisuutena tutkimusprosessi noudattaa toimintatutkimuksen periaatteita siten, että jokainen sykli tai sen vaihe sisältää yhden tai useamman itsenäisesti määritellyn tapaustutkimuksen suunnittelun ja läpiviennin. Valitut tutkimusmenetelmät soveltuvat hyvin tilanteisiin, joissa tutkimuskohteina ovat reaalimaailman ilmiöt niiden luonnollisissa ympäristöissä havainnoituina. Tutkimusaineisto kerättiin kahdesta informaatio- ja kommunikaatioteknologia-alan kohdeorganisaatiosta. Väitöskirjaan sisällytettyihin julkaisuihin I-V on analysoitu 45 haastattelun aineisto. Näiden lisäksi väitöskirjassa kuvatun pitkäkestoisen toimintatutkimuksen aikana hyödynnettiin 26 haastattelun ja 132 työpajan aineistoa kehitettäessä ratkaisuja vaatimusten seulontaprosessin haasteisiin. Vaatimusten seulontaprosessi on laajamittaisen vaatimusmäärittelyprosessin teollinen toteutus. Tutkimuksessa tunnistettiin useita merkittäviä haasteta, joita eri sidosryhmillä on liittyen vaatimusten seulontaprosessiin ja päätöksentekoon laajamittaisessa vaatimusmäärittelyprosessissa. Vaatimusten suuri määrä, päätöksentekoon tarvittavan tiedon puute ja käytössä olevien työkalujen soveltumattomuus ovat esimerkkejä tunnistetuista haasteista. Ratkaisuna haasteisiin kehitettiin vaatimusten seulonta- ja analyysimenetelmä. Kehitetty menetelmä sisältää dynaamisen vaatimusdokumentin, jonka avulla voidaan kerätä kehityspyyntöjen tietosisältö jäsennellysti, dokumentoida ja kommunikoida vaatimukset sekä muodostaa niistä tuotteisiin toteutettavia ominaisuuksia ottaen huomioon eri sidosryhmien tarpeet. Kehitetty menetelmä on koestettu, validoitu ja soveltuvin osin otettu käyttöön teollisuudessa
Qiu, Fengjing. "Analog very large scale integrated circuits design of two-phase and multi-phase voltage doublers with frequency regulation." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1175632756.
Повний текст джерелаScaffidi, Charles, and Richard Stafford. "Replacement of the Hubble Space Telescope (HST) Telemetry Front-End Using Very-Large-Scale Integration (VLSI)-Based Components." International Foundation for Telemetering, 1993. http://hdl.handle.net/10150/611857.
Повний текст джерелаThe Hubble Space Telescope (HST) Observatory Management System (HSTOMS), located at the Goddard Space Flight Center (GSFC), provides telemetry, command, analysis and mission planning functions in support of the HST spacecraft. The Telemetry and Command System (TAC) is an aging system that performs National Aeronautics and Space Administration (NASA) Communications (Nascom) block and telemetry processing functions. Future maintainability is of concern because of the criticality of this system element. HSTOMS has embarked on replacing the TAC by using functional elements developed by the Microelectronics Systems Branch of the GSFC. This project, known as the Transportable TAC (TTAC) because of its inherent flexibility, is addressing challenges that have resulted from applying recent technological advances into an existing operational environment. Besides presenting a brief overview of the original TAC and the new TTAC, this paper also describes the challenges faced and the approach to overcoming them.
Bishop, Gregory Raymond H. ""On stochastic modelling of very large scale integrated circuits : an investigation into the timing behaviour of microelectronic systems" /." Title page, contents and abstract only, 1993. http://web4.library.adelaide.edu.au/theses/09PH/09phb6222.pdf.
Повний текст джерелаTwigg, Christopher M. "Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11601.
Повний текст джерелаKelley, Brian T. "VLSI computing architectures for high speed seismc migration." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/13919.
Повний текст джерелаHong, Seong-Kwan. "Performance driven analog layout compiler." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/15037.
Повний текст джерелаBragg, Julian Alexander. "A biomorphic analog VLSI implementation of a mammalian motor unit." Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/20693.
Повний текст джерелаTan, Chong Guan. "Another approach to PLA folding." Thesis, McGill University, 1985. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=66054.
Повний текст джерела高雲龍 and Wan-lung Ko. "A new optimization model for VLSI placement." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1998. http://hub.hku.hk/bib/B29812938.
Повний текст джерелаRasafar, Hamid 1954. "THE HIGH FREQUENCY AND TEMPERATURE DEPENDENCE OF DIELECTRIC PROPERTIES OF PRINTED CIRCUIT BOARD MATERIALS." Thesis, The University of Arizona, 1987. http://hdl.handle.net/10150/276509.
Повний текст джерела