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Статті в журналах з теми "VERILOG IMPLEMENTATION"
Koti, Mr Manjunath, and Dr Basavaraj I. Neelgar. "CAN Tx Frame Implementation using Verilog." Journal of University of Shanghai for Science and Technology 23, no. 07 (July 29, 2021): 1303–13. http://dx.doi.org/10.51201/jusst/21/07311.
Повний текст джерелаParamahamsa, Prof Mr YRK. "Implementation of Zigbee Transmitter using Verilog." International Journal for Research in Applied Science and Engineering Technology V, no. III (March 28, 2017): 1010–17. http://dx.doi.org/10.22214/ijraset.2017.3185.
Повний текст джерелаShet, Ganesh Gopal, Jamuna V, Shravani S, Nayana H G, and Pramod Kumar S. "Implementation of AES Algorithm using Verilog." JNNCE Journal of Engineering and Management 4, no. 1 (November 30, 2020): 17. http://dx.doi.org/10.37314/jjem.2020.040103.
Повний текст джерелаKrishna, T. Rama, T. Krishna Murthy, N. Vilasrao Sarode, P. Srilakshmi, and V. Geetha Sri. "Verilog HDL using LTE Implementation MAP Algorithm." International Journal of Innovative Research in Computer Science and Technology 10, no. 2 (March 30, 2022): 611–14. http://dx.doi.org/10.55524/ijircst.2022.10.2.115.
Повний текст джерелаZheng, Li Kun, Ya Li Chen, and Zhe Ying Li. "Design and Implementation of USB Transceiver with Verilog." Applied Mechanics and Materials 462-463 (November 2013): 604–8. http://dx.doi.org/10.4028/www.scientific.net/amm.462-463.604.
Повний текст джерелаPerali, Sri Phanindra, Nithin Krishna Madadi, and Rohith Reddy. "RTL Implementation of AMBA AHB Protocol using Verilog." International Journal for Research in Applied Science and Engineering Technology 11, no. 4 (April 30, 2023): 4056–63. http://dx.doi.org/10.22214/ijraset.2023.51179.
Повний текст джерелаJ, Padmini, and V. Nanammal. "FPGA Implementation of Digital Modulation Schemes Using Verilog HDL." International Journal for Research in Applied Science and Engineering Technology 10, no. 9 (September 30, 2022): 560–67. http://dx.doi.org/10.22214/ijraset.2022.46596.
Повний текст джерелаSreekanth, P. "Verilog Implementation of Image Compression Using Discrete Wavelet Transform." CVR Journal of Science & Technology 9, no. 1 (December 1, 2015): 21–25. http://dx.doi.org/10.32377/cvrjst0905.
Повний текст джерелаBalakrishna, J. "Design and Implementation of RFID Controller using Verilog HDL." International Journal for Research in Applied Science and Engineering Technology 9, no. VI (June 30, 2021): 4335–42. http://dx.doi.org/10.22214/ijraset.2021.35942.
Повний текст джерелаPari, Kumar. "Implementation of reduced memory Viterbi Decoder using Verilog HDL." IOSR Journal of Electronics and Communication Engineering 8, no. 4 (2013): 73–79. http://dx.doi.org/10.9790/2834-0847379.
Повний текст джерелаДисертації з теми "VERILOG IMPLEMENTATION"
Skärpe, Anders. "Implementation of an SDR in Verilog." Thesis, Linköpings universitet, Kommunikationssystem, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-132325.
Повний текст джерелаChen, Adam Y. (Adam Yu-Chih). "Implementation of the Intel 486 SX microprocessor in Verilog hardware description language." Thesis, Massachusetts Institute of Technology, 1993. http://hdl.handle.net/1721.1/79470.
Повний текст джерелаRAGHURAMAN, SRINIVASAN. "IMPLEMENTATION AND PERFORMANCE MEASUREMENTS OF A VERILOG-AMS MODEL OF BSIM3v3.3 TRANSISTOR." University of Cincinnati / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1163711277.
Повний текст джерелаNARAYANAN, SHRUTHI. "HARDWARE IMPLEMENTATION OF GENETIC ALGORITHM MODULES FOR INTELLIGENT SYSTEMS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1122909070.
Повний текст джерелаKasarabada, Yasaswy. "A Verilog Description and Efficient Hardware Implementation of the Baillie-PSW Primality Test." University of Cincinnati / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1471347471.
Повний текст джерелаPark, Sungho. "A verilog-hdl implementation of virtual channels in a network-on-chip router." [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-2890.
Повний текст джерелаSampath, Kumar Santhiya. "Implementation of Low-Bit Rate Audio Codec, Codec2, in Verilog on Modern FPGAS." Miami University / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=miami158819886466373.
Повний текст джерелаPampana, Srilaxmi. "FPGA BASED IMPLEMENTATION OF A POSITION ESTIMATOR FOR CONTROLLING A SWITCHED RELUCTANCE MOTOR." UKnowledge, 2004. http://uknowledge.uky.edu/gradschool_theses/254.
Повний текст джерелаThakur, Ravi Bhushan. "Low power design implementation of a signal acquisition module." Thesis, Kansas State University, 2010. http://hdl.handle.net/2097/4617.
Повний текст джерелаDepartment of Electrical and Computer Engineering
Don M. Gruenbacher
As semiconductor technologies advance, the smallest feature sizes that can be fabricated get smaller. This has led to the development of high density FPGAs capable of supporting high clock speeds, which allows for the implementation of larger more complex designs on a single chip. Over the past decade the technology market has shifted toward mobile devices with low power consumption at or near the top of design considerations. By reducing power consumption in FPGAs we can achieve greater reliability, lower cooling cost, simpler power supply and delivery, and longer battery life. In this thesis, FPGA technology is discussed for the design and commercial implementation of low power systems as compared to ASICs or microprocessors, and a few techniques are suggested for lowering power consumption in FPGA designs. The objective of this research is to implement some of these approaches and attempt to design a low power signal acquisition module. Designing for low power consumption without compromising performance requires a power-efficient FPGA architecture and good design practices to leverage the architectural features. With various power conservation techniques suggested for every stage of the FPGA design flow, the following approach was used in the design process implementation: the switching activity is addressed in the design entry, and synthesis level and software tools are utilized to get an initial estimate of and optimize the design’s power consumption. Finally, the device choice is made based on its features that will enhance the optimization achieved in the previous stages; it is configured and real time board level power measurements are made to verify the implementation’s efficacy
Gumus, Rasit. "Implementation Of A Risc Microcontroller Using Fpga." Master's thesis, METU, 2005. http://etd.lib.metu.edu.tr/upload/2/12606694/index.pdf.
Повний текст джерелаКниги з теми "VERILOG IMPLEMENTATION"
New, York (State) Legislature Assembly Committee on Corporations Authorities and Commissions. Public hearing on service quality issues relating to the implementation of the Verizon incentive. [Mineola]: EN-DE Reporting, 2002.
Знайти повний текст джерелаScarpino. Vhdl Verilog Digital Systems Implementation. Pearson Education, Limited, 2020.
Знайти повний текст джерелаDigital System Design with FPGA: Implementation Using Verilog and VHDL. McGraw-Hill Education, 2017.
Знайти повний текст джерелаDigital VLSI Systems Design: A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog. Springer London, Limited, 2007.
Знайти повний текст джерелаRamachandran, Seetharaman. Digital VLSI Systems Design: A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog. Springer Netherlands, 2014.
Знайти повний текст джерелаDigital VLSI Systems Design: A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog. Springer, 2007.
Знайти повний текст джерелаЧастини книг з теми "VERILOG IMPLEMENTATION"
Mohamed, Khaled Salah. "Verilog for Implementation and Verification." In Analog Circuits and Signal Processing, 97–119. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-22035-2_5.
Повний текст джерелаNavabi, Zainalabedin. "Verilog for Simulation and Synthesis." In Digital Design and Implementation with Field Programmable Devices, 59–103. Boston, MA: Springer US, 2005. http://dx.doi.org/10.1007/1-4020-8012-3_3.
Повний текст джерелаTijare, Ankita, Prajwal Yelne, Ankit Mindewar, and Khushboo Borgaonkar. "Verilog implementation of AES 256 algorithm." In Recent Advances in Material, Manufacturing, and Machine Learning, 464–68. London: CRC Press, 2023. http://dx.doi.org/10.1201/9781003358596-51.
Повний текст джерелаKumar, Sandeep, and Trailokya Nath Sasamal. "Verilog Implementation of High-Speed Wallace Tree Multiplier." In Lecture Notes in Networks and Systems, 457–69. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-8218-9_38.
Повний текст джерелаYe, Yunqing, and Shuying Cheng. "Implementation of 2D-DCT Based on FPGA with Verilog HDL." In Lecture Notes in Electrical Engineering, 633–39. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-21697-8_80.
Повний текст джерелаGlasmacher, Alexander, and Kai Woska. "Design and Implementation of an XC6216 FPGA Model in Verilog." In Lecture Notes in Computer Science, 449–55. Berlin, Heidelberg: Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-44614-1_48.
Повний текст джерелаShashikumar, M., Bhaskar Jyoti Das, Jagritee Talukdar, and Kavicharan Mummaneni. "Radix-10 Multiplier Implementation with Carry Skip Adder Using Verilog." In Lecture Notes in Electrical Engineering, 397–405. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-3767-4_38.
Повний текст джерелаSuhaili, Shamsiah Binti, Rene Brooke Fredrick, Zainah Md Zain, and Norhuzaimin Julai. "Design and Implementation of Advanced Encryption Standard Using Verilog HDL." In Lecture Notes in Electrical Engineering, 483–98. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-2406-3_37.
Повний текст джерелаVenkatasatyakranthikumar, Taddi, Samparka Dey, Malvika, Vivek kumar, and Kavicharan Mummaneni. "Design and Implementation of Bus Ticketing System Using Verilog HDL." In Lecture Notes in Electrical Engineering, 259–65. Singapore: Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-99-4495-8_21.
Повний текст джерелаSandhya, Goundla, and Dheeraj Kumar Sharma. "Software Implementation of Plantlet Stream Cipher Using Verilog Hardware Description Language." In Lecture Notes in Electrical Engineering, 107–18. Singapore: Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-0312-0_12.
Повний текст джерелаТези доповідей конференцій з теми "VERILOG IMPLEMENTATION"
Mushtaq, U., O. Hasan, and F. Awwad. "PNOC: Implementation on Verilog for FPGA." In 2013 9th International Conference on Innovations in Information Technology (IIT). IEEE, 2013. http://dx.doi.org/10.1109/innovations.2013.6544409.
Повний текст джерелаDu, Zihang, Yang Liu, Chaoqun Qiu, and Xinmeng Zhang. "Verilog implementation of configurable UART module." In Second International Conference on Statistics, Applied Mathematics, and Computing Science (CSAMCS 2022), edited by Shi Jin and Wanyang Dai. SPIE, 2023. http://dx.doi.org/10.1117/12.2672692.
Повний текст джерелаGuru, R. Pavithra, and C. Kalyana Sundram. "Verilog module for on the Go implementation." In 2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS). IEEE, 2016. http://dx.doi.org/10.1109/iceets.2016.7583851.
Повний текст джерелаNagpurwala, Armaan Hasan, C. Sundaresan, and CVS Chaitanya. "Implementation of HDLC controller design using Verilog HDL." In 2013 International Conference on Electrical, Electronics and System Engineering (ICEESE). IEEE, 2013. http://dx.doi.org/10.1109/iceese.2013.6895033.
Повний текст джерелаTamuli, Manashwi, Shreyasee Debnath, Ashok Ray, and Swanirbhar Majumdar. "Implementation of Jacobi iterative solver in verilog HDL." In 2016 2nd International Conference on Control, Instrumentation, Energy & Communication (CIEC). IEEE, 2016. http://dx.doi.org/10.1109/ciec.2016.7513747.
Повний текст джерела., Nisha, and Prashanth Barla. "Implementation of Least Mean Square Algorithm Verilog HDL." In Second International Conference on Signal Processing, Image Processing and VLSI. Singapore: Research Publishing Services, 2015. http://dx.doi.org/10.3850/978-981-09-6200-5_o-75.
Повний текст джерелаSingh, Amita, S. Pratap Singh, M. Lakshmanan, and V. K. Pandey. "Verilog Implementation of Diffusion Concentration in Molecular Communication." In 2020 2nd International Conference on Advances in Computing, Communication Control and Networking (ICACCCN). IEEE, 2020. http://dx.doi.org/10.1109/icacccn51052.2020.9362889.
Повний текст джерелаRinoj, B. Michael Vinoline, and J. Jeya Caleb. "Implementation of neural network based controller using Verilog." In 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies (ICSCCN). IEEE, 2011. http://dx.doi.org/10.1109/icsccn.2011.6024574.
Повний текст джерелаPathirage, T. D., H. P. D. K. Wijewardana, L. A. S. Lakshan, Hassaan Hydher, and Lasith Yasakethu. "Multi-Prime RSA Verilog Implementation Using 4-Primes." In 2021 10th International Conference on Information and Automation for Sustainability (ICIAfS). IEEE, 2021. http://dx.doi.org/10.1109/iciafs52090.2021.9605975.
Повний текст джерелаEngin, Deniz, and Berna Ors. "Implementation of Enigma machine using verilog on an FPGA." In 2015 9th International Conference on Electrical and Electronics Engineering (ELECO). IEEE, 2015. http://dx.doi.org/10.1109/eleco.2015.7394608.
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