Готові списки джерел за темами / Tolerance optimization

Добірка наукової літератури з теми "Tolerance optimization"

Автор: Grafiati
Опубліковано: 7 липня 2024

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Статті в журналах з теми "Tolerance optimization":

1

Roubíček, Tomáš. "Constrained optimization: A general tolerance approach." Applications of Mathematics 35, no. 2 (1990): 99–128. http://dx.doi.org/10.21136/am.1990.104393.

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2

G V, Madhavi Reddy, and Sreenivasulu Reddy A. "Assembly Gap Tolerance Calculation Using ANFIS and Cost Function Optimization." International Journal for Research in Applied Science and Engineering Technology 10, no. 2 (February 28, 2022): 1111–17. http://dx.doi.org/10.22214/ijraset.2022.40460.

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Abstract: Tolerance plays a crucial role in the quality of a product. When different parts of an assembly are assembled, gap arises due to variation in dimensions. The tolerance for the gap is calculated using two methodologies: ANFIS and cost function optimization. In ANFIS the network is trained using mean dimensions, standard deviations as inputs and tolerances as output. The tolerances are predicted from the trained network. In cost function optimization, a cost function is formulated. The machinability of a part is calculated using Fuzzy Comprehensive Evaluation method. The tolerances are calculated by optimizing the cost function. The tolerances calculated using the two methods are compared and optimal tolerance is considered for manufacturing. Keywords: Tolerance, ANFIS, Assembly gap, Cost function, Optimization.
3

Xu, Rui, Kang Huang, Jun Guo, Lei Yang, Mingming Qiu, and Yan Ru. "Gear-tolerance optimization based on a response surface method." Transactions of the Canadian Society for Mechanical Engineering 42, no. 3 (September 1, 2018): 309–22. http://dx.doi.org/10.1139/tcsme-2018-0006.

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To address the low efficiency of gear-tolerance analysis and optimization, a gear-tolerance optimization method based on a response surface method (RSM) and optimization algorithm is presented. A gear-tolerance mathematical model, including profile deviation, pitch deviation, and geometric deviation, was developed by combining traditional profile modeling with a small displacement torsor (SDT) method. Based on this mathematical model, a tooth-contact analysis method, which takes a variety of deviations into account, and a program to compute transmission error were developed. Using the RSM and a genetic algorithm, a gear-tolerance optimization model was created to consider a variety of gear tolerances as design variables and process cost as an optimization objective. An example of gear-tolerance optimization was analyzed, and the result indicates that the method presented in this paper may help improve the efficiency of gear-tolerance optimization and is practicable for precision gear design.
4

Yang, Longbao, Yuejiao Ma, and Liheng Zhou. "Fault Tolerance Analysis and Optimization of Centralized Control Platform Based on Artificial Intelligence and Optimization Algorithm." Scalable Computing: Practice and Experience 25, no. 4 (June 16, 2024): 2621–27. http://dx.doi.org/10.12694/scpe.v25i4.2918.

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To enhance the reliability and self-healing of the system, the research on fault tolerance of the reconfigurable modular centralized control center is its development trend. Most of the previous research has focused on hardware redundancy. Improving fault tolerance performance is an essential topic in the research of centralized control platforms. Firstly, the problem of centralized fault tolerance in the working configuration of a reconfigurable manipulator is studied. The effect of each hinge on fault tolerance in the existing configuration is studied with the criterion of manoeuvrability and tolerable space. The fault module was first modelled to represent the system architecture information. A modular motion rule based on autonomous recombination technology is proposed. A self-organizing deformation algorithm with fault tolerance is studied. The fault tolerance of the motion pairs is compensated by adding a small number of motion pairs to ensure the configuration characteristics. With the addition of a failure compensation device, the joint’s range of motion was reduced, and the fault tolerance rate was enhanced. After the failure of the robot arm, the fault tolerant control method can still ensure that the robot arm can perform work in its tolerable working space. The test results show that the fault tolerance analysis method is practical and feasible. It lays a theoretical foundation for the application in aerospace, industry and other fields.
5

IRANI, S. A., R. O. MITTAL, and E. A. LEHTIHET. "Tolerance chart optimization." International Journal of Production Research 27, no. 9 (September 1989): 1531–52. http://dx.doi.org/10.1080/00207548908942638.

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6

Wang, Bingxiang, Xianzhen Huang, and Miaoxin Chang. "Reliability-based tolerance redesign of mechanical assemblies using Jacobian-Torsor model." Science Progress 104, no. 2 (April 2021): 003685042110132. http://dx.doi.org/10.1177/00368504211013227.

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The purpose of this paper is to present a new method to redesign dimensional and geometric tolerances of mechanical assemblies at a lower cost and with higher reliability. A parametric Jacobian-Torsor model is proposed to conduct tolerance analysis of mechanical assembly. A reliability-based tolerance optimization model is established. Differing from previous studies of fixed process parameters, this research determines the optimal process variances of tolerances, which provide basis for the subsequent assembly tolerance redesign. By using the Lambert W function and the Lagrange multiplier method, the analytical solution of the parametric tolerance optimization model is obtained. A numerical example is presented to demonstrate the effectiveness of the model, while the results indicate that the total cost is reduced by 10.93% and assembly reliability improves by 2.12%. This study presents an efficient reliability-based tolerance optimization model. The proposed model of tolerance redesign can be used for mechanical assembly with a better economic effect and higher reliability.
7

Gao, Yuan. "Tolerance analysis and optimization based on 3DCS." Journal of Physics: Conference Series 2137, no. 1 (December 1, 2021): 012070. http://dx.doi.org/10.1088/1742-6596/2137/1/012070.

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Abstract At present, with the increasing requirements of major enterprises on assembly accuracy, the problem of interference and excessive clearance between parts needs to be solved. In order to analyze and optimize the tolerances in the actual assembly of the parts, a three-dimensional vector ring model is proposed on the basis of the dimensional chain model, and the tolerance distribution is optimized by the “dichotomy method”. With the help of 3DCS, the virtual assembly of the automobile headlight is carried out, and the sensitivity analysis is carried out by establishing the measurement of the gap between the turn signal and headlight in the automobile headlight, and the simulation results are used to obtain a reasonable improvement in tolerance allocation that meets the design criteria and saves costs. The results are compared with the traditional method of optimizing the allocation of equal tolerances and are clearly superior, providing a method for optimizing the allocation of tolerances to parts in engineering practice.
8

G V, Madhavi Reddy, Vani S, and Sreenivasulu Reddy A. "Selection of Optimum Assembly Gap Tolerance for Motor Assembly." International Journal for Research in Applied Science and Engineering Technology 10, no. 4 (April 30, 2022): 107–12. http://dx.doi.org/10.22214/ijraset.2022.41180.

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Abstract: The parts in the motor assembly are divided into two types: fixed and variable. The tolerances of the fixed parts cannot be changed and the tolerances of the variable parts are calculated using three methodologies such as ME boost, ANFIS, and Cost function optimization.ME boost is an Excel add in used to calculate the tolerances of the variable parts. ANFIS is a neural network based optimization tool in matlab. Cost function is formulated for the variable parts in the assembly and optimized to calculate the tolerances. Then the tolerance for the assembly gap is calculated. The tolerances for the gap from the three methodologies are compared and optimum tolerance is considered for manufacturing. Keywords: Motor assembly, Tolerance, Assembly gap, ME boost, ANFIS, Cost function Optimization.
9

Balling, Richard J., Joseph C. Free, and Alan R. Parkinson. "Consideration of Worst-Case Manufacturing Tolerances in Design Optimization." Journal of Mechanisms, Transmissions, and Automation in Design 108, no. 4 (December 1, 1986): 438–41. http://dx.doi.org/10.1115/1.3258751.

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The paper discusses the effect of manufacturing tolerances for the design variables on the solution to an optimization problem. Two formulations of the tolerance problem in an optimization context are presented. Linearization is employed to reduce the problems to quadratic and linear programming problems. The formulations and solutions of the two tolerance problems are illustrated with an example application.
10

Liu, Guanghao, Meifa Huang, and Leilei Chen. "Optimization Method of Assembly Tolerance Types Based on Degree of Freedom." Applied Sciences 13, no. 17 (August 29, 2023): 9774. http://dx.doi.org/10.3390/app13179774.

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The automatic generation of tolerance specifications is an important aspect of achieving digital product design. An obvious feature of the current automatic generation of tolerance based on rule reasoning is that all tolerance types will be inferred for the same assembly feature. However, when labelling part tolerance information, designers need to further screen based on the geometric function of the assembly, which may result in prioritizing tolerance types that do not meet the geometric requirements of the assembly. This paper presents an assembly tolerance type optimization method based on the degree of freedom (DOF) of tolerance zone for the optimization and screening problem after reasoning all possible tolerance types. Firstly, we define the DOF of tolerance zones and their representations, while also define the control parameter degrees of freedom (CPDF) of assemblies, and analyze the CPDF of typical geometric functional tolerances of assemblies; Secondly, the Boolean operation relationship between sets is used to construct a Boolean operation preference method for the CPDF. Then, an algorithm for the optimal selection of the shape and position tolerance items of the assembly is established based on the DOFs of tolerance zone. Finally, the proposed method is verified by an engineering example, and the result shows that the method can optimize and screen the geometric tolerance types of assemblies.
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Статті в журналах Дисертації

Дисертації з теми "Tolerance optimization":

1

Shehabi, Murtaza Kaium. "Cost tolerance optimization for piecewise continuous cost tolerance functions." Ohio : Ohio University, 2002. http://www.ohiolink.edu/etd/view.cgi?ohiou1174937670.

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2

Yue, Junping. "A computerized optimization method for tolerance control." Thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-07112009-040315/.

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3

Jrad, Mohamed. "Multidisciplinary Optimization and Damage Tolerance of Stiffened Structures." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/52276.

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The structural optimization of a cantilever aircraft wing with curvilinear spars and ribs and stiffeners is described. The design concept of reinforcing the wing structure using curvilinear stiffening members has been explored due to the development of novel manufacturing technologies like electron-beam-free-form-fabrication (EBF3). For the optimization of a complex wing, a common strategy is to divide the optimization procedure into two subsystems: the global wing optimization which optimizes the geometry of spars, ribs and wing skins; and the local panel optimization which optimizes the design variables of local panels bordered by spars and ribs. The stiffeners are placed on the local panels to increase the stiffness and buckling resistance. The panel thickness, size and shape of stiffeners are optimized to minimize the structural weight. The geometry of spars and ribs greatly influences the design of stiffened panels. During the local panel optimization, the stress information is taken from the global model as a displacement boundary condition on the panel edges using the so-called "Global-Local Approach". The aircraft design is characterized by multiple disciplines: structures, aeroelasticity and buckling. Particle swarm optimization is used in the integration of global/local optimization to optimize the SpaRibs. The interaction between the global wing optimization and the local panel optimization is usually computationally expensive. A parallel computing technology has been developed in Python programming to reduce the CPU time. The license cycle-check method and memory self-adjustment method are two approaches that have been applied in the parallel framework in order to optimize the use of the resources by reducing the license and memory limitations and making the code robust. The integrated global-local optimization approach has been applied to subsonic NASA common research model (CRM) wing, which proves the methodology's application scaling with medium fidelity FEM analysis. Both the global wing design variables and local panel design variables are optimized to minimize the wing weight at an acceptable computational cost. The structural weight of the wing has been, therefore, reduced by 40% and the parallel implementation allowed a reduction in the CPU time by 89%. The aforementioned Global-Local Approach is investigated and applied to a composite panel with crack at its center. Because of composite laminates' heterogeneity, an accurate analysis of these requires very high time and storage space. In the presence of structural discontinuities like cracks, delaminations, cutouts etc., the computational complexity increases significantly. A possible alternative to reduce the computational complexity is the global-local analysis which involves an approximate analysis of the whole structure followed by a detailed analysis of a significantly smaller region of interest. We investigate here the performance of the global-local scheme based on the finite element method by comparing it to the traditional finite element method. To do so, we conduct a 2D structural analysis of a composite square plate, with a thin rectangular notch at its center, subjected to a uniform transverse pressure, using the commercial software ABAQUS. We show that the presence of the thin notch affects only the local response of the structure and that the size of the affected area depends on the notch length. We investigate also the effect of the notch shape on the response of the structure. Stiffeners attached to composite panels may significantly increase the overall buckling load of the resultant stiffened structure. Buckling analysis of a composite panel with attached longitudinal stiffeners under compressive loads is performed using Ritz method with trigonometric functions. Results are then compared to those from ABAQUS FEA for different shell elements. The case of composite panel with one, two, and three stiffeners is investigated. The effect of the distance between the stiffeners on the buckling load is also studied. The variation of the buckling load and buckling modes with the stiffeners' height is investigated. It is shown that there is an optimum value of stiffeners' height beyond which the structural response of the stiffened panel is not improved and the buckling load does not increase. Furthermore, there exist different critical values of stiffener's height at which the buckling mode of the structure changes. Next, buckling analysis of a composite panel with two straight stiffeners and a crack at the center is performed. Finally, buckling analysis of a composite panel with curvilinear stiffeners and a crack at the center is also conducted. ABAQUS is used for these two examples and results show that panels with a larger crack have a reduced buckling load. It is shown also that the buckling load decreases slightly when using higher order 2D shell FEM elements. A damage tolerance framework, EBF3PanelOpt, has been developed to design and analyze curvilinearly stiffened panels. The framework is written with the scripting language PYTHON and it interacts with the commercial software MSC. Patran (for geometry and mesh creation), MSC. Nastran (for finite element analysis), and MSC. Marc (for damage tolerance analysis). The crack location is set to the location of the maximum value of the major principal stress while its orientation is set normal to the major principal axis direction. The effective stress intensity factor is calculated using the Virtual Crack Closure Technique and compared to the fracture toughness of the material in order to decide whether the crack will expand or not. The ratio of these two quantities is used as a constraint, along with the buckling factor, Kreisselmeier and Steinhauser criteria, and crippling factor. The EBF3PanelOpt framework is integrated within a two-step Particle Swarm Optimization in order to minimize the weight of the panel while satisfying the aforementioned constraints and using all the shape and thickness parameters as design variables. The result of the PSO is used then as an initial guess for the Gradient Based Optimization using only the thickness parameters as design variables. The GBO is applied using the commercial software VisualDOC.
Ph. D.
4

Arenbeck, Henry. "Efficient Reliability-Based Tolerance Optimization for Multibody Systems." Thesis, The University of Arizona, 2007. http://hdl.handle.net/10150/190380.

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5

Barraja, Mathieu. "TOLERANCE ALLOCATION FOR KINEMATIC SYSTEMS." UKnowledge, 2004. http://uknowledge.uky.edu/gradschool_theses/315.

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A method for allocating tolerances to exactly constrained assemblies is developed. The procedure is established as an optimization subject to constraints. The objective is to minimize the manufacturing cost of the assembly while respecting an acceptable level of performance. This method is particularly interesting for exactly constrained components that should be mass-produced. This thesis presents the different concepts used to develop the method. It describes exact constraint theory, manufacturing variations, optimization concepts, and the related mathematical tools. Then it explains how to relate these different topics in order to perform a tolerance allocation. The developed method is applied on two relevant exactly constrained examples: multi-fiber connectors, and kinematic coupling. Every time a mathematical model of the system and its corresponding manufacturing variations is established. Then an optimization procedure uses this model to minimize the manufacturing cost of the system while respecting its functional requirements. The results of the tolerance allocation are verified with Monte Carlo simulation.
6

Chen, Jack Szu-Shen. "Distortion-free tolerance-based layer setup optimization for layered manufacturing." Thesis, University of British Columbia, 2010. http://hdl.handle.net/2429/27268.

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Layer manufacturing has emerged as a highly versatile process to produce complex parts compared to conventional manufacturing processes, which are either too costly to implement or just downright not possible. However, this relatively new manufacturing process is characterized by a few outstanding issues that have kept the process from being widely applied. The most detrimental is the lack of a reliable method on a computational geometry level to predict the resulting part error. Layer setup with regard to the contour profile and thickness of each layer is often rendered to operator-deemed best. As a result, the manufactured part accuracy is not guaranteed and the build time is not easily optimized. Even with the availability of a scheme to predict the resulting finished part, optimal layer setup cannot be determined. Current practice generates the layer contours by simply intersecting a set of parallel planes through the computer model of the design part. The volumetric geometry of each layer is then constructed by extruding the layer contour by the layer thickness in the part building direction. This practice often leads to distorted part geometry due to the unidirectional bias of the extruded layers. Because of this, excessive layers are often employed to alleviate the effect of the part distortion. Such form of the distortion, referred to as systematic distortion, needs to be removed during layer setup. This thesis proposes methods to first remove the systematic distortion and then to determine the optimal layer setup based on a tolerance measure. A scheme to emulate the final polished part geometry is also presented. Case studies are performed in order to validate that the proposed method. The proposed scheme is shown to have significantly reduced the number of layers for constructing an LM part while satisfying a user specified error bound. Therefore, accuracy is better guaranteed due to the existence of error measure and control. Efficiency is greatly increased.
7

Burlyaev, Dmitry. "Design, Optimization, and Formal Verification of Circuit Fault-Tolerance Techniques." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAM058/document.

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La miniaturisation de la gravure et l'ajustement dynamique du voltage augmentent le risque de fautes dans les circuits intégrés. Pour pallier cet inconvénient, les ingénieurs utilisent des techniques de tolérance aux fautes pour masquer ou, au moins, détecter les fautes. Ces techniques sont particulièrement utilisées dans les domaines critiques (aérospatial, médical, nucléaire, etc.) où les garanties de bon fonctionnement des circuits et leurs tolérance aux fautes sont cruciales. Cependant, la vérification de propriétés fonctionnelles et de tolérance aux fautes est un problème complexe qui ne peut être résolu par simulation en raison du grand nombre d'exécutions possibles et de scénarios d'occurrence des fautes. De même, l'optimisation des surcoûts matériels ou temporels imposés par ces techniques demande de garantir que le circuit conserve ses propriétés de tolérance aux fautes après optimisation.Dans cette thèse, nous décrivons une optimisation de techniques de tolérance aux fautes classiques basée sur des analyses statiques, ainsi que de nouvelles techniques basées sur la redondance temporelle. Nous présentons comment leur correction peut être vérifiée formellement à l'aide d'un assistant de preuves.Nous étudions d'abord comment certains voteurs majoritaires peuvent être supprimés des circuits basés sur la redondance matérielle triple (TMR) sans violer leurs propriétés de tolérance. La méthodologie développée prend en compte les particularités des circuits (par ex. masquage logique d'erreurs) et des entrées/sorties pour optimiser la technique TMR.Deuxièmement, nous proposons une famille de techniques utilisant la redondance temporelle comme des transformations automatiques de circuits. Elles demandent moins de ressources matérielles que TMR et peuvent être facilement intégrés dans les outils de CAO. Les transformations sont basées sur une nouvelle idée de redondance temporelle dynamique qui permet de modifier le niveau de redondance «à la volée» sans interrompre le calcul. Le niveau de redondance peut être augmenté uniquement dans les situations critiques (par exemple, au-dessus des pôles où le niveau de rayonnement est élevé), lors du traitement de données cruciales (par exemple, le cryptage de données sensibles), ou pendant des processus critiques (par exemple, le redémarrage de l'ordinateur d'un satellite).Troisièmement, en associant la redondance temporelle dynamique avec un mécanisme de micro-points de reprise, nous proposons une transformation avec redondance temporelle double capable de masquer les fautes transitoires. La procédure de recouvrement est transparente et le comportement entrée/sortie du circuit reste identique même lors d'occurrences de fautes. En raison de la complexité de cette méthode, la garantie totale de sa correction a nécessité une certification formelle en utilisant l'assistant de preuves Coq. La méthodologie développée peut être appliquée pour certifier d'autres techniques de tolérance aux fautes exprimées comme des transformations de circuits
Technology shrinking and voltage scaling increase the risk of fault occurrences in digital circuits. To address this challenge, engineers use fault-tolerance techniques to mask or, at least, to detect faults. These techniques are especially needed in safety critical domains (e.g., aerospace, medical, nuclear, etc.), where ensuring the circuit functionality and fault-tolerance is crucial. However, the verification of functional and fault-tolerance properties is a complex problem that cannot be solved with simulation-based methodologies due to the need to check a huge number of executions and fault occurrence scenarios. The optimization of the overheads imposed by fault-tolerance techniques also requires the proof that the circuit keeps its fault-tolerance properties after the optimization.In this work, we propose a verification-based optimization of existing fault-tolerance techniques as well as the design of new techniques and their formal verification using theorem proving. We first investigate how some majority voters can be removed from Triple-Modular Redundant (TMR) circuits without violating their fault-tolerance properties. The developed methodology clarifies how to take into account circuit native error-masking capabilities that may exist due to the structure of the combinational part or due to the way the circuit is used and communicates with the surrounding device.Second, we propose a family of time-redundant fault-tolerance techniques as automatic circuit transformations. They require less hardware resources than TMR alternatives and could be easily integrated in EDA tools. The transformations are based on the novel idea of dynamic time redundancy that allows the redundancy level to be changed "on-the-fly" without interrupting the computation. Therefore, time-redundancy can be used only in critical situations (e.g., above Earth poles where the radiation level is increased), during the processing of crucial data (e.g., the encryption of selected data), or during critical processes (e.g., a satellite computer reboot).Third, merging dynamic time redundancy with a micro-checkpointing mechanism, we have created a double-time redundancy transformation capable of masking transient faults. Our technique makes the recovery procedure transparent and the circuit input/output behavior remains unchanged even under faults. Due to the complexity of that method and the need to provide full assurance of its fault-tolerance capabilities, we have formally certified the technique using the Coq proof assistant. The developed proof methodology can be applied to certify other fault-tolerance techniques implemented through circuit transformations at the netlist level
8

Morales, Reyes Alicia. "Fault tolerant and dynamic evolutionary optimization engines." Thesis, University of Edinburgh, 2011. http://hdl.handle.net/1842/4882.

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Mimicking natural evolution to solve hard optimization problems has played an important role in the artificial intelligence arena. Such techniques are broadly classified as Evolutionary Algorithms (EAs) and have been investigated for around four decades during which important contributions and advances have been made. One main evolutionary technique which has been widely investigated is the Genetic Algorithm (GA). GAs are stochastic search techniques that follow the Darwinian principle of evolution. Their application in the solution of hard optimization problems has been very successful. Indeed multi-dimensional problems presenting difficult search spaces with characteristics such as multi-modality, epistasis, non regularity, deceptiveness, etc., have all been effectively tackled by GAs. In this research, a competitive form of GAs known as fine or cellular GAs (cGAs) are investigated, because of their suitability for System on Chip (SoC) implementation when tackling real-time problems. Cellular GAs have also attracted the attention of researchers due to their high performance, ease of implementation and massive parallelism. In addition, cGAs inherently possess a number of structural configuration parameters which make them capable of sustaining diversity during evolution and therefore of promoting an adequate balance between exploitative and explorative stages of the search. The fast technological development of Integrated Circuits (ICs) has allowed a considerable increase in compactness and therefore in density. As a result, it is nowadays possible to have millions of gates and transistor based circuits in very small silicon areas. Operational complexity has also significantly increased and consequently other setbacks have emerged, such as the presence of faults that commonly appear in the form of single or multiple bit flips. Tough environmental or time dependent operating conditions can trigger faults in registers and memory allocations due to induced radiation, electron migration and dielectric breakdown. These kinds of faults are known as Single Event Effects (SEEs). Research has shown that an effective way of dealing with SEEs consists of a combination of hardware and software mitigation techniques to overcome faulty scenarios. Permanent faults known as Single Hard Errors (SHEs) and temporary faults known as Single Event Upsets (SEUs) are common SEEs. This thesis aims to investigate the inherent abilities of cellular GAs to deal with SHEs and SEUs at algorithmic level. A hard real-time application is targeted: calculating the attitude parameters for navigation in vehicles using Global Positioning System (GPS) technology. Faulty critical data, which can cause a system’s functionality to fail, are evaluated. The proposed mitigation techniques show cGAs ability to deal with up to 40% stuck at zero and 30% stuck at one faults in chromosomes bits and fitness score cells. Due to the non-deterministic nature of GAs, dynamic on-the-fly algorithmic and parametric configuration has also attracted the attention of researchers. In this respect, the structural properties of cellular GAs provide a valuable attribute to influence their selection pressure. This helps to maintain an adequate exploitation-exploration tradeoff, either from a pure topological perspective or through genetic operations that also make use of structural characteristics in cGAs. These properties, unique to cGAs, are further investigated in this thesis through a set of middle to high difficulty benchmark problems. Experimental results show that the proposed dynamic techniques enhance the overall performance of cGAs in most benchmark problems. Finally, being structurally attached, the dimensionality of cellular GAs is another line of investigation. 1D and 2D structures have normally been used to test cGAs at algorithm and implementation levels. Although 3D-cGAs are an immediate extension, not enough attention has been paid to them, and so a comparative study on the dimensionality of cGAs is carried out. Having shorter radii, 3D-cGAs present a faster dissemination of solutions and have denser neighbourhoods. Empirical results reported in this thesis show that 3D-cGAs achieve better efficiency when solving multi-modal and epistatic problems. In future, the performance improvements of 3D-cGAs will merge with the latest benefits that 3D integration technology has demonstrated, such as reductions in routing length, in interconnection delays and in power consumption.
9

KANSARA, SHARAD MAHENDRA. "AN EFFICIENT SEQUENTIAL INTEGER OPTIMIZATION TECHNIQUE FOR PROCESS PLANNING AND TOLERANCE ALLOCATION." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1069798466.

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10

Izosimov, Viacheslav. "Scheduling and Optimization of Fault-Tolerant Embedded Systems." Licentiate thesis, Linköping University, Linköping University, ESLAB - Embedded Systems Laboratory, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7654.

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Анотація:

Safety-critical applications have to function correctly even in presence of faults. This thesis deals with techniques for tolerating effects of transient and intermittent faults. Reexecution, software replication, and rollback recovery with checkpointing are used to provide the required level of fault tolerance. These techniques are considered in the context of distributed real-time systems with non-preemptive static cyclic scheduling.

Safety-critical applications have strict time and cost constrains, which means that not only faults have to be tolerated but also the constraints should be satisfied. Hence, efficient system design approaches with consideration of fault tolerance are required.

The thesis proposes several design optimization strategies and scheduling techniques that take fault tolerance into account. The design optimization tasks addressed include, among others, process mapping, fault tolerance policy assignment, and checkpoint distribution.

Dedicated scheduling techniques and mapping optimization strategies are also proposed to handle customized transparency requirements associated with processes and messages. By providing fault containment, transparency can, potentially, improve testability and debugability of fault-tolerant applications.

The efficiency of the proposed scheduling techniques and design optimization strategies is evaluated with extensive experiments conducted on a number of synthetic applications and a real-life example. The experimental results show that considering fault tolerance during system-level design optimization is essential when designing cost-effective fault-tolerant embedded systems.

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Книги з теми "Tolerance optimization":

1

L, Palumbo Daniel, Arras Michael K, and Langley Research Center, eds. Performance and fault-tolerance of neural networks for optimization. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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2

L, Palumbo Daniel, Arras Michael K, and Langley Research Center, eds. Performance and fault-tolerance of neural networks for optimization. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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3

L, Palumbo Daniel, Arras Michael K, and Langley Research Center, eds. Performance and fault-tolerance of neural networks for optimization. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1991.

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4

Finckenor, J. CORSSTOL: Cylinder optimization of rings, skin, and stringers with tolerance sensitivity. Washington, D.C: National Aeronautics and Space Administration, 1995.

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5

Cakaj, Shkelzen, ed. Modeling Simulation and Optimization - Tolerance and Optimal Control. InTech, 2010. http://dx.doi.org/10.5772/211.

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6

Modeling Simulation and Optimization - Tolerance and Optimal Control. InTech, 2010.

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7

Leondes, Cornelius T. Structural Dynamic Systems Computational Techniques and Optimization: Reliability and Damage Tolerance (Engineering, Technology and Applied Science , Vol 10). Taylor & Francis, 1999.

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8

Pardalos, Panos M., Boris Goldengorin, Gerold Jäger, and Marcel Turkensteen. Calculus of Tolerances in Combinatorial Optimization: Theory and Algorithms. Springer, 2016.

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9

Goberna, Miguel A., and Marco A. López. Post-Optimal Analysis in Linear Semi-Infinite Optimization. Springer London, Limited, 2014.

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10

Postoptimal Analysis In Linear Semiinfinite Optimization. Springer-Verlag New York Inc., 2014.

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Частини книг з теми "Tolerance optimization":

1

Jiang, Chao, Xu Han, and Huichao Xie. "Interval Optimization Considering Tolerance Design." In Nonlinear Interval Optimization for Uncertain Problems, 247–58. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-8546-3_12.

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2

Hadjihassan, Sevgui, Eric Walter, and Luc Pronzato. "Quality Improvement via Optimization of Tolerance Intervals During the Design Stage." In Applied Optimization, 91–131. Boston, MA: Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-3440-8_5.

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3

Fotakis, Dimitris A., and Paul G. Spirakis. "Machine Partitioning and Scheduling under Fault-Tolerance Constraints." In Nonconvex Optimization and Its Applications, 209–44. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/978-1-4757-3145-3_14.

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4

Xu, Bensheng, Can Wang, and Hongli Chen. "Functional Tolerance Optimization Design for Datum System." In Lecture Notes in Electrical Engineering, 1427–34. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-3648-5_184.

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5

Bosse, Sascha, and Klaus Turowski. "Optimization of Data Center Fault Tolerance Design." In Engineering and Management of Data Centers, 141–62. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-65082-1_7.

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6

Razaaly, Nassim, Giacomo Persico, and Pietro Marco Congedo. "Tolerance Optimization of Supersonic ORC Turbine Stator." In Proceedings of the 3rd International Seminar on Non-Ideal Compressible Fluid Dynamics for Propulsion and Power, 78–86. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-69306-0_9.

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7

Zavala, Angel E. Muñoz, Arturo Hernández Aguirre, and Enrique R. Villa Diharce. "Continuous Constrained Optimization with Dynamic Tolerance Using the COPSO Algorithm." In Constraint-Handling in Evolutionary Optimization, 1–23. Berlin, Heidelberg: Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-00619-7_1.

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8

Lombraña González, Daniel, Juan Luís Jiménez Laredo, Francisco Fernández de Vega, and Juan Julián Merelo Guervós. "Characterizing Fault-Tolerance of Genetic Algorithms in Desktop Grid Systems." In Evolutionary Computation in Combinatorial Optimization, 131–42. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-12139-5_12.

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9

Fotakis, Dimitris A., and Paul G. Spirakis. "Efficient Redundant Assignments under Fault-Tolerance Constraints." In Randomization, Approximation, and Combinatorial Optimization. Algorithms and Techniques, 156–67. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/978-3-540-48413-4_17.

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10

Hoffenson, Steven, Andreas Dagman, and Rikard Söderberg. "Tolerance Specification Optimization for Economic and Ecological Sustainability." In Lecture Notes in Production Engineering, 865–74. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-30817-8_85.

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Тези доповідей конференцій з теми "Tolerance optimization":

1

Jayakaran, Christopher, Ragini Patel, Prashant Momaya, K. Roopesh, Umeshchandra Ananthanarayana, and Gautam Sardar. "Taking the Grunt Work Out of Tolerance Optimization." In ASME 8th Biennial Conference on Engineering Systems Design and Analysis. ASMEDC, 2006. http://dx.doi.org/10.1115/esda2006-95579.

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The activity of tolerance allocation and optimization is a critical step in the product design process. This inherent trade-off between design objectives and process capability poses challenges in achieving right tolerances, both technically and effort-wise. Traditional methods in tolerance allocation are mostly regressive and are constrained by selection of the manufacturing processes. A progressive approach to tolerance allocation that does not assume these processes helps in achieving optimality of the tolerances and selection of manufacturing processes to realize the design. The two-stage process suggested in this paper formulates an optimization problem that allocates the tolerances based on sensitivities of tolerance values at the first stage followed by manufacturing process selection and further optimization to adhere to the processes selected in the second stage. The approach aims at achieving optimal allocation of tolerances and assignment of the manufacturing processes, while keeping the optimization problem computationally simple, although iterative.
2

Roth, Martin, Markus Johannes Seitz, Benjamin Schleich, and Sandro Wartzack. "Coupling Sampling-Based Tolerance-Cost Optimization and Selective Assembly – An Integrated Approach for Optimal Tolerance Allocation." In ASME 2022 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2022. http://dx.doi.org/10.1115/imece2022-88775.

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Abstract Optimization has gained increased attention in product development and is nowadays profitably used to solve complex design problems. In tolerance design, tolerance-cost optimization is a systematic and efficient approach to allocate part tolerance values in a cost-optimal way. The usage of sampling-based tolerance analysis techniques thereby enables the consideration of machine-specific part tolerance distributions as well as individual batch sizes and thus facilitates a concurrent allocation of tolerances and machines. With the aim to further exploit its potential by embedding assembly aspects, this article presents a novel approach combining tolerance-cost optimization and optimal selective assembly. Based on an initial introduction of its general idea, a global optimization problem is defined to simultaneously identify the best combination of tolerance values, machines with their batch sizes and sorting orders of the individual batches. Subsequently, its solution using metaheuristic optimization algorithms and mixed-integer variables is presented. The theoretical findings are finally confirmed by its exemplary application to a use case indicating that it can reveal hidden cost improvement potentials in tolerance design.
3

Parkinson, Alan, Carl Sorensen, Joseph Free, and Bradley Canfield. "Tolerances and Robustness in Engineering Design Optimization." In ASME 1990 Design Technical Conferences. American Society of Mechanical Engineers, 1990. http://dx.doi.org/10.1115/detc1990-0015.

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Abstract This paper describes a new strategy for incorporating tolerances as part of engineering design optimization. The tolerance problem is defined in a general way that allows for tolerances on all model variables and parameters and includes worst case and statistical analysis. Two methods are described for taking tolerances into account during optimization such that an optimal design will remain feasible despite fluctuations in variables or parameters. Methods are also presented for directly controlling transmitted variation, and a framework for optimal tolerance allocation is proposed.
4

Gadallah, M. H., and H. A. ElMaraghy. "The Tolerance Optimization Problem Using a System of Experimental Design." In ASME 1994 Design Technical Conferences collocated with the ASME 1994 International Computers in Engineering Conference and Exhibition and the ASME 1994 8th Annual Database Symposium. American Society of Mechanical Engineers, 1994. http://dx.doi.org/10.1115/detc1994-0067.

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Abstract A new algorithm for manufacturing tolerance synthesis is proposed. In complex mechanical assemblies, most tolerance analysis and synthesis methods tend to be impractical. In this article, a methodology is proposed to minimize manufacturing cost by tightening important dimensional and/or geometrical tolerances. Analysis of variance and experimental design techniques are used to discriminate among various design dimensions to the overall functional requirement of the mechanical assembly. In this case, some, but not all, design dimensions will be controlled. This paper reviews the state-of-the art in the area of tolerance analysis and synthesis and highlights the contribution of this work.
5

Shoukr, David Sh L., Mohamed H. Gadallah, and Sayed M. Metwalli. "The Reduced Tolerance Allocation Problem." In ASME 2016 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2016. http://dx.doi.org/10.1115/imece2016-65848.

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Tolerance allocation is a necessary and important step in product design and development. It involves the assignment of tolerances to different dimensions such that the manufacturing cost is minimum, while maintaining the tolerance stack-up conditions satisfied. Considering the design functional requirements, manufacturing processes, and dimensional and/or geometrical tolerances, the tolerance allocation problem requires intensive computational effort and time. An approach is proposed to reduce the size of the tolerance allocation problem using design of experiments (DOE). Instead of solving the optimization problem for all dimensional tolerances, it is solved for the significant dimensions only and the insignificant dimensional tolerances are set at lower control levels. A Genetic Algorithm is developed and employed to optimize the synthesis problem. A set of benchmark problems are used to test the proposed approach, and results are compared with some standard problems in literature.
6

Lavoie, Andrew. "Lichten Award Paper: Variational Tolerance Analysis (VTA) - Design and Manufacturing Optimization Using Statistical Simulation." In Vertical Flight Society 77th Annual Forum & Technology Display. The Vertical Flight Society, 2021. http://dx.doi.org/10.4050/f-0077-2021-16817.

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Appropriate consideration of tolerances is critical to the design and manufacture of products that meet customer requirements and defined cost targets. Tolerance analysis is most commonly conducted at the individual part or sub-assembly level utilizing basic stack-up methods (worst-case analysis) to ensure the producibility of the assembled product. A worst-case analysis assumes that each dimension in the stack-up will be manufactured on the extreme end or limit of its assigned tolerance (max or min) in such a way that all tolerances become additive. This usually results in tighter than required drawing tolerances being assigned to guarantee the product can be assembled. Modern day manufacturing processes focus on targeting the nominal dimensional value, so it is safe to assume that a higher number of parts will be produced closer to the nominal value than parts produced at the extreme end of the tolerance range. When evaluating the tolerance stack-up of a larger assembly with many parts additional tolerance analysis methods apply (Root Sum Squared, RSS), and a worst-case analysis becomes more costly and less meaningful. The RSS method of tolerance analysis takes into consideration manufacturing targets and applies normal distribution methods to assess more likely tolerance results, allowing relaxed drawing tolerances to be assigned while still maintaining a high level of confidence in a successful assembly. For analysis of complex systems or installations, tolerance studies using more sophisticated approaches to deal with variation such as Monte Carlo statistical analysis is required. Variational Tolerance Analysis (VTA) tools available today allow a typical Monte Carlo tolerance simulation to be visualized by the designer through 3-dimensional real time manufacturing simulations and sensitivity analysis. This in turn simplifies the development process and allows better identification of tolerance drivers within a large system installation; analysis of the geometric effect of tolerances within the installation; and the ability to quickly iterate the analysis to optimize designs for producibility and lower cost. In this paper, the use of VTA is assessed and quantified to form a business case for further investment by Lockheed Martin. In the course of this work, VTA has been evaluated both before and after final designs were released to manufacturing. Before final designs are released VTA can be used for design optimization (i.e. build before you build simulations), part sequencing studies, or to gain insight into the assembly/installation process enabling advanced planning to take place up front. VTA can also address challenges discovered after final designs have been released to manufacturing and parts are on hand (i.e. during the build) such as: assembly issues, out of spec part disposition, and to inform manufacturing of any special tooling or part rework considerations aiding in corrective action or risk mitigation plans. Cost savings to the business due to the implementation of VTA has been demonstrated in 4 distinct ways: 1.Reduced design revisions – Design optimization up front reduces future revisions caused by producibility and tolerance related discoveries. 2.Manufacturing – Through tolerance optimization, nonimpactful tolerances can be relaxed while still ensuring a successful assembly. 3.Reduced build schedule – Increased assembly awareness and advanced planning allows a streamlined production process with risk mitigation strategies in place. 4.Reduced scrap, rework, repair (SRR) – Engineering labor to disposition out of spec parts is reduced by entering as-measured tolerances into the simulation model to assess the overall impact to installation success. The conclusion is VTA simulations provide measurable benefits to the business through robust design optimization, and multi-layered cost and risk reductions.
7

Tsai, Jhy-Cherng, and Chin-Ming Shih. "Computer-Aided Linear Tolerance Analysis and Optimal Tolerance Distribution for Cylindrical Machined Parts." In ASME 1998 Design Engineering Technical Conferences. American Society of Mechanical Engineers, 1998. http://dx.doi.org/10.1115/detc98/dac-5804.

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Abstract Quality and cost are among the most important concerns for a product. While tolerance is one of the typical metrics for quality, it is a trade-off between tolerances and costs in product development though the two factors often conflict with each other. This paper describes a systematic approach to compute linear tolerance accumulation for cylindrical parts by machining operations based on the tolerance chart. A computer-aided tolerance chart system is developed to assist the construction of the corresponding tolerance chart and the computation of accumulated linear tolerances for a given process plan. Tolerance distribution to each machining operation by optimization techniques is also investigated. The goal is to minimize machining cost subject to constraints on tolerance accumulation and process capability. It shows that the machining cost of a sample part with the worst-case tolerance analysis can be reduced by 39%, compared to that by experience, and can be further reduced if statistical tolerance analysis applies.
8

Chen, Shaoqiang, Hui Wang, and Qiang Huang. "Multistage Machining Process Design and Optimization Using Error Equivalence Method." In ASME 2009 International Manufacturing Science and Engineering Conference. ASMEDC, 2009. http://dx.doi.org/10.1115/msec2009-84359.

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In design of a multistage machining process, process tolerance allocation at each stage and design of process layouts, in particular, the fixture layouts, should be optimized considering dimensional tolerance stackup or variation propagation. When multiple error sources contribute to the tolerance stackup, the dimensionality of the design space could be large and design solution may not be unique. One strategy is to prioritize the allocation of tolerances to different error sources at each stage through proper selection of cost functions. Considering the fact that the cost function selection can be very subjective and the knowledge regarding cost structures is very limited, we propose a hierarchical process design method using error equivalence concept to aggregate multiple error sources together. The main idea is to allocate tolerances to the aggregated error sources at each stage and then further distribute the tolerance to individual error sources through cost analysis. The advantage is two-fold: (1) limiting the impact of cost function selection within individual stages to avoid overhaul of process design caused by subtle change in cost functions, and (2) enabling the optimization of fixture layouts to reduce the overall tolerance stackup due to multiple error sources. To reduce computational load in optimizing process layouts, a computer experiment model is developed to explore a large number of process design alternatives. The robustness of the optimal tolerance is evaluated through sensitivity analysis, which provides guidance for process design. We illustrate the error-equivalence-based process design method by a multistage machining process. The results have shown that the proposed method could significantly reduce the design space and increase the design efficiency.
9

El-Haik, Basem, and Kai Yang. "Tolerance Design: An Axiomatic Perspective." In ASME 1999 Design Engineering Technical Conferences. American Society of Mechanical Engineers, 1999. http://dx.doi.org/10.1115/detc99/dac-8706.

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Abstract A mathematical relationship between tolerance design and axiomatic design is derived in this paper. The approach presented here is used to optimize the settings of design parameters tolerances through non-linear programming formulations. The main theme behind these formulations is to set the individual tolerances of design parameters to achieve minimal quality loss cost subject to functional requirements independence. The programming presented here achieves both functional requirements independence per Suh’s Axiom I and assure robustness by minimizing Taguchi’s quality loss function. All the mathematical linkages were developed as it relates to our axiomatic-tolerance optimization perspective.
10

Krishnaswami, Mukund, and R. W. Mayne. "Optimizing Tolerance Allocation Based on Manufacturing Cost and Quality Loss." In ASME 1994 Design Technical Conferences collocated with the ASME 1994 International Computers in Engineering Conference and Exhibition and the ASME 1994 8th Annual Database Symposium. American Society of Mechanical Engineers, 1994. http://dx.doi.org/10.1115/detc1994-0063.

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Abstract This paper describes a procedure for optimizing the allocation of tolerances considering manufacturing cost and product quality in a constrained optimization process. The procedure can utilize various existing models for relating manufacturing costs to part tolerances. It also includes a relationship between part tolerances and assembly tolerance to provide a quantitative measure of product quality using the Taguchi concept of quality loss. The two cost relationships are combined in a formulation which is convenient for solving the optimal tolerance allocation problem by nonlinear programming methods. Numerical optimization can then be directly applied to balance manufacturing cost and product quality allowing trade-offs to be explored.

Звіти організацій з теми "Tolerance optimization":

1

Olivas, Eric Richard, Michael Jeffrey Mocko, and Keith Albert Woloshun. Target Optimization Study: Tolerance Sensitivity. Office of Scientific and Technical Information (OSTI), April 2020. http://dx.doi.org/10.2172/1615652.

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2

Wang, L., and S. N. Atluri. Automated Structural Optimization System (ASTROS) Damage Tolerance Module. Volume 2 - User's Manual. Fort Belvoir, VA: Defense Technical Information Center, February 1999. http://dx.doi.org/10.21236/ada375881.

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3

Wang, L., and S. N. Atluri. Automated Structural Optimization System (ASTROS) Damage Tolerance Module. Volume 1 - Final Report. Fort Belvoir, VA: Defense Technical Information Center, February 1999. http://dx.doi.org/10.21236/ada375882.

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4

Wang, L., and S. N. Atluri. Automated Structural Optimization System (ASTROS) Damage Tolerance Module. Volume 3. Interface Design Document. Fort Belvoir, VA: Defense Technical Information Center, February 1999. http://dx.doi.org/10.21236/ada375883.

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5

Steirer, K. Xerxes, Angus Rockett, Michael Irwin, and Joseph Berry. Final Technical Report: Multi-Messenger In-situ Tolerance Optimization of Mixed Perovskite Photovoltaics. Office of Scientific and Technical Information (OSTI), March 2021. http://dx.doi.org/10.2172/1772188.

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6

Darling, Arthur H., and William J. Vaughan. The Optimal Sample Size for Contingent Valuation Surveys: Applications to Project Analysis. Inter-American Development Bank, April 2000. http://dx.doi.org/10.18235/0008824.

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One of the first questions that has to be answered in the survey design process is "How many subjects should be interviewed?" The answer can have significant implications for the cost of project preparation, since in Latin America and the Caribbean costs per interview can range from US$20 to US$100. Traditionally, the sample size question has been answered in an unsatisfactory way by either dividing an exogenously fixed survey budget by the cost per interview or by employing some variant of a standard statistical tolerance interval formula. The answer is not to be found in the environmental economics literature. But, it can be developed by adapting a Bayesian decision analysis approach from business statistics. The paper explains and illustrates, with a worked example, the rationale for and mechanics of a sequential Bayesian optimization technique, which is only applicable when there is some monetary payoff to alternative courses of action that can be linked to the sample data.

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