Дисертації з теми "Thin film interconnects"
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Calhoun, Kenneth Harold. "Thin film compound semiconductor devices for photonic interconnects." Diss., Georgia Institute of Technology, 1993. http://hdl.handle.net/1853/15478.
Повний текст джерелаModi, Mitul B. "Fracture in stress engineered, high density, thin film interconnects." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/16336.
Повний текст джерелаZheng, Jiantao. "Interfacial fracture of micro thin film interconnects under monotonic and cyclic loading." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/26489.
Повний текст джерелаCommittee Chair: Sitaraman, Suresh; Committee Member: Degertekin, Levent; Committee Member: McDowell, David; Committee Member: Tummala, Rao; Committee Member: Vandentop, Gilroy; Committee Member: Wang, Zhong Lin. Part of the SMARTech Electronic Thesis and Dissertation Collection.
Au, Yeung Billy. "Chemical Vapor Deposition of Thin Film Materials for Copper Interconnects in Microelectronics." Thesis, Harvard University, 2012. http://dissertations.umi.com/gsas.harvard:10227.
Повний текст джерелаChemistry and Chemical Biology
Seo, Sang-Woo. "Development of thin film photodetectors and their applications multispectral detection and high speed optical interconnections /." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04082004-180408/unrestricted/seo%5fsang-woo%5f200312%5fphd.pdf.
Повний текст джерелаGinga, Nicholas J. "On-chip dielectric cohesive fracture characterization and mitigation investigation through off-chip carbon nanotube interconnects." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/52225.
Повний текст джерелаCrozier, M. L. "Development of a novel series interconnect for thin-film photovoltaics." Thesis, Heriot-Watt University, 2017. http://hdl.handle.net/10399/3228.
Повний текст джерелаWeaver, David John. "A study of graphoepitaxially grown Al and Cu interconnects." Thesis, University of York, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.265566.
Повний текст джерелаWikström, Adam. "Modeling of stresses and deformation in thin film and interconnect line structures." Doctoral thesis, KTH, Solid Mechanics, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3224.
Повний текст джерелаWikström, Adam. "Modeling of stresses and deformation in thin film and interconnect line structures /." Stockholm : Tekniska högsk, 2001. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3224.
Повний текст джерелаYu, Lu. "Electroless Deposition of Copper and Copper-Manganese Alloy for Application in Interconnect Metallization." Case Western Reserve University School of Graduate Studies / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=case1396521217.
Повний текст джерелаCui, Xiaoyun. "Electroless metallisation of glass for electrical interconnect applications." Thesis, Loughborough University, 2009. https://dspace.lboro.ac.uk/2134/10303.
Повний текст джерелаSun, Tik. "Classical Size Effect in Copper Thin Films: Impact of Surface and Grain Boundary Scattering on Resistivity." Doctoral diss., Orlando, Fla. : University of Central Florida, 2009. http://purl.fcla.edu/fcla/etd/CFE0002959.
Повний текст джерелаLongworth, Hai Pham. "Microstructural modification of thin films and its relation to the electromigration-limited reliability of VLSI interconnects." Thesis, Massachusetts Institute of Technology, 1992. http://hdl.handle.net/1721.1/13114.
Повний текст джерелаNowrozi, Mojtaba Faiz. "A systematic study of LPCVD refractory metal/silicide interconnect materials for very large scale integrated circuits." Diss., The University of Arizona, 1988. http://hdl.handle.net/10150/184396.
Повний текст джерелаMistkawi, Nabil George. "Fundamental Studies in Selective Wet Etching and Corrosion Processes for High-Performance Semiconductor Devices." PDXScholar, 2010. https://pdxscholar.library.pdx.edu/open_access_etds/6.
Повний текст джерелаSarvari, Reza. "Impact of size effects and anomalous skin effect on metallic wires as GSI interconnects." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/31636.
Повний текст джерелаCommittee Chair: Meindl, James D.; Committee Member: Davis, Jeffrey A.; Committee Member: Gaylord, Thomas K.; Committee Member: Hess, Dennis W.; Committee Member: Peterson, Andrew F. Part of the SMARTech Electronic Thesis and Dissertation Collection.
Gečys, Paulius. "Ultrashort pulsed laser processing of thin-films for solar cells." Doctoral thesis, Lithuanian Academic Libraries Network (LABT), 2012. http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2012~D_20121001_093555-45841.
Повний текст джерелаDisertacijos darbo tikslas buvo, modeliuojant bei vykdant eksperimentus, suprasti plonų sluoksnių, naudojamų Saulės elementuose, abliacijos procesus ultratrumpais impulsais, siekiant juos pritaikyti integruotų jungčių fotovoltiniuose moduliuose formavimui. Eksperimento rezultatams pagrysti buvo vykdomas lazerio spinduliuotės sklidimo bei pasiskirstymo plonasluoksnėje Saulės elemento struktūroje modeliavimas. Sugerta lazerio energija lokaliai užkaitiną medžiagą. Kadangi lazerinio proceso selektyvumas priklauso nuo medžiagos optinių savybių, todėl yra itin svarbu parinkti tinkamą lazerio spinduliuotės bangos ilgį, norint sukaupti spinduliuotę reikiamame plonasluoksnės struktūros sluoksnyje. Nustatyta, kad fundamentinė pikosekundinio lazerio spinduliuotė (1064 nm) yra optimaliausia P3 tipo rėžio formavimui CIGS Saulės elemente. Pramonės taikymams tai yra itin svarbu, nes tokiu atveju mažėja industrinės lazerinės sistemos sudėtingumas bei kaina. Saulės elementų efektyvumo tyrimai parodė nežymų fotoelektrinio efektyvumo sumažėjimą po lazerinio apdirbimo ultra trumpais impulsais, tačiau nebuvo užfiksuota defektų generacijos lazeriais paveiktose kanalo kraštų zonose. Disertacijoje pasiūlyti ir išbandyti pluošto formavimo ir lygiagretaus sluoksnių raižymo metodai, didinantys proceso našumą ir raižymo kokybę. Pikosekundiniai, didelio impulsų pasikartojimo dažnio lazeriai gali būti panaudoti didelės spartos bei aukštos kokybės Saulės elementų raižymo procesuose.
Arunagiri, Tiruchirapalli Natarajan. "Interfacial Electrochemistry of Metal Nanoparticles Formation on Diamond and Copper Electroplating on Ruthenium Surface." Thesis, University of North Texas, 2003. https://digital.library.unt.edu/ark:/67531/metadc5526/.
Повний текст джерелаWirth, Alexandra. "Development of electrolessly deposited thin films for application in advanced interconnects : Cu seed-layer and seed-less ternary diffusion barriers." Université Louis Pasteur (Strasbourg) (1971-2008), 2002. http://www.theses.fr/2002STR13169.
Повний текст джерелаCopper is adopted in advanced deep submicron ULSI metallisation applications due to its lower resistivity and better electromigration resistance compared to traditional Al compounds. It is integrated using damascene structures that introduce new challenges related to barrier and seed-layer deposition. Electroless plating methods together with direct Cu ECD on barriers (seed-less barriers) are being pursued as more extendible solutions for seed-layer and effective Cu diffusion barrier layer deposition, regarding the issue of superior conformality and improved thickness control in small feature sizes of the 65 nm and below technology node. In a first part of this work, an electroless Cu seed-layer deposition process on TiN MOCVD barrier layer is developed. Focus of interest is the increase of density and reduction of size of the Pd catalyst islands. The impact of Pd ion concentration and respective bath chemistry composition as well as the influence of different substrate surfaces and their respective pre-treatment is investigated. In a second part, various electrolessly deposited polymetallic alloy coatings, e. G. NiMo-P, incorporating high amounts of refractory metals are investigated as potential seed-less diffusion barriers. The polymetallic alloy thin films serve at the same time as efficient diffusion barrier, adhesion promoter and conductive layer for direct Cu ECD. Implementation of these types of barrier layers is evaluated regarding minimum efficient barrier thickness, microstructural requirements and integration aspects such as thin film resistivity impact when integrated in advanced multilevel Cu interconnect schemes. Highly sensitive electron spin resonance (ESR) characterisation technique is investigated for the detection of unpaired electron defects as possibly resulting from diffusion phenomena through the barriers
Mukherjee, Tamal. "Investigation of Post-Plasma Etch Fluorocarbon Residue Characterization, Removal and Plasma-Induced Low-K Damage for Advanced Interconnect Applications." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849649/.
Повний текст джерелаLi, Kecheng. "Direct Liquid Evaporation Chemical Vapor Deposition(DLE-CVD) of Nickel, Manganese and Copper-Based Thin Films for Interconnects in Three-Dimensional Microelectronic Systems." Thesis, Harvard University, 2016. http://nrs.harvard.edu/urn-3:HUL.InstRepos:33493366.
Повний текст джерелаEngineering and Applied Sciences - Applied Physics
Gečys, Paulius. "Plonasluoksnių saulės elementų apdirbimas ultratrumpais lazerių impulsais." Doctoral thesis, Lithuanian Academic Libraries Network (LABT), 2012. http://vddb.laba.lt/obj/LT-eLABa-0001:E.02~2012~D_20121001_093544-75615.
Повний текст джерелаPresent PhD thesis is the experimental and theoretical analysis of thin layer ultrashort pulsed laser ablation processes for photovoltaic devices. Experimental work was supported by modeling and simulation of energy coupling and dissipation inside the layers. The absorbed laser energy was transformed to localized transient heating inside the structure. Selectiveness of the ablation process was defined by optical and mechanical properties of the materials, and selection of the laser wavelength facilitated control of the structuring process. The 1064 nm wavelength was found optimal for the CIGS solar cell scribing in terms of quality and process speed. It is very positive result for industrial applications as the cost and the system complexity are decreased. The solar cell efficiency test revealed minor degradation in photo-electrical efficiency after the laser scribing was applied to the solar cell samples. Lock-in thermography measurements did not revealed any internal shunt formation during laser scribing with picosecond pulse duration. Picosecond lasers with fundamental harmonics and high repetition rates can be used to accomplish efficient and fast scribing process which is able to fit the demands for industrial solar cell scribing applications.
Zhang, Yuelan. "Synthesis and Characterization of Nanostructured Electrodes for Solid State Ionic Devices." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14000.
Повний текст джерелаChoi, Chulchae. "Thin-film VCSEL and optical interconnection layer fabrications for fully embedded board level optical interconnects." Thesis, 2003. http://hdl.handle.net/2152/502.
Повний текст джерелаChoi, Chulchae Chen Ray T. "Thin-film VCSEL and optical interconnection layer fabrications for fully embedded board level optical interconnects." 2003. http://repositories.lib.utexas.edu/bitstream/handle/2152/502/choicc039.pdf.
Повний текст джерелаLin, Lei Chen Ray T. "Integration of thin film GaAs MSM photodetector in fully embedded board-level optoelectronic interconnects." 2004. http://repositories.lib.utexas.edu/bitstream/handle/2152/2070/linl042.pdf.
Повний текст джерелаLin, Lei. "Integration of thin film GaAs MSM photodetector in fully embedded board-level optoelectronic interconnects." Thesis, 2004. http://hdl.handle.net/2152/2070.
Повний текст джерелаWei, Bor-Jou, and 魏伯州. "Studies on the Low-k Dielectric and High Reliability Thin Film Materials for Interconnects." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/97492674923759991673.
Повний текст джерела國立中興大學
材料科學與工程學系所
100
In order to integrated circuit (IC) industry following Moore’s law, for scal-ing downing the device the multilevel interconnect had used to increase the densities of circuits on a chip, interconnect delay is becoming predominant over device delay time. As the device dimensions continue to shrink, interconnect delay becomes a lim-iting factor for increasing circuit device speed. The multilevel interconnect basically consists of metal layers, inter-layer dielectric (ILD) and inter-metal dielectric (IMD). As the device dimensions continue to shrink, interconnect delay becomes a limiting factor for increasing circuit device speed. Since interconnect delay is the product of the resistance in metal interconnect and the capacitance between the metal lines, the minimization of the parasitic capacitance and the resistance in interconnect is required. Incorporation of low-dielectric-constant materials in multilevel interconnect can ef-fectively reduce parasitic capacitance, thus decreasing the transmission delay. In this study, several kinds of low dielectric constant and resistors materials are investigated, including fluorine-silicate-glass (FSG), carbon-doped organo-silicate glass using trimethylsilane (3MS) and diethoxymethylsilane (DEMS) as precursors, and Ti/TiN thin films. The effects of the low-k dielectric constant materials on the in-tegration issue are studied to evaluate the compatibility of low-k materials on semi-conductor process. Moreover, the reliability of Ti/TiN thin film resistors were demon-strated no wear out issue below 311oC. As N2 is added in the FSG films by high-density-plasma chemical vapor deposition (HDP-CVD) method, higher fluorine concentration, reduced dielectric constant and improved gap filling ability of the deposited films have been achieved. It is proposed that the improvement of stability is correlated with the reduction of unstable fluorine bonds in the N-FSG films. Furthermore, the thermal stability of the N-FSG films was also identified by Al wiring delamination check. After annealing, the blister was observed only in non-N2 FSG film with 5.5 % Si-F concentration, while no blisters or delamination were observed when N2 is introduced into the FSG process. Therefore, the N-FSG film, deposited by HDP-CVD, is a good candidate for interconnects dielectric application. Lower dielectric constant as well as higher mechanical strength of plasma en-hanced chemical vapor deposition (PE-CVD) low-k films is required for IC speed and package. Both low-k films deposited using 3MS and DEMS precursors have similar elemental composition, but different bonding structures, leading to different integra-tion results. DEMS-based low-k films have a lower dielectric constant, higher hard-ness, and higher chemical and thermal stability than 3MS-based low-k films. From the results of blanket films and four-level interconnect test devices, the DEMS-based films were found to have superior electrical performance than that of the 3MS-based films. Ti/TiN thin film resistors were characterized by making electrical and reliability measurements. The results demonstrate that the Ti/TiN thin film resistor has an ex-cellent thermal stability up to 350oC. Based on electrical measurement and stress, the Ti layer has a lower electrical resistance than the TiN layer. Furthermore, the main failure mechanism of the Ti/TiN thin film resistors is thermally activated by Joule-heating. The thermal activation energy for failure is determined to be 1.8 eV for the Ti layer and 1.2 eV for the TiN layer. Based on this result, Ti/TiN thin film resis-tors exhibit no significant change in resistance during a lifetime of ten years if their temperature remains below 311oC.
Da-JiunWang and 王大鈞. "Graphene Synthesis by Copper Thin Film and the Study on Electrical and Diffusion Barrier Properties in Graphene-Coated Copper Nanowires for Interconnects." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/85906280814906208761.
Повний текст джерела國立成功大學
機械工程學系
104
Copper nanowires are made by bi-layer liftoff process using e-beam lithography and e-beam evaporation. Graphene-coated copper nanowires are synthesized by the rapid thermal process with 900℃ growth temperature for 3 minute and control cooling rate until 750℃ . The raman spectrum show the G and 2D band, and the I _D / I _G is near 2. It represent that there is graphene with defects on the copper nanowires. The XPS spectrum show the sp2 bonded which represent the carbon-carbon bonded of graphene at binding energy 284.6 eV. With the direct current-voltage measurent, we find that graphene reduce the resistivity of copper nanowires about 21.5%, compared to the no graphene-coated sample. It represent graphene reduce the surface scattering of electrons at the copper nanowires surface. For the purpose of analyzing the barrier property, we deposite 350nm silicon oxide layer on the sample by HDPCVD, and anneal at 200, 350, 500℃ for two hours. Using leakage current and EDS line scan measurement to analyze the barrier property. We find that the graphene will fail to diffusion barrier until 350 to 500℃ .
Thompson, Carl V. "Research on Polycrystalline Films for Micro- and Nano-Systems." 2003. http://hdl.handle.net/1721.1/3670.
Повний текст джерелаSingapore-MIT Alliance (SMA)
Pham, Daniel Thanh Khac. "Carbon nanotube thin film transistor on flexible substrate and its applications as switches in a phase shifter for a flexible phased-array antenna." Thesis, 2010. http://hdl.handle.net/2152/ETD-UT-2010-12-2222.
Повний текст джерелаtext
Thompson, Carl V. "Processing, Structure, Properties, and Reliability of Metals for Microsystems." 2002. http://hdl.handle.net/1721.1/3984.
Повний текст джерелаSingapore-MIT Alliance (SMA)
Li, Yan-Way, and 李延煒. "Thin Film Preparation and Characterization of Carbon-based Dielectrics for ULSI Interconnect Technology." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/569vwa.
Повний текст джерела國立交通大學
材料科學與工程系所
92
The purpose of this work is research the dielectric properties of a-C and a-SiC:H films, deposited respectively by using gridless ion beam deposition (GIBD) and plasma-enhanced chemical vapour deposition (PECVD), to evaluate the possibility for using in the etching-stop layer of copper interconnect technology. Amorphous hydrogenated carbon (a-C:H) films were deposited from gas mixtures of acetylene (C2H2) and argon (Ar) in a GIBD system supplied with dc power. Vacuum annealing and hydrogen plasma treatment were performed on the a-C:H films and their effects on the physical and electrical characteristics of the films were investigated. The structure and properties of the film were investigated as functions of the C2H2 flow rate, using Raman spectroscopy. The Raman spectra revealed that the Raman ID/IG ratio and D peak position decreases with C2H2 flow rate, indicating more diamond-like character of the films. Otherwise, the annealed a-C:H films exhibited that the Raman ID/IG ratio increases with annealing temperature, but the film density decreases simultaneously, indicating more graphite-like character for the annealed films as the annealing temperature was increased. The dielectric constant of the annealed a-C:H films was reduced from 3.8 to 2.9, but the leakage current density was obviously increased while the annealing temperature was increased from 200℃ to 300℃. However, the leakage current density and dielectric constant of the hydrogen-plasma-treated a-C:H films were clearly lower than those of the as-deposited a-C:H films. Amorphous SiC:H films were deposited from a mixture of silane and methane gases, using PECVD. Reducing the ratio of the silane flow rate decreased the deposition rate of the a-SiC:H films, decreasing the refractive index and dielectric constant, but increasing the optical band gap and the hydrophobicity of the surface. It has a minimum refractive index (1.76), dielectric constant (3.6), leakage current density (1.79×10-8 A/cm2 at the electric field of 1MV/cm) and deposition rate (1.32 Å/s) for the concentration of silane, which is 5% in the mixture gas. XPS data indicate that the carbon concentration of the a-SiC:H films declined as the methane flow rate increased, but the silicon concentration increased. Carbon-rich films were treated with hydrogen and ammonia plasma for various periods, but were then converted into films with higher silicon content. Increasing the ammonia or hydrogen plasma treatment duration roughened the surface, even though the original film had a smooth surface, with a roughness of 0.231 nm. Ammonia plasma treated film has larger roughness (1.741 nm) than that of by using hydrogen plasma treated films (0.829 nm). The ammonia ionization species reacted with Si to promote the formation of silicon nitride. Accordingly, the leakage current density of a-SiC:H films declined as the ammonia plasma treatment time decreased, but the dielectric constant slightly increased. As expected, the leakage current density and the dielectric constant of a-SiC:H films declined as the hydrogen plasma treatment period increased.
Chien-JuKuo and 郭蒨如. "Channel Cracking and Interfacial Delamination Analyses for Thin Film and Interconnect Structures Applications." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/78288771768886357278.
Повний текст джерела國立成功大學
機械工程學系碩博士班
98
Microsystem devices are composed of multi-layered thin films with different material properties and structural thickness, and are connected with each other via metallic interconnect structures. However, during fabrication, the therm-mechanical mismatch between materials generates high stresses, which cause the generation of stress-induced voiding, cracks, as well as the possible channel cracks and interface delaminations. These defects strongly affect the reliability of integrated circuit devices. As a result, the reliability of thin films and interconnect structures becomes one major concern of modern microelectronics. The aim of this study is to address the reliability of interconnect structures and thin films through a systematic failure analysis, and to provide effective methods to improve the reliability of IC and MEMS devices. This theses utilizes mechanics of materials, fracture mechanics, and finite element method to analysis channel cracking and interfacial delamination of thin films and interconnect structures, as well as for estimating that the stress and energy release rate within the structures. Parametric studies for investigating the sensitivity of each physical parameter on the stress generation, strain energy release rate, and crack growth are presented. The results show that high stress could generate stress-induced voiding and cracking, and select the low-k materials that lower Young's modulus and coefficient of thermal expansion could avoid cause high stress. Lower processing temperature could improve the reliability of interconnect structures, and a smaller residual stress could avoid interfacial delamination of thin films. Using this systematic failure analysis method, it is possible to provide an efficient method to analysis fracture problems, and the study results should be useful for providing engineers the the conceptual design structure reliability access of thin film and interconnect structures, and to reduce development time.
Chen, Jia-meng, and 陳佳盟. "A study of thin film as protective coating by plasma-sputtering on SOFC interconnect." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/63818972828020640565.
Повний текст джерела國立中央大學
機械工程研究所
95
In this study, the five commercial metallic materials Crofer22, CS ZMG-232, SS-304, SS-430 and Inconel 718 were investigated. The La0.67Sr0.33MnO3( LSMO ) thin film was coated on those materials using pulsed DC magnetron sputtering. The film was amorphous but converted to perovskite structure after annealing. It was used as protection layer on metallic interconnects in SOFC to prevent the growth of oxide and the diffusion of Cr element. SEM and XRD made use of observing the crystal structure of thin film after annealing. Using GID method and XPS inspects the Cr diffusion and Cr-oxide of LSMO in the high-temperature oxidation environment. The result shows the LSMO thin film on Crofer22 and CS ZMG-232 were good for compaction and adhesion. Thus, it could prevent the growth of oxide and the diffusion of Cr element to avoid poison of cathode and decline of conductivity in SOFC in high temperature. Besides, the coated Crofer22 and CS ZMG-232 proceed ASR measurement in 800℃ for 1150hrs to observe the variation of contact resistance. After ASR measurement, the ASR is 12.42 mohm.cm2 and 62.79 mohm.cm2 respectively.
Chen, Ya-Ling, and 陳雅齡. "Microstructure Analysis And Sputtering Thin Film Properties of Al-Sc Alloys Target for FPD Interconnect Application." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/qv6942.
Повний текст джерела國立臺北科技大學
材料及資源工程系所
93
Aluminum alloy are currently being considered as terget materials for large scale LCD to prepare driving circuit layers or interconnection. This type of target material requires to possess some properties such as high conductivity, good adhesion to adjacent layers, resistance to electromigration and hillocks, controllable deposition, as well as low cost etc. Therefore, the goal of this study is to develop a novel type wrought aluminum target, utilized in the TFT-LCD circuit layers or interconnection materials field, that possess some advantageous characteristics such as high purity, whole unity forming, large scale, and recyclable. These characteristics can be achieved by combination of vacuum melting process and subsequently hot working process as well as alloying system design. This study aims to investigate the effect of scandium content or 0.5 wt% rubidium on the microstructure, precipitates composition, phase transformation, and sputtering thin film characterization (i.e., electric properties, thermal properties optical properties, and surface morphology) of the binary Al-Sc alloys and ternary Al-1wt%Sc-0.5wt%Nd alloy sputtered targets, respectively. Experimental results were compared with the results of a commercial Al-Nd alloy target. The experimental data indicate that the transition element scandium is an effective grain refiner and modifier for the Al-Sc alloy targets. The effect of adding minor Sc on the microstructure of the as-cast Al-Sc targets shows that the grain size can be controlled below 50μm and have a uniform size after vacuum melting process. Microstructure analysis and phase characterizations indicates that the Al-Sc alloy targets have an high purity matrix with an fine equiaxed grain structure as well as a fine and high thermal stability precipitates, Al3Sc, is uniformly dispersed in the matrix after casting. The thin film characterization of the Al-Sc alloys is summarized as follows: (i) Al alloy films containing scandium shows an excellent resistance to hillock formation. The effect in suppressing the hillock formation of the Al-Sc alloys system films is superior to the commercial Al-Nd alloy film. (ii) The measurement results of electrical resistivity show that the residual resistivity of the Al-Sc alloys films decreases below a value, 4μΩcm, after annealing treatment at temperature above 300 C, and the value is remarkably low as compared with 10μΩcm, which is the electrical resistivity requirement for large scale TFT-LCD. The electrical resistivity of Al-Sc alloys films increases with increasing scandium element content. Especially, the electrical resistivity substantially increases at scandium content to exceed 1.5wt%. (iii) The optical reflectivity of Al-Sc alloy thin films with the scandium below 1.5wt% is about 83% at visible light band before and after annealing treatment. The experimental evidences shows that the Al-Sc type alloy targets and their sputtering film are very suitable as interconnections of TFT-LCD driving circuits or as high reflectivity metal film of photoelectric devices.
Henderson, Lucas Benjamin. "Deposition and properties of Co- and Ru-based ultra-thin films." 2009. http://hdl.handle.net/2152/7836.
Повний текст джерелаtext
Liu, Chi-Jen, and 劉啟人. "Characteristics of Cu alloy thin films and their applications as the interconnect materials in integrated circuits." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/18575489585537883346.
Повний текст джерела國立成功大學
材料科學及工程學系碩博士班
93
In this study, the characteristics of Cu alloy thin films and their applications as the materials of interconnect in integrated circuits were explored. Thin films of pure Cu and Cu along with Ti, Ta, and Zr with two different concentrations were deposited on SiO2/Si by magnetic co-sputtering. After deposition, all films were subsequently annealed at 500-800 oC in vacuum. The dissociated behaviors of various Cu alloy films on SiO2 was explored by Auger electron spectroscopy (AES), Rutherford backscattering spectrometry (RBS) and X-ray photoelectron spectroscopy (XPS). The microstructural evolution between Cu and Cu alloy films were examined by θ-2θ X-ray diffraction (XRD), glancing incident angle X-ray diffraction (GIAXRD), scanning electron microscopy (SEM) and transmission electron microscopy (TEM). Simultaneously, the resistivity of all films, before and after annealing in vacuum, was calculated from the sheet resistance measured at room-temperature with a four-point probe and the film thickness. The adhesion between various Cu alloy films and SiO2 was determined by the scotch tape test. In addition, after the oxidation test, Cu and Cu alloy films were analyzed by the normalized sheet resistance and GIAXRD. In addition, to understand the leakage current, the current-voltage (I-V) cureves of various MOS capacitors with different metal gates were measured by using picoammeter/dc voltage. The experimental result reveals that Ti, Ta and Zr additives in Cu would diffuse outward to the free surface and the Cu alloy/SiO2 interface, and react with O2 to form an additional oxide layer upon annealing. However, the dissociated behaviors of 700 oC annealed Cu(3.90 at.% Ti), Cu(2.28 at.% Ta) and Cu(2.45 at.% Zr) thin films are different. The Ti and Zr additives in Cu would mainly diffuse outward to the free surface and the Cu alloy/SiO2 interface. On the contrary, the majority of the Ta additives would remain within the Cu layer. In addition, compared to the annealed pure Cu films, all the Cu alloy films showed less diffusion of Cu into SiO2 when annealing at 700 oC. Furthermore, the adhesion between film and SiO2 is better in Cu alloy samples than in pure Cu ones. The current-voltage measurement using metal-oxide-semiconductor (MOS) capacitor structure reveals low leakage current (10-8 A/cm2) for capacitors with as-deposited Cu(0.03 at.% Ti) and pure Cu metal gates. However, after annealing at 700 °C in vacuum, leakage current of MOS capacitors using pure Cu gate exhibits a dramatic increase of leakage current, while leakage current of capacitors with Cu(0.03 at.% Ti) gate remains at ~10-7 A/cm2, indicating that the Cu(0.03 at.% Ti)/SiO2 system possesses a superior reliability to the Cu/SiO2 system. The microstructural result shows that the surface morphology of Cu alloy films is superior to pure Cu films after annealing. The extent of void and grain growth decreases as the additives increases. Among all annealed Cu alloy films, the annealed Cu(2.28 at.% Ta) film shows the lowest degree of void and grain growth, but Cu(3.90 at.% Ti) and Cu(2.45 at.% Zr) films present higher degree of Cu(111) texture. According to the results of the oxidation test, the Cu alloy films pre-annealed at 700 °C reveal a superior oxidation resistance when annealed at 200 °C in air, especially for the pre-annelaed Cu(3.90 at.% Ti) and Cu(2.45 at.% Zr) films. In addition, the room-temperature resistivity of various Cu alloy films is higher than that of pure Cu films, but decreases as the annealing temperature increases. However, the room-temperature resistivity of all annealed Cu alloy films is still larger than that of pure Cu films with the same treatment. The relations between the resistivity variation and segregation of additives/surface morphology are also discussed.
Cheng, Hsin-Chi, and 鄭新基. "On Nano- Indentation of Thin Films for Wafers with Interconnect in Deep Submicron:An Experimental and Theoretical Study." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/93417191612393474869.
Повний текст джерела國立中正大學
機械系
92
The mechanical property at nano-scale is central for the development of nanoscience and technology. Over the years, nanoindentation has evolved into a powerful means of determine the mechanical properties of thin films and surfaces in nanometer regimes. Up to now, most of the applications of nanoindentation have limited the indentation depth in the order of micro meters . Howere, the need for the development of nanoindentation with indentation depth in the order of nano meter is imminent. A case in point is the wafers with interconnect in deep submicron where thin films used is ultra thin. In wafers with interconnect in deep submicron, copper are used for interconnect, tantalum and tantalum nitride are the best isolation materials, chromium is commonly is commonly used in semiconductor industry for photo mask and photo resistor. This study is aimed to using nano indentation technology to measure mechanical property of Cu, Cr, Ta, and TaN thin films with indentation depth in the order of nano meter. Theoretical studies using atomic static approach and non-linear finite element formulation were conducted. Our findings indicate that in nanoindentation measurement, thin film and substrate should be regard as a system. For soft thin film on hard substrate, when indentation depth is within 20% of thin film thickness, the substrate effect is insignificant. Whereas the hard film on soft substrate should be treat as a measurement for a system where substrate effect is always significant. Our results also show profound indentation size effect for thin films with thickness below 100nm. This depth dependence phenomenon is due to the break down of Oliver and Pharr formula derived from continuum mechanics for ultra shallow indentation depth.
吳定曄. "Application of a new seed template on tantalum nitride barrier layers to electroless plating of copper thin films and interconnects." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/65396338576903156200.
Повний текст джерелаChang, Chih-Chieh, and 張智傑. "Plasma-Enhanced Atomic Layer Deposited Thin Films as Diffusion Barriers on Porous Ultralow-k Dielectrics for Cu Interconnect Technology." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/36382520693494328737.
Повний текст джерела國立交通大學
材料科學與工程學系
99
With the dimensional shrinkage of microelectronic devices, atomic layer deposition (ALD) becomes a very attractive method for the deposition of ultrathin films. Beacuse ALD can deposit uniform ultrathin thin films on substrates with high aspect ratio structures, it has been implemented in the Cu interconnect process, whcin requires diffusion barriers of high conformality and precise thickness. In addition, ALD also meets challenging requirements in many other IC processes, such as the deposition of high quality dielectrics to fabricate trench capacitors for DRAM. We use plasma-enhanced ALD (PEALD) to deposit TaNx diffusion barriers on mesoporous SiO2 low-k dielectrics. The self-limiting nature of the surface reactions can produce uniform TaNx films of high thermal stability on the mesoporous SiO2 low-k dielectrics. However, the porous nature of the porous dielectrics leads to a difficulty for the integration of the dielectrics into Cu interconnect technology. Surface pores are penetration pathway of adverse impurities into the porous dielectrics, such as moisture uptake during cleaning and plasma species diffusion during etching. O2 and Ar plasmas were used to modify the surface of the mesoporous dielectric in a high density plasma chemical vapor deposition (HDP-CVD) system, and both of the treatments produced a densified oxide layer a few nanometer thick. The pore sealing treatment could effectively prevent metallic atoms from diffusing into the mesoporous dielectric during the PEALD process and enhance retardation of moisture uptake. Adhesion properties of PEALD diffusion barriers with the Cu interconnect were also studied. The TaNx nitride barrier usually exhibit good diffusion barrier properties, but they often has a poor mechanical strength at the interface with the Cu layer. In the study, we used hydrogen plasma treatment and rapid thermal annealing (RTA) in hydrogen ambient to reduce the nitrogen content in the surface layer of the PEALD-TaNx barrier layer. The surface treatment greatly improved adhesion of the TaNx barrier layer with Cu and the thermal stability of the TaNx/Cu film stack. We also deposited Ru/RuNx bilayer barriers on mesoporous SiO2 dielectrics by an in situ two-step PEALD process for the application of seedless Cu electroplating. Ru is a stable transition metal in air and has low electrical resistivity, but it has worse diffusion barrier properties than RuNx. We sequentially deposited 3.5 nm thick RuNx and 0.5 nm thick metallic Ru on the mesoporous dielectric by PEALD. The metallic Ru capping layer can retard thermal decomposition of the underlying RuNx layer and provides the barrier surface a low electrical resistance for direct Cu electroplating. The Ru/RuNx bilayer exhibits satisfactory thermal stability and electrical characteristics, and is suitable for the seedless Cu electroplating process in nanometer scale interconnect technology.
Shin, Jinhong 1972. "Growth and characterization of CVD Ru and amorphous Ru-P alloy films for liner application in Cu interconnect." Thesis, 2007. http://hdl.handle.net/2152/3684.
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