Дисертації з теми "Thermal transistor"
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Liu, Wei. "Electro-thermal simulations and measurements of silicon carbide power transistors." Doctoral thesis, Stockholm, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-86.
Повний текст джерелаLim, Dan J. "Characterization of thermal dissipation within integrated gate bipolar transistor (IGBT) layered packaging structure." Thesis, University of Hull, 2008. http://hydra.hull.ac.uk/resources/hull:1681.
Повний текст джерелаBaylis, Charles Passant II. "Improved Current-Voltage Methods for RF Transistor Characterization." Scholar Commons, 2004. https://scholarcommons.usf.edu/etd/950.
Повний текст джерелаDhombres, Stéphanie. "Étude d'un protocole de régénération thermique de composants électroniques soumis à un rayonnement ionisant." Thesis, Montpellier, 2015. http://www.theses.fr/2015MONTS228.
Повний текст джерелаNowadays, cameras are more and more used in space missions or nuclear plant for observation (civil or military) and monitoring missions (checking the deployment of solar panels, extravehicular operations, nuclear accident, and area storage). The space environment, nuclear reactors or radioactive waste storage areas are radiative environments that can greatly disturb electronic components and systems. In these environments, ionizing radiation degrades the electrical parameters of electronic components. The total ionizing dose induces significant charge build-up in oxides, degrading the electrical properties of the materials of electronic devices. That can result in the loss of functionality of the entire electronic system.In this thesis, we propose a regeneration method to recover the electrical parameters degraded by total ionizing dose of electronic components subjected to ionizing radiation. In this method isothermal annealing cycles are applied to electronic devices. In a first step, this method is applied on MOS transistors, and a study is conducted on the impact of various key parameters of annealing (bias, annealing temperature, annealing time, dose step between each annealing). In a second step, we focus on components more integrated and newer such as CMOS APS image sensors. We experiment what is the impact of annealing on this type of component and finally, the regeneration method is modified to be suitable on these APS sensors to increase their lifetime
Uesugi, Y., T. Imai, K. Kawada, and S. Takamura. "Fundamental and Third Harmonic Operation of SIT Inverter and its Application to RF Thermal Plasma Generation." IEEE, 2002. http://hdl.handle.net/2237/7175.
Повний текст джерелаNajjari, Hamza. "Power Amplifier Design Based on Electro-Thermal Considerations." Thesis, Bordeaux, 2019. http://www.theses.fr/2019BORD0422.
Повний текст джерелаThe aim of this work is to design a power amplifier based on electrothermal considerations. It describes the Dynamic Error Vector Magnitude challenge and long packet issue when designing a power amplifier with hetero-junction bipolar transistors. Based on the circuit electrothermal behavior, an optimization method of both the static and dynamic linearity is proposed. A complete RF front-end (PA + coupler + switch + LNA) is designed for the latest WLAN standard: the Wi-Fi 6. The dynamic temperature distribution in the circuit is analyzed. It’s impact on the performances is quantified. Finally, a programmable temperature dependent bias is designed to compensate for performance degradation. The measurements show a significant linearity improvement with this compensation, allowing the PA to maintain the DEVM lower than -47dB at 14.5 dBm output power, over a large ambient temperature range from -40°C to 85°C
Dia, Hussein. "Contribution à la modélisation électrothermique : Elaboration d'un modèle électrique thermosensible des composants MOS de puissance." Thesis, Toulouse, INSA, 2011. http://www.theses.fr/2011ISAT0006/document.
Повний текст джерелаStrong demand for robustness has emerged in all areas of application of power components.Only a detailed analysis of phenomena related directly or indirectly to failures can ensure thereliability of the functions of the new power components. However, these phenomena involvethe coupling between electrical effects, thermal and mechanical, making their study verycomplex. The use of multi-physics modeling is well suited when determining. In this thesis,we propose a methodology for electrical modeling taking into account the effects of temperatureon the localized phenomena that initiate failure is often fatal. In preparation for thecoupled electro-thermal simulation involving MOS power transistors, an electric thermosensitivemodel of the MOS and its body diode has been developed. Correspondingly a set ofexperimental studies was implemented to extract the parameters and model validation. Particularattention was paid to the study of interference phenomena that could occur in a localizedresponse to an inhomogeneous distribution of temperature and hot spots. Thus the workingslimits avalanche, with the outbreak of parasitic bipolar transistor (snapback) and its reversalwere modeled. Benches specific validations of the model for harsh switching conditions wereused by taking precautions related to high temperature. Finally, the complete thermal electricmodel developed was used by the company “EPSILON Ingénierie” for electro-thermal simulationof power MOS mode Avalanche Software adapting Epsilon-R3D
Micout, Jessy. "Fabrication et caractérisation de transistor réalisée à basse température pour l'intégration 3D séquentielle." Thesis, Université Grenoble Alpes (ComUE), 2019. http://www.theses.fr/2019GREAT008/document.
Повний текст джерелаThe down scaling of MOSFET device is becoming harder and the development of future generation of MOSFET technology is facing some strong difficulties. To overcome this issue, the vertical stacking of MOSFET in replacement of the conventional planar structure is currently investigated. This technique, called 3D VLSI integration, attracts a lot of attention, in research and in the industry. Indeed, this sequential stacking of transistor enables to gain in density and performance without reducing transistors dimensions.More specifically, 3D sequential integration or CoolCube™ at CEA-Leti enables to fully benefit of the third dimension by sequentially manufacturing transistors. Implementing such an integration provides the new constraint of manufacturing top transistor with low thermal budget (below 500°C) in order to preserve bottom-transistor performances. As most of the thermal budget is due to the dopant activation, several innovative techniques are currently investigated at CEA-LETI.In this work, solid phase epitaxy regrowth will be used as the mechanism to activate dopants below 600°C. The aim of this thesis is thus to manufacture and to characterize transistors with low-temperature dopant activation, in order to reach the same performance as devices manufactured with standard thermal budget. The work is organized around the dopant activation, and in three chapters, according to each considered integration scheme (Extension Last/ Extension First, Gate Last/ Gate First) and architecture (FDSOI, FINFET). These chapters, assisted by relevant simulations, electrical and morphological characterizations, will enable to develop a new and stable 500°C recrystallization process for both N and P FETs, and to propose new integration schemes in order to manufacture transistors with low thermal budget and compatible with the 3D sequential integration
Dia, Hussein. "Contribution à la modélisation électrothermique: Elaboration d'un modèle électrique thermosensible du transistor MOSFET de puissance." Phd thesis, INSA de Toulouse, 2011. http://tel.archives-ouvertes.fr/tel-00624193.
Повний текст джерелаBebiche, Sarah. "OTFTs de type N à base de semiconducteurs π-conjugués : fabrication, performance et stabilité". Thesis, Rennes 1, 2015. http://www.theses.fr/2015REN1S105/document.
Повний текст джерелаThe main goal of this present work consists in the fabrication and optimization of N type organic field effect transistors. Bottom Gate Bottom Contact transistors are performed at low temperature T<120°C. Three different electro-deficient organic molecules are thermally evaporated and used as active layer. OTFTs based on LPP core molecule present low field effect mobility around 10-5cm2/V.s. The optimization study investigated on deposition parameters of this molecule on OTFTs performances does not allow improving this mobility. Moreover gate bias stress measurements reveal important instabilities related to this molecule. Indenfluorene derivatives core (IF) based OTFTs show better performances. Field effect mobility µFE=2.1x10-4 cm2/V is reached using IF(CN2)2 meta in optimized deposition conditions and µFE=1x10-2 cm2/V.s is obtained using IF(CN2)2 para after annealing treatment. The investigated gate bias stress study highlights the good electrical stability of IF(CN2)2 para based OTFTs. Temperature measurements allow us studying the charge transport phenomenon in these indenofluorene derivatives. Fabricated N-type OTFTs are used to perform a first electronic circuit that consists in a logic gate (invertor).Finally this low temperature process led us to achieve OTFTs devices on flexible substrates (PEN)
Amimi, Adel. "Modèle électro-thermique unidimensionnel du transistor bipolaire à grille isolée (IGBT) pour la simulation de circuits de puissance." Rouen, 1997. http://www.theses.fr/1997ROUES033.
Повний текст джерелаSuvar, Erdal. "SiGeC Heterojunction Bipolar Transistors." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3674.
Повний текст джерелаHeterojunction bipolar transistors (HBT) based on SiGeC havebeen investigated. Two high-frequency architectures have beendesigned, fabricated and characterized. Different collectordesigns were applied either by using selective epitaxial growthdoped with phosphorous or by non-selective epitaxial growthdoped with arsenic. Both designs have a non-selectivelydeposited SiGeC base doped with boron and a poly-crystallineemitter doped with phosphorous.
Selective epitaxial growth of the collector layer has beendeveloped by using a reduced pressure chemical vapor deposition(RPCVD) technique. The incorporation of phosphorous and defectformation during selective deposition of these layers has beenstudied. A major problem of phosphorous-doping during selectiveepitaxy is segregation. Different methods, e.g. chemical orthermal oxidation, are shown to efficiently remove thesegregated dopants. Chemical-mechanical polishing (CMP) hasalso been used as an alternative to solve this problem. The CMPstep was successfully integrated in the HBT process flow.
Epitaxial growth of Si1-x-yGexCy layers for base layerapplications in bipolar transistors has been investigated indetail. The optimization of the growth parameters has beenperformed in order to incorporate carbon substitutionally inthe SiGe matrix without increasing the defect density in theepitaxial layers.
The thermal stability of npn SiGe-based heterojunctionstructures has been investigated. The influence of thediffusion of dopants in SiGe or in adjacent layers on thethermal stability of the structure has also been discussed.
SiGeC-based transistors with both non-selectively depositedcollector and selectively grown collector have been fabricatedand electrically characterized. The fabricated transistorsexhibit electrostatic current gain values in the range of 1000-2000. The cut-off frequency and maximum oscillation frequencyvary from 40-80 GHz and 15-30 GHz, respectively, depending onthe lateral design. The leakage current was investigated usinga selectively deposited collector design and possible causesfor leakage has been discussed. Solutions for decreasing thejunction leakage are proposed.
Key words:Silicon-Germanium-Carbon (SiGeC),Heterojunction bipolar transistor (HBT), chemical vapordeposition (CVD), selective epitaxy, non-selective epitaxy,collector design, high-frequency measurement, dopantsegregation, thermal stability.
Bloom, Matthew Anthony. "DC, RF, and Thermal Characterization of High Electric Field Induced Degradation Mechanisms in GaN-on-Si High Electron Mobility Transistors." DigitalCommons@CalPoly, 2013. https://digitalcommons.calpoly.edu/theses/966.
Повний текст джерелаDenorme, Stéphane. "Étude de l'influence des procédés technologiques de type BiCMOS à haute densité d'intégration sur la réalisation de bases fines très dopées dans les transistors bipolaires submicroniques." Université Joseph Fourier (Grenoble ; 1971-2015), 1995. http://www.theses.fr/1995GRE10130.
Повний текст джерелаKhelifi, Wissem. "Développement de polymères semi-conducteurs absorbant dans le proche infra-rouge pour des interfaces sans contact." Thesis, Pau, 2019. http://www.theses.fr/2019PAUU3001.
Повний текст джерелаThis thesis work focuses on the development of conjugated polymeric materials which absorb in the near infrared. It is the result of the TAPIR project funded by the ANR in which we aim to develop human-machine interface (HMI) devices for applications in the health sector, in order to limit the spread of pathogens. Since HMIs are controlled by hand, without contact, thanks to the reflectivity of the skin (spectral range 850-950 nm), it is necessary to develop materials which ansorb in this range. In this project, our role was to synthesize the active part of the infrared photodetector used to retrieve the information. A bibliographical study and preliminary calculations have allowed a judicious selection of different monomers to ensure intrinsic stability and obtain the required absorption properties. Different donor monomers (D) and acceptors (A) were combined to synthesize alternating copolymers of types (D-A). Two families of copolymers which absorb in the near infrared have been synthesized. All copolymers have been synthesized via Stille polycondensation. Their optical, electronic and thermal properties have been studied. Subsequently, after confirming the predominant role of the strength of the accepting monomer, compared to that of the donor, on the absorption properties and electronic levels of the various copolymers obtained, we developed an original approach that has been reported very rarely in the literature. It consists of the production of copolymers of the type (A-A). Thus, we have synthesized six copolymers which absorb in the desired wavelength range, and even beyond. Finally, some copolymers have been characterized as OFET devices and photodetectors
Vu, Van Tuan. "Recherche et évaluation d'une nouvelle architecture de transistor bipolaire à hétérojonction Si/SiGe pour la prochaine génération de technologie BiCMOS." Thesis, Bordeaux, 2016. http://www.theses.fr/2016BORD0304/document.
Повний текст джерелаThe ultimate objective of this thesis is to propose and evaluate a novel SiGe HBT architec-ture overcoming the limitation of the conventional Double-Polysilicon Self-Aligned (DPSA) archi-tecture using Selective Epitaxial Growth (SEG). This architecture is designed to be compatible with the 28-nm Fully Depleted (FD) Silicon On Insulator (SOI) CMOS with a purpose to reach the objec-tive of 400 GHz fT and 600 GHz fMAX performance in this node. In order to achieve this ambitious objective, several studies, including the exploration and comparison of different SiGe HBT architec-tures, 55-nm Si/SiGe BiCMOS TCAD calibration, Si/SiGe BiCMOS thermal budget study, investi-gating a novel architecture and its optimization, have been carried out. Both, the fabrication process and physical device models (incl. band gap narrowing, saturation velocity, high-field mobility, SRH recombination, impact ionization, distributed emitter resistance, self-heating and trap-assisted tunnel-ing, as well as band-to-band tunneling), have been calibrated in the 55-nm Si/SiGe BiCMOS tech-nology. Furthermore, investigations done on process thermal budget reduction show that a 370 GHz fT SiGe HBT can be achieved in 55nm assuming the modification of few process steps and the tuning of the bipolar vertical profile. Finally, the Fully Self-Aligned (FSA) SiGe HBT architecture using Selective Epitaxial Growth (SEG) and featuring an Epitaxial eXtrinsic Base Isolated from the Collector (EXBIC) is chosen as the most promising candidate for the 28-nm FD-SOI BiCMOS genera-tion. The optimization of this architecture results in interesting electrical performances such as 470 GHz fT and 870 GHz fMAX in this technology node
Weisz, Mario. "Electrothermal device-to-circuit interactions for half THz SiGe∶C HBT technologies." Thesis, Bordeaux 1, 2013. http://www.theses.fr/2013BOR14909/document.
Повний текст джерелаThe power generate by modern silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) can produce large thermal gradients across the silicon substrate. The device opering temperature modifies model parameters and can significantly affect circuit operation. This work characterizes and models self-heating and thermal coupling in SiGe HBTs. The self-heating effect is evaluated with low frequency and pulsed measurements. A novel pulse measurement system is presented that allows isothermal DC and RF measurements with 100ns pulses. Electrothermal intra- and inter-device feedback is extensively studied and the impact on the performance of two analog circuits is evaluated. Novel test structures are designed and fabricated to measure thermal coupling between single transistors (inter-device) as well as between the emitter stripes of a multi-finger transistor (intra-device). Thermal coupling factors are extracted from measurements and from 3D thermal simulations. Thermally coupled simulations of a ring oscillator (RO) with 218 transistors and of a 60GHz power amplifier (PA) are carried out. Current mode logic (CML) ROs are designed and measured. Layout optimizations lead to record gate delay of 1.65ps. The thermal performance of a 60GHz power amplifier is compared when realized with a multi-transistor array (MTA) and with a multi-finger trasistor (MFT). Finally, perspectives of this work within a CAD based circuit design environment are discussed
Dutta, Bivas. "Energétique dans les dispositifs à un seul électron basés sur des îlots métalliques et des points quantiques." Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAY055/document.
Повний текст джерелаAt this age of technologically advanced world, the electronic devices are getting more and more densely packed with micro-electronic elements of nano-scale dimension. As a result the heat dissipation produced in these microelectronic-circuits is also increasing immensely, causing a huge amount of energy loss without any use. The textit{thermoelectric effects} come into play here as one can use this wasted heat to produce some useful work with the help of thermoelectric conversion. In order to achieve such a textit{heat engine} with a reasonably high efficiency, one needs to understand its thermal behavior at the basic level. Therefore, the study of thermal transport and thermoelectric effect in nano-structures has significant importance both from scientific and application point of view.In this thesis we present the experimental studies of thermal and thermoelectric transport in different kinds of single-electron devices, where the electronic flow can be controlled at the single electron level.First, we demonstrate the measurement of gate-controlled heat transport in a Single-Electron Transistor ($SET$), acting as a heat switch between two heat reservoirs. The measurement of temperature of the leads of the $SET$ allows us to determine its thermal conductance with the help of a steady state heat-balance among all possible paths of heat flow. The comparison of thermal conductance of the $SET$ with its electrical conductance indicates a strong violation of the Wiedemann-Franz (WF) law away from the charge degeneracy.Second, we extend the study of thermal transport in single-electron devices to the quantum limit, where in addition to the Coulomb interactions the quantum effects are also need to be taken into account, and therefore the individual discrete electronic levels take part in the transport process. We discuss the heat-balance between two heat reservoirs, coupled through a single Quantum-Dot ($QD$) level, and the dissipation of the tunneling electrons on the leads. This produces Coulomb-diamond shapes in the electronic-temperature map of the `source' lead, as a function of bias and gate voltage.Third, we present the measurement of thermoelectric transport in a single $QD$ junction, starting from the weak coupling regime to the strong coupling-Kondo regime. The experiments introduces a new way of measuring thermovoltage realizing a close to perfect open-circuit condition. The thermopower in a weakly coupled $QD$ shows an expected `$e$' periodic behavior with the gate-induced charge, while it shows a distinct `$2e$' periodic feature in the presence of Kondo spin-correlation. The temperature dependence study of the Kondo-correlated thermopower reveals the fact that the Kondo-resonance is not always pinned to the Fermi level of the leads but it can be slightly off, in agreement with the theoretical predictions.This study opens the door for accessing a single $QD$ junction to operate it as a $QD$-heat engine, where the thermodynamic properties of the device are governed by the laws of textit{quantum thermodynamics}
Yachou, Driss. "Etude des effets parasites électriques et thermiques intervenant dans le fonctionnement des transistors sur isolant (SOI)." Grenoble 1, 1994. http://www.theses.fr/1994GRE10035.
Повний текст джерелаMauersberg, Diane. "Rapid thermal processing of polysilicon emitter transistors /." Online version of thesis, 1994. http://hdl.handle.net/1850/11706.
Повний текст джерелаLing, Edmond Tiong Giam. "Rapid thermal processing for ULSI technology." Thesis, Queen's University Belfast, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.356942.
Повний текст джерелаKorndörfer, Falk. "Zum thermischen Widerstand von Silicium-Germanium-Hetero-Bipolartransistoren." Doctoral thesis, Universitätsbibliothek Chemnitz, 2014. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-150269.
Повний текст джерелаThe thermal resistance is an important parameter of silicon-germanium heterojunction bipolar transistors (SiGe HBTs). Until now, the quantitative determination of the thermal resistance showed significant differences between measurements and simulations. The difference between simulation and measurement of the investigated HBTs was more than 30 percent. This thesis devotes the clarification and elimination of potential sources for it. For this purpose, the measurement methods are analyzed at first. It is shown, that the currently used extraction method is sensitive to the Early effect (basewidth modulation). A now extraction method was developed, which is not sensitive to the Early effect. For the first time, the influence of the Seebeck effect (thermoelectric voltages) on the electrically extracted thermal resistance is shown by device simulations. The Seebeck effect leads to a 10 percent lower extracted thermal resistances compared to the expected values of the investigated HBTs. This effect was not taken into account up to now and is demonstrated here for the first time. Furthermore, the dependence of the thermal resistance on the operating point was investigated. The results show that the shape of the heat source is independent of the operating point if the base emitter voltage is smaller than 0.91 volt. The thermal conductivity of silicon is decreased by increasing doping concentrations. This is shown by measurements. The reduction of the thermal conductivity is well observable for doping concentrations higher than 1*1019 cm‑3. For doping concentration higher than 1*1020 cm‑3 the reduction amounts to more than 75 percent. The thermal conductivity was determined as a function of the doping concentration with the aid of a simulator calibration. This function can be used in the future thermal design of HBTs. It facilitates the optimization of the HBTs with respect to a minimal thermal resistance
Wang, Yuchia. "Electrical and thermal analysis of gallium nitride HEMTs." Thesis, Monterey, Calif. : Naval Postgraduate School, 2009. http://edocs.nps.edu/npspubs/scholarly/theses/2009/Jun/09Jun%5FWang.pdf.
Повний текст джерелаThesis Advisor(s): Weatherford, Todd R. "June 2009." Description based on title screen as viewed on July 14, 2009. Author(s) subject terms: gallium nitride, HEMT, high electron mobility transistor, Silvaco, ATLAS, modeling, transient, self-heating, pulse. Includes bibliographical references (p. 73-74). Also available in print.
Bryan, Charlotte. "Etude et développement de capteurs thermiques pour composants de puissance." Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALI079.
Повний текст джерелаSince the start of the century, the demand for power components has risen sharply. Power components are used in integrated circuits for applications requiring high frequencies, of several GHz, and powers up to 100 W, mainly for mobile phones and chargers. Materials such as gallium nitride (GaN) and aluminium gallium nitride (AlGaN) have emerged in this field to create new power devices including power diodes and High Electron Mobility Transistors (HEMT), overcoming the limitations of silicon-based devices. HEMTs deliver high power and overheating can occur if they are not well managed, leading to the degradation of its cabling and packaging. Heat management in power circuits, as in electronic circuits in general, is a major issue. Diodes and sensors made from thermistant materials - materials with large variations in resistance as a function of temperature - are used to measure the HEMTs temperature, however, both of these require external currents to operate and use additional space in the device packaging.Thermoelectric sensors for power devices were therefore developed during this research; these sensors are based on the Seebeck effect, which directly converts heat into electrical energy. The output voltage of these thermoelectric sensors is directly proportional to the temperature difference along the sensor so no external energy is required. These sensors can measure a temperature difference and the heat flow can also be deduced. This work describes the first fabrication of such sensors.Two types of sensors were produced: the first is an on-chip sensor; it is fabricated at the same time as the HEMT transistor. This enables it to be placed as close as possible to the transistor for a more accurate temperature measurement. It is also directly integrated onto the HEMT chip so it does not take up additional space in the packaging, which implies that it must follow the same dimensioning and fabrication rules as the transistor. This sensor uses the 2D Electron Gas (2DEG) at the AlGaN and GaN’s interface for electrical transport.The second type of sensor is a stand-alone thermoelectric sensor designed to deliver higher electrical performance. It is fabricated independently, so has fewer constraints than the on-board sensors. Two stand-alone sensors were developed: one using the 2DEG and the other using an n-doped GaN. Their geometry was dimensioned using results from a study carried out beforehand on the contact resistances and on the thermoelectric properties of the two materials.Both types of sensors were tested and verified to be functional. Several geometries were fabricated for each type, and their sensitivities compared. The on-chip sensor was characterised while activating the adjacent transistor, which represents its intended function. The stand-alone sensors were characterised using metallic heat lines to their side. The measurements were taken at a number of different surrounding temperatures in each case. High sensitivities were obtained with these sensors: 350 mV / K for the on-board sensor and 14 V / K for the stand-alone sensor
Donmezer, Fatma. "Multiscale electro-thermal modeling of AlGaN/GaN heterostructure field effect transistors." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/53139.
Повний текст джерелаKraśniewski, Jarosław. "Measurements of transient thermal characteristics of microwave transistors : PhD thesis summary." Rozprawa doktorska, [s.n.], 2009. http://dlibra.tu.koszalin.pl/Content/1196.
Повний текст джерелаKim, Samuel H. "Addressing thermal and environmental reliability in GaN based high electron mobility transistors." Thesis, Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/52244.
Повний текст джерелаMackay, Gary F. (Gary Francis) Carleton University Dissertation Engineering Electrical. "Emitter resistance and current gain in rapid thermal annealed polysilicon emitter transistors." Ottawa, 1991.
Знайти повний текст джерелаGregory, Hayden J. "Low thermal budget issues for Si/Siâ†1â†-â†xGeâ†x heterojunction bipolar transistors and selective epitaxial Si bipolar transistors." Thesis, University of Southampton, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.361660.
Повний текст джерелаGarchery, Laurent. "Fabrication et étude des propriétés physiques des nanostructures Si/SiGe : application aux nouveaux dispositifs." Université Joseph Fourier (Grenoble), 1996. http://www.theses.fr/1996GRE10232.
Повний текст джерелаOberdorf, Michael Craig. "Power losses and thermal modeling of a voltage source inverter." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2006. http://library.nps.navy.mil/uhtbin/hyperion/06Mar%5FOberdorf.pdf.
Повний текст джерелаThesis Advisor(s): Alexander Julian. "March 2006." Includes bibliographical references (p. 103-104). Also available online.
Christensen, Adam Paul. "Thermal Transport in III-V Semiconductors and Devices." Thesis, Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14088.
Повний текст джерелаSchiz, Frank Jochen Wilhelm. "The effect of fluorine in low thermal budget polysilicon emitters for SiGe heterojunction bipolar transistors." Thesis, University of Southampton, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.287345.
Повний текст джерелаKorndörfer, Falk. "Zum thermischen Widerstand von Silicium-Germanium-Hetero-Bipolartransistoren." Doctoral thesis, Universitätsverlag der Technischen Universität Chemnitz, 2013. https://monarch.qucosa.de/id/qucosa%3A20097.
Повний текст джерелаThe thermal resistance is an important parameter of silicon-germanium heterojunction bipolar transistors (SiGe HBTs). Until now, the quantitative determination of the thermal resistance showed significant differences between measurements and simulations. The difference between simulation and measurement of the investigated HBTs was more than 30 percent. This thesis devotes the clarification and elimination of potential sources for it. For this purpose, the measurement methods are analyzed at first. It is shown, that the currently used extraction method is sensitive to the Early effect (basewidth modulation). A now extraction method was developed, which is not sensitive to the Early effect. For the first time, the influence of the Seebeck effect (thermoelectric voltages) on the electrically extracted thermal resistance is shown by device simulations. The Seebeck effect leads to a 10 percent lower extracted thermal resistances compared to the expected values of the investigated HBTs. This effect was not taken into account up to now and is demonstrated here for the first time. Furthermore, the dependence of the thermal resistance on the operating point was investigated. The results show that the shape of the heat source is independent of the operating point if the base emitter voltage is smaller than 0.91 volt. The thermal conductivity of silicon is decreased by increasing doping concentrations. This is shown by measurements. The reduction of the thermal conductivity is well observable for doping concentrations higher than 1*1019 cm‑3. For doping concentration higher than 1*1020 cm‑3 the reduction amounts to more than 75 percent. The thermal conductivity was determined as a function of the doping concentration with the aid of a simulator calibration. This function can be used in the future thermal design of HBTs. It facilitates the optimization of the HBTs with respect to a minimal thermal resistance.
Christensen, Adam Paul. "Multiscale modeling of thermal transport in gallium nitride microelectronics." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31681.
Повний текст джерелаCommittee Chair: Samuel Graham; Committee Member: Donald Dorsey; Committee Member: Douglas Yoder; Committee Member: Michael Leamy; Committee Member: Sankar Nair; Committee Member: Zhuomin Zhang. Part of the SMARTech Electronic Thesis and Dissertation Collection.
Pang, Jinbo. "Thermal deposition approaches for graphene growth over various substrates." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-220794.
Повний текст джерелаIm Zuge dieser Doktorarbeit wurden großflächige und homogene Graphen-Monolagen mittels chemischer Gasphasenabscheidung auf Kupfer- (Cu) und Silizium-(Si) Substraten erfolgreich synthetisiert. Solche monolagigen Graphenschichten wurden mithilfe mikroskopischer und spektrometrischer Methoden gründlich charakterisiert. Außerdem wurde der Wachstumsmechanismus von Graphen anhand eines chemo-thermischen Verfahrens untersucht. Die Bildung von homogenen Graphenschichten auf Cu erfordert eine sehr saubere Substratoberfläche, weshalb verschiedene Substratvorbehandlungen und dessen Einfluss auf die Substratoberfläche angestellt wurden. Vier Vorbehandlungsarten von Cu-Substraten wurden untersucht: Abwischen mit organischen Lösungsmitteln, Atzen mit Eisen-(III)-Chloridlösung, Wärmebehandlung an Luft zur Erzeugung von Cu-Oxiden und Wärmebehandlung an Luft mit anschließender Wasserstoffreduktion. Von diesen Vorbehandlungen ist die zuletzt genannte Methode für die anschließende Abscheidung einer großflächigen Graphen-Mono-lage am effektivsten. Die chemische Gasphasenabscheidung ist die am meisten verwendete Methode zur Massenproduktion von Graphen. Es besteht aber auch Interesse an alternativen Methoden, die Graphen direkt aus organischen, auf einem Substrat adsorbierten Molekülen, synthetisieren konnen. Jedoch gibt es derzeit nur wenige Studien zu derartigen alternativen Methoden. Solche Prozessrouten erfordern mehrstufige Reaktionen, welche wiederrum die Qualität der erzeugten Graphenschicht limitieren, da nur kleine Korngrößen erreicht werden konnen. Daher wurde in dieser Arbeit ein deutlich einfacherer Weg entwickelt. Es handelt sich dabei um ein Verfahren, bei dem auf einer Cu-Substratoberfläche adsorbierte, organische Lösungsmittelmoleküle in einer Wasserstoffatmosphäre geglüht werden, um eine direkte Bildung von Graphen auf einem sauberen Cu-Substrat zu gewahrleisten.Der Einfluss von Temperatur, Druck und Gasfluss auf diesen einstufigen chemothermischen Syntheseweg wurde systematisch untersucht. Die temperaturabhängigen Untersuchungen liefern einen Einblick in die Wachstumskinetik und thermodynamische Größen, wie zum Beispiel die Aktivierungsenergie Ea, für die Synthese von Graphen aus Aceton, Isopropanol oder Ethanol. Diese Studien untersuchen außerdem die Rolle von Wasserstoffradikalen auf die Graphensynthese. Weiterhin wurde ein verbessertes Verständnis der Rolle von Wasserstoff auf die Graphen-synthese aus adsorbierten, organischen Lösungsmitteln erlangt (beispielsweise im Vergleich zur konventionellen thermischen Gasphasenabscheidung). Die direkte Graphensynthese mittels chemischer Gasphasenabscheidung auf Si-Substraten mit einer Oxidschicht (Si/SiOx ) ist extrem anspruchsvoll in Bezug auf die großflächige und einheitliche Abscheidung (Lagenanzahl) von Graphen-Monolagen. Das direkte Wachstum von Graphen auf Si/SiOx -Substrat ist interessant, da es frei von unerwünschten Übertragungsverfahren ist und kein Metall-substrat erfordert, welche die erzeugten Graphenschichten brechen lassen können. Um ein homogenes Graphenwachstum zu erzielen wurde durch den Kontakt zweier Si-Wafer, mit ihren Oxidflachen zueinander zeigend, eine lokale Umgebung im chemischen Gleichgewicht erzeugt. Diese Konfiguration der Si-Wafer ist nötig, um eine einheitliche Graphen-Monolage bilden zu können. Eine gründliche Untersuchung des abgeschiedenen Materials zeigt, dass trotz der anfänglichen Keimbildung von runden Inseln facettierte Körner erzeugt werden. Aufgrund der Bestrebung der Graphenkörner ihre (Oberflächen-) Energie zu minimieren, wird eine Facettierung der Körner in polygonaler Form erzeugt, was darin begründet liegt, dass das System idealerweise eine Anordnung von hexagonal geformten Körnern erzeugen würde (niedrigster Energiezustand). Der Prozess ist vergleichbar mit der sechseckigen Zellstruktur einer Bienenstockwabe, welche ein Minimum an Wachs erfordert. Dieser Prozess führt auch zu einer nahezu minimalen Gesamtkorn-grenzlänge pro Flächeneinheit. Diese Tatsache zusammen mit der hohen Qualität der resultierenden Graphenschicht spiegelt sich auch in dessen elektrischer Leistungsfähigkeit wider, die in hohem Maße mit der auf anderen Substraten gebildeten Graphenschichten (inklusive Cu-Substrate) vergleichbar ist. Darüber hinaus ist das Graphenwachstum selbstabschliessend, wodurch ein großes Parameterfenster für eine einfache und kontrollierte Synthese eröffnet wird. Dieser Ansatz zur chemischen Gasphasenabscheidung von Graphen auf Si- Substraten ist leicht skalierbar und gegenüber der Abscheidung auf Metallsubstraten konkurrenzfähig, da keine Substratübertragung notig ist. Darüber hinaus ist dieser Prozess auch für die direkte Synthese anderer zweidimensionalen Materialien und deren Van-der-Waals-Heterostrukturen anwendbar
James, William Thomas. "Electro-thermal-mechanical modeling of GaN HFETs and MOSHFETs." Thesis, Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/41212.
Повний текст джерелаSasikumar, Anup. "Quantitative spectroscopy of reliability limiting traps in operational gallium nitride based transistors using thermal and optical methods." The Ohio State University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=osu1415298691.
Повний текст джерелаBrocero, Guillaume. "Comparaison de méthodes de caractérisation thermique de transistors de puissance hyperfréquence de la filière nitrure de gallium." Thesis, Normandie, 2018. http://www.theses.fr/2018NORMC222/document.
Повний текст джерелаAt the moment, AlGaN/GaN HEMTs (High Electron Mobility Transistors) are the most promising for high-power hyperfrequency applications, essentially due to their large carrier density and a high electronic mobility. However, the temperature generating during operational conditions is a crucial parameter to measure, in order to estimate the reliability and durability of components. For these reasons, we compared thermoreflectance and Raman spectroscopy, that are non-destructive and possessing a submicronic spatial resolution. These techniques have already proven their feasibility as thermal characterization methods in both continuous wave and pulsed operational modes. We compare here their adaptability and performance to the conception of a thermal test bench. These methods are known for characterizing specific types of material: metals for thermoreflectance and semiconductors for Raman spectroscopy, leading us to the eventuality to combine them. We compared several results measured by thermoreflectance method with equipment from two different manufacturers that commercialize this technology, so we could highlight some aspects and drawbacks that are note relayed in the literature. With Raman spectroscopy, we identified metrology parameters allowing to realize a thermal measurement setup as reproducible as possible, and we also present an innovative method to probe surface material, especially metals
Stevens, Lorin E. "Thermo-Piezo-Electro-Mechanical Simulation of AlGaN (Aluminum Gallium Nitride) / GaN (Gallium Nitride) High Electron Mobility Transistor." DigitalCommons@USU, 2013. http://digitalcommons.usu.edu/etd/1506.
Повний текст джерела馬志堅 and Zhi-jian Ma. "Hot-carrier-induced instabilities in n-mosfet's with thermally nitrided oxide as gate dielectric." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1992. http://hub.hku.hk/bib/B31232735.
Повний текст джерелаMa, Zhi-jian. "Hot-carrier-induced instabilities in n-mosfet's with thermally nitrided oxide as gate dielectric /." [Hong Kong : University of Hong Kong], 1992. http://sunzi.lib.hku.hk/hkuto/record.jsp?B13209723.
Повний текст джерелаDai, Wenhua. "Large signal electro-thermal LDMOSFET modeling and the thermal memory effects in RF power amplifiers." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1078935135.
Повний текст джерелаTitle from first page of PDF file. Document formatted into pages; contains xix, 156 p.; also includes graphics (some col.). Includes bibliographical references (p. 152-156).
Lin, Chung-Han. "The Effects of Thermal, Strain, and Neutron Irradiation on Defect Formation in AlGaN/GaN High Electron Mobility Transistors and GaN Schottky Diodes." The Ohio State University, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=osu1371466261.
Повний текст джерелаLiu, Zhihong. "A study of thermally nitrided silicon dioxide thin films for metal-oxide-silicon VLSI techology /." [Hong Kong : University of Hong Kong], 1990. http://sunzi.lib.hku.hk/hkuto/record.jsp?B12718488.
Повний текст джерелаJones, Jason Patrick. "Electro-thermo-mechanical characterization of stress development in AlGaN/GaN HEMTs under RF operating conditions." Thesis, Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53528.
Повний текст джерелаAndrews, Joel. "Design of SiGe HBT power amplifiers for microwave radar applications." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/28116.
Повний текст джерелаCommittee Member: John Cressler; Committee Member: John Papapolymerou; Committee Member: Joy Laskar; Committee Member: Thomas Morley; Committee Member: William Hunt.
Irugulapati, Harista. "Fused Arenes-Based Molecular and Polymeric Materials for Organic Field Effect Transistors." TopSCHOLAR®, 2013. http://digitalcommons.wku.edu/theses/1255.
Повний текст джерелаKim, Daewoo. "Thermal characterization of dielectrically isolated bipolar junction transistor." 2008. http://hdl.handle.net/10106/1839.
Повний текст джерелаHUNG, CHIH-CHIA, and 洪志嘉. "Thermal Model of GaN Radio-Frequency Power Transistor." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/s8kmbf.
Повний текст джерела國立中正大學
電機工程研究所
106
This thesis discusses the transistor parameter extraction process which includes the extractions of parasitic resistance, parasitic inductance, the bias-dependences of current source parameters and capacitances. In order to include the packaged effects, the equivalent capacitances of bonding pads and the corresponding inductances of bonding wires are taken into considerations. A thermal simulation software is used to analyze the temperature variation caused by the operation of the transistor with different size of heatsink. The estimated thermal resistance between transistor and heat sink is 2.5 oC/W. In the target frequency band from 0.5 GHz to 6 GHz, the small-signal S-parameter verification over chip model shows that the magnitude error value is about 10% and the phase error is about 2 degrees. Whereas the gain error of large-signal load-pull analysis is 1 dB and the difference of calculated power-added-efficiency is within 5%. For the packaged device, the S-parameter magnitude difference between Cree model and CCU results is 1dB which is larger than the results for chip. For the large signal load-pull analysis, the gain difference is less than 1 dB and that of efficiency is less than 10%. Finally, the model effectiveness is verified by a Doherty power amplifier of the gain error between the simulation and measurement is about 2dB, and the PAE error is about 20%, which is better than the results by Cree model.