Статті в журналах з теми "TCAD TOOL"
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Lee, YongJae. "Simulations of Proposed Shallow Trench Isolation using TCAD Tool." Journal of the Korea Society for Simulation 22, no. 4 (December 31, 2013): 93–98. http://dx.doi.org/10.9709/jkss.2013.22.4.093.
Повний текст джерелаLandowski, Matthew M., and Z. John Shen. "TCAD Based Power Semiconductor Device e-Learning Tool." Journal of Power Electronics 10, no. 6 (November 20, 2010): 643–46. http://dx.doi.org/10.6113/jpe.2010.10.6.643.
Повний текст джерелаSakai, Atsushi, Katsumi Eikyu, Kenichi Hisada, Yasuhiro Yamashita, Koichi Arai, Hiroyuki Arie, Yutaka Akiyama, and Tomohiro Yamashita. "Inverse Modeling of 4H-SiC Trench Gate MOSFETs Validated with Electrical and Physical Characterization." Materials Science Forum 963 (July 2019): 609–12. http://dx.doi.org/10.4028/www.scientific.net/msf.963.609.
Повний текст джерелаRuey-Sing Wei and A. Sangiovanni-Vincentelli. "PLATYPUS: A PLA Test Pattern Generation Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 5, no. 4 (October 1986): 633–44. http://dx.doi.org/10.1109/tcad.1986.1270233.
Повний текст джерелаHongmei Li, C. E. Zemke, G. Manetas, V. I. Okhmatovski, E. Rosenbaum, and A. C. Cangellaris. "An automated and efficient substrate noise analysis tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25, no. 3 (March 2006): 454–68. http://dx.doi.org/10.1109/tcad.2005.854628.
Повний текст джерелаRiente, Fabrizio, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, and Mariagrazia Graziano. "ToPoliNano: A CAD Tool for Nano Magnetic Logic." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 36, no. 7 (July 2017): 1061–74. http://dx.doi.org/10.1109/tcad.2017.2650983.
Повний текст джерелаOikonomakos, P., and M. Zwolinski. "An Integrated High-Level On-Line Test Synthesis Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25, no. 11 (November 2006): 2479–91. http://dx.doi.org/10.1109/tcad.2006.882120.
Повний текст джерелаTulunay, GÜlin, and Sina Balkir. "A Synthesis Tool for CMOS RF Low-Noise Amplifiers." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27, no. 5 (May 2008): 977–82. http://dx.doi.org/10.1109/tcad.2008.917579.
Повний текст джерелаAbderehman, Mohammed, Rupak Gupta, Rakesh Reddy Theegala, and Chandan Karfa. "BLAST: Belling the Black-Hat High-Level Synthesis Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41, no. 11 (November 2022): 3661–72. http://dx.doi.org/10.1109/tcad.2022.3200513.
Повний текст джерелаKuznetsov, Maksim, Sergey Kalinin, Alexey Cherkaev, and Dmitriy Ostertak. "Investigating physical model interface in the TCAD Sentaurus environment." Transaction of Scientific Papers of the Novosibirsk State Technical University, no. 3 (November 18, 2020): 39–48. http://dx.doi.org/10.17212/2307-6879-2020-3-39-48.
Повний текст джерелаIbrahim, Walid, Valeriu Beiu, and Azam Beg. "GREDA: A Fast and More Accurate Gate Reliability EDA Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31, no. 4 (April 2012): 509–21. http://dx.doi.org/10.1109/tcad.2011.2176123.
Повний текст джерелаKagaris, Dimitri. "MOTO-X: A Multiple-Output Transistor-Level Synthesis CAD Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35, no. 1 (January 2016): 114–27. http://dx.doi.org/10.1109/tcad.2015.2448675.
Повний текст джерелаPantho, Jubaer Hossain, and Christophe Bobda. "MeXT-SE: A Design Tool to Transparently Generate Secure MPSoC." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 11 (November 2020): 3799–808. http://dx.doi.org/10.1109/tcad.2020.3012651.
Повний текст джерелаTao, Nick G. M., Bo-Rong Lin, Chien-Ping Lee, Tim Henderson, and Barry J. F. Lin. "Study on mechanisms of InGaP/GaAs HBT safe operating area using TCAD simulation." International Journal of Microwave and Wireless Technologies 7, no. 3-4 (April 10, 2015): 279–85. http://dx.doi.org/10.1017/s1759078715000495.
Повний текст джерелаShih, Hsiu-Chuan, Pei-Wen Luo, Jen-Chieh Yeh, Shu-Yen Lin, Ding-Ming Kwai, Shih-Lien Lu, Andre Schaefer, and Cheng-Wen Wu. "DArT: A Component-Based DRAM Area, Power, and Timing Modeling Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, no. 9 (September 2014): 1356–69. http://dx.doi.org/10.1109/tcad.2014.2323203.
Повний текст джерелаSZCZESNY, ROMUALD, and MIECZYSLAW RONKOWSKI. "MODELING AND SIMULATION OF CONVERTER SYSTEMS PART II: SIMULATION PACKAGE TCAD." Journal of Circuits, Systems and Computers 05, no. 04 (December 1995): 669–97. http://dx.doi.org/10.1142/s0218126695000400.
Повний текст джерелаLouris, E., D. Stefanakis, G. Priniotakis, L. Van Langenhove, and D. Tassis. "Optimization of cylindrical textile organic field effect transistors using TCAD simulation tool." IOP Conference Series: Materials Science and Engineering 254 (October 2017): 162006. http://dx.doi.org/10.1088/1757-899x/254/16/162006.
Повний текст джерелаMamidipaka, M., K. Khouri, N. Dutt, and M. Abadir. "IDAP: A Tool for High-Level Power Estimation of Custom Array Structures." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 9 (September 2004): 1361–69. http://dx.doi.org/10.1109/tcad.2004.833609.
Повний текст джерелаTseng, Tsun-Ming, Mengchu Li, Daniel Nestor Freitas, Travis McAuley, Bing Li, Tsung-Yi Ho, Ismail Emre Araci, and Ulf Schlichtmann. "Columba 2.0: A Co-Layout Synthesis Tool for Continuous-Flow Microfluidic Biochips." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37, no. 8 (August 2018): 1588–601. http://dx.doi.org/10.1109/tcad.2017.2760628.
Повний текст джерелаMohanachandran Nair, Sarath, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Fazal Hameed, and Mehdi B. Tahoori. "VAET-STT: Variation Aware STT-MRAM Analysis and Design Space Exploration Tool." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37, no. 7 (July 2018): 1396–407. http://dx.doi.org/10.1109/tcad.2017.2760861.
Повний текст джерелаRouying Zhan, Haigang Feng, Qiong Wu, Haolu Xie, Xiaokang Guan, Guang Chen, and A. Z. H. Wang. "Esdextractor: a new technology-independent cad tool for arbitrary esd protection device extraction." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22, no. 10 (October 2003): 1362–70. http://dx.doi.org/10.1109/tcad.2003.818140.
Повний текст джерелаMichez, A., S. Dhombres, and J. Boch. "ECORCE: A TCAD Tool for Total Ionizing Dose and Single Event Effect Modeling." IEEE Transactions on Nuclear Science 62, no. 4 (August 2015): 1516–27. http://dx.doi.org/10.1109/tns.2015.2449281.
Повний текст джерелаBiagetti, G., S. Orcioni, C. Turchetti, P. Crippa, and M. Alessandrini. "SiSMA—A Tool for Efficient Analysis of Analog CMOS Integrated Circuits Affected by Device Mismatch." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 2 (February 2004): 192–207. http://dx.doi.org/10.1109/tcad.2003.822131.
Повний текст джерелаHazra, Aritra, Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Kevin M. Harer, Ansuman Banerjee, and Subhankar Mukherjee. "POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32, no. 11 (November 2013): 1801–13. http://dx.doi.org/10.1109/tcad.2013.2267454.
Повний текст джерелаAkopyan, Filipp, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John Arthur, Paul Merolla, Nabil Imam, et al. "TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 34, no. 10 (October 2015): 1537–57. http://dx.doi.org/10.1109/tcad.2015.2474396.
Повний текст джерелаViale, Benjamin, and Bruno Allard. "Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits—Part II." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 10 (October 2020): 3107–17. http://dx.doi.org/10.1109/tcad.2019.2962119.
Повний текст джерелаViale, Benjamin, and Bruno Allard. "Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part I." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 10 (October 2020): 3067–80. http://dx.doi.org/10.1109/tcad.2019.2962120.
Повний текст джерелаSeiculescu, Ciprian, Srinivasan Murali, Luca Benini, and Giovanni De Micheli. "SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 29, no. 12 (December 2010): 1987–2000. http://dx.doi.org/10.1109/tcad.2010.2061610.
Повний текст джерелаUsha, C., and Palanichamy Vimala. "Analytical Drain Current Model for Fully Depleted Surrounding Gate TFET." Journal of Nano Research 55 (November 2018): 75–81. http://dx.doi.org/10.4028/www.scientific.net/jnanor.55.75.
Повний текст джерелаZhan, R., H. Feng, Q. Wu, H. Xie, X. Guan, G. Chen, and A. Z. H. Wang. "ESDInspector: A New Layout-Level ESD Protection Circuitry Design Verification Tool Using a Smart-Parametric Checking Mechanism." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 10 (October 2004): 1421–28. http://dx.doi.org/10.1109/tcad.2004.833613.
Повний текст джерелаDuan, B. h., C. Xiong, L. Zhong, C. Zeng, and J. h. Xiong. "Simulation of 14 MeV neutron-induced SEU in SRAM." Journal of Instrumentation 18, no. 02 (February 1, 2023): T02003. http://dx.doi.org/10.1088/1748-0221/18/02/t02003.
Повний текст джерелаLiu, Manwen, Wenzheng Cheng, Zheng Li, Zhenyang Zhao, and Zhihua Li. "3D Simulation, Electrical Characteristics and Customized Manufacturing Method for a Hemispherical Electrode Detector." Sensors 22, no. 18 (September 9, 2022): 6835. http://dx.doi.org/10.3390/s22186835.
Повний текст джерелаChen, Jing, Yufeng Guo, Jun Zhang, Jianhua Liu, Qing Yao, Jiafei Yao, Maolin Zhang, and Man Li. "Off-State Performance Characterization of an AlGaN/GaN Device via Artificial Neural Networks." Micromachines 13, no. 5 (May 5, 2022): 737. http://dx.doi.org/10.3390/mi13050737.
Повний текст джерелаDargar, Shashi Kant, J. K. Srivastava, Santosh Bharti, and Abha Nyati. "Performance Evaluation of GaN based Thin Film Transistor using TCAD Simulation." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 1 (February 1, 2017): 144. http://dx.doi.org/10.11591/ijece.v7i1.pp144-151.
Повний текст джерелаSirakoulis, G. Ch, I. Karafyllidis, and A. Thanailakis. "A TCAD tool for the simulation of the CVD process based on cellular automata." Le Journal de Physique IV 11, PR3 (August 2001): Pr3–205—Pr3–212. http://dx.doi.org/10.1051/jp4:2001326.
Повний текст джерелаKUMARI, RITI, MANISH GOSWAMI, and B. R. SINGH. "THE IMPACT OF CHANNEL ENGINEERING ON SHORT CHANNEL BEHAVIOR OF NANO FIN-FETs." International Journal of Nanoscience 11, no. 02 (April 2012): 1250021. http://dx.doi.org/10.1142/s0219581x12500214.
Повний текст джерелаKim, Ki Yeong, Joo Seok Noh, Tae Young Yoon, and Jang Hyun Kim. "Improvement in Turn-Off Loss of the Super Junction IGBT with Separated n-Buffer Layers." Micromachines 12, no. 11 (November 19, 2021): 1422. http://dx.doi.org/10.3390/mi12111422.
Повний текст джерелаSharma, Sanjeev Kumar, Jeetendra Singh, Balwinder Raj, and Mamta Khosla. "Analysis of Barrier Layer Thickness on Performance of In1–xGaxAs Based Gate Stack Cylindrical Gate Nanowire MOSFET." Journal of Nanoelectronics and Optoelectronics 13, no. 10 (October 1, 2018): 1473–77. http://dx.doi.org/10.1166/jno.2018.2374.
Повний текст джерелаJiang, Yi Fan, B. Jayant Baliga, and Alex Q. Huang. "Influence of Lateral Straggling of Implated Aluminum Ions on High Voltage 4H-SiC Device Edge Termination Design." Materials Science Forum 924 (June 2018): 361–64. http://dx.doi.org/10.4028/www.scientific.net/msf.924.361.
Повний текст джерелаOthman, Nurul Aida Farhana, Sharidya Rahman, Sharifah Fatmadiana Wan Muhamad Hatta, Norhayati Soin, Brahim Benbakhti, and Steven Duffy. "Design optimization of the graded AlGaN/GaN HEMT device performance based on material and physical dimensions." Microelectronics International 36, no. 2 (April 1, 2019): 73–82. http://dx.doi.org/10.1108/mi-09-2018-0057.
Повний текст джерелаJayachandran, Remya, Dhanaraj Jagalchandran, and Perinkolam Chidambaram Subramaniam. "Planar CMOS and multigate transistors based wide-band OTA buffer amplifiers for heavy resistance load." Facta universitatis - series: Electronics and Energetics 35, no. 1 (2022): 13–28. http://dx.doi.org/10.2298/fuee2201013j.
Повний текст джерелаVimala, Palanichamy, and N. R. Nithin Kumar. "Comparative Analysis of Various Parameters of Tri-Gate MOSFET with High-K Spacer." Journal of Nano Research 56 (February 2019): 119–30. http://dx.doi.org/10.4028/www.scientific.net/jnanor.56.119.
Повний текст джерелаMasalsky, Nikolae V. "Simulation of the characteristics of low-voltage gates on combined cylindrical surrounding gate field-effect nanotransistors." Radioelectronics. Nanosystems. Information Technologies. 13, no. 4 (December 29, 2021): 449–56. http://dx.doi.org/10.17725/rensit.2021.13.449.
Повний текст джерелаElpelt, Rudolf, Bernd Zippelius, Stefan Doering, and Uwe Winkler. "Employing Scanning Spreading Resistance Microscopy (SSRM) for Improving TCAD Simulation Accuracy of Silicon Carbide." Materials Science Forum 897 (May 2017): 295–98. http://dx.doi.org/10.4028/www.scientific.net/msf.897.295.
Повний текст джерелаMorozzi, A., M. Hoffmann, R. Mulargia, S. Slesazeck, and E. Robutti. "Negative capacitance devices: sensitivity analyses of the developed TCAD ferroelectric model for HZO." Journal of Instrumentation 17, no. 01 (January 1, 2022): C01048. http://dx.doi.org/10.1088/1748-0221/17/01/c01048.
Повний текст джерелаZhou, Kai, Songming Miao, Xuanze Zhou, Guangwei Xu, Lingfei Wang та Shibing Long. "A core drain current model for β-Ga2O3 power MOSFETs based on surface potential". AIP Advances 13, № 1 (1 січня 2023): 015202. http://dx.doi.org/10.1063/5.0134215.
Повний текст джерелаItalia, Markus, Ioannis Deretzis, Alfio Nastasi, Silvia Scalese, Antonino La Magna, Massimo Pirnaci, Daniele Pagano, Dario Tenaglia, and Patrizia Vasquez. "Multiscale Simulations of Plasma Etching in Silicon Carbide Structures." Materials Science Forum 1062 (May 31, 2022): 214–18. http://dx.doi.org/10.4028/p-n9v122.
Повний текст джерелаSubash, T. D., T. Gnanasekaran, J. Jagannathan, and C. Divya. "Relative Analysis of GaAs, InSb, InP Using QWFET." Advanced Materials Research 984-985 (July 2014): 1080–84. http://dx.doi.org/10.4028/www.scientific.net/amr.984-985.1080.
Повний текст джерелаYang, Shao-Ming, Gene Sheu, Tzu Chieh Lee, Ting Yao Chien, Chieh Chih Wu, and Yun Jung Lin. "Design of a Low on Resistance High Voltage (120V) Novel 3D NLDMOS with Side Isolation Based on 0.35um BCD Process Technology." MATEC Web of Conferences 201 (2018): 02004. http://dx.doi.org/10.1051/matecconf/201820102004.
Повний текст джерелаTang, Zhao Huan, Bin Wang, Jia Nan Wang, and Kai Zhou Tan. "Use N+ Buried Layer to Design a Low On-Resistance VDMOS." Advanced Materials Research 756-759 (September 2013): 4267–70. http://dx.doi.org/10.4028/www.scientific.net/amr.756-759.4267.
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