Статті в журналах з теми "STT-MTJ"
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Jangra, Payal, and Manoj Duhan. "Design and analysis of Voltage-Gated Spin-Orbit Torque (VgSOT) Magnetic Tunnel Junction based Non-Volatile Flip Flop design for Low Energy Applications." Journal of Integrated Circuits and Systems 19, no. 1 (March 15, 2024): 1–12. http://dx.doi.org/10.29292/jics.v19i1.743.
Повний текст джерелаBu, Kai, Hai Jun Liu, Hui Xu, and Zhao Lin Sun. "Large Capacity Cache Design Based on Emerging Non-Volatile Memory." Applied Mechanics and Materials 513-517 (February 2014): 918–21. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.918.
Повний текст джерелаRao, Dr G. Anantha, and Gopi Kommuju. "A NOVEL LOW POWER ALU DESIGNED BY USING HYBRID STT-MTJ/CMOS CIRCUIT." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 07, no. 12 (December 21, 2023): 1–13. http://dx.doi.org/10.55041/ijsrem27641.
Повний текст джерелаTankwal, Piyush, Vikas Nehra, Sanjay Prajapati, and Brajesh Kumar Kaushik. "Performance analysis of differential spin hall effect (DSHE)-MRAM-based logic gates." Circuit World 45, no. 4 (November 4, 2019): 300–310. http://dx.doi.org/10.1108/cw-04-2019-0036.
Повний текст джерелаVatajelu, Elena Ioana, and Giorgio Di Natale. "High-Entropy STT-MTJ-Based TRNG." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, no. 2 (February 2019): 491–95. http://dx.doi.org/10.1109/tvlsi.2018.2879439.
Повний текст джерелаXu, Zihan, Chengen Yang, Manqing Mao, Ketul B. Sutaria, Chaitali Chakrabarti, and Yu Cao. "Compact modeling of STT-MTJ devices." Solid-State Electronics 102 (December 2014): 76–81. http://dx.doi.org/10.1016/j.sse.2014.06.003.
Повний текст джерелаChiou, Kuan-Ru, Jenq-Wei Chen, and Son-Hsien Chen. "Spin-Transfer Torques in One-Dimensional Magnetic Tunneling Junctions of Lateral Structures." SPIN 09, no. 01 (March 2019): 1950003. http://dx.doi.org/10.1142/s2010324719500036.
Повний текст джерелаBarla, Prashanth, Hemalatha Shivarama, Ganesan Deepa, and Ujjwal Ujjwal. "Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation." Journal of Low Power Electronics and Applications 14, no. 1 (January 6, 2024): 3. http://dx.doi.org/10.3390/jlpea14010003.
Повний текст джерелаPushp, Aakash, Timothy Phung, Charles Rettner, Brian P. Hughes, See-Hun Yang, and Stuart S. P. Parkin. "Giant thermal spin-torque–assisted magnetic tunnel junction switching." Proceedings of the National Academy of Sciences 112, no. 21 (May 13, 2015): 6585–90. http://dx.doi.org/10.1073/pnas.1507084112.
Повний текст джерелаSugii, Toshihiro, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Kouji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, and Chikako Yoshida. "Integration of STT-MRAMs for Embedded Cache Memories." Advances in Science and Technology 95 (October 2014): 146–49. http://dx.doi.org/10.4028/www.scientific.net/ast.95.146.
Повний текст джерелаZHANG, YAOJUN, WUJIE WEN, and YIRAN CHEN. "STT-RAM CELL DESIGN CONSIDERING MTJ ASYMMETRIC SWITCHING." SPIN 02, no. 03 (September 2012): 1240007. http://dx.doi.org/10.1142/s2010324712400073.
Повний текст джерелаZhang, Shubin, Peifang Dai, Ning Li, and Yanbo Chen. "A Radiation-hardened Triple Modular Redundancy Design Based on Spin-Transfer Torque Magnetic Tunnel Junction Devices." Applied Sciences 14, no. 3 (February 1, 2024): 1229. http://dx.doi.org/10.3390/app14031229.
Повний текст джерелаLim, Hyein, Seungjun Lee, and Hyungsoon Shin. "A Survey on the Modeling of Magnetic Tunnel Junctions for Circuit Simulation." Active and Passive Electronic Components 2016 (2016): 1–12. http://dx.doi.org/10.1155/2016/3858621.
Повний текст джерелаSun, Zhenyu, Xiuyuan Bi, Hai Li, Weng-Fai Wong, and Xiaochun Zhu. "STT-RAM Cache Hierarchy With Multiretention MTJ Designs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22, no. 6 (June 2014): 1281–93. http://dx.doi.org/10.1109/tvlsi.2013.2267754.
Повний текст джерелаMonga, Kanika, Nitin Chaturvedi, and S. Gurunarayanan. "Energy-efficient data retention in D flip-flops using STT-MTJ." Circuit World 46, no. 4 (June 20, 2020): 229–41. http://dx.doi.org/10.1108/cw-09-2018-0073.
Повний текст джерелаUseinov, Niazbeck. "Tunnel magnetoresistance and spin transfer torque in magnetic tunnel junction with embedded nanoparticles." EPJ Web of Conferences 185 (2018): 01015. http://dx.doi.org/10.1051/epjconf/201818501015.
Повний текст джерелаLong, Jingwei, Qi Hu, Zhengping Yuan, Yunsen Zhang, Yue Xin, Jie Ren, Bowen Dong, et al. "Comparative Study of Temperature Impact in Spin-Torque Switched Perpendicular and Easy-Cone MTJs." Nanomaterials 13, no. 2 (January 13, 2023): 337. http://dx.doi.org/10.3390/nano13020337.
Повний текст джерелаBromberg, David M., Daniel H. Morris, Larry Pileggi, and Jian-Gang Zhu. "Novel STT-MTJ Device Enabling All-Metallic Logic Circuits." IEEE Transactions on Magnetics 48, no. 11 (November 2012): 3215–18. http://dx.doi.org/10.1109/tmag.2012.2197186.
Повний текст джерелаZhang, Yaojun, Xiaobin Wang, Hai Li, and Yiran Chen. "STT-RAM Cell Optimization Considering MTJ and CMOS Variations." IEEE Transactions on Magnetics 47, no. 10 (October 2011): 2962–65. http://dx.doi.org/10.1109/tmag.2011.2158810.
Повний текст джерелаWei, Jiaqi, Kaihua Cao, Hushan Cui, Kewen Shi, Wenlong Cai, Huisong Li, Yang Jing, Chao Zhao, and Weisheng Zhao. "All Perpendicular Spin Nano-Oscillators with Composite Free Layer." SPIN 09, no. 03 (May 8, 2019): 1940010. http://dx.doi.org/10.1142/s2010324719400101.
Повний текст джерелаPrakash, D. Venkata, Anjaiah Talamala, Mahesh K. Singh, and Y. Kuntam Yamini Devi. "Non-Volatile Logic Design Considerations for Energy Efficient Tolerant Variation." International Journal of Electrical and Electronics Research 10, no. 4 (December 30, 2022): 868–71. http://dx.doi.org/10.37391/ijeer.100419.
Повний текст джерелаNisar, Arshid, Seema Dhull, Brajesh Kumar Kaushik, and Sparsh Mittal. "High-performance voltage controlled multilevel MRAM cell." Semiconductor Science and Technology 36, no. 12 (November 10, 2021): 125013. http://dx.doi.org/10.1088/1361-6641/ac3187.
Повний текст джерелаGarzón, Esteban, Marco Lanuzza, Ramiro Taco, and Sebastiano Strangio. "Ultralow Voltage FinFET- Versus TFET-Based STT-MRAM Cells for IoT Applications." Electronics 10, no. 15 (July 22, 2021): 1756. http://dx.doi.org/10.3390/electronics10151756.
Повний текст джерелаWang, Manman, and Yanfeng Jiang. "Compact model of nanometer STT-MTJ device with scale effect." AIP Advances 11, no. 2 (February 1, 2021): 025201. http://dx.doi.org/10.1063/9.0000049.
Повний текст джерелаBi, Xiuyuan, Hai Li, and Xiaobin Wang. "STT-RAM Cell Design Considering CMOS and MTJ Temperature Dependence." IEEE Transactions on Magnetics 48, no. 11 (November 2012): 3821–24. http://dx.doi.org/10.1109/tmag.2012.2200469.
Повний текст джерелаPark, Jaeyoung. "Hybrid Non-Volatile Flip-Flops Using Spin-Orbit-Torque (SOT) Magnetic Tunnel Junction Devices for High Integration and Low Energy Power-Gating Applications." Electronics 9, no. 9 (September 1, 2020): 1406. http://dx.doi.org/10.3390/electronics9091406.
Повний текст джерелаLiang, Yu-Pei, Shuo-Han Chen, Yuan-Hao Chang, Yun-Fei Liu, Hsin-Wen Wei, and Wei-Kuan Shih. "A cache consolidation design of MLC STT-RAM for energy efficiency enhancement on cyber-physical systems." ACM SIGAPP Applied Computing Review 21, no. 1 (March 2021): 37–49. http://dx.doi.org/10.1145/3477133.3477136.
Повний текст джерелаHong, Yunshu, Yiyu Pan, and Zhongfu Xu. "Based on the comparison with other kinds of storage devices to predict the future development of STT-MRAM." Highlights in Science, Engineering and Technology 46 (April 25, 2023): 197–204. http://dx.doi.org/10.54097/hset.v46i.7704.
Повний текст джерелаSanchez Hazen, D., B. M. S. Teixeira, D. Salomoni, S. Auffret, L. Vila, R. C. Sousa, I. L. Prejbeanu, L. D. Buda-Prejbeanu, and B. Dieny. "Real time investigation of double magnetic tunnel junction with a switchable assistance layer for high efficiency STT-MRAM." APL Materials 10, no. 3 (March 1, 2022): 031104. http://dx.doi.org/10.1063/5.0080335.
Повний текст джерелаDeng, Erya, Wang Kang, Yue Zhang, Jacques-Olivier Klein, Claude Chappert, and Weisheng Zhao. "Design Optimization and Analysis of Multicontext STT-MTJ/CMOS Logic Circuits." IEEE Transactions on Nanotechnology 14, no. 1 (January 2015): 169–77. http://dx.doi.org/10.1109/tnano.2014.2375205.
Повний текст джерелаWang, Manman, Yuhai Yuan, and Yanfeng Jiang. "Realization of Artificial Neurons and Synapses Based on STDP Designed by an MTJ Device." Micromachines 14, no. 10 (September 23, 2023): 1820. http://dx.doi.org/10.3390/mi14101820.
Повний текст джерелаLim, Hyein, Sora Ahn, Miryeon Kim, Seungjun Lee, and Hyungsoon Shin. "A New Circuit Model for Spin-Torque Oscillator Including Perpendicular Torque of Magnetic Tunnel Junction." Advances in Condensed Matter Physics 2013 (2013): 1–6. http://dx.doi.org/10.1155/2013/169312.
Повний текст джерелаChoi, Gwang Hui, and Taehui Na. "Analysis of State-of-the-Art Spin-Transfer-Torque Nonvolatile Flip-Flops Considering Restore Yield in the Near/Sub-Threshold Voltage Region." Electronics 9, no. 12 (December 11, 2020): 2118. http://dx.doi.org/10.3390/electronics9122118.
Повний текст джерелаDe Rose, Raffaele, Tommaso Zanotti, Francesco Maria Puglisi, Felice Crupi, Paolo Pavan, and Marco Lanuzza. "STT-MTJ Based Smart Implication for Energy-Efficient Logic-in-Memory Computing." Solid-State Electronics 184 (October 2021): 108065. http://dx.doi.org/10.1016/j.sse.2021.108065.
Повний текст джерелаTripathi, Sandeep, Sudhanshu Choudhary, and Prasanna Kumar Misra. "A Novel STT–SOT MTJ-Based Nonvolatile SRAM for Power Gating Applications." IEEE Transactions on Electron Devices 69, no. 3 (March 2022): 1058–64. http://dx.doi.org/10.1109/ted.2022.3140407.
Повний текст джерелаPerach, Ben, and shahar kvatinsky. "An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27, no. 11 (November 2019): 2473–84. http://dx.doi.org/10.1109/tvlsi.2019.2927816.
Повний текст джерелаPathak, Sachin, Jongin Cha, Kangwook Jo, Hongil Yoon, and Jongill Hong. "Fast and efficient STT switching in MTJ using additional transient pulse current." Applied Physics Letters 110, no. 23 (June 5, 2017): 232401. http://dx.doi.org/10.1063/1.4985129.
Повний текст джерелаGarg, Jyoti, and Subodh Wariya. "Design of Low Power Arithmetic logic unit using SHE assisted STT / MTJ." International Journal of Computing and Digital Systems 14, no. 1 (July 1, 2023): 107–15. http://dx.doi.org/10.12785/ijcds/140110.
Повний текст джерелаWasef, Shaik, and Hossein Fariborzi. "Theoretical Study of Field-Free Switching in PMA-MTJ Using Combined Injection of STT and SOT Currents." Micromachines 12, no. 11 (October 31, 2021): 1345. http://dx.doi.org/10.3390/mi12111345.
Повний текст джерелаPolley, Debanjan, Akshay Pattabi, Jyotirmoy Chatterjee, Sucheta Mondal, Kaushalya Jhuria, Hanuman Singh, Jon Gorchon, and Jeffrey Bokor. "Progress toward picosecond on-chip magnetic memory." Applied Physics Letters 120, no. 14 (April 4, 2022): 140501. http://dx.doi.org/10.1063/5.0083897.
Повний текст джерелаDAS, JAYITA, SYED M. ALAM, and SANJUKTA BHANJA. "RECENT TRENDS IN SPINTRONICS-BASED NANOMAGNETIC LOGIC." SPIN 04, no. 03 (September 2014): 1450004. http://dx.doi.org/10.1142/s2010324714500040.
Повний текст джерелаBarla, Prashanth, Vinod Kumar Joshi, and Somashekara Bhat. "A Novel Auto-Write-Stopping Circuit for SHE + STT-MTJ/CMOS Hybrid ALU." IEEE Transactions on Electron Devices 69, no. 4 (April 2022): 1683–90. http://dx.doi.org/10.1109/ted.2022.3145331.
Повний текст джерелаPan, Guangchen, Ali Karymy, Pingping Yu, and Yanfeng Jiang. "Novel Low Noise Amplifier for Neural Signals Based on STT-MTJ Spintronic Device." IEEE Access 7 (2019): 145641–50. http://dx.doi.org/10.1109/access.2019.2945036.
Повний текст джерелаZhang, Li, Hualian Tang, Beilei Xu, Yiqi Zhuang, and Junlin Bao. "A High Reliability Sense Amplifier for Computing In-Memory with STT-MRAM." SPIN 10, no. 02 (January 31, 2020): 2040001. http://dx.doi.org/10.1142/s2010324720400019.
Повний текст джерелаHarnsoongnoen, Supakorn, N. Phaengpha, S. Ritjaroenwattu, U. Charoen-In, and Apirat Siritaratiwat. "Joule Heating and Peltier Effects in Thermoelectric Spin-Transfer Torque Mram Devices Using Finite Element Modeling." Advanced Materials Research 931-932 (May 2014): 989–93. http://dx.doi.org/10.4028/www.scientific.net/amr.931-932.989.
Повний текст джерелаGarzón, Esteban, Raffaele De Rose, Felice Crupi, Lionel Trojman, Adam Teman, and Marco Lanuzza. "Adjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs." Solid-State Electronics 194 (August 2022): 108315. http://dx.doi.org/10.1016/j.sse.2022.108315.
Повний текст джерелаSun, Hongbin, Chuanyin Liu, Tai Min, Nanning Zheng, and Tong Zhang. "Architectural Exploration to Enable Sufficient MTJ Device Write Margin for STT-RAM Based Cache." IEEE Transactions on Magnetics 48, no. 8 (August 2012): 2346–51. http://dx.doi.org/10.1109/tmag.2012.2193589.
Повний текст джерелаLv, Hua, Joao Fidalgo, Thomas Kampfe, Juergen Langer, Jerzy Wrona, Berthold Ocker, Paulo P. Freitas, and Susana Cardoso. "Seebeck effect and Joule heating in CoFeB/MgO/CoFeB-based perpendicular magnetic tunnel junctions with low resistance area product." Journal of Physics D: Applied Physics 55, no. 26 (April 8, 2022): 265302. http://dx.doi.org/10.1088/1361-6463/ac5e8a.
Повний текст джерелаPak, Murat, Wesley Zanders, Patrick Wong, and Sandip Halder. "Screening of 193i and EUV lithography process options for STT-MRAM orthogonal array MTJ pillars." Micro and Nano Engineering 10 (April 2021): 100082. http://dx.doi.org/10.1016/j.mne.2021.100082.
Повний текст джерелаBarla, Prashanth, Vinod Kumar Joshi, and Somashekara Bhat. "Design and evaluation of hybrid SHE+STT-MTJ/CMOS full adder based on LIM architecture." IOP Conference Series: Materials Science and Engineering 1187, no. 1 (September 1, 2021): 012015. http://dx.doi.org/10.1088/1757-899x/1187/1/012015.
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