Статті в журналах: "SRF-PLL"

1

Izah, Rofiatul, Subiyanto Subiyanto, and Dhidik Prastiyanto. "Improvement of DSOGI PLL Synchronization Algorithm with Filter on Three-Phase Grid-connected Photovoltaic System." Jurnal Elektronika dan Telekomunikasi 18, no. 1 (August 31, 2018): 35. http://dx.doi.org/10.14203/jet.v18.35-45.

Повний текст джерела

Анотація:

Synchronous Reference Frame Phase Locked Loop (SRF PLL) has been widely used for synchronization three-phase grid-connected photovoltaic (PV) system. On the grid fault, SRF PLL distorted by negative sequence component and grid harmonic that caused an error in estimating parameter because of ripple and oscillation. This work combined SRF PLL with Dual Second Order Generalized Integrator (DSOGI) and filter to minimize ripple and minimize oscillation in the phase estimation and frequency estimation. DSOGI was used for filtering and obtaining the 90o shifted versions from the vαβ signals. These signals (vαβ) were generated from three phase grid voltage signal using Clarke transform. The vαβ signal was the inputs to the positive-sequence calculator (PSC). The positive-sequence vαβ was transformed to the dq synchronous reference frame and became an input to SRF-PLL to create the estimation frequency. This estimation frequency from SRF PLL was filtered by the low-pass filter to decrease grid harmonic. Moreover, the output of low-pass filter was a frequency adaptive. The performance of DSOGI PLL with filter is compared with DSOGI PLL, SRF PLL, and IEEE standard 1547(TM)-2003. The improvement of DSOGI PLL with filter gave better performances than DSOGI PLL and SRF PLLbecause it minimized ripples and oscillations in the phase and frequency estimations.

Стилі APA, Harvard, Vancouver, ISO та ін.

2

GHOSHAL, Anirban, and Vinod JOHN. "Performance evaluation of three phase SRF-PLL and MAF-SRF-PLL." TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES 23 (2015): 1781–804. http://dx.doi.org/10.3906/elk-1404-488.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

3

Setiawan, Iwan, Mochammad Facta, Ardyono Priyadi, and Mauridhi Hery Purnomo. "Estimator Parameter Tegangan Jaringan Tiga Fasa Berbasis D-SOGI PLL." Majalah Ilmiah Teknologi Elektro 16, no. 2 (August 31, 2017): 84. http://dx.doi.org/10.24843/mite.2017.v16i02p15.

Повний текст джерела

Анотація:

Phase locked loop (PLL) adalah sebuah sistem umpan balik yang memegang peran penting dalam sistem-sistem konverter terkoneksi jaringan listrik. Fungsi utama PLL adalah mendapatkan beragam informasi parameter jaringan yaitu seperti phase dan magnitude tegangan. Informasi-informasi tersebut selanjutnya digunakan sebagai dasar proses sinkronisasi peralatan dengan jaringan listrik. Tujuan utama paper ini adalah memodelkan sekaligus membandingkan unjuk kerja salah satu jenis PLL yang dikenal dengan nama Dual Second Order Generalized Integrator Phase-Locked Loop dengan SRF-PLL yaitu sebuah PLL yang relatif standar. Berdasarkan hasil simulasi, unjuk kerja D-SOGI PLL dalam keadaan tunaknya lebih unggul dibandingkan SRF-PLL terutama untuk kondisi jaringan listrik tiga phase tidak seimbang.

Стилі APA, Harvard, Vancouver, ISO та ін.

4

Abdurrahman, Muhammad Hanif, Iwan Setiawan, and Susatyo Handoko. "DESAIN DAN IMPLEMENTASI SYNCHRONOUS REFERENCE FRAME-PHASE LOCKED LOOP (SRF-PLL) UNTUK TEGANGAN SATU FASE MENGGUNAKAN DSPIC30F4011." TRANSIENT 7, no. 1 (March 9, 2018): 145. http://dx.doi.org/10.14710/transient.7.1.145-151.

Повний текст джерела

Анотація:

Fase, magnitude, dan frekuensi dari tegangan listrik merupakan informasi penting dalam pengoprasian sistem jaringan. Berdasarkan kebutuhan penerapan koneksi pembangkit dengan grid side converter (GSC), GSC harus dapat dioperasikan meski pun jaringan mengalami interferensi. Untuk mencapai tujuan tersebut, dibutuhkan metode yang dapat mendeteksi gangguan jaringan secara cepat, yaitu dengan menggunakan metode Phase Locked Loop (PLL) yang dapat menyediakan informasi tegangan jaringan. Dibandingkan dengan algoritma PLL yang lainnya, Synchronous Reference Frame-Phase Locked Loop (SRF-PLL) bisa dikatakan merupakan yang paling populer dalam penerapannya. Dalam Penelitian ini, dibuat sebuah desain untuk pengaplikasian SRF-PLL untuk tegangan satu fase menggunakan mikrokontroler 16-bit dsPIC30f4011 dengan kontroler PI, dimana kontroler PI diharapkan akan membuat sistem memiliki respon yang cepat terhadap perubahan yang terjadi, dikarenakan tujuan dari kebutuhan PLL itu sendiri, sehingga akan didapatkan hasil data tegangan jaringan berupa, magnitude, frekuensi dan fase. Hasilnya, pengkondisi sinyal dapat mengatur sinyal tegangan jaringan agar dapat terabca oleh ADC mikrokontroler, sehingga magnitude, frekuensi, dan fase dari tegangan jaringan berhasil dibaca oleh algoritma SRF-PLL yang ditampilkan pada oscilloscope dengan bantuan DAC 8bit.

Стилі APA, Harvard, Vancouver, ISO та ін.

5

Lipnicki, Piotr. "PRZEGLĄD METOD PLL DO SYNCHRONIZACJI Z SIECIĄ PRZEKSZTAŁTNIKÓW ENERGOELEKTRONICZNYCH." Informatyka, Automatyka, Pomiary w Gospodarce i Ochronie Środowiska 3, no. 2 (May 16, 2013): 5–8. http://dx.doi.org/10.35784/iapgos.1444.

Повний текст джерела

Анотація:

W artykule przedstawiono metody synchronizacji przekształtników energoelektronicznych z siecią elektroenergetyczna oparte na pętli sprzężenia fazowego PLL. Przedstawione modele matematyczne oparte są na transformacjach do wirującego układu odniesienia. Modele symulacyjne wykonano w kilku wersjach: w zamkniętej pętli fazowej z synchronicznie wirującym układem odniesienia PLL- SRF, w zmodyfikowanym układzie PLL-SRF z uogólnionym integratorem drugiego rzędu SOGI oraz w podwójnie odprzężonym systemem z dwoma wirującymi przeciwnie układami odniesienia DDSRF. Na podstawie wykonanych symulacji stwierdzono, że zamknięta pętla fazowa PPL z algorytmem SOGI pozwala uzyskać lepszą zbieżność, a algorytmy DDSRF poprawnie pracują nawet dla sieci niesymetrycznej z dużą zawartością harmonicznych czasowych.

Стилі APA, Harvard, Vancouver, ISO та ін.

6

Ghoshal, Anirban, and Vinod John. "Reconfiguration of Three Phase MAF-SRF-PLL as Single Phase PLL." INAE Letters 1, no. 2 (July 19, 2016): 47–51. http://dx.doi.org/10.1007/s41403-016-0010-8.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

7

Chmielewski, Tomasz. "CONTROL AND GRID SYNCHRONIZATION OF TWO LEVEL VOLTAGE SOURCE INVERTER UNDER TEMPORARY VOLTAGE UNBALANCE." Informatics Control Measurement in Economy and Environment Protection 6, no. 4 (December 18, 2016): 26–31. http://dx.doi.org/10.5604/01.3001.0009.5185.

Повний текст джерела

Анотація:

This paper presents the operation of grid tied, two level voltage source inverter (VSI) during network voltage unbalance. The control system was implemented in synchronous rotating reference frame dq0 (SRF). Two types of control structures were investigated herein. First utilizes the Double Decoupled SRF Phase-locked loop (DDSRF-PLL) synchronisation with positive and negative sequence currents control. Second one is simplified system that does not provide symmetrical components decomposition and decoupling for synchronisation. Simulation results exhibited a superior performance of the DDSRF-PLL control system under grid voltage unbalance.

Стилі APA, Harvard, Vancouver, ISO та ін.

8

Tran, Tho Quang, Anh Viet Truong, Hoan Van Trao, and Phuong Minh Le. "Compensation of offset for SRF-PLL in grid-connected inverters." Science and Technology Development Journal 18, no. 3 (August 30, 2015): 5–15. http://dx.doi.org/10.32508/stdj.v18i3.867.

Повний текст джерела

Анотація:

The grid-connected inverters that use synchronous reference frame based phaselocked loop SRF-PLL are applied very popular. The function of SRF-PLLs is fast and accurate estimation of frequency, phase angle, and magnitude of grid voltage. The power quality of the current injected into the grid depends on these estimated parameters. The measurements or processes of data conversion can typically introduce the dc offset in the measured grid voltage. The dc offset is one of the reasons for causing errors for the estimated parameters of the grid voltage and causes injected current with harmonic distortions. This paper proposes a technique of dc offset compensation for SRF-PLL based on the Second Order Generalized Integrator (SOGI). The simulation results validated the performance and robustness of the proposed technique.

Стилі APA, Harvard, Vancouver, ISO та ін.

9

Escobar, Gerardo, Luis Ibarra, Jesus Elias Valdez-Resendiz, Jonathan Carlos Mayo-Maldonado, and Daniel Guillen. "Nonlinear Stability Analysis of the Conventional SRF-PLL and Enhanced SRF-EPLL." IEEE Access 9 (2021): 59446–55. http://dx.doi.org/10.1109/access.2021.3073063.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

10

Li, Xing, and Hua Lin. "Stability Analysis of Grid-Connected Converters with Different Implementations of Adaptive PR Controllers under Weak Grid Conditions." Energies 11, no. 8 (August 1, 2018): 2004. http://dx.doi.org/10.3390/en11082004.

Повний текст джерела

Анотація:

Adaptive proportional resonant (PR) controllers, whose resonant frequencies are obtained by the phase-locked loop (PLL), are employed in grid connected voltage source converters (VSCs) to improve the control performance in the case of grid frequency variations. The resonant frequencies can be estimated by either synchronous reference frame PLL (SRF-PLL) or dual second order generalized integrator frequency locked loop (DSOGI-FLL), and there are three different implementations of the PR controllers based on two integrators. Hence, in this paper, system stabilities of the VSC with different implementations of PR controllers and different PLLs under weak grid conditions are analyzed and compared by applying the impedance-based method. First, the αβ-domain admittance matrixes of the VSC are derived using the harmonic linearization method. Then, the admittance matrixes are compared with each other, and the influences of their differences on system stability are revealed. It is demonstrated that if DSOGI-FLL is used, stabilities of the VSC with different implementations of the PR controllers are similar. Moreover, the VSC using a DSOGI-FLL is more stable than that using a SRF-PLL. The simulation and experimental results are conducted to verify the correctness of theoretical analysis.

Стилі APA, Harvard, Vancouver, ISO та ін.

11

Yao, Shu Jun, Ming Ran Bao, Ya Nan Hu, Min Xiao Han, Jun Xian Hou, and Lei Wan. "An Integral Method to Improve PLL Performance under Unbalanced Electric Grid Conditions." Applied Mechanics and Materials 347-350 (August 2013): 1318–22. http://dx.doi.org/10.4028/www.scientific.net/amm.347-350.1318.

Повний текст джерела

Анотація:

Accurate phase information on three-phase grid voltage and currents which are supplied by PLL are needed in power system operation. Conventional three-phase synchronous reference frame-based phase locked loop is generally sufficient during balanced operation conditions. But unbalanced in input signal set causes a double-frequency ripple. The output signal is not ideal. There are lots of improved SRF-PLL methods, aiming at removing the double-frequency ripple such as DSC-PLL,MAF-PLL, but these methods may causes a certain time delay. DIF-PLL method is based on adding another signal, which has reverse polarity ripple. It may amplify the harmonic signal. In this paper, an INT-PLL method based on integral is proposed, which wont amplify the harmonics. The comparison of these methods and simulation results are given in this paper.

Стилі APA, Harvard, Vancouver, ISO та ін.

12

Kampitsis, Georgios E., Anastasis P. Tsoumanis, Konstantinos C. Gallos, Stavros A. Papathanassiou, and Stefanos N. Manias. "Experimental Investigation of the Response of Different PLL Algorithms to Grid Disturbances." Materials Science Forum 856 (May 2016): 291–96. http://dx.doi.org/10.4028/www.scientific.net/msf.856.291.

Повний текст джерела

Анотація:

In this paper, the performance of three different phase locked loop (PLL) algorithms is experimentally evaluated in a grid connected photovoltaic inverter. Robust PLL is a key requirement for ensuring system compatibility with existing grid codes. The double second order generalized integrator (DSOGI) and the decoupled double synchronous reference frame (DDSRF) PLL are compared against the conventional synchronous reference frame (SRF) PLL under grid disturbances. All synchronization algorithms are initially simulated in Matlab and subsequently transformed in discrete time for implementation in the digital controller. Grid distortions, such as phase voltage sags, frequency fluctuations and voltage harmonic distortion are emulated via a controllable three phase generator.

Стилі APA, Harvard, Vancouver, ISO та ін.

13

Jeraputra, Chuttchaval, Jetnarong Pongpaiboon, Thamvarit Singhavilai, and Supun Tiptipakorn. "Phase Lead-Lag Synchronous Reference Frame Phase-locked loop for Grid Synchronization of a Single-Phase Inverter." ECTI Transactions on Electrical Engineering, Electronics, and Communications 20, no. 1 (February 18, 2022): 123–32. http://dx.doi.org/10.37936/ecti-eec.2022201.246117.

Повний текст джерела

Анотація:

In this study, a phase lead-lag synchronous reference frame phase-locked loop (SRF-PLL) is proposed for the grid connection of a single-phase inverter. A tuned filter is employed to enable the phase of the input voltage to be advanced or delayed by ±45 degrees with respect to the grid voltage. The generated orthogonal signals are fed into Park's transformation. Only the quadrature-phase signal is regulated to zero using a PI controller. Its output determines the estimated frequency. The phase angle is obtained by integrating the estimated frequency. The linearized model of the proposed SRF-PLL is developed and stability analysis is discussed. The viability of the proposed method is tested under computer simulation using MATLAB/Simulink. The method is then implemented on a 32-bit microcontroller and tested with a programmable AC source. The results positively confirm the effectiveness of the method.

Стилі APA, Harvard, Vancouver, ISO та ін.

14

Smadi, Issam A., Ibrahem E. Atawi, and Ammar A. Ibrahim. "An Improved Delayed Signal Cancelation for Three-Phase Grid Synchronization with DC Offset Immunity." Energies 16, no. 6 (March 20, 2023): 2873. http://dx.doi.org/10.3390/en16062873.

Повний текст джерела

Анотація:

The presence of the DC components in the grid voltage adversely affects the performance of the synchronization unit, causing oscillatory and offset errors in the estimated grid information. Several approaches were proposed to address the DC offset problem by incorporating an additional filtering stage to the synchronous reference frame phase-locked loop (SRF-PLL). Removing the DC offset using the modified delayed signal cancelation (MDSC) operator in the inner loop of the SRF-PLL shows a good DC offset elimination with a fast-dynamic response. However, neither a straightforward selection procedure for the MDSC parameters nor a general estimation technique for the grid information is provided. Hence, a generalization for the MDSC is proposed in this paper based on general mathematical expressions to cancel out the DC offset, while meanwhile estimating the grid parameters precisely and rapidly against any delay factor selection. Finally, comprehensive simulation and experimental results compared with other related PLLs are presented to demonstrate the effectiveness of the proposed work.

Стилі APA, Harvard, Vancouver, ISO та ін.

15

Din, Zakiud, Jianzhong Zhang, Hussain Bassi, Muhyaddin Rawa, and Yipeng Song. "Impact of Phase Locked Loop with Different Types and Control Dynamics on Resonance of DFIG System." Energies 13, no. 5 (February 26, 2020): 1039. http://dx.doi.org/10.3390/en13051039.

Повний текст джерела

Анотація:

In recent years, the doubly fed induction generator (DFIG) operates in a weak grid, rather than a strong grid due to the high proportion of wind energy into the power grid. The impedance interaction between the DFIG system and series and parallel compensated weak grid might cause the subsynchronous resonance (SSR) and high frequency resonance (HFR) in the DFIG system, respectively. Phase locked loop (PLL) is a popular grid synchronization technique, and the high bandwidth PLL can cause resonance at middle frequencies in the DFIG system. However, the impact of PLL types and their controller dynamics on the resonance in the DFIG system are not adequately researched. The impact of the PLL controller with different types, such as synchronous reference frame (SRF) and Lead/Lag PLL, is studied in this paper to fill this gap. Additionally, an improved PLL is proposed, which can guarantee the high phase margin and decrease the likelihood of the resonance at middle frequencies in the DFIG system under a weak grid. Moreover, the phase margin of the DFIG system impedance with an improved PLL is less sensitive to its controller parameters. Simulation and experimental results verify the effectiveness of the proposed method.

Стилі APA, Harvard, Vancouver, ISO та ін.

16

Hamood, Mostafa A., Ognjen Marjanovic, and Joaquin Carrasco. "Adaptive Impedance-Conditioned Phase-Locked Loop for the VSC Converter Connected to Weak Grid." Energies 14, no. 19 (September 23, 2021): 6040. http://dx.doi.org/10.3390/en14196040.

Повний текст джерела

Анотація:

In this paper, an adaptive version of the impedance-conditioned phase-locked loop (IC-PLL), namely the adaptive IC-PLL (AIC-PLL), is proposed. The IC-PLL has recently been proposed to address the issue of synchronisation with a weak AC grid by supplementing the conventional synchronous reference frame phase-locked loop (SRF-PLL) with an additional virtual impedance term. The resulting IC-PLL aims to synchronise the converter to a remote and stronger point in the grid, hence increasing the upper bound on the achievable power transfer achieved by the VSC converter connected to the weak grid. However, the issue of the variable grid strength imposes another challenge in the operation of the IC-PLL. This is because the IC-PLL requires impedance estimation methods to estimate the value of the virtual impedance part. In AIC-PLL, the virtual impedance part is estimated by appending another dynamic loop in the exciting IC-PLL. In this method, an additional closed loop is involved so that the values of the virtual inductance and resistance are internally estimated and adapted. Hence, the VSC converter becomes effectively viable for the case of the grid strength variable, where the estimation of the grid impedance becomes unnecessary. The results show that the converter that relies on AIC-PLL has the ability to transfer power that is approximately equal to the theoretical maximum power while maintaining satisfactory dynamic performance.

Стилі APA, Harvard, Vancouver, ISO та ін.

17

Aldbaiat, Bashar, Mutasim Nour, Eyad Radwan, and Emad Awada. "Grid-Connected PV System with Reactive Power Management and an Optimized SRF-PLL Using Genetic Algorithm." Energies 15, no. 6 (March 16, 2022): 2177. http://dx.doi.org/10.3390/en15062177.

Повний текст джерела

Анотація:

This paper presents a two-stage grid-connected PV system with reactive power management capability. The proposed model can send phase-shifted current to the grid during a low-voltage ride through (LVRT) to recover the voltage levels of the grid’s feeders. The novelty of the proposed algorithm, unlike the common methods, is that it does not need to disable the maximum power point tracking (MPPT) state while managing active and reactive power injection simultaneously. Moreover, the new method promotes a safety factor by offering overcurrent protection to the PV inverter. The phase-locked loop based on the synchronous reference frame (SRF-PLL) is optimized using a genetic algorithm (GA). The settling time of SRF-PLL’s step response is minimized, and the frequency dynamics are improved to enhance synchronization during LVRT. The system’s performance is tested and verified using MATLAB/Simulink simulations. The obtained results prove the effectiveness of the proposed control algorithm in managing reactive power interventions. The optimized phase-locked loop shows robust performance and is compared to the conventional low-gain PLL to spot the enhancement.

Стилі APA, Harvard, Vancouver, ISO та ін.

18

Zsigmond, Andor-Attila, and András Kelemen. "Implementation of Grid Synchronization Methods on a Real Time Development System." Acta Universitatis Sapientiae, Electrical and Mechanical Engineering 13, no. 1 (December 1, 2021): 52–67. http://dx.doi.org/10.2478/auseme-2021-0005.

Повний текст джерела

Анотація:

Abstract The paper presents a study regarding the implementation of two representative grid synchronization methods, intended to be used in the control structure of a three phase switch mode voltage rectifier. The methods considered are the Synchronous Reference Frame Phase Locked Loop (SRF PLL) and the Double Synchronous Frame Phase Locked Loop (DSRF PLL), respectively. These synchronization methods have been compared on a real time development system type dSpace 1104 from the point of view of their performance in case of an unbalanced mains voltage system. Finally, the influence of the chosen grid synchronization method on the performance of a synchronous reference frame controlled three-phase switch mode voltage rectifier is studied by simulation, and better results are demonstrated to be provided by the use of the DSRF PLL.

Стилі APA, Harvard, Vancouver, ISO та ін.

19

Wang, Yuchen, Hengliang Zhang, Kai Liu, Mingjin Hu, Zheng Wu, Chao Zhang, and Wei Hua. "A Forward Compensation Method to Eliminate DC Phase Error in SRF-PLL." IEEE Transactions on Power Electronics 37, no. 6 (June 2022): 6280–84. http://dx.doi.org/10.1109/tpel.2022.3142252.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

20

Shakerighadi, Bahram, Esmaeil Ebrahimzadeh, Mads Graungaard Taul, Frede Blaabjerg, and Claus Leth Bak. "Modeling and Adaptive Design of the SRF-PLL: Nonlinear Time-Varying Framework." IEEE Access 8 (2020): 28635–45. http://dx.doi.org/10.1109/access.2020.2972345.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

21

Quraan, Mahran. "Error Compensation Algorithm for SRF-PLL in Three-Phase Grid-Connected Converters." IEEE Access 8 (2020): 182338–46. http://dx.doi.org/10.1109/access.2020.3028834.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

22

Huang, Chang Xi, Shu Ying Yang, and Liu Wei Chen. "Unbalanced Control Strategy for DFIG Used in Wind Turbines." Advanced Materials Research 805-806 (September 2013): 430–35. http://dx.doi.org/10.4028/www.scientific.net/amr.805-806.430.

Повний текст джерела

Анотація:

Unbalanced input voltages would make doubly fed induction generator (DFIG)-based wind turbine operating performance deteriorate, such as shaft tremble, temperature increasing, and so on, even make it cut out of the power grid. Meanwhile, without proper control the power ripples generated from wind turbines may further aggravate power grid. Considering the unbalanced conditions, DFIG was modeled in dual synchronous reference frame (SRF), namely the positive one and the negative one, based on which the dual PI current controllers were designed. To implement the dual current control, the sensing variables were divided into positive and negative sequence components, which were controlled in positive and negative SRF respectively. At the same time, to synchronize with the positive and negative sequence voltage components, a phase latch loop (PLL) control was designed. Experimental results on 11kW DFIG wind turbine test bed validated the designed control system.

Стилі APA, Harvard, Vancouver, ISO та ін.

23

Hwang, Seon-Hwan, Young-Gi Hwang, and Soon-Kurl Kwon. "A Study on Current Ripple Reduction Due to Offset Error in SRF-PLL for Single-phase Grid-connected Inverters." Journal of the Korean Institute of Illuminating and Electrical Installation Engineers 28, no. 11 (November 28, 2014): 68–76. http://dx.doi.org/10.5207/jieie.2014.28.11.068.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

24

Choi, Hyeong-Jin, Seung-Ho Song, Seung-Gi Jeong, Ju-Yeop Choi, and Ick Choy. "Enhanced Dynamic Response of SRF-PLL System for High Dynamic Performance during Voltage Disturbance." Journal of Power Electronics 11, no. 3 (May 20, 2011): 369–74. http://dx.doi.org/10.6113/jpe.2011.11.3.369.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

25

Sun, Yin, E. de Jong, Xiongfei Wang, Dongsheng Yang, Frede Blaabjerg, Vladimir Cuk, and J. Cobben. "The Impact of PLL Dynamics on the Low Inertia Power Grid: A Case Study of Bonaire Island Power System." Energies 12, no. 7 (April 2, 2019): 1259. http://dx.doi.org/10.3390/en12071259.

Повний текст джерела

Анотація:

To prepare for the future high penetration level of renewable energy sources, the power grid’s technical boundaries/constraints for the correct operation of powerelectronics interfaced devices need to be further examined and defined. This paper investigates the challenge of integrating Voltage Source Converters (VSC) into low inertia power grids, where the system frequency can vary rapidly due to the low kinetic energy buffer available, which used to be provided by the rotational inertia of synchronous generators. The impact of rate of change of frequency (ROCOF) on the PLL dynamics and its subsequent influence on the VSC power stage output is explained. The Bonaire island network is presented as case study. The performance of the VSC is analyzed under a fast ROCOF event, which is triggered by a short circuit fault. A down-scaled experiment is used to validate the Bonaire island network simulation results. It shows that the phase angle error measured by the synchronous-reference frame phase-locked loop (SRF-PLL) is proportional to the slope of the ROCOF and inversely proportional to its controller integral gain constant.

Стилі APA, Harvard, Vancouver, ISO та ін.

26

Luhtala, Roni, Henrik Alenius, and Tomi Roinila. "Practical Implementation of Adaptive SRF-PLL for Three-Phase Inverters Based on Sensitivity Function and Real-Time Grid-Impedance Measurements." Energies 13, no. 5 (March 4, 2020): 1173. http://dx.doi.org/10.3390/en13051173.

Повний текст джерела

Анотація:

Rapidly increasing demand for renewable energy has created a need for the photovoltaic and wind farms to be placed in various locations that have diverse and possibly time-variant grid conditions. A mismatch between the grid impedance and output admittance of an inverter causes impedance-based stability issues, which appear as power quality problems and poor transient performance. Grid synchronization with phase-locked loop (PLL) introduces a negative-resistance-like behavior to inverter output admittance. High control bandwidth of the PLL makes the system sensitive to impedance-based stability issues when the inverter is connected to a weak grid that has high impedance. However, very conservative tunings lead to overly damped dynamic responses in strong grids, where the control performance and power quality can be improved by applying higher PLL control bandwidths. Continuous evaluation of grid conditions makes it possible to avoid the risk of instability and poor dynamic responses, as the inverter output admittance can be re-shaped online to continuously match the grid conditions. The present work proposes method for adaptive control of the PLL based on the real-time measurements of the grid impedance, applying pseudo-random binary sequence (PRBS) injections. The method limits the PLL bandwidth in weak grids to avoid stability issues and increases the control bandwidth in strong grids to improve voltage-tracking, and thus overall control performance. The method is verified through simulations and experimental laboratory tests in a kW-scale system. The results show that optimizing the PLL bandwidth with respect to the grid conditions is highly beneficial for system performance and stability.

Стилі APA, Harvard, Vancouver, ISO та ін.

27

Panda, Rakesh Kumar, Abheejeet Mohapatra, and Suresh C. Srivastava. "Enhancing inertia of solar photovoltaic-based microgrid through notch filter-based PLL in SRF control." IET Generation, Transmission & Distribution 14, no. 3 (February 14, 2020): 379–88. http://dx.doi.org/10.1049/iet-gtd.2018.7058.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

28

Jeraldine Viji, A., and T. Aruldoss Albert Victoire. "Enhanced PLL based SRF control method for UPQC with fault protection under unbalanced load conditions." International Journal of Electrical Power & Energy Systems 58 (June 2014): 319–28. http://dx.doi.org/10.1016/j.ijepes.2014.01.039.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

29

Zhou, Lili, Wei Han, Jia Qi, and Zhen Zhou. "Adaptive PI + VPI Harmonic Current Compensation Strategy under Weak Grid Conditions." Applied Sciences 13, no. 10 (May 12, 2023): 5983. http://dx.doi.org/10.3390/app13105983.

Повний текст джерела

Анотація:

With the increase of the penetration rate of renewable energy power generation in the power system, the power grid gradually tends to be weak. Under the scenario of nonlinear load connecting to weak power grid, the grid-side voltage will produce unbalance, distortion and frequency deviation due to the influence of large internal impedance, insufficient inertia, three-phase current unbalance and harmonics of weak power grid. The operation of active power filters (APF) under above conditions can lead to significant degradation in harmonic compensation performance. An adaptive proportional integral (PI) + vector PI (VPI) harmonic compensation strategy for a three-phase APF is proposed for use in complex conditions of weak grid. The strategy consists of an adaptive notch filter based synchronous phase-locked loop (ANF-PLL) and an adaptive PI + VPI current control method. In this strategy, a series of adaptive lattice notch filters are introduced to improve the accuracy of grid phase and frequency estimation under the condition of voltage unbalance, distortion and a large range of frequency deviation. Then the phase and frequency information are used in the Park transformation of harmonic detection and current compensation control and the update of PI + VPI current control law parameters. A VPI current tracking controller with adaptive resonant frequency is constructed, which can improve the gain of the resonant frequency point and ensure that the APF can maintain the best compensation performance under the above weak grid conditions. Finally, the simulation and experimental results indicate that the ANF-PLL shows a better phase and frequency estimation performance under complex conditions of weak grid than the conventional and notch filter based methods, and the harmonic compensation strategy presented in this paper achieves a significant performance improvement under complex conditions of weak grid compared with Fixed VPI/SRF-PLL strategy and adaptive VPI/NF-PLL strategy.

Стилі APA, Harvard, Vancouver, ISO та ін.

30

Echchaachouai, Amina, Soumia El Hani, and Ahmed Hammouch. "Sensorless Strategy of a Two-Level MPPT for Permanent Magnet Wind Generation System Using SRF-PLL." International Review on Modelling and Simulations (IREMOS) 11, no. 1 (February 28, 2018): 15. http://dx.doi.org/10.15866/iremos.v11i1.12650.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

31

Park, Chang-Seok, and Tae-Uk Jung. "A Study on DC Offset Compensator Using Double SRF-PLL for Single-Phase Grid-Connected Inverter." Journal of the Korean Institute of Illuminating and Electrical Installation Engineers 30, no. 6 (June 30, 2016): 87. http://dx.doi.org/10.5207/jieie.2016.30.6.087.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

32

Seong, Ui-Seok, and Seon-Hwan Hwang. "Analysis of Phase Error Effects Due to Grid Frequency Variation of SRF-PLL Based on APF." Journal of Power Electronics 16, no. 1 (January 20, 2016): 18–26. http://dx.doi.org/10.6113/jpe.2016.16.1.18.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

33

Venkatramanan, D., and Vinod John. "Dynamic Phasor Modeling and Stability Analysis of SRF-PLL-Based Grid-Tie Inverter Under Islanded Conditions." IEEE Transactions on Industry Applications 56, no. 2 (March 2020): 1953–65. http://dx.doi.org/10.1109/tia.2019.2962763.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

34

Jamaludin, N. F., A. M. Saidina Omar, S. S. M. Isa, N. D. Ahmad, and S. S. Ramli. "Comparison techniques using phase – loop locked (PLL) and synchronous references frame (SRF) controller to mitigate voltage flicker." Journal of Physics: Conference Series 1349 (November 2019): 012124. http://dx.doi.org/10.1088/1742-6596/1349/1/012124.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

35

Sureshbabu, Sabisha, and Aseem K. "An Efficient Control Scheme Based on PLL Integrated PI Controller for Grid-connected Solar Photovoltaic Systems." Trends in Sciences 19, no. 16 (August 15, 2022): 5699. http://dx.doi.org/10.48048/tis.2022.5699.

Повний текст джерела

Анотація:

The market for solar energy is growing these days, thanks to recent developments in Photovoltaic (PV) systems. The integration of solar energy to the grid is required for its optimum utilization. A novel control of a single stage 3 phase grid connected solar inverter is presented in this paper. A PV array, Voltage Source Inverter (VSI) for converting dc to ac, and a filter that connects it to the grid are the major components of the proposed system. The inverter output is regulated with respect to the grid using Synchronous Reference Frame (SRF) control. A 3-phase Phase Locked Loop (PLL) is used to lock the grid frequency and phase in relation to inverter output voltage. The Perturb and Observe (P&O) algorithm is used to obtain the reference voltage corresponding to the maximum PV power. To remove the high frequency harmonics, the inverter output is combined with an LCL filter. The dynamic performance of the proposed system under the number of stochastic environmental conditions are validated using MATLAB Simulink platform. HIGHLIGHTS The proposed PLL integrated PI controller provided high robustness under stochastic environmental conditions Enhanced system dynamic performance and accurate MPP tracking The inverter output is free from the high frequency harmonics Improved control performance GRAPHICAL ABSTRACT

Стилі APA, Harvard, Vancouver, ISO та ін.

36

Mulolani, Francis, Francis Kafata, and Esau Zulu. "Design and Control of a Grid-connected Seven Level Inverter for Photovoltaic Applications." Zambia ICT Journal 3, no. 1 (March 7, 2019): 21–27. http://dx.doi.org/10.33260/zictjournal.v3i1.72.

Повний текст джерела

Анотація:

This paper presents the design and closed-loop current control of a grid connected seven-level, 3-phase diode-clamped multilevel inverter for Photovoltaic (PV) applications. The proposed closed loop current control technique is based on the voltage-oriented proportional integral (PI) controller theory. The modulation technique used is level-shifted-carrier sinusoidal pulse width modulation (SPWM). The gain values of PI controller were selected to achieve good current quality and dynamic response. Grid synchronization was achieved by using a synchronous-reference frame phase-locked loop (SRF-PLL). Matlab/Simulink was used for the control system design and simulation. The simulation results show that a 1.34% total harmonic distortion (THD) of the output current was achieved which is within the allowable current distortion limits by international standards. The stability of the system was analyzed using pole-zero mapping and root locus.

Стилі APA, Harvard, Vancouver, ISO та ін.

37

Gortyal, Akash. "Design and Implementation of Multilevel Inverter with Various MPPT Algorithms for Optimal Tracking of PV System." International Journal for Research in Applied Science and Engineering Technology 9, no. VII (July 31, 2021): 3839–49. http://dx.doi.org/10.22214/ijraset.2021.37210.

Повний текст джерела

Анотація:

In this paper the different algorithm is performed in MATLAB Simulink to extract large amounts of energy from the pv system. MPPT algorithm is used to reduce complexity and to get better results, we used to perturb and observation, incremental conductance and fuzzy logic algorithm. A three-phase NPC inverter is used to connect the PV array with grid system, The PWM control method is used for the producing the PWM inverter signals. it contains PV array, dc / dc boost, three level NPC inverter. To get the synchronization between PV system and grid the synchronous reference frame theory with PLL block is used. The SRF theory will transform the three phase load currents (ia, ib, ic) to the two instantaneous active (id) and reactive (iq) components. The MATLAB simulation is preformed and we get a constant high output voltage from low input voltage and by changing the irradiance and temperature.

Стилі APA, Harvard, Vancouver, ISO та ін.

38

Vijayapriya, R., P. Raja, and M. P. Selvan. "Enhanced method of rotor speed and position estimation of permanent magnet synchronous Machine based on stator SRF-PLL." Engineering Science and Technology, an International Journal 20, no. 5 (October 2017): 1450–59. http://dx.doi.org/10.1016/j.jestch.2017.09.004.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

39

Hwang, Seon-Hwan, and Sung-Woo Seo. "Offset error compensation algorithm for grid voltage measurement of grid-connected single-phase inverters based on SRF-PLL." Journal of Power Electronics 20, no. 3 (March 31, 2020): 794–801. http://dx.doi.org/10.1007/s43236-020-00077-9.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

40

Arulmurugan, R. "Design and testing of stability improvement of nine multi-level H-Inverter for distribution system." IAES International Journal of Robotics and Automation (IJRA) 8, no. 4 (December 1, 2019): 245. http://dx.doi.org/10.11591/ijra.v8i4.pp245-255.

Повний текст джерела

Анотація:

<p class="Abstract">In this article, a solitary phase nine-level series connected H-Bridge powered by photovoltaic MPPT based SHAPF in view of basic controller is proposed. SRF is utilized for reference input current extraction and to create pulses for the SHAPF. The principle point of the cascaded bridge is to dispense harmonics, enhance power factor and reactive energy compensation of the single-phase distribution framework. The suggested control calculation has two parts, changing the load current into stationary reference outline directions and estimation of peak amplitude of load currents. Consequently, a basic and dependable controller effortlessly of execution was created. The calculation for single-phase SHAF is intending to perform with exact tracking performance under step changes in load currents and to give great dynamic compensation. In this article, synchronous reference theory PLL with Inverse-Park change is adopted for producing quadrature part of current. The execution of the control calculation is tried and assessed utilizing MATLAB/Simulink tool.</p>

Стилі APA, Harvard, Vancouver, ISO та ін.

41

Kang, Jin-Wook, Ki-Woong Shin, Hoon Lee, Kyung-Min Kang, Jintae Kim, and Chung-Yuen Won. "A Study on Stability Control of Grid Connected DC Distribution System Based on Second Order Generalized Integrator-Frequency Locked Loop (SOGI-FLL)." Applied Sciences 8, no. 8 (August 16, 2018): 1387. http://dx.doi.org/10.3390/app8081387.

Повний текст джерела

Анотація:

This paper studies a second order generalized integrator-frequency locked loop (SOGI-FLL) control scheme applicable for 3-phase alternating current/direct current (AC/DC) pulse width modulation (PWM) converters used in DC distribution systems. The 3-phase AC/DC PWM converter is the most important power conversion system of DC distribution, since it can boost 380 Vrms 3-phase line-to-line AC voltage to 700 Vdc DC output with various DC load devices and grid voltages. The direct-quadrature (d-q) transformation, positive sequence voltage extraction, proportional integral (PI) voltage/current control, and phase locked loop (PLL) are necessary to control the 3-phase AC/DC PWM converter. Besides, a digital filter, such as low pass filter and all pass filter, are essential in the conventional synchronous reference frame-phase locked loop (SRF-PLL) method to eliminate the low order harmonics of input. However, they limit the bandwidth of the controller, which directly affects the output voltage and load of 3-phase AC/DC PWM converter when sever voltage fluctuation, such as sag, swell, etc. occurred in the grid. On the other hand, the proposed control method using SOGI-FLL is able to do phase angle detection, positive sequence voltage extraction, and harmonic filtering without additional digital filters, so that more stable and fast transient control is achieved in the DC distribution system. To verify the improvement of the characteristics in the unbalanced voltage and frequency fluctuation of the grid, a simulation and experiment are implemented with 50 kW 3-phase AC/DC PWM converter used in DC distribution.

Стилі APA, Harvard, Vancouver, ISO та ін.

42

Ding, Bao, Gong Zhang, Yong Ming Zhang, and Liang Zhao. "A Phase Locked Loop Method for Low Voltage Ride-Through Control in Three-Phase Three-Wire Photovoltaic Grid System." Applied Mechanics and Materials 415 (September 2013): 174–79. http://dx.doi.org/10.4028/www.scientific.net/amm.415.174.

Повний текст джерела

Анотація:

Low voltage ride through (LVRT) is regarded as one of the biggest challenges in photovoltaic grid equipments designing, manufacturing and control technology. The fast and accurate automatic phase locked control is the premise to achieve photovoltaic grid low voltage ride through. Considering that the traditional phase locked loop method is difficult to adapt the performance requirements of low voltage ride through (LVRT) in three-phase three-wire photovoltaic grid system, this paper presents a new three-phase unbalanced phase locked loop method. Improved second order generalized integral orthogonal signal generator (SOGI-OSG) is used for line voltage detection; Synchronous reference frame for phase locked loop (SRF-PLL) is used for line voltage phase locked and phase angle detection; Heron formula and Sine theorem is adopted to calculate the three-phase phase voltage amplitude and phase angle. Research results show that when grid voltage dips, this phase locked loop method can detect the fault signal accurately. It provides a technical support for photovoltaic grid low voltage ride through system.

Стилі APA, Harvard, Vancouver, ISO та ін.

43

Mao, Peng, Mao Zhang, and Weiping Zhang. "A Canonical Small-Signal Linearized Model and a Performance Evaluation of the SRF-PLL in Three Phase Grid Inverter System." Journal of Power Electronics 14, no. 5 (September 20, 2014): 1057–68. http://dx.doi.org/10.6113/jpe.2014.14.5.1057.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

44

Li Tong, Xudong Zou, ShuShuai Feng, Yu Chen, Yong Kang, Qingjun Huang, and Yanrun Huang. "An SRF-PLL-Based Sensorless Vector Control Using the Predictive Deadbeat Algorithm for the Direct-Driven Permanent Magnet Synchronous Generator." IEEE Transactions on Power Electronics 29, no. 6 (June 2014): 2837–49. http://dx.doi.org/10.1109/tpel.2013.2272465.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

45

Bimarta, Rizka, Thuy Vi Tran, and Kyeong-Hwa Kim. "Frequency-Adaptive Current Controller Design Based on LQR State Feedback Control for a Grid-Connected Inverter under Distorted Grid." Energies 11, no. 10 (October 8, 2018): 2674. http://dx.doi.org/10.3390/en11102674.

Повний текст джерела

Анотація:

This paper proposes a frequency-adaptive current control design for a grid-connected inverter with an inductive–capacitive–inductive (LCL) filter to overcome the issues relating to both the harmonic distortion and frequency variation in the grid voltage. The current control scheme consists of full-state feedback control to stabilize the system and integral control terms to track the reference in the presence of disturbance and uncertainty. In addition, the current controller is augmented with resonant control terms to mitigate the harmonic component. The control scheme is implemented in the synchronous reference frame (SRF) to effectively compensate two harmonic orders at the same time by using only one resonant term. Moreover, to tackle the frequency variation issue in grid voltage, the frequency information which is extracted from the phase-locked loop (PLL) block is processed by a moving average filter (MAF) for the purpose of eliminating the frequency fluctuation caused by the harmonically distorted grid voltage. The filtered frequency information is employed to synthesize the resonant controller, even in the environment of frequency variation. To implement full-state feedback control for a grid-connected inverter with an LCL filter, all the state variables should be available. However, the increase in number of sensing devices leads to the rise of cost and complexity for hardware implementation. To overcome this challenge, a discrete-time full-state current observer is introduced to estimate all the system states. When the grid frequency is subject to variation, the discrete-time implementation of the observer in the SRF requires an online discretization process because the system matrix in the SRF includes frequency information. This results in a heavy computational burden for the controller. To resolve such a difficulty, a discrete-time observer in the stationary reference frame is employed in the proposed scheme. In the stationary frame, the discretization of the system model can be accomplished with a simple offline method even in the presence of frequency variation since the system matrix does not include the frequency. To select desirable gains for the full-state feedback controller and full-state observer, an optimal linear quadratic control approach is applied. To validate the practical effectiveness of the proposed frequency-adaptive control, simulation and experimental results are presented.

Стилі APA, Harvard, Vancouver, ISO та ін.

46

Ibarra, Luis, Pedro Ponce, Raja Ayyanar, and Arturo Molina. "A Non-Adaptive Single-Phase PLL Based on Discrete Half-Band Filtering to Suppress Severe Frequency Disturbances." Energies 13, no. 7 (April 5, 2020): 1730. http://dx.doi.org/10.3390/en13071730.

Повний текст джерела

Анотація:

The interconnection of new generating and storing devices to the power grid imposes the necessity of synchronizing, so the power flow can be manipulated and distributed. In the presence of an increasingly perturbed electric grid, many proposals of novel and modified synchronization techniques attained enough robustness to deal with known perturbations. However, such proposals exhibit drawbacks on their own, leaving open enhancement opportunities, mostly over their discrete implementation—e.g., sampling issues and not-considered inter/harmonics—and their inherent complexity—e.g., the need for frequency adaptability. In this work, three traditional synchronous reference frame (SRF) phase-locked loops (PLL) are modified to implement discrete filtering, such as the well-known proposals based on moving average filters (MAFs), to avoid the problems mentioned above, known for affecting the MAF’s performance. This proposal makes use of discrete, efficient units modularly assembled to yield a signal’s average, based on elliptic half-band filters. The proposed PLLs were tested and exhibited clear advantages—robustness against frequency disturbances—over MAF-based equivalents at standardized tests over a typical simulation environment, setting through this work an initial milestone for its verification and further incorporation in more complex synchronization topologies.

Стилі APA, Harvard, Vancouver, ISO та ін.

47

Qashou, Akram, Sufian Yousef, Abdallah A. Smadi, and Amani A. AlOmari. "Distribution system power quality compensation using a HSeAPF based on SRF and SMC features." International Journal of System Assurance Engineering and Management 12, no. 5 (July 24, 2021): 976–89. http://dx.doi.org/10.1007/s13198-021-01185-w.

Повний текст джерела

Анотація:

AbstractThe purpose of this paper is to describe the design of a Hybrid Series Active Power Filter (HSeAPF) system to improve the quality of power on three-phase power distribution grids. The system controls are comprise of Pulse Width Modulation (PWM) based on the Synchronous Reference Frame (SRF) theory, and supported by Phase Locked Loop (PLL) for generating the switching pulses to control a Voltage Source Converter (VSC). The DC link voltage is controlled by Non-Linear Sliding Mode Control (SMC) for faster response and to ensure that it is maintained at a constant value. When this voltage is compared with Proportional Integral (PI), then the improvements made can be shown. The function of HSeAPF control is to eliminate voltage fluctuations, voltage swell/sag, and prevent voltage/current harmonics are produced by both non-linear loads and small inverters connected to the distribution network. A digital Phase Locked Loop that generates frequencies and an oscillating phase-locked output signal controls the voltage. The results from the simulation indicate that the HSeAPF can effectively suppress the dynamic and harmonic reactive power compensation system. Also, the distribution network has a low Total Harmonic Distortion (< 5%), demonstrating that the designed system is efficient, which is an essential requirement when it comes to the IEEE-519 and IEC 61,000–3-6 standards.

Стилі APA, Harvard, Vancouver, ISO та ін.

48

Natesan, Saritha, and Jamuna Venkatesan. "A SRF-PLL Control Scheme for DVR to Achieve Grid Synchronization and PQ Issues Mitigation in PV Fed Grid Connected System." Circuits and Systems 07, no. 10 (2016): 2996–3015. http://dx.doi.org/10.4236/cs.2016.710256.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

49

Kwon, Young, Ui-Seok Seong, and Seon-Hwan Hwang. "A Study on Effects of Offset Error during Phase Angle Detection in Grid-tied Single-phase Inverters based on SRF-PLL." Journal of the Korean Institute of Illuminating and Electrical Installation Engineers 29, no. 10 (October 30, 2015): 73–82. http://dx.doi.org/10.5207/jieie.2015.29.10.073.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

50

Chong, K. V. R., Y. Hoon, and H. Ahmad. "Design and simulation of dynamic voltage restorer (DVR) for power quality improvement." Journal of Physics: Conference Series 2222, no. 1 (May 1, 2022): 012003. http://dx.doi.org/10.1088/1742-6596/2222/1/012003.

Повний текст джерела

Анотація:

Abstract Power quality (PQ) is one of the main issues faced in the present era. The PQ issues such as voltage sags, swells, harmonics, and unbalance as well as the impact on sensitive loads are often occurred in any power distribution system. To tackle the issues, a powerful dynamic voltage restorer (DVR) is commonly installed. However, the existing control algorithms for DVR are found to be complex, potentially increases computational burden to the controller. Therefore, in this paper, a new simplified control algorithm which utilizes the strengths of synchronous rotating frame (SRF) and phase-locked loop (PLL) concepts, is proposed to better manage operation of DVR. The DVR system is modelled and simulated by using MATLAB/Simulink platform. Performance of the newly proposed algorithm for DVR is tested in three-phase system with voltage sags, swells, harmonics and unbalances conditions. From the findings, it can be concluded that the proposed algorithm for DVR which installed in a three-phase power distribution system effectively mitigated the voltage sags, swells and unbalances conditions and, for harmonics condition, it is found to be able to minimize and contain the harmonic contents within the acceptable level.

Стилі APA, Harvard, Vancouver, ISO та ін.

Статті в журналах з теми "SRF-PLL"

Оформте джерело за APA, MLA, Chicago, Harvard та іншими стилями