Дисертації з теми "RSA cryptosystem"
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1
Clevenger, Mark Allen. "Data encryption using RSA public-key cryptosystem." Virtual Press, 1996. http://liblink.bsu.edu/uhtbin/catkey/1014844.
Повний текст джерелаАнотація:
The RSA data encryption algorithm was developed by Ronald Rivest, Adi Shamir and Leonard Adelman in 1978 and is considered a de facto standard for public-key encryption. This computer science thesis demonstrates the author's ability to engineer a software system based on the RSA algorithm. This adaptation of the RSA encryption process was devised to be used on any type of data file, binary as well as text. In the process of developing this computer system, software tools were constructed that allow the exploration of the components of the RSA encryption algorithm. The RSA algorithm was further interpolated as a method of providing software licensing, that is, a manner in which authorization to execute a particular piece of software can be determined at execution time. This document summarizes the RSA encryption process and describes the tools utilized to construct a computer system based on this algorithm.Department of Computer Science
2
Yesil, Soner. "A High-speed Asic Implementation Of The Rsa Cryptosystem." Master's thesis, METU, 2003. http://etd.lib.metu.edu.tr/upload/3/1124783/index.pdf.
Повний текст джерелаАнотація:
This thesis presents the ASIC implementation of the RSA algorithm, which is one of the most widely used Public Key Cryptosystems (PKC) in the world. In RSA Cryptosystem, modular exponentiation of large integers is used for both
encryption and decryption processes. The security of the RSA increases as the number of the bits increase. However, as the numbers become larger (1024-bit or higher) the challenge is to provide architectures, which can be implemented in hardware, operate at high clock speeds, use a minimum of resources and can be used
in real-time applications.
In this thesis, a semi-custom VLSI implementation of the RSA Cryptosystem is performed for both 512-bit and 1024-bit processes using 0.35µm AMI Semiconductor Standard Cell Libraries. By suiting the design into a systolic and regular architecture, the broadcasting signals and routing delays are minimized in the implementation. With this regular architecture, the results of 3ns clock period (627Kbps) using 87K gates (8.7mm2 with I/O pads) for the 512-bit implementation, and 4ns clock period (237Kps) using 132K gates (10.4mm2 with I/O pads) for the 1024-bit implementation have been achieved. These results are obtained for the worst-case conditions and they include the post-layout routing delays. The design is also verified in real time using the Xilinx V2000E FPGA on the Celoxica RC1000 Hardware. The 1024-bit VLSI implementation has been sent to IMEC for fabrication as a prototype chip through Europractice Multi-Project Wafer (MPW) runs.
3
Dighe, Ashish Arun. "Implementation of RSA Cryptosystem for Next Generation RFID Tags." Thèse, Université d'Ottawa / University of Ottawa, 2011. http://hdl.handle.net/10393/19856.
Повний текст джерелаАнотація:
This thesis addresses concepts of implementing a RSA cryptosystem on a passive RFID tag. With a limited number of public key cryptosystems on passive RFID platforms, the proposed algorithm makes use of Montgomery multiplication primitives to reduce the amount of computation required on the power constrained tag therefore making the proposition viable. Public key cryptography is being suggested for next generation RFID systems to reduce the number of possible attack vectors native to this type of technology. By estimating the area, power and time constraints of the RFID platform, it was determined that the area constraint was the critical variable in determining the maximum implementable security variable. Although the application of this algorithm has been targeted for passive HF RFID platforms, the algorithm could be used in other low power, sized constrained applications.
4
Таранова, Д. В. "Шифрування з відкритим кодом. Алгоритм RSA". Thesis, Сумський державний університет, 2015. http://essuir.sumdu.edu.ua/handle/123456789/43423.
Повний текст джерела
5
Al-Tuwaijry, Fahd A. A. "Fast algorithms for implementation of public-key cryptosystems : VLSI simulation of modified algorithm to increase the speed of public-key cryptosystem (RSA) implementation." Thesis, University of Bradford, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.282982.
Повний текст джерела
6
Villena, Reynaldo Caceres. "Reconstrução da chave secreta do RSA multi-primo." Universidade de São Paulo, 2013. http://www.teses.usp.br/teses/disponiveis/45/45134/tde-13082014-141746/.
Повний текст джерелаАнотація:
Em 2009, N. Heninger e H. Shacham apresentaram um algoritmo de reconstrução que permite recuperar a chave secreta sk do criptossistema RSA básico em tempo polinomial tendo em forma aleatória 27 % dos seus bits. Sabemos que podemos obter uma versão com erros (bits modicados) da chave secreta RSA graças aos ataques cold boot. O algoritmo apresentado por Heninger-Shacham corrige esses erros fazendo uso das relações matemáticas que existe entre as chaves pública e secreta do criptossistema RSA básico. O objetivo deste trabalho é estudar esse algoritmo para implementar e analisar seu análogo para o criptossistema RSA multi-primo. Os resultados obtidos mostram que para reconstruir a chave secreta sk do criptossistema RSA u-primos é preciso ter uma fração de bits corretos maior a 2 - 2^((u+2)/(2u+1)), mostrando assim que a segurança oferecida pelo criptossistema RSA multi-primo (u>/ 3) é maior com relação ao criptossistema RSA básico (u = 2).In 2009, N. Heninger and H. Shacham presented an algoritm for reconstructing the secret key sk of the basic RSA cryptosystem in polynomial time With a fraction of random bits greater or equal to 0.27 of its bits. We know that secret key with errors sk can be obtained from DRAM using cold-boot attacks. The Heninger and Shacham\'s algorithm xes these errors using the redundancy of secret and public key of basic RSA cryptosystem. In this work, the topic is to study this algoritm to implement and analyze its analogous for the multi-prime RSA cryptosystem. Our obtained results show the secret key sk of multi-prime RSA cryptosystem can be Reconstructed having a fraction equal or greater than 2 - 2^((u+2)/(2u+1)) of random bits. therefore the security of multi-prime RSA cryptosystem (u >/ 3) is greater than basic RSA cryptosystem (u = 2).
7
Klembalski, Katharina. "Cryptography and number theory in the classroom -- Contribution of cryptography to mathematics teaching." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-80390.
Повний текст джерелаАнотація:
Cryptography fascinates people of all generations and is increasingly presented as an example for the relevance and application of the mathematical sciences. Indeed, many principles of modern cryptography can be described at a secondary school level. In this context, the mathematical background is often only sparingly shown. In the worst case, giving mathematics this character of a tool reduces the application of mathematical insights to the message ”cryptography contains math”. This paper examines the question as to
what else cryptography can offer to mathematics education. Using the RSA cryptosystem and related content, specific mathematical competencies are highlighted that complement standard teaching, can be taught with cryptography as an example, and extend and deepen key mathematical concepts.
8
Wang, Wei. "Accelerating Cryptosystems on Hardware Platforms." Digital WPI, 2014. https://digitalcommons.wpi.edu/etd-dissertations/109.
Повний текст джерелаАнотація:
In the past decade, one of the major breakthroughs in computer science theory is the first construction of fully homomorphic encryption (FHE) scheme introduced by Gentry. Using a FHE one may perform an arbitrary numbers of computations directly on the encrypted data without revealing of the secret key. Therefore, a practical FHE provides an invaluable security application for emerging technologies such as cloud computing and cloud-based storage. However, FHE is far from real life deployment due to serious efficiency impediments. The main part of this dissertation focuses on accelerating the existing FHE schemes using GPU and hardware design to make them more efficient and practical towards real-life applications. Another part of this dissertation is for the hardware design of the large key-size RSA cryptosystem. As the Moore law continues driving the computer technology, the key size of the Rivest-Shamir-Adelman (RSA) encryption is necessary to be upgraded to 2048, 4096 or even 8192 bits to provide higher level security. In this dissertation, the FFT multiplication is employed for the large-size RSA hardware design instead of using the traditional interleaved Montgomery multiplication to show the feasibility of the FFT multiplication for large-size RSA design.
9
Хома, Любава Віталіївна. "Дослiдження криптографiчних протоколiв електронного голосування". Bachelor's thesis, КПІ ім. Ігоря Сікорського, 2021. https://ela.kpi.ua/handle/123456789/44250.
Повний текст джерелаАнотація:
Робота обсягом 45 сторiнок мiстить 4 рисунки, 12 таблиць та 15 лiтературних посилань.
Метою роботи є огляд iснуючих систем електронного голосування, а також порiвняння їх можливостей та критерiїв, яким вiдповiдає повнiстю, яким частково. Вибiр системи електронного голосування, для якої планується виконати модифiкацiю.
Об’єктом дослiдження в данiй роботi є системи електронного голосування i криптографiчний протоколи електронного голосування.
Предметом дослiдження є математичнi моделi i характеристики алгоритмiв протоколiв електронного голосування.
Виконано огляд до рiзних систем електронного голосування.
Базуючись на результатах проведеного порiвняльного аналiзу наявних схем електронного голосування, у роботi запропоновано модифiкацiю, яка спрощує систему електронних виборiв з точки зору швидкодiї та обсягу необхiдної пам’ятi, для малоресурсної обчислювальної технiки.This work consists of 45 pages, includes 4 illustrations, 9 tables and 10 literature references. The aim of this qualification work is to review existing e-voting systems, to compare their capabilities and criteria, which meet in full, in part. Select the electronic voting system for which the modification will be proposed. The object of the work is electronic voting systems and cryptographic protocols of e-voting. The subject of the work is mathematical models and algorithms of evoting protocols. A review of various electronic voting systems has been performed. Based on the results of a comparative analysis of existing electronic voting schemes, modification that simplifies the system of electronic elections in terms of speed and amount of memory required. For the possibility of using low-power equipment.
10
Chung, Jaewook. "Issues in Implementation of Public Key Cryptosystems." Thesis, University of Waterloo, 2006. http://hdl.handle.net/10012/2853.
Повний текст джерелаАнотація:
A new class of moduli called the low-weight polynomial form integers (LWPFIs) is introduced. LWPFIs are expressed in a low-weight, monic polynomial form, p = f(t). While the generalized Mersenne numbers (GMNs) proposed by Solinas allow only powers of two for t, LWPFIs allow any positive integers. In our first proposal of LWPFIs, we limit the coefficients of f(t) to be 0 and ±1, but later we extend LWPFIs to allow any integer of less than t for the coefficients of f(t). Modular multiplication using LWPFIs is performed in two phases: 1) polynomial multiplication in Z[t]/f(t) and 2) coefficient reduction. We present an efficient coefficient reduction algorithm based on a division algorithm derived from the Barrett reduction algorithm. We also show a coefficient reduction algorithm based on the Montgomery reduction algorithm. We give analysis and experimental results on modular multiplication using LWPFIs. New three, four and five-way squaring formulae based on the Toom-Cook multiplication algorithm are presented. All previously known squaring algorithms are symmetric in the sense that the point-wise multiplication step involves only squarings. However, our squaring algorithms are asymmetric and use at least one multiplication in the point-wise multiplication step. Since squaring can be performed faster than multiplication, our asymmetric squaring algorithms are not expected to be faster than other symmetric squaring algorithms for large operand sizes. However, our algorithms have much less overhead and do not require any nontrivial divisions. Hence, for moderately small and medium size operands, our algorithms can potentially be faster than other squaring algorithms. Experimental results confirm that one of our three-way squaring algorithms outperforms the squaring function in GNU multiprecision library (GMP) v4. 2. 1 for certain range of input size. Moreover, for degree-two squaring in Z[x], our algorithms are much faster than any other squaring algorithms for small operands.
We present a side channel attack on XTR cryptosystems. We analyze the statistical behavior of simultaneous XTR double exponentiation algorithm and determine what information to gather to reconstruct the two input exponents. Our analysis and experimental results show that it takes U1. 25 tries, where U = max(a,b) on average to find the correct exponent pair (a,b). Using this result, we conclude that an adversary is expected to make U0. 625 tries on average until he/she finds the correct secret key used in XTR single exponentiation algorithm, which is based on the simultaneous XTR double exponentiation algorithm.
11
Joseph, George. "Design and implementation of high-speed algorithms for public-key cryptosystems." Diss., Pretoria : [s.n.], 2005. http://upetd.up.ac.za/thesis/available/etd-06092005-122043.
Повний текст джерела
12
Chen, Bi-Hung, and 陳碧弘. "The RSA Cryptosystem over Matrices." Thesis, 1997. http://ndltd.ncl.edu.tw/handle/57940589980251673943.
Повний текст джерелаАнотація:
碩士東海大學
數學系
85
An extension of the RSA cryptosystem to the matrices over Z/mZ is proposed. We retain the properties of the original RSA system, including encryption, decryption, signature, and authentication. Instead of dealing with message units one at a time, we take care of several message units together into a matrix. To achieve this goal, we give three classes of matrices as our message matrices, they are diagonal matrices, upper triangular matrices, and nonsingular matrices. To avoid the nilpotency of these matrices, we make some restrictions on the entries of them. Upon some improvements, we find the trapdoor of our system, it is called the exponent in this thesis. After the complexity analysis, we conclude that the extended system has the same level of security as the original system. Finally, we compute one example to show that the method can be used in practice.
13
Pan, Yu-Jen, and 潘友仁. "The implementation of RSA cryptosystem." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/96031291696765382324.
Повний текст джерелаАнотація:
碩士南台科技大學
電子工程系
94
With the fast development in internet networks and the increasing needs of communication products, the question of information safety is more and more important. To provide such security services, most systems use public key cryptography. Among the various public key cryptography algorithms, the RSA proposed by Rivest, Shamir, and Adleman is one of the most popular and reliable method that has been widely used today to provide secure data transmission. In this thesis, we focus on the hardware implementation of the RSA cryptosystem. For area consideration, we have proposed a new logic implementation method for the serial-parallel multiplier to reduce the area of RSA system. By using our new multiplier the area of the RSA system can be efficiently reduced as comparing to the previous methods. Finally, we realize the RSA cryptosystem on a Altera FPGA.
14
Kuo, Yu-Hung, and 郭育宏. "RSA Cryptosystem for Group Broadcast." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/29818530827787016499.
Повний текст джерелаАнотація:
碩士國立臺灣海洋大學
電機工程學系
102
The demand of public encrypt communication increases significantly due to the fast development of internet technology. Although symmetric encryption systems have the properties of being easy and secure in data transmission, they can’t achieve the demand of digital signature. Since the RSA non-symmetric encryption scheme is introduced to the public, it jointly solves the data transmission and digital signature problems, being difficult to be resolved in the internet, and thus leads to more applications. Based on the RSA algorithm and the Carmichael function, the RSA cryptosystem is extended for group broadcast. Through the Carmichael function in the exponent part of the RSA cryptosystem equations, this scheme tries to find the decipher keys other than the single one associated with the Euler function, so that multiple decipher key spaces can be obtained. In addition, through the combinations of decipher spaces generated by different modulo spaces, the scheme seeks the proper decipher key space from the prime table to construct the required groups. Therefore, the RSA cryptosystem, originally designed for one-to-one communications, can be rectified to meet the secure demand of one-to-many group communications, and extended to meet the secure demand of many-to-many group communications. The RSA group broadcast cryptosystem has the potential applications to conditional access (cable pay-channel TV, internet conference) and cloud distribution.
15
Chen, Chao-Yang, and 陳昭陽. "Testable Design of RSA Cryptosystem Core." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/21392379361480598782.
Повний текст джерелаАнотація:
碩士大葉大學
電機工程學系碩士班
93
Based on the modified Montgomery’s algorithm, we design two bit-level systolic RSA cryptosystem cores. In order to reduce the testing cost, we introduce the C-testable methodology to the original systolic RSA cryptosystem cores and obtain two testable RSA cryptosystem cores. The testable RSA cryptosystem cores take 0.53M clock cycles to finish a 512-bit RSA operation in average and the clock rate is about 233MHz in pipeline. With the C-testable methodology, it only needs 130 and 48 test patterns to test the testable bit-interleaved and block-interleaved RSA cryptosystem cores respectively.
16
Tsai, Bin-Yan, and 蔡秉諺. "Radix-4 Systolic RSA Cryptosystem Chip." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/29133201503068752955.
Повний текст джерелаАнотація:
碩士大葉大學
電機工程學系碩士班
92
In this thesis, bit-level systolic arrays for RSA public key cryptosystem are designed based on an improved Montgomery’s algorithm. The utilization of the multiplier is 100% since we can interleave the square and multiplication operation in the modular exponentiation algorithm. A fastest radix-4 systolic bit-interleaving RSA cryptosystem is designed based on modified Booth’s algorithm. Due to reduced number of iterations and pipelining, our radix-4 RSA cryptosystem is four times faster than the conventional RSA cryptosystem. The critical path delay of our design is only 2.43ns. It takes about 0.26M clock cycles to finish a 512-bit modular exponentiation. Therefore, the baud rate is about 656Kb/s at 333MHz clock. Keyword: Montgomery’s algorithm, Booth Algorithm, RSA, public-key cryptosystem.
17
Tetikoglu, Ipek. "The Elgamal Cryptosystem is better than the RSA Cryptosystem for mental poker." 2007. http://etd1.library.duq.edu/theses/available/etd-03192007-133602/unrestricted/TetikogluThesis.pdf.
Повний текст джерела
18
Peng, Yanqun. "High-speed implementation of the RSA cryptosystem." Thesis, 1995. http://hdl.handle.net/1957/35318.
Повний текст джерелаАнотація:
A public key cryptosystem allows two or more parties to securely communicate
over an insecure channel without establishing a physically secure channel for key
exchange. The RSA cryptosystem is the most popular public key cryptosystem ever
invented. It is based on the difficulty of factoring large composite numbers. Once the RSA
system is setup, i.e., the modulus, the private and public exponents are determined, and the
public components have been published, the senders as well as the receivers perform a
single operation for signing, encryption, decryption, and verification. This operation is the
computation of modular exponentiation. In this thesis, we focus on fast implementations
of the modular exponentiation operation. Several methods for modular exponentiation are
presented, including the binary method and the m-ary method. We give a general algorithm
of implementing the m-ary method, and some examples of the quaternary method
and the octal method. The standard multiplication and squaring algorithms are also discussed
as methods to implement the modular multiplication and squaring operations. Two
methods for performing the modular multiplication operation are given: the multiply and
reduce method and the Montgomery method. The Montgomery product algorithm is used
in the implementation of the modular exponentiation operation. The algorithms presented
in this thesis are implemented in C and 16-bit in-line 80486 assembly code. We have performed
extensive testing of the code, and obtained timing results which are given in the
last chapter of the thesis.Graduation date: 1995
19
Wang, Pei-Fong, and 王培峰. "Architecture Design of RSA Public-Key Cryptosystem." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/79794256068686480142.
Повний текст джерелаАнотація:
碩士國立交通大學
電子研究所
84
RSA密碼系統是目前最廣為使用的公匙密碼系統之一。通常為確保資料的 安全性，大數值之 運算常造成耗面積的硬體設計與冗長的計算時間。在 這篇論文中，我們針對RSA密碼系統提 出一個新的架構以降低硬體設計 的複雜性而無損計算之速度。藉由Montgomery演算法在模 乘法上所提 供的優點並採取次方從最低位元開始處理之乘冪方式，一種有別於以往的 管線 設計得以順利運作，且形成了進一步面積最佳化的基礎。此外， 為提昇計算速度，我們也 提出了兩種不同的方式來修改Montgomery演 算法。其一為透過交錯連續之運算，將臨界路 徑再加以管線化細分， 使得最小之時序週期約可降至一個全加器的延遲時間左右。其二， 藉 由針對Montgomery演算法中平行輸入項的特殊安排，此演算法被修改成可 以只接受循序 輸入項來計算模平方，因而大大增加了乘冪運算的效率 。我們已完成Verilog在暫存器轉 移層次的模擬，證實所提出的架構 與加速技巧確實可行。 RSA public-key cryptosystem is one of the best known and most widely used cryptosystems. For reasons of data security is usually involves huge computations that require lots of hardware area and processing time. In this thesis, we propose a new architecture to reduce the hardware complexity with no compromise in speed. By combining the advantage of Montgomery algorithm in modular multiplication with that of LSB-first algorithm in modular exponentiation, a different pipelining method is presented for further area optimization. As for speed, we modify the Montgomery algorithm in two way. Interleave each iteration to pipeline the critical path, and update the parallel input on every cycle for serial squaring. The first technique implies that the minimum cycle time can be reduced to approximately a single full adder delay, and the second enables more efficient computations. Verilog simulation on register- transfer-level has proved that our design and speed-up techniques are feasible.
20
劉俊麟. "Radix-4 hign speed RSA cryptosystem chip." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/63439636910331793849.
Повний текст джерела
21
Liu, Chi-Chang, and 劉奇昌. "Hardware Implementation of High Performance RSA Cryptosystem." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/68830753398909905408.
Повний текст джерелаАнотація:
碩士國立中正大學
資訊工程研究所
89
With the explosively growing number of various network applications, information security issue of the network has received more and more attention. RSA algorithm is one of the most popular and reliable methodologies that have been widely used today to provide secure data transmission. In this thesis, a novel VLSI architecture of RSA public key cryptosystem based on radix-4 Montgomery modular multiplication is proposed. By using the Booth encoding with the modified Montgomery algorithm, a high performance Montgomery multiplier has been designed such that the iteration of computation required can be reduced by a half while the cost of additional hardware is minimized. In addition, both squaring and multiplication operations of the intermediate result are implemented in the same module alternatively. Therefore, the resulted architecture cannot only achieve highly hardware utilization but also deliver high throughput of RSA computation.
22
Li, Cheng-Te, and 李政德. "Hardware Implementation of Montgomery Algorithm for RSA Cryptosystem." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/htps4m.
Повний текст джерелаАнотація:
碩士逢甲大學
資訊工程所
90
As the telecommunication network has grown explosively and the Internet has become increasingly popular, security over the network is the main concern for further services like electronic commerce. The fundamental security requirements include confidentiality, authentication, data integrity, and nonrepudiation. To provide such security services, most systems use public key cryptography. Among the various public key cryptography algorithms, the RSA cryptosystem is the best known, most versatile, and widely used public key cryptosystem today. In public key cryptography algorithms, the essential arithmetic operation is modular multiplication, which is used to calculate modular exponentiation. However, modular exponentiation on numbers of hundreds of bits (512 bits or higher) makes it difficult for the RSA algorithm to attain high throughput. So a high data rate is the mostly concern for the RSA cryptosystem. In this paper, the proposed architecture is a 1-D systolic array implementation used the modified Montgomery algorithm, and use this architecture to construct a 512-bits RSA cryptosystem. The modification is due to application of loop unrolling on the original Montgomery algorithm. As a result of this modification, the proposed architecture achieves higher speed up compared to the existing implementations. And the VHDL model has been developed and simulated using ModelSim from the Model Technology Incorporated and synthesized by Design Analyze.
23
鄭惟仁. "The Implement of a 2048-bit RSA Cryptosystem." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/37992003592618790297.
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24
Chen, Po Song, and 陳柏松. "VLSI Implementation for a Systolic RSA Public Key Cryptosystem." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/97044568309864862099.
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25
陳嘉耀. "An Efficient Decryption Method for RSA Cryptosystem And Implementation." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/71835300207564971666.
Повний текст джерела
26
Chiu, Ping-Kun, and 邱炳坤. "Chip designs for 1024-bit RSA Public-key Cryptosystem." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/07951925214252064124.
Повний текст джерелаАнотація:
碩士國立成功大學
電機工程學系
88
This paper adopts two different algorithms:Blakley algorithm and Montgomery algorithm, and proposes three hardware designs totally. To speed up chip’s performance in Blakley based hardware, we prefer carry save adder rather than carry propagate adder. In Montgomery based chip design, we propose two different hardware structures. In our design, N is 1024 bits long. And we use Xilinx FPGA 4044-3 to verify the RSA hardware chip design. The Chip can be controlled by external 8-bit processor. It has 15 pins, including power pins VCC,GND,clock,reset,birectional 8-bit data pins,and other 3 pins as asynchronous transmission. According to our research on Blakley based chip design, if this chip works at 50M Hz, the total time is about 0.1 sec.
27
Hu, Hung-Chih, and 胡宏治. "Design and Implementation of an RSA Public-Key Cryptosystem." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/87785446023330187536.
Повний текст джерелаАнотація:
碩士國立清華大學
電機工程學研究所
86
With the ever-increasing popularity of electronical communication, data security is becoming a more and more important issue nowadays. In 1976, Diffie and Hellman proposed the concept of public key cryptography which has triggered the revolution of cryptography. In 1978, Rivest, Shamir, and Adleman proposed the RSA public-key cryptosystem based on factoring problem, which has become the most widely used public-key cryptosystem due to the fact that it can be used for both data encryption and authentication. The kernel operation of an RSA public-key cryptosystem is the operation of modular exponentiation, which can be performed by a successoin of modular multiplications. In this thesis, a new bit-serial systolic array for modular multiplication is presented based on a modified Montgomery algorithm. It is highly regular, modular, and thus well suited to be implemented using VLSI techniques. The proposed array can operate at a higher clock rate than the previous array based on the same algortihm due to the fact that the signal-broadcasting problem is avoided in our design. A new VLSI architecture for modular exponentiation, which can be used to fulfill the operation of encryption and decryption of an RSA public-key cryptosystem, is also constructed based on the proposed array for modular multiplication. Comparison results show that the proposed modular exponentiator is rather suitable for those applications where high processing speed is needed. A orototype chip for implementing a 512-bit RSA public-key eryptosystem is designed based on the high-performance COMPASS 0.6μm standard cell library. The gate count of the chip is about 132k and the die size is about 8280μmx8224.8μm. With an estimated clock rate of 166 MHz, a baud rate of 333K bits/second can be achieved.
28
Lin, Chien-Chang, and 林建彰. "Fast Arithmetic Operators Design for RSA Public Key Cryptosystem." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/48257649246170483682.
Повний текст джерелаАнотація:
碩士義守大學
資訊工程學系
89
The famous RSA public key cryptosystem can be applied to many fields such as electronic bank and E-Commerce on Internet. The RSA system can encrypt and sign the data to hide and authenticate, respectively, and can be the key exchange system for secrete key systems, such as DES and AES. In this thesis, an adaptive exponential architecture is proposed. The architecture can remove the redundant exponential computations to obtain the higher efficiency in RSA cryptosystem, especially for data encryption. A pipeline modular multiplication, which is based on a modified Montgomery algorithm, is involved in the RSA system architecture. The simplest exponential algorithm Binary is proposed. This combinational architecture can achieve the best performance without any more additional memory. The modified architecture is verified with the software on PC and no error happened. The implementation of the whole RSA system is accomplished with Verilog HDL code and confirmed by simulation with the tool ”ModelSim-Altera Version 5.4e”. And then synthesized to the Altera series chips, APEX-20KEFC, by using the tool ”Quartus II 1.0”. For 512 bits RSA architecture, the frequency is up to 85 MHz. The data rate for encryption with 32 bits public key is 1185 K-bits per second, and for decryption with 512 bits secrete key is 81 K-bits per second.
29
Jia-Lin, Sheu, and 許嘉麟. "Efficient Algorithm and Their VLSI Implementation for RSA Cryptosystem." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/75127601024964992356.
Повний текст джерелаАнотація:
碩士國立雲林科技大學
電子與資訊工程技術研究所
86
With the explosion of electronic data communication and computer network,how to ensure the security of transmitted data has become an important topicin current research abd commercial product. Of the existing cryptosystem, we concentrated on the investigation the RSA cryptography. The objective of this thesis is to develop efficient VLSI architectures and their corresponding implementations under limited hardware resources to speed up the encryption and decryption of the RSA cryptosystem. The dominant scheme is therefore how to derive an efficient algorithm and/or architecture for the modular exponentiation which is commonly implementated by performing iteration of modular multiplication. In this thesis, we first propose an efficient algorithm to relax ,the data dependency of intermediate operands and speed up the quotient determination for radix-2 modular multiplication. the relaxation of data dependency is accomplished by applying the partitioning technique during multiplication steps and the quotient determination is simplified using the presented scanning scheme during division steps. The resulting architecture is cost-effective and suitable for VLSI implementation. We also show the extension of the radix-2 modular multiplication to high-radix operation in synchronous architecture and to its asynchronous counterpart. In high-radix modular multiplication, the critical computation path is reduced by applying the quotient pipelining and lookup table techniques. In this way, the critical path can be designed to be independent of the chosen radix. For the asynchronous radix-2 modular multiplication, the micropipeline structure is adopted to achieve a local- synchrnous-global asynchronous architecture, which results in more than 20% speed improvement. Based on the modular multiplication, a run-length scanning scheme is then presented for square-and-multiply exponentiation in RSA cryptosystem. With the so-called run-length scanning modular exponentiation algorithm, it is possible to evaluate the trade-offs between hardware requirement and execution time for different levels of implementations. Finally, we have successfully constructed the basic building blocks and elements for synchronous/asynchrnous structures based on the COMPASS cell library. The resulting architectures have the characteristics of regular structures, modular design and expandable feature,therefore it is very suitable for VLSI implementation.
30
Chuang, Po-Chun, and 莊博鈞. "Software Implementation of RSA Cryptosystem with Embedding Specific Information." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/03957882567492626460.
Повний текст джерелаАнотація:
碩士義守大學
資訊工程學系
102
Abstract Nowadays the Internet has been used such usually, thus the use of much more important. In order to provide a safe and secret communications, reaching confidentiality with privacy features to identify the information source that is the main purpose of cryptosystem. Cryptosystem can be divided into two categories : secret key (symmetric) cryptosystem and public (asymmetric) key cryptosystem. Public-key cryptosystem is used for symmetric cryptosystem keys generally to encrypt the transmission of information, the use of public key must be able to recognize the identity of the certificate is generally used to achieve. If we can use identity information, such as series number, name, etc. embedded into public key, then it may improve the key for recognition. In this thesis, we propose a method that embed RSA cryptosystem identity information and in accordance with Java Cryptography Architecture (JCA) specification to achieve theidea-related technologies and embedded-specific information. The technology using a fixed bit scholar A.K. Lenstra proposed in fixed bit RSA algorithm. RSA public key embedded in the specified location of the specific information in the encryption and decryption process is hard to Integrity, thereby improve non- repudiation and verification and other characteristics.
31
Tu, Fu-Kuan, and 涂福寬. "Security Study and Application of RSA-type Public-key Cryptosystem." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/58656735402801776201.
Повний текст джерелаАнотація:
博士國立成功大學
電機工程學系
88
Abstract This dissertation includes three topics of cryptography: security analysis of Lucas function, countermeasure against fault-based cryptanalysis and server-aided secure computation, Lucas function is a special form of second-order linear recurrence relation, and it is an extension of the exponentiation. Smith and Lennon believed that the scheme based on Lucas problem should be cryptographically stronger than or at least as strong as that based on discrete logarithm problem. They also conjectured that computing the discrete logarithm can be done by using subexpontial algorithm while the analogue with Lucas Functions can just be done with an exponential algorithm and thus the used parameters can be choose of small size. In 1933, based on the above assumption, Smith and Lennon proposed the new public key system LUC based on the Lucas function. They also proposed their PKDS similar to the Diffie-Hellman scheme based on the Lucas function as the one-way function. In Chapter 2, we find some properties of Lucas function, including the Fold property and the Asymmetric property. We figure out the characterics of the period of Lucas sequence generated by $m$. We show that the security of Lucas function is polynomial-time equivalent to the generalized discrete logarithm problems. According to our results, the LUC system is not as secure as claimed and cryptosystems designed. Conventionally, the secret information stored in a tamperproof device, e.g., the smart card, is supposed to be secured. It is assumed that intruders cannot obtain the stored information of the smart card. However, it have been shown that the secret keys stored in a tamperproof device can always be revealed by transient faults in many public-key cryptosystems. In Chapter 3, we propose a new model of fault-resistant system. Our system can detect any fault existing in the secure computation with very high probability. Based on the fault-resistant system, a cryptosystem can avoid outputting the results with cryptographic computational faults. The fault-resistant system can also be applied to other public key cryptosystems whose algorithm is based on modular multiplication operations. It is shown that the proposed model is efficient in computation and the probability of failure in fault detection is quite low. A server-aided secret computation (SASC) protocol is a scheme that allows a client to speed up secret computation with the help of a high speed server. While the secret information of the client do not compromise to the server. Since the first SASC protocol was proposed, several attacks on the SASC protocols have been proposed and several modified schemes also have been proposed to remedy those weakness under those attacks. Burns and Mitchell gave a practical guidance (which we refer to as BM Guidance for selecting parameters on the design of SASC protocols for RSA computation. In Chapter 4, we propose our active attack, Ratio-Attack, on MKI Schemes, which are designed under the BM Guidance to show that BM Guidance is not secure enough. Based on our attack, we modify the BM Guidance of parameter selection for the same security level.
32
Feng, Y. M., and 馮怡明. "Extended RSA Based Generalized Group-Oriented Cryptosystem and Signature System." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/21061319068786730212.
Повний текст джерелаАнотація:
碩士逢甲大學
電機工程學系
87
It has been pointed out in some previously works that, due to some inherent limitations on the used modulus, the RSA cryptosystem is hard to be incorporated in the design of cryptosystems or signature systems in a group-oriented communication environment. In this thesis, we first propose a cryptosystem, called the ERSA (Extended RSA) cryptosystem, which is a natural extension of the well-known RSA cryptosystem. It is pointed out that although the security of the ERSA cryptosystem is the same as that of the original RSA system; however, in the ERSA cryptosystem, vectors of integers instead of integers are used as the encryption/decryption keys so that it is more adapted for the design of cryptosystems and signature systems in a group oriented communication environment. Accordingly, based upon the encryption/ decryption technique of the ERSA system and Diffie-Hellman’s key distribution technique, we present a generalized group oriented cryptosystem. In the presented system, the sender is allowed to determine the encryption/ decryption keys and specify a set of combinations of legal recipients (called an access structure) without any coordination with the receiving group. And he may broadcast the encrypted message to the group in such a way that, without the need of any trusted clerks or centers, the ciphertext is decipherable when and only when all authorized recipients of a combination in the access structure (called an access instance) work together. The modulus used for computing shadow key of each recipient is universal and the system’s security is based on the computational infeasibility of both the discrete logarithm problem and the factorization problem. In addition, the presented system has the capabilities of cheater detection and fake shadow correction. Further, based upon the signature technique of the ERSA system, we propose a generalized group signature system. In the proposed system, the clerk of the group can specify, according to the classified grade of the message and the group signature policy, a set of combinations of authorized signers (called a signature structure) such that when and only when all authorized signers of a combination in the signature structure (called a signature instance) work together can sign a message on behalf of the group. The modulus used for each individual signature as well as the group signature is universal and the security of the proposed system is guaranteed by the computational infeasibility of the factorization problem.
33
Wu, Chung-Hsien, and 吳忠憲. "An RSA Cryptosystem Core Based on the Chinese Remainder Theorem." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/00840279182560432759.
Повний текст джерелаАнотація:
碩士國立清華大學
電機工程學系
88
In this thesis, we propose a hardware implementation for a 512-bit RSA cryptosystem core using systolic array structures. Based on modified Montgomery's algorithm, the iteration required is half of the original Montgomery's algorithm and thus has some speedup. Besides, our circuit is also designed for the Chinese Remainder Theorem (CRT) technique. This can further improve the throughput with a maximum factor of 4 in the best case. The processing unit of the systolic array has 100% utilization because of using Block Interleaving ofmultiplication and square operations in the modular exponentiation algorithm. The number of clock cycles needed for a modular exponentiation is only 0.13M in the best case, and 0.24M in the worst case, assuming that we are dealing with 512-bit number. The critical path delay is only 6.13ns, so our design can achieve decryption rate of 578Kb/s and 328Kb/s in the best and worst cases, respectively. This design is suitable for decryption and digital signature.
34
Hsu, Hong-Yi, and 許弘譯. "High-performance Radix-4 Montgomery Modular Multiplier for RSA Cryptosystem." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/63819402043042286924.
Повний текст джерелаАнотація:
碩士國立中山大學
資訊工程學系研究所
99
Thanks to the development of the Internet in recent years, we can see more and more applications on E-commerce in the world. At the same time, we have to prevent our personal information to be leaked out during the transaction. Therefore, topic on researching network security becomes increasingly popular. It is well-known that an encryption system can be applied to consolidate the network security. RSA encryption algorithm is a special kind of asymmetric cryptography, commonly used in public key encryption system on the network, by using two prime numbers as the two keys to encrypt and decrypt. These two keys are called public key and private key, and the key length is at least 512 bits. As a public key encryption, the only way to decrypt is using the private key. As long as the private key is not revealed, it is very difficult to get the private key from the public key even using the reverse engineering. Therefore, RSA encryption algorithm can be regarded as a very safe encryption and decryption algorithm. As the minimum key length has to be greater than 512 bits to ensure information security, using software to execute RSA encryption and decryption will be very slow so that the real time requirement may not be satisfied. Hence we will have to implement RSA encryption system with a hardware circuit to meet the real time requirement on the network. Modular exponentiation (i.e., ME mod N) in RSA cryptosystem is usually achieved by repeated modular multiplications on large integers. A famous approach to implement the modular multiplication into hardware circuits is based on the Montgomery modular multiplication algorithm, which replaces the trial division by modulus with a series of addition and shift operations. However, a large amount of clock cycle is still required to complete a modular multiplication. For example, Montgomery multiplication algorithm will take 512 clock cycles to complete an A․B mod N. As a result, performing one modular exponentiation ME mod N in RSA cryptosystm will need 512․512 clock cycles. To counter the above disadvantage, we employ radix-4 algorithm to reduce 50% of clock cycle number for each A•B mod N. In addition, we also modify the architecture of conventional in order to achieve the radix-4 algorithm to reduce its critical path delay so that the performance can be improved further. Experimental results show that the proposed 1024-bit radix-4 modular multiplier (Our-Booth-Radix-4) before performing as pipeline is 70% faster than the radix-2 multiplier with 24% area overhead. Furthermore, it is 20% faster than traditional radix-4 modular multiplier with 12% area reduction. Therefore, its AT is smaller than the previous architectures.
35
Liu, Shin-Yi, and 劉欣怡. "Bioinformatics Logic Computing: Constructing RSA Public-key Optimal Bio-molecular Cryptosystem." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/fg397t.
Повний текст джерелаАнотація:
碩士銘傳大學
資訊管理學系碩士班
96
DNA computing is one of popular research fields in recent years, it can solve many NP problems, include the satisfiability problem(Braich et al.), the maximum cut problem(Xiao et al. 2005) and the binary integer programming problem (Yeh et al. 2006), in this thesis we proposed a bio-molecular Parallel Modular model and a bio-molecular Comparator model base on Logic Operations in the Adleman-Lipation Model(Adleman 1994), we can apply Bio-informatics bio-logic computing model with especially designed Modular and Comparator on RSA public-key bio-molecular cryptosystem. RSA public-key cryptosystem is one of most popular algorithms used for security on the internet. In the thesis we proposed a bioinformatics bio-logic molecular RSA public-key cryptosystem based upon the Adleman-Lipation model. First, we used XOR, AND and OR bio-logic gates to construct the bio-logic Comparator. Second, we used bio-logic Comparator and Subtractor to construct the bio-logic Modular. Finally we used bio-logic molecular Modular and Comparator for a better bio-molecular RSA cryptosystem building up in using the public and secret key faster and better.
36
Liao, Kuan-Chieh, and 廖冠捷. "On Design of Self-Certified RSA Public Key Cryptosystem with Applications." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/47046679437229270081.
Повний текст джерелаАнотація:
博士逢甲大學
資訊工程所
95
Nowadays Public key cryptosystem has been applied to daily life to achieve confidentiality, authentication, integrity, and non-repudiation in network communication. However, since public keys are exposed to the public, an adversary can successfully enter a corresponding fake public key without being detected if there is no effective authentication method. To deal with the public key authentication issue, a commonly used solution is that the public key held by each user must be accompanied with a certificate. However, in the certificate-based public key cryptosystems, the user’s public key is a random-like integer that is nonsense. In addition, any pair of users which want to communicate securely need to keep a large public file directory. To overcome this drawback, the concept of the ID-based cryptosystem was introduced. Instead of generating a random pair of public and private keys, the ID-based scheme permits each user to choose his name as his public key. Thus, a large public key file is not required, because the public key is assumed to be well known. However, this approach exhibits the problem that a dishonest authority may impersonate any user, since the authority has the ability to derive users’ private keys. For this reason, in 1991, Girault proposed the concept of the self-certified public key cryptosystem, where each user’s public key is generated by an authority, while the corresponding private key is known only to the user. In addition, the authenticity of public keys is implicitly verified without the certificate. Thus, it contributes to reduce the amount of storage, communication and computation overheads brought from the certificate authentication. Much research has been devoted to constructing various kinds cryptosystems based on Girault’s self-certified model to derive the benefits inherited from self-certified public key system. First of all, in this dissertation Ghodosi and Saeednia’s self-certified group-oriented cryptosystem without a combiner is firstly discussed. We will show that their scheme is insecure and probably suffers from the conspired attack. To remedy the weakness, an enhanced version is proposed while providing the new functionality to confirm the source of the encrypted message. Second, motivated by Seadnia''s comment, which Girault’s self-certified model suffers from an important shortcoming, the dissertation presents the self-certified RSA cryptosystem, so that the attraction of the self-certified key can be introduced into RSA to benefit the widespread cryptosystem. Accordingly, the proposed model can benefit all the deployed RSA based solutions, such as encryption/decryption and digital signature, to adopt the advantages of the self-certified concept. Third, the concept of the visual-certified RSA cryptosystem is further introduced in this dissertation, in which a recognizable image is self-constructed during the public key verification procedures and the validity of the public key is verified by human visual system. Consequently, the visual-certified public key verification strategy helps people to accept the obscure public key cryptosystem and encourages people to apply the technology to enhance their daily life. Finally, a reversible fragile watermarking scheme based on our visual-certified RSA cryptography is further proposed in this dissertation to overcome some weaknesses obtained from some previous watermarking works.
37
Chung, Lu Chih, and 呂誌忠. "Design Methodology of Booth-encoded Montgomery Module Design for RSA Cryptosystem." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/81417424952864162142.
Повний текст джерелаАнотація:
碩士國立中央大學
電機工程研究所
88
In this thesis, a design methodology for Booth-encoded Montgomery's modular multiplication algorithms is proposed. The new design methodology helps us to re-duce the required iteration number in the Encryption/Decryption of RSA cryptosys-tem. With application of pipelining and folding/unfolding techniques to the design of Montgomery's modular multiplication module, we construct the processing element (PE) called M-cell. With the M-cell's, we can easily reconfigure the RSA chip. It is very convenient to reconfigure the RSA chip for different specification by cascade different number of M-cells and reuse them. The final optimized Montgomery's modular multiplication module is a digit-serial, pure-systolic, and scalable architec-ture with 100% utilization of all PE modules. The simulation result shows that we can not only reduce the required iteration number from 2n^2 to n^2 using H algorithm, hard-ware complexity is also simplified. The efficiency (time-area product) of our design is improved about a factor of 2.5. The simulation results show that the maximum speed-performance of single RSA chip can be up to 476kbit/sec.
38
Chen, Yan-Jia, and 陳彥嘉. "The Design of Radix-4 RSA Cryptosystem with Carry-Save Adder." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/38849769879484365009.
Повний текст джерелаАнотація:
碩士國立高雄大學
電機工程學系碩士班
103
The Modular exponentiation of Rivest, Shamir, and Adleman (RSA) cryptosystem is achieved by repetitive modular multiplications. In order to speed up the process of encryption and decryption, the modular multiplication is implemented with Montgomery algorithm and carry-save adder (CSA) to avoid the carry propagation at each addition operation. In this paper, we propose a radix-4 Montgomery modular multiplication with CSA to implement RSA cryptosystem. Radix-4 modular multiplication is faster than radix-2 Montgomery due to reducing a half operation cycles. Comparing with other works, the critical path delay, the data throughput and the area-timing complexity of our design are better than the existing works. Our RSA cryptosystem is synthesized with TSMC 90nm CMOS process. Experimental results show that our radix-4 RSA cryptosystem can achieve up to 455 MHz clock speed with about 76K gate count.
39
Hsieh, Jui-Hung, and 謝瑞鴻. "Efficient Modular Exponentiation and Modular Multiplication for RSA Public-Key Cryptosystem." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/49391175157330145825.
Повний текст джерелаАнотація:
碩士國立中正大學
電機工程研究所
90
With the increasing needs of networking and the product of communication, meanwhile, the opposed problem of security has been watched. In 1978, RSA was proposed by Rivest, Shamir, and Adleman and is the fashion of encryption and decryption of data and digital signature. In RSA cryptosystem, modular exponentiation and modular multiplication is the core arithmetic operation and how to develop a high speed and low power consumption algorithm and circuit design of modular exponentiation and modular multiplication is the major discussion of this thesis. In the thesis, we propose a “radix-4” modified Montgomery algorithm to execute the operation of modular multiplication and comparison with “radix-2” and “radix-8” modified Montgomery algorithm. Adopting 0.35µm SPQM CCU35A cell library of our laboratory and at working frequency of 125Mhz, meanwhile, analysis of power with the software of PowerMill which is proposed by the company of EPIC. We can clearly see that “radix-4” modified Montgomery algorithm can achieve the optimal power-delay product. In order to forward achieve the goal of low power consumption, the thesis adopt hybrid 2n H-algorithm and also break the past literature which adopt 2-ary H-algorithm and 2-ary L-algorithm. The proposed algorithm and reduce the numbers of multiplication and achieve the design of low power consumption.
40
楊逸峰. "Software Implementation of RSA Cryptosystem with Fault-Based Cryptanalysis Resistance Incorporated." Thesis, 1997. http://ndltd.ncl.edu.tw/handle/33703609683780074376.
Повний текст джерелаАнотація:
碩士國立成功大學
電機工程學系
85
Nowadays, under the consideration of high efficiency, it's an ongoing trend to utilize computers to aid us in processing and maintaining more and more data. Almost everyone cannot go without computers. On the other hand, we should not forget the security issues when we enjoy the conveniences and time savings brought about by computers, especially when various computers are internetworking via Internet. It means that someone far away from you might have the chance to access the data stored in your computer without your permission or to intercept the messages from/to you. Owing to the fact that CIA being an expert in cryptographic area actually suffered from hostile intrusion lately, we know that the concerns above are not just potential dangers but real threats. After all, we can never ignore hackers' abilities! A good solution to assure data secrecy and integrity is to encrypt your sensitive data. In this thesis, we provide the software implementation details of a well-known public-key cryptosystem, RSA. In addition, we also briefly discuss several successful attacks against RSA followed by the corresponding countermeasures. What is worth mentioning is that we have equipped our RSA cryptosystem with the ability to withstand fault-based attacks which were proposed in late 1996. We end this thesis with our performances list and point out some aspects to work on for those who want to continue researching on this topic.
41
SUN, HUAN-MING, and 孫煥鳴. "The Design of Radix-4 RSA Cryptosystem with Modified Carry-Save-Adder." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/hx3ykv.
Повний текст джерелаАнотація:
碩士國立高雄大學
電機工程學系碩博士班
105
This thesis proposes the architectures of RSA cryptosystem. RSA cryptosystem is achieved by repetitive modular multiplications. We use the modified carry-save adder to implement the radix-4 Montgomery algorithm. The modified carry-save adder doesn’t require the carry propagation, so it is suitable to increase the speed of addition operation. The clock cycles of radix-4 Montgomery algorithm is the half of radix-2 Montgomery algorithm. Using radix-4 Montgomery algorithm with modified carry-save adder to implement the RSA cryptosystem is available to speed up the Encryption and Decryption computation. Comparing with other works, critical path delay and data throughput of our design are better than the existing works.
42
Lai, Liang-Yu, and 賴良昱. "DESIGN AND IMPLEMENTATION OF DATA ENCRYPTION PROCESSOR WITH RSA PUBLIC-KEY CRYPTOSYSTEM." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/02930755671657927935.
Повний текст джерелаАнотація:
碩士大同大學
電機工程研究所
88
In this thesis, we present a bit-serial array for modular multiplication which is based on a modified Montgomery algorithm to fulfill the most famous RSA public-key crytosystem. Each basic unit is with 128bits, but we can combine those units to build a large-bit RSA cryptosystem. Because the signal-broadcasting problem is avoided, the proposed array can operate at high clock rate. RSA can be used in variety of Electronic Funds Transfer applications as well as other electronic banking and data handling applications where data must be encrypted To realize the prototype chip of this design, we used Verilog-XL, Xillinx tools and Synopsys library to implement and simulate. We use FPGA (XILINX 4044XLA-09-HQ160, 0.35µm CMOS process, 3.3v power supply) to carry out it. The gate count is 27934. The operating clock rate is 100MHz. Data throughput is about 372k bits/sec.
43
Wu, Che-Han, and 吳哲漢. "Development of High-Speed VLSI Architecture of Modular Exponentiation for the RSA Cryptosystem." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/26688176602547841670.
Повний текст джерелаАнотація:
碩士國立雲林科技大學
電子工程與資訊工程技術研究所
88
With explosion of electronic data communication and computer network, how to ensure the security of transmitted data has become an important topic in current research. In this thesis, we focus on the hardware implementation of the RSA cryptosystem, which is the first realization of the public-key system by Rivest, Shamir and Adleman. By going through the performance evaluation of the existing RSA architectures and implementations in the literature, the aim of this thesis is to come up with a more efficient alternative so as to increase both the encryption and decryption operations in RSA. To reach our goal, we first propose a so-called concurrent modular multiplication algorithm by partitioning the multiplier into several equal-sized segments such that the data dependency within each segment can be relaxed. In the meanwhile, we present a two-bit overlapping scanning method to simplify the quotient estimation during the division process (modular operation). The concept of the concurrent modular multiplication algorithm can be applied in either radix-2 or high-radix implementation; but special techniques like quotient pipelining, table lookup and logic-depth reduction must be adopted for high-radix versions. Based on the inherently asynchronous property of the modular multiplication and exponentiation, the thesis also shows how to explore this particular property to further speedup the overall performance. The resulting asynchronous architecture, which is built by taking the advantages of the conventional micropipelining and global-asynchronous-local-synchronous architectures, has the characteristics of easy implementation and lower hardware overhead of computational elements. In our knowledge, we believe that it is the most effective implementation scheme for the RSA cryptosystem. With this achievement in mind, we have also successfully implemented the RSA encryption/decryption function for the Montgomery-based modular multiplication algorithm and accomplished a very promising result in comparison with previous works. Finally, the resultant implementation in this thesis has the properties of modular design, regular structure and expandable feature; therefore it is very suitable to be fabricated in VLSI.
44
Chen, Yan-Ru, and 陳彥儒. "Hardware Architecture of RSA cryptosystem with hybrid-radix word-based Montgomery Modular Multiplication Algorithm." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/yb8ztv.
Повний текст джерелаАнотація:
碩士國立中山大學
資訊工程學系研究所
104
The Internet has been inseparable from our life in the rest year. More and more people trade on the Internet, so the network security will be increasingly important. In order to guarantee data transmission on the network is safe, encryption systems are often used to ensure the security and privacy of data transmission. RSA cryptosystem is a public and well-known key cryptography system, via a large number of modular exponentiation for encryption and decryption. With advances in technology, the key length of RSA encryption system must be not less than 1024, so that sufficient security can be achieved to avoid the brute-force attack. Because the bit number of key is too large, encryption and decryption software cannot achieve immediate results in real time. Therefore, we will design the hardware circuit of RSA encryption system hardware to enhance its operational speed. Modular exponentiation is the most important operations in RSA encryption system, and modular exponentiation can be converted into a series of modular multiplication. The thesis uses Montgomery algorithm for modular multiplication, which is the most commonly used modular multiplication in the RSA encryption system, to implement the modular exponentiation. The traditional architecture of Montgomery algorithm suffers from the high fan-out problems, so this thesis uses word-base architecture to solve the problem. By using high-radix technique, we reduce the clock cycle number of whole module multiplication as well. In addition, we also use hybrid-radix concept to reduce the number of intermediate compressors. In this thesis, we design the Montgomery multiplier with the techniques mentioned above, and the proposed Montgomery multiplier is used to implement modular exponentiation. In addition, we compare the advantages and disadvantages of exponential iii modular exponentiation algorithms and architectures. The difference in performance and area of the architecture with the different radix and word size is also compared.
45
Chen, Yung-Chih, and 陳勇志. "An RSA Cryptosystem Based on Montgomery Powering Ladder and Chaos-based Random Number Generator." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/85266260232456361252.
Повний текст джерелаАнотація:
碩士國立交通大學
電子研究所
99
This thesis introduces a scalable hardware implementation of RSA cryptosystem. The architecture of this work is modified by the Montgomery modular multiplier and it based on Montgomery powering ladder algorithm. It can work in any length less than 4096-bit. This proposed algorithm provides a shorter latency on modular exponentiation operations than other works. It takes 3.5 ms, 13.7 ms, and 106 ms to complete a 1024-bit, 2048-bit, and 4096-bit key length of RSA calculation time respectively. Furthermore, we modify random number generator based on chaotic map. Testing by SP800-22, this work has higher passing rate than previous work. This embedded in RSA cryptosystem for against SPA and DPA without extra cycle for processing multiplications.
46
Zhong, Zhi-He, and 鍾志和. "Embedding Dual Digital Watermarks Using Odd-Even Property of Binary Images and RSA Public-Key Cryptosystem." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/90003678570955949181.
Повний текст джерелаАнотація:
碩士中原大學
資訊工程研究所
97
While digital multimedia can be obtained conveniently from the Internet, protection of intellectual property rights has become an issue. In this paper, we present a “dual digital watermark embedding/extracting system using odd-even property of binary images and RSA public-key cryptosystem”. Our research method can be divided into two phases: embedding and extracting. We propose an odd-even sandwich method as the core technique to embed or extract dual digital watermarks. In addition, the RSA public-key cryptosystem is used to enhance the security. Results show that our proposed system improves the Yang & Niu method by increasing the payload for digital watermarks and is reasonably robust to noise and image cutting attacks (Normalized correlation > 0.9). In conclusion, our system offers an advanced option to the legitimate owner or user who may choose different keys to verify if the corresponding digital watermark is correct, leading to relatively effective data management and protection.
47
Tsung-Hua, Lu, and 呂琮華. "Utilizing DNA Coding and Chaotic Maps Along with Bioinformatics RSA Public-key Cryptosystem in Bioinformatics Optimization Approach Applied for Data Hiding into DNA Sequence." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/42671455575202391398.
Повний текст джерелаАнотація:
碩士國立臺北大學
電機工程學系
102
Due to Internet and the rapid development of computer technology, Make a copy and send digital data becomes simple and fast. But derivative confidential information was easily illegally stealing and tampering issues. How to ensure the security of data transmission becomes a very important issue. The use of information hiding technology to protect confidential information, In recent years become a hot research topic. And in recent years data hiding technique into a new research direction, we hope to use this technique can actually complete a hiding of confidential information into the DNA sequence, and use the properties of DNA sequences then using RSA public-key cryptography to encrypt it in order to improve security and successfully extracted ability. And a excellent information hiding technique that can be several ways to assess the strength and toughness, not visible resistance, capacity and security. However, these features are conflicting each other, such as instructions to improve the capacity of hidden data, that will reduce the hidden nature of the data and toughness. Therefore, the development can meet the above requirements hiding technology, is currently the biggest challenge researchers. This paper will against information hiding literature have been published in recent years , do the focused management style and discussion, to provide experts and scholars engaged in the study of information hiding in the reference design algorithms.
48
Tsai, Do-Han, and 蔡篤翰. "High Speed Modular Exponentiation for RSA Cryptosystems." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/74052994134512309201.
Повний текст джерелаАнотація:
碩士國立中正大學
電機工程研究所
92
Modular exponentiation is the key operation of many public key cryptosystems, such as RSA and DSS, etc. Fast modular exponentiation algorithms and circuits are essential for speeding up encryption and decryption. Generally, fast modular exponentiation can be partitioned into two phases: modular multiplication and exponentiation. In this thesis, we discuss Montgomery algorithm for modular multiplication and focus on modified exponentiation algorithms based on variants of the binary method.
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陳允律. "Design and Implementation of Reconfigurable RSA Cryptosystems." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/49819449754463832643.
Повний текст джерела
50
Liao, Chia-Hsing, and 廖家興. "High-performance Modular Multiplier Module for RSA Cryptosystems." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/97616491484028896019.
Повний текст джерелаАнотація:
碩士國立中正大學
電機工程研究所
92
Many public key cryptographic algorithms require modular multiplication of very large operands as their core arithmetic operation. In this thesis, a modified radix-4 modular multiplication algorithm is proposed based on Montgomery’s algorithm. We present a digit-serial systolic Montgomery modular multiplier. The important feature of the proposed architecture is that it can provide the trade-off between throughput performance and hardware complexity. If the digit size is chosen appropriately, the proposed architecture can meet the throughput requirement of a certain application with minimum hardware. Locality, regularity, and modularity make the proposed architecture suitable for very large scale integration implementation.