Дисертації з теми "Reliability of metallic interconnects"
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Gurrum, Siva P. "Thermal Modeling and Characterization of Nanoscale Metallic Interconnects." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/10435.
Повний текст джерелаChoi, Zung-Sun. "Reliability of copper interconnects in integrated circuits." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/39553.
Повний текст джерелаIncludes bibliographical references.
As dimensions shrink and current densities increase, the reliability of metal interconnects becomes a serious concern. In copper interconnects, the dominant diffusion path is along the interface between the copper and the top passivation layer (usually Si3N4). One of the predominant failure mechanisms in Cu has been open-circuit failure due to electromigration-induced void nucleation and growth near the cathode ends of interconnect segments. However, results from accelerated electromigration tests show that the simple failure analyses based on simple void nucleation and growth can not explain the wide range of times-to-failure that are observed, suggesting that other types of failure mechanisms are present. In this thesis, by devising and performing unique experiments through the development of an electromigration simulation tool, unexpected complex failure mechanisms have been identified that have significant effects on the reliability of copper interconnects. A simulation tool was developed by implementing the one-dimensional non-linear differential equation model first described by Korhonen et al. By applying an implicit method (Backward Euler method), the calculation time was significantly reduced, and stability increased, compared to previous tools based on explicit methods (Forward Euler method).
(cont.) The tool was crosschecked with experimental results by comparing void growth rates in simulations and experiments. Using this tool, one can simulate stress and atomic concentration states over the entire length of an interconnect segment or throughout a multi-segment interconnect tree, to identify analyze possible failure locations and mechanisms. Experiments were carried out on dotted-i structures, where two 25jim-lomg segments were connected by a via in the middle. Electrical currents were applied to the two segments independently, and lifetime effects of adjacent segments were determined. Using the simulation tool and calculations, it was shown that adjacent segments have a significant effect on a segment's stress state, even if the adjacent segment has no electrical current. This explains experimental observations. This also suggests that for reliability analyses to be accurate, the states of all adjacent segments must be considered, including the ones without electrical current. In a second set of experiments, the importance of pre-existing voids was investigated. Using in-situ scanning electron microscopy, voids away from the cathode were observed. These voids grew and drifted toward the cathode and the shape of the voids were found to be closely related to the texture and stress state of individual grains in the interconnect.
(cont.) The drift velocity of voids was shown to be directly proportional to surface diffusivity. Electromigration tests on unpassivated samples were performed under vacuum to obtain the surface diffusivity of copper and its dependence on texture orientations. Simulation results show that pre-existing voids cause void growth away from the cathode. Subsequent failure mechanisms differ depending on the location of the pre-existing void and the critical void volume for de-pinning from grain boundaries. If pre-existing voids are present, void-growth-limited failure is expected in interconnects at low current densities, due to growth of pre-existing void, and the lifetimes are expected to scale inversely with j. However, at higher current densities (typical for accelerated testing), failure can occur through nucleation of new voids at the cathode (so that lifetimes scale inversely with j2), or through a mixture of nucleation of new voids and growth of pre-existing voids. These effects must be taken into account to accurately project the reliability of interconnects under service conditions, based on experiments carried out under accelerated conditions.
by Zung-Sun Choi.
Ph.D.
Garcia-Vargas, Maria José. "Oxidation behaviour of potential materials for metallic SOFC interconnects." Lille 1, 2006. https://pepite-depot.univ-lille.fr/RESTREINT/Th_Num/2006/50376_2006_208.pdf.
Повний текст джерелаGall, Martin. "Investigation of electromigration reliability in Al(Cu) interconnects /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.
Повний текст джерелаBashir, Muhammad Muqarrab. "Modeling reliability in copper/low-k interconnects and variability in cmos." Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/41092.
Повний текст джерелаGarcia-Vargas, Maria J. [Verfasser]. "Oxidation behaviour of potential materials for metallic SOFC interconnects / Maria J Garcia-Vargas." Aachen : Shaker, 2007. http://d-nb.info/1170527221/34.
Повний текст джерелаZheng, Yunqi. "Effect of surface finishes and intermetallics on the reliability of SnAgCu interconnects." College Park, Md. : University of Maryland, 2005. http://hdl.handle.net/1903/2427.
Повний текст джерелаThesis research directed by: Mechanical Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
Lee, Kitae 1966. "The influence of texture on the reliability of aluminum and copper interconnects /." Thesis, McGill University, 2000. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=37759.
Повний текст джерелаThe influence of texture on electromigration and stress-induced failures in aluminum interconnects was studied since these are the most often responsible for failures observed in aluminum interconnects. Results obtained showed that a strong {111} texture in aluminum interconnects improves their median time-to-failure. The grain boundary character distribution and percentage of coincidence site lattice (CSL) boundaries, was quantified using orientation imaging microscopy. It was found that the median time-to-failure of specimens increased as the number of low angle and CSL boundaries increased. These boundaries are known to have low diffusivity. It was also demonstrated that while the investigated specimens had grains of comparable size, the grains of similar orientations were clustered in the specimens having the stronger {111} texture. This phenomenon contributed to the longer median time-to-failure of the interconnects by reducing the frequency of high angle grain boundaries. The experimental data obtained shows that the residual stress in films decreases as the intensity of the {111} texture increases. A model based on Monte-Carlo simulation of texture formation during the deposition of aluminum film was proposed to suggest the optimum conditions for a growth of a strong {111} texture component. A low deposition rate and a high mobility of atoms on the surface, which corresponds to a high substrate temperature, can strengthen {111} texture.
Copper has been recently used as an interconnecting material because of its good electromigration resistance and low electrical resistivity. One of the major problems of copper as an interconnecting material is that it easily oxidizes at relatively low temperatures. The formation of oxide degrades the electrical and mechanical properties of copper interconnects. The influence of substrate texture on the oxidation kinetics was studied to suggest methods to reduce copper oxidation. Copper single crystals having (100), (110), (123), (314), (111) and (311) orientations were oxidized at 200ºC in air. Only the Cu2O phase was formed during oxidation. The oxidation of the (100) single crystal substrate was much faster than that of the others. This is attributed to a large number of fine oxide grains on the (100) crystal in the initial stages of oxidation. It is recommended that the {100} texture in copper interconnects should be avoided in order to reduce oxidation rate. A quantitative model was proposed to predict the oxidation kinetics of copper from the texture of the specimens. Reasonable agreement was obtained comparing the model predictions and the experimental results obtained from the test of oxidation of polycrystalline copper specimens. However, further improvement of the model can be done if more data from single crystal experiments are obtained.
Srikar, V. T. (Vengallatore Thattai) 1972. "Electromigration behavior and reliability of bamboo Al(Cu) interconnects for integrated circuits." Thesis, Massachusetts Institute of Technology, 1999. http://hdl.handle.net/1721.1/85249.
Повний текст джерелаSarvari, Reza. "Impact of size effects and anomalous skin effect on metallic wires as GSI interconnects." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/31636.
Повний текст джерелаCommittee Chair: Meindl, James D.; Committee Member: Davis, Jeffrey A.; Committee Member: Gaylord, Thomas K.; Committee Member: Hess, Dennis W.; Committee Member: Peterson, Andrew F. Part of the SMARTech Electronic Thesis and Dissertation Collection.
Cho, Taiheui. "Anisotropy of low dielectric constant materials and reliability of Cu/low-k interconnects /." Digital version accessible at:, 2000. http://wwwlib.umi.com/cr/utexas/main.
Повний текст джерелаLo, George Chih-Yu. "Electroplated Compliant High-Density Interconnects For Next-Generation Microelectronic Packaging." Thesis, Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4778.
Повний текст джерелаCho, Jaeshin. "Effect of microstructure of aluminum alloys on the electromigration-limited reliability of VLSI interconnects." Thesis, Massachusetts Institute of Technology, 1990. http://hdl.handle.net/1721.1/13636.
Повний текст джерелаJoo, Young-Chang. "Electromigration failure and reliability of single-crystal and polycyrstalline aluminum interconnects for integrated circuits." Thesis, Massachusetts Institute of Technology, 1995. http://hdl.handle.net/1721.1/11446.
Повний текст джерелаRodriguez, Omar. "Thermo-Mechanical Reliability of Micro-Interconnects in Three-Dimensional Integrated Circuits: Modeling and Simulation." DigitalCommons@USU, 2010. https://digitalcommons.usu.edu/etd/737.
Повний текст джерелаGupta, Piyush. "Effect of intermetallic compounds on thermomechanical reliability of lead-free solder interconnects for flip-chips." Thesis, Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-08202004-125146/unrestricted/gupta%5Fpiyush%5F200412%5Fmaster.pdf.
Повний текст джерелаSuresh, Committee Member ; C.P. Wong, Committee Member ; Rao R. Tummala, Committee Chair. Includes bibliographical references.
Khan, Sharif [Verfasser]. "Improving the reliability of high density interconnects in hybrid assemblies of active microimplants / Sharif Khan." München : Verlag Dr. Hut, 2018. http://d-nb.info/1168534550/34.
Повний текст джерелаZhu, Wenbo. "Soldering interconnects through self-propagating reaction process." Thesis, Loughborough University, 2016. https://dspace.lboro.ac.uk/2134/23259.
Повний текст джерелаXu, Di. "Nanotwin formation by electrodeposition and its influence on the physical properties and reliability of copper interconnects." Diss., Restricted to subscribing institutions, 2009. http://proquest.umi.com/pqdweb?did=1997610601&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.
Повний текст джерелаLongworth, Hai Pham. "Microstructural modification of thin films and its relation to the electromigration-limited reliability of VLSI interconnects." Thesis, Massachusetts Institute of Technology, 1992. http://hdl.handle.net/1721.1/13114.
Повний текст джерелаOtieno, Wilkistar. "A Framework for Determining the Reliability of Nanoscale Metallic Oxide Semiconductor (MOS) Devices." Scholar Commons, 2010. http://scholarcommons.usf.edu/etd/3499.
Повний текст джерелаGinga, Nicholas J. "On-chip dielectric cohesive fracture characterization and mitigation investigation through off-chip carbon nanotube interconnects." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/52225.
Повний текст джерелаHinshaw, Robert Bruce Lall Pradeep. "Reliability of lead-free and advanced interconnects in fine pitch and high I/O electronics subjected to harsh thermo-mechanical environments." Auburn, Ala, 2009. http://hdl.handle.net/10415/1907.
Повний текст джерелаAgrawal, Akash. "Board level energy comparison and interconnect reliability modeling under drop impact." Diss., Online access via UMI:, 2009.
Знайти повний текст джерелаIncludes bibliographical references.
Mølmen, Live. "Materials Reliability in PEM Fuel Cells." Licentiate thesis, Jönköping University, JTH, Material och tillverkning, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-52424.
Повний текст джерелаSom en del av det globala arbetet med at reducera utsläppen av koldioxid måste alla fordon elektrifieras eller tankas med förnybart bränsle. Batterier har redan revolutionerat bilmarknaden, men bränsleceller är en viktig pusselbit för att också elektrifiera tunga fordon. Den typen av bränsleceller för fordon som finns tillgänglig på den kommersiella marknaden i dag är polymerelektrolytbränslecellen (PEMFC). För att PEMFC skall ta en större marknadsandel måste kostnaderna minskas och livslängden förlängas. PEMFC består av ett antal komponenter gjorda av olika material, bland annat polymer membran, ädelmetallkatalysator, och metalliska bipolära plattor. Kombinationen av olika material i tillägg till den höga temperaturen, hög fuktighet och låg pH gör att materialen i bränslecellen är utsatta för korrosion. Ädelmetallkatalysatorn är en av de kostdrivande komponenterna i bränslecellen. I denna studien presenteras en översikt över framstegen inom katalysatormaterial för PEM bränsleceller de senaste två åren. Sedan studeras elektroplätering som en enkel produktionsmetod för nanopartiklar av platina legeringar. Möjligheten att simultant plätera fler metaller, och att använda gasdiffutions-skiktet från bränslecellen som substrat för att reducera antal produktionsteg och därmed reducera kostnader, undersöks. Det möjliggör också snabb testning av olika legeringar för att identifiera den optimala sammansättningen med hög prestanda, lång livslängd och lite platina. I tillägg till att ta fram billigare och tåliga material är det viktigt att förstå hur materialen degraderar och hur degraderingen av ett material påverkar de andra komponenterna. Med den kunskapen kan man utveckla accelererade testmetoder för att bedöma livslängden av hela bränslecellen. Validerade testmetoder är viktigt för att styrka förtroendet till nya teknologier. I denna studien fokuseras det också på korrosion av bipolära plattor, och hur olika lastcykler och fuktnivåer som kan bli applicerad vid accelererad testning påverkar korrosionen. Också effekten av defekter från tillverkningen i den skyddande beläggningen analyseras med hänsyn till korrosion, för att ge mer insikt i hur bipolära plattor kan designas och produceras för att minska korrosionen.
Lin, Ta-Hsuan. "Assembly process development, reliability and numerical assessment of copper column flexible flip chip technology." Diss., Online access via UMI:, 2008.
Знайти повний текст джерелаIncludes bibliographical references.
Zhang, Rongwei. "Novel conductive adhesives for electronic packaging applications: a way towards economical, highly conductive, low temperature and flexible interconnects." Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/39548.
Повний текст джерелаMehrotra, Gaurav. "Ultra thin ultrafine-pitch chip-package interconnections for embedded chip last approach." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/22594.
Повний текст джерелаHu, Xiao. "Multiscale Simulation of Metallic Copper and Copper Oxide Atomic Layer Deposition from Cu Beta-diketonates." Universitätsverlag der Technischen Universität Chemnitz, 2016. https://monarch.qucosa.de/id/qucosa%3A21539.
Повний текст джерелаKupferleitbahnen werden in höchstintegrierten Schaltkreisen aufgrund des niedrigen spezifischen Widerstands und der sehr guten Beständigkeit gegen Elektromigration verwenden. Aktuelle Verfahren zur Leitbahnherstellung erfordern dünne Cu Keimschichten vor der anschließenden Cu Füllung durch die elektrochemische Abscheidung (ECD). Dabei ist es entscheidend, dass diese Keimschichten konform und glatt in den Vias und Gräben abgeschieden werden können, so dass die ECD Cu-Filme frei von Hohlräumen sind. Mit der weiteren Skalierung wird die Atomlagenabscheidung (ALD) mit ihrer hohen Konformalität und der ausgezeichneten Dickensteuerung als die vielversprechendste Technik zur Herstellung der Cu Keimschichten betrachtet. Die vorliegende Dissertation ist der Multiskalensimulation der ALD von metallischem Kupfer und Kupferoxiden aus Cu-beta-Diketonat Präkursoren (nBu3P)2Cu(acac) und Cu(acac)2 gewidmet. Verschiedene Koreaktanden H, H2, H2O, O3 und feuchtes O2 werden hinsichtlich ihrer Anwendung für die ALD von metallischem Kupfer oder Kupferoxid untersucht. Die Mechanismen der Oberflächenreaktionen dieser Präkursoren sind noch weitgehend unbekannt, obwohl die Cu Beta-Diketonate in der ALD bereits breite Verwendung finden. Ab-initio-Rechnungen wurden durchgeführt, um die Eingangsdaten für die reaktive Molekulardynamiksimulation und die thermodynamische Modellierung zu erhalten, die sowohl auf molekularer wie auch auf makroskopischer Ebene durchgeführt wurden.
Bana, Franck Lionel. "Dégradation par électromigration dans les interconnexions en cuivre : étude des facteurs d'amélioration des durées de vie et analyse des défaillances précoces." Thesis, Grenoble, 2013. http://www.theses.fr/2013GRENI081/document.
Повний текст джерелаIntegrated circuits are part of our nowadays life as they are presents everywhere; as well as in daily life or industry. They are continuously downscaled to increase their performances. As a result, this downscaling lead to complex interconnects grid architectures. Interconnects which are metal lines carrying electric signal in the circuit are thus more and more sensitive to electromigration failure. This I because of increasingly higher current densities they carry. Obviously, in advanced technology nodes, it is more and more difficult to ensure the reliability level required for interconnects. Interconnects lifetime reduction is linked to increasing difficulty to perform all process steps with these very small features and also to increasing failure times dispersion. In the first part of the work presented here, we deepened the understanding of mechanisms involved during electromigration degradation. We have thus shown the fundamental role played by the microstructure and the chemical composition of the line in increasing its lifetime. The second part of the work dealt with the improvement of statistical analysis of failure times. We thus focused on early failures and the bimodal failure times distributions they generate. As far as that goes, the multilink structure we have designed answers the fundamental question of increase test sampling. This lead then to improved precision at very low failure rates for robust lifetime's extrapolation to use conditions
Choudhury, Abhishek. "Chip-last embedded low temperature interconnections with chip-first dimensions." Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/37104.
Повний текст джерелаSchulz, Stefan E. "AMC 2015 – Advanced Metallization Conference." Universitätsverlag der Technischen Universität Chemnitz, 2016. https://monarch.qucosa.de/id/qucosa%3A20503.
Повний текст джерелаAl, Choueyri Yousef, and Mojtaba Fayazi. "Digital models of manufacturing : with emphasis on titanium welding for early product development." Thesis, Blekinge Tekniska Högskola, Institutionen för maskinteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-18317.
Повний текст джерелаAvhandlingen är en del av BTH research lab och fokuserar på det tidiga produktutvecklingsstadiet. Närmare kontrolleras hur produkttillverkningsprocessen kan integreras in i det tidiga produktutvecklingsstadiet. Ett känt problem för detta område är skillnaden på kunskapen som designer och tillverkaren besitter under det tidiga produktutvecklingsstadiet, då kunskapen om tillverkningsprocessen inte existerar. Vanligtvis tar inte produktutvecklare hänsyn till detta, eftersom ansvaret för valet av tillverkningsprocessen bedöms falla på tillverkaren. Trots att tillverkningsprocessen beror på många aspekter som bestäms under designprocessen som till exempel materialval, geometrin, efterbehandlingar och toleranser på produkten. För att minimera problemet involverar industrin en stor variation av människor med kompetens och erfarenhet, som sedan kan tillverka en produkt rätt anpassad för tillverkningsprocessen. Dock har denna lösning några nackdelar, då det kan vara svårt att hitta människor med rätt erfarenhet, men då man fokuserar på ett tillverkningssätt så kan företaget gå miste om fördelarna med alternativa tillverkningsprocesser. Denna avhandling fokuserar på hur analysen av svetstillverkningstekniken kan integreras in i designprocessen med hjälp av en digital modell. För att förbättra kommunikationen mellan tillverkare och designer har 2 Excel filer utvecklats. Den första Excel filen är riktat mot tillverkarna där dem kan nämna maskinerna som finns tillgängliga i deras verkstad. Den andra Excel filen är till för att kunna göra en kostnadskalkyl och jämföra dem olika tillverkningsmetoderna med hjälp av maskinspecifikationerna som fanns presenterade i den första Excel filen. För att utvärdera Excel filerna, har en parametrisk CAD modell skapats och 3 fall har använts för att testa de utvecklade CAD modellera. Värdena som använts i detta examensarbete finns i Appendix A: Table 11–15 och är hämtade från allmänt tillgängliga källor. Värden uppskattades också med hjälp av regressionsanalyser.
Verriere, Virginie. "Analyse électrique de diélectriques SiOCH poreux pour évaluer la fiabilité des interconnexions avancées." Phd thesis, Université de Grenoble, 2011. http://tel.archives-ouvertes.fr/tel-00593515.
Повний текст джерелаTaibi, Mohamed. "Intégration 3D haute densité : comportement et fiabilité électrique d'interconnexions métalliques réalisées par collage direct." Phd thesis, Université de Grenoble, 2012. http://tel.archives-ouvertes.fr/tel-00721981.
Повний текст джерелаChery, Emmanuel. "Fiabilité des diélectriques low-k SiOCH poreux dans les interconnexions CMOS avancées." Phd thesis, Université de Grenoble, 2014. http://tel.archives-ouvertes.fr/tel-01063862.
Повний текст джерелаKarlsson, Hampus, and Anton Karlsson. "Konceptutveckling av en caterpillar med inriktning på kvalitet : En utvecklingsprocess." Thesis, Blekinge Tekniska Högskola, Institutionen för maskinteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-14996.
Повний текст джерелаLe, Druillennec Marie. "Etude des mécanismes d'endommagement de films minces métalliques déposés sur substrats souples pour l'électronique flexible." Thesis, Université Grenoble Alpes (ComUE), 2017. http://www.theses.fr/2017GREAI108/document.
Повний текст джерелаOver the past 20 years, new improvements in materials and processes led to the development of printed flexible electronics. Flexible electronics devices subjected to bending, twisting, or stretching during their lifetime, the development of device with high reliability is therefore of great importance for the efficiency of electrical connection. This work investigates the mechanical reliability of inkjet or screen-printed Ag thin films on polyimide substrates dedicated to the electrical interconnection of active components. Expected mechanical failure modes are film cracking and buckling delamination.First of all, in order to characterized the two mechanisms, tensile tests are performed under an optical microscope to follow cracks and under an optical interferometer to follow buckles. In order to obtain crack spacing evolution during deformation, an image processing is realized. Two types of cracks are observed: long and straight cracking for thick films and small and zigzag shape cracking for thin films. The evolution of buckles shape with imposed tensile deformation is characterized.In a second time, in order to understand experimental observations, mechanical failure modes are analysed with finite elements models. The origin of the two types of cracking are explained by a geometrical effect of film thickness. A elastoplastic shear lag bidimensional model gives upper and lower bonds of crack spacing during deformation. A three-dimensional model allows identification of cohesive zone model parameters at film/substrate interface, from experimental buckle shape. An adhesion energy of 2 J.m-2 , a critical strength of 20 MPa and a mode mixity parameter of 0.4 are determined. These values are in good agreement with literature
Sellier, Alain. "Modélisations probabilistes du comportement de matériaux et de structures en génie civil." Cachan, Ecole normale supérieure, 1995. http://www.theses.fr/1995DENS0012.
Повний текст джерела"Series Resistance Increase in Field Degraded PV Modules in Different Climatic Conditions." Master's thesis, 2018. http://hdl.handle.net/2286/R.I.51795.
Повний текст джерелаDissertation/Thesis
Masters Thesis Materials Science and Engineering 2018
"Electromigration in Gold Interconnects." Doctoral diss., 2013. http://hdl.handle.net/2286/R.I.20914.
Повний текст джерелаDissertation/Thesis
Ph.D. Materials Science and Engineering 2013
Wei, F., S. P. Hau-Riege, C. L. Gan, Carl V. Thompson, J. J. Clement, H. L. Tay, B. Yu, M. K. Radhakrishnan, Kin Leong Pey, and Wee Kiong Choi. "Length Effects on the Reliability of Dual-Damascene Cu Interconnects." 2002. http://hdl.handle.net/1721.1/3977.
Повний текст джерелаSingapore-MIT Alliance (SMA)
Baek, Won-chong. "Reliability study on the via of dual damascene Cu interconnects." Thesis, 2006. http://hdl.handle.net/2152/2656.
Повний текст джерелаLin, Fong-Jie, and 林豐傑. "Electromigration Behavior and Electrical Reliability of Copper Interconnects in Integrated Circuits." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/01525676773955483304.
Повний текст джерела國立中興大學
材料科學與工程學系所
97
Electromigration tests of dual-damascene Cu interconnect structures with or without an NH3/He plasma treatment between Cu and SiCN etch stop layer have been performed in this study at 400゜C under a current density of 8 MA/cm2 to investigate the influence of interface structures to electrical reliability. From the electrical resistance-to-time traces, it was observed that the electrical resistance of the interconnects with the plasma treatment increased slowly. From the cumulative failure probabilities of 1.1 R0, 1.3 R0, 1.5 R0 (R0: initial resistance), and wire opening, it was found that the interconnects with the plasma treatment exhibited a higher median time to failure, and the electrical reliability of the interconnects was effectively enhanced by the plasma treatment. An oxide layer existed at the Cu/SiCN interface without the plasma treatment, whereas it was removed by the plasma treatment, and Cu-N or Cu-Si bonds formed, consequently enhancing the adhesion of interface. From the observations of EM-induced voiding behaviors in the interconnects, it was found that voids nucleated at the Cu/SiCN interface without the plasma treatment and then grew gradually with testing intervals. In comparison, voids nucleated inside the Cu wires, rather than at the interface, after the plasma treatment, indicating that the NH3/He plasma treatment strengthened the adhesion of the interface and then inhibited the electromigration behavior which occurred at the interface.
Thompson, Carl V. "Processing, Structure, Properties, and Reliability of Metals for Microsystems." 2002. http://hdl.handle.net/1721.1/3984.
Повний текст джерелаSingapore-MIT Alliance (SMA)
Pyun, Jung Woo 1970. "Scaling and process effect on electromigration reliability for Cu/low k interconnects." Thesis, 2007. http://hdl.handle.net/2152/3146.
Повний текст джерелаtext
Lu, Kuan Hsun. "Thermo-mechanical reliability of 3-D interconnects containing through-silicon-vias (TSVs)." Thesis, 2010. http://hdl.handle.net/2152/ETD-UT-2010-12-2096.
Повний текст джерелаtext
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Повний текст джерелаSingapore-MIT Alliance (SMA)