Добірка наукової літератури з теми "Reconfiguration overhead"
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Статті в журналах з теми "Reconfiguration overhead"
Hoffman, John C., and Marios S. Pattichis. "A High-Speed Dynamic Partial Reconfiguration Controller Using Direct Memory Access Through a Multiport Memory Controller and Overclocking with Active Feedback." International Journal of Reconfigurable Computing 2011 (2011): 1–10. http://dx.doi.org/10.1155/2011/439072.
Повний текст джерелаJUNG, S., and T. G. KIM. "Configuration Sharing to Reduce Reconfiguration Overhead Using Static Partial Reconfiguration." IEICE Transactions on Information and Systems E91-D, no. 11 (November 1, 2008): 2675–84. http://dx.doi.org/10.1093/ietisy/e91-d.11.2675.
Повний текст джерелаSungjoon Jung and Tag Gon Kim. "An Operation and Interconnection Sharing Algorithm for Reconfiguration Overhead Reduction Using Static Partial Reconfiguration." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 12 (December 2008): 1589–95. http://dx.doi.org/10.1109/tvlsi.2008.2000973.
Повний текст джерелаCHOU, Kuan-Hung, and Woei LIN. "Performance Analysis of Optical Packet Switches with Reconfiguration Overhead." IEICE Transactions on Communications E94-B, no. 6 (2011): 1640–47. http://dx.doi.org/10.1587/transcom.e94.b.1640.
Повний текст джерелаKIM, J., J. CHO, and T. G. KIM. "Temporal Partitioning to Amortize Reconfiguration Overhead for Dynamically Reconfigurable Architectures." IEICE Transactions on Information and Systems E90-D, no. 12 (December 1, 2007): 1977–85. http://dx.doi.org/10.1093/ietisy/e90-d.12.1977.
Повний текст джерелаBELAID, IKBEL, BASSEM OUNI, FABRICE MULLER, and MAHER BENJEMAA. "COMPLETE AND APPROXIMATE METHODS FOR OFF-LINE PLACEMENT OF HARDWARE TASKS ON RECONFIGURABLE DEVICES." Journal of Circuits, Systems and Computers 22, no. 02 (February 2013): 1250080. http://dx.doi.org/10.1142/s0218126612500806.
Повний текст джерелаKoch, Dirk, Christian Beckhoff, and Jim Torresen. "Efficient Interfacing of Partially Reconfigurable Instruction Set Extensions for Softcore CPUs on FPGAs." Journal of Integrated Circuits and Systems 6, no. 1 (December 27, 2011): 35–42. http://dx.doi.org/10.29292/jics.v6i1.336.
Повний текст джерелаKIM, YOONJIN. "POWER-EFFICIENT CONFIGURATION CACHE STRUCTURE FOR COARSE-GRAINED RECONFIGURABLE ARCHITECTURE." Journal of Circuits, Systems and Computers 22, no. 03 (March 2013): 1350001. http://dx.doi.org/10.1142/s0218126613500011.
Повний текст джерелаFeng, Xiao Jing, Xi Li, Wang Chao, Xue Hai Zhou, and Jun Neng Zhang. "A Hardware/Software Co-Design Flow for Dynamic Partial Reconfiguration." Advanced Materials Research 433-440 (January 2012): 5172–77. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.5172.
Повний текст джерелаLallet, Julien, Sébastien Pillement, and Olivier Sentieys. "Efficient and Flexible Dynamic Reconfiguration for Multi Context Architectures." Journal of Integrated Circuits and Systems 4, no. 1 (November 21, 2009): 36–44. http://dx.doi.org/10.29292/jics.v4i1.295.
Повний текст джерелаДисертації з теми "Reconfiguration overhead"
Клименко, Ірина Анатоліївна. "Методи та засоби підвищення ефективності обробки інформації в реконфігуровних комп’ютерних системах на базі ПЛІС". Doctoral thesis, Київ, 2017. https://ela.kpi.ua/handle/123456789/19095.
Повний текст джерелаTseng, Chi-Hua, and 曾啟華. "Reconfiguration Overhead Reduction and Hiding of Run-Time Reconfigurable System." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/72639710189266801319.
Повний текст джерела國立交通大學
資訊工程系
92
In run-time reconfigurable system, the whole partial reconfigurable hardware is viewed as a reconfiguration and execution unit traditionally. Therefore, execution cannot start until the finish reconfiguration of the whole partial reconfigurable hardware. We virtually divide the partial reconfigurable hardware into several equal-size blocks. The reconfiguration and execution unit is smaller. This can make reconfiguration of one block overlap with execution of other blocks. And this can hide some reconfiguration overhead. Doing so will bring a new problem which is partitions-to-blocks scheduling. We design a two phases scheduler. Phase I will generate one highest priority partition from un-scheduled partitions. There are three considerations of the partition’s priority. One is the partition is on current critical path or not. Another is the number of outgoing edges and released partitions of the partition. The other is the execution time of the partition. We have two partition selection policies including of critical first and utilization first. Phase II will assign one block to the highest priority partition generated from Phase I. If the partition is the latest partition, we will assign one block to the partition so that the partition can finish execution earliest. If the partition is not the latest partition, we will look ahead one next future partition into consideration together. Choose one block to the primary partition so that these two partitions can release maximal resource with time. The result shows that utilization first is better than critical first. And view a part of the whole partial reconfigurable hardware as a reconfiguration and execution unit can improve completion time of run-time reconfigurable system.
Jen, Hsung, and 任軒. "Reconfiguration Overhead Reduction Using Prefetch and Merge Techniques in Run-Time Reconfigurable System." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/21085391635759437079.
Повний текст джерелаЧастини книг з теми "Reconfiguration overhead"
Duhem, François, Fabrice Muller, and Philippe Lorenzini. "FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA." In Lecture Notes in Computer Science, 253–60. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-19475-7_26.
Повний текст джерелаFarzaneh, Masoud, and William A. Chisholm. "Power System Reconfiguration Options for Anti- and De-Icing." In Techniques for Protecting Overhead Lines in Winter Conditions, 311–34. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-87455-1_7.
Повний текст джерелаResano, Javier, Daniel Mozos, Diederik Verkest, Serge Vernalde, and Francky Catthoor. "Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems." In Field Programmable Logic and Application, 585–94. Berlin, Heidelberg: Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/978-3-540-45234-8_57.
Повний текст джерелаPatel, Ravi, Anil Gojiya, and Dipankar Deb. "Failure Reconfiguration of Pumps in Two Reservoirs Connected to Overhead Tank." In Advances in Intelligent Systems and Computing, 81–92. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-1966-2_7.
Повний текст джерелаLi, Bingbing, and Young-Chon Kim. "Logical Topology Design with Low Power Consumption and Reconfiguration Overhead in IP-over-WDM Networks." In Lecture Notes in Electrical Engineering, 375–86. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-07674-4_38.
Повний текст джерелаMalik, Usama. "Minimising Reconfiguration Overheads in Embedded Applications (Abstract)." In Field Programmable Logic and Application, 1189. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30117-2_175.
Повний текст джерелаVanderbauwhede, Wim. "High-Level Programming of Dynamically Reconfigurable NoC-Based Heterogeneous Multicore SoCs." In Dynamic Reconfigurable Network-on-Chip Design, 186–219. IGI Global, 2010. http://dx.doi.org/10.4018/978-1-61520-807-4.ch008.
Повний текст джерелаLin, Wei-Wen, Jih-Sheng Shen, and Pao-Ann Hsiung. "An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC." In Dynamic Reconfigurable Network-on-Chip Design, 84–109. IGI Global, 2010. http://dx.doi.org/10.4018/978-1-61520-807-4.ch004.
Повний текст джерелаТези доповідей конференцій з теми "Reconfiguration overhead"
Yang Qu, J. P. Soininen, and J. Nurmi. "Using multiple configuration controllers to reduce the reconfiguration overhead." In 2005 NORCHIP. IEEE, 2005. http://dx.doi.org/10.1109/norchp.2005.1596995.
Повний текст джерелаCugola, Gianpaolo, Davide Frey, Amy L. Murphy, and Gian Pietro Picco. "Minimizing the reconfiguration overhead in content-based publish-subscribe." In the 2004 ACM symposium. New York, New York, USA: ACM Press, 2004. http://dx.doi.org/10.1145/967900.968130.
Повний текст джерелаAslanidis, Timotheos, and Marios-Evangelos Kogias. "Algorithms for Packet Routing in Switching Networks with Reconfiguration Overhead." In Second International Conference on Computational Science and Engineering. Academy & Industry Research Collaboration Center (AIRCC), 2014. http://dx.doi.org/10.5121/csit.2014.4416.
Повний текст джерелаWolinski, Christophe, Krzysztof Kuchcinski, Jürgen Teich, and Frank Hannig. "Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures." In 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools. IEEE, 2008. http://dx.doi.org/10.1109/dsd.2008.1.
Повний текст джерелаFerrandi, Fabrizio, Marco Novati, Massimo Morandi, Marco Santambrogio, and Donatella Sciuto. "Dynamic Reconfiguration: Core Relocation via Partial Bitstreams Filtering with Minimal Overhead." In 2006 International Symposium on System-on-Chip. IEEE, 2006. http://dx.doi.org/10.1109/issoc.2006.322008.
Повний текст джерелаWolinski, Christophe, Krzysztof Kuchcinski, Jürgen Teich, and Frank Hannig. "Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures." In 2008 16th International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 2008. http://dx.doi.org/10.1109/fccm.2008.16.
Повний текст джерелаWu, Binbin, Like Yan, Yuan Wen, and Tianzhou Chen. "Run-time configuration prefetching to reduce the overhead of dynamically reconfiguration." In 2010 IEEE International SOC Conference (SOCC). IEEE, 2010. http://dx.doi.org/10.1109/socc.2010.5784651.
Повний текст джерелаYang Qu, J. P. Soininen, and J. Nurmi. "A Parallel Configuration Model for Reducing the Run-Time Reconfiguration Overhead." In 2006 Design, Automation and Test in Europe. IEEE, 2006. http://dx.doi.org/10.1109/date.2006.243864.
Повний текст джерелаNafkha, Amor, and Yves Louet. "Accurate measurement of power consumption overhead during FPGA dynamic partial reconfiguration." In 2016 International Symposium on Wireless Communication Systems (ISWCS). IEEE, 2016. http://dx.doi.org/10.1109/iswcs.2016.7600972.
Повний текст джерелаTan, Heng, and Ronald DeMara. "A Physical Resource Management Approach to Minimizing FPGA Partial Reconfiguration Overhead." In 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006). IEEE, 2006. http://dx.doi.org/10.1109/reconf.2006.307757.
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