Дисертації з теми "Power semicondutor"
Щоб переглянути інші типи публікацій з цієї теми, перейдіть за посиланням: Power semicondutor.
Оформте джерело за APA, MLA, Chicago, Harvard та іншими стилями
Ознайомтеся з топ-50 дисертацій для дослідження на тему "Power semicondutor".
Біля кожної праці в переліку літератури доступна кнопка «Додати до бібліографії». Скористайтеся нею – і ми автоматично оформимо бібліографічне посилання на обрану працю в потрібному вам стилі цитування: APA, MLA, «Гарвард», «Чикаго», «Ванкувер» тощо.
Також ви можете завантажити повний текст наукової публікації у форматі «.pdf» та прочитати онлайн анотацію до роботи, якщо відповідні параметри наявні в метаданих.
Переглядайте дисертації для різних дисциплін та оформлюйте правильно вашу бібліографію.
1
Ma, Cliff Liewei. "Modeling of bipolar power semiconductor devices /." Thesis, Connect to this title online; UW restricted, 1994. http://hdl.handle.net/1773/6046.
Повний текст джерела
2
Sankin, Igor. "Edge termination and RESURF technology in power silicon carbide devices." Diss., Mississippi State : Mississippi State University, 2006. http://library.msstate.edu/etd/show.asp?etd=etd-12162005-141206.
Повний текст джерела
3
Huang, Chender 1960. "Characterization of interface trap density in power MOSFETs using noise measurements." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276872.
Повний текст джерелаАнотація:
Low-frequency noise has been measured on commercial power MOSFETs. These devices, fabricated with the VDMOS structure, exhibit a 1/f type noise spectrum. The interface state density obtained from noise measurements was compared with that obtained from the subthreshold-slope method. Reasonable agreement was found between the two measurements. The radiation effects on the noise power spectral density were also investigated. The results indicated that the noise can be attributed to the generation of interface traps near the Si-SiO₂ interface. The level of interface traps generated by radiation was bias dependent. The positive gate bias gave rise to the largest interface-trap density.
4
Yen, Chi-min 1949. "Two-dimensional simulation of power MOSFET near breakdown." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276695.
Повний текст джерелаАнотація:
A simulation program has been developed to facilitate the investigation and analysis of power semiconductor devices under the reverse-bias condition. The electrostatic potential distribution is solved by using Poisson's equation alone, with particular attention to the neighborhood of avalanche breakdown. Because of its generality and efficiency, the program emerges as a powerful engineering tool for the design of power devices incorporating special junction termination techniques. Results are presented for a DMOS structure to illustrate the improvement in breakdown voltage when a field plate is applied. Numerical solution techniques for solving elliptic partial differential equations in a multi-material domain are discussed. The discretization of this domain is nonuniform in general due to its highly nonuniform physical parameters. By careful selection of grid lines near interfaces, the difference equation coefficients are considerably simplified. The resultant matrix of coefficients is symmetric even though Neumann boundary conditions are specified.
5
Prosyk, Kelvin. "Power and spectral characterization of InGaAsP-InP multi-quantum well lasers." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0008/NQ42759.pdf.
Повний текст джерела
6
Elliott, Stella N. "High power semiconductor lasers." Thesis, Cardiff University, 2010. http://orca.cf.ac.uk/54136/.
Повний текст джерелаАнотація:
Using red and near infra-red emitting quantum well and quantum dot based devices I have modelled the nearfield and farfield intensities and distribution in various waveguide structures. I compared the effect of various factors on the power density at catastrophic damage and found the greatest effect from the current pulse length and dot or well nature of the active region, for the first time in the AlGaInP material system. At short pulse length the quantum dot devices achieved a power density of 17 MW/cm
7
Wang, Haihong. "Advanced transport models development for deep submicron low power CMOS device design /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.
Повний текст джерела
8
Linewih, Handoko, and h. linewih@griffith edu au. "Design and Application of SiC Power MOSFET." Griffith University. School of Microelectronic Engineering, 2003. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20030506.013152.
Повний текст джерелаАнотація:
This thesis focuses on the design of high voltage MOSFET on SiC and its application in power electronic systems. Parameters extraction for 4H SiC MOS devices is the main focus of the first topic developed in this thesis. Calibration of two-dimensional (2-D) device and circuit simulators (MEDICI and SPICE) with state-of-the-art 4H SiC MOSFETs data are performed, which includes the mobility parameter extraction. The experimental data were obtained from lateral N-channel 4H SiC MOSFETs with nitrided oxide-semiconductor interfaces, exhibiting normal mobility behavior. The presence of increasing interface-trap density (Dit) toward the edge of the conduction band is included during the 2-D device simulation. Using measured distribution of interface-trap density for simulation of the transfer characteristics leads to good agreement with the experimental transfer characteristic. The results demonstrate that both MEDICI and SPICE simulators can be used for design and optimization of 4H SiC MOSFETs and the circuits utilizing these MOSFETs. Based on critical review of SiC power MOSFETs, a new structure of SiC accumulation-mode MOSFET (ACCUFET) designed to address most of the open issues related to MOS interface is proposed. Detailed analysis of the important design parameters of the novel structure is performed using MEDICI with the parameter set used in the calibration process. The novel structure was also compared to alternative ACCUFET approaches, specifically planar and trench-gate ACCUFETs. The comparison shows that the novel structure provides the highest figure of merit for power devices. The analysis of circuit advantages enabled by the novel SiC ACCUFET is given in the final part of this thesis. The results from circuit simulation show that by utilizing the novel SiC ACCUFET the operating frequency of the circuit can be increased 10 times for the same power efficiency of the system. This leads to dramatic improvements in size, weight, cost and thermal management of power electronic systems.
9
Linewih, Handoko. "Design and Application of SiC Power MOSFET." Thesis, Griffith University, 2003. http://hdl.handle.net/10072/367638.
Повний текст джерелаАнотація:
This thesis focuses on the design of high voltage MOSFET on SiC and its application in power electronic systems. Parameters extraction for 4H SiC MOS devices is the main focus of the first topic developed in this thesis. Calibration of two-dimensional (2-D) device and circuit simulators (MEDICI and SPICE) with state-of-the-art 4H SiC MOSFETs data are performed, which includes the mobility parameter extraction. The experimental data were obtained from lateral N-channel 4H SiC MOSFETs with nitrided oxide-semiconductor interfaces, exhibiting normal mobility behavior. The presence of increasing interface-trap density (Dit) toward the edge of the conduction band is included during the 2-D device simulation. Using measured distribution of interface-trap density for simulation of the transfer characteristics leads to good agreement with the experimental transfer characteristic. The results demonstrate that both MEDICI and SPICE simulators can be used for design and optimization of 4H SiC MOSFETs and the circuits utilizing these MOSFETs. Based on critical review of SiC power MOSFETs, a new structure of SiC accumulation-mode MOSFET (ACCUFET) designed to address most of the open issues related to MOS interface is proposed. Detailed analysis of the important design parameters of the novel structure is performed using MEDICI with the parameter set used in the calibration process. The novel structure was also compared to alternative ACCUFET approaches, specifically planar and trench-gate ACCUFETs. The comparison shows that the novel structure provides the highest figure of merit for power devices. The analysis of circuit advantages enabled by the novel SiC ACCUFET is given in the final part of this thesis. The results from circuit simulation show that by utilizing the novel SiC ACCUFET the operating frequency of the circuit can be increased 10 times for the same power efficiency of the system. This leads to dramatic improvements in size, weight, cost and thermal management of power electronic systems.Thesis (PhD Doctorate)
Doctor of Philosophy (PhD)
School of Microelectronic Engineering
Full Text
10
Hinchley, David Alistair. "Large area power semiconductor devices." Thesis, University of Cambridge, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.627019.
Повний текст джерела
11
Stark, Bernard Harry. "Multiple-mode power semiconductor devices." Thesis, University of Cambridge, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.621596.
Повний текст джерела
12
Burg, Tristan Kevin Materials Science & Engineering Faculty of Science UNSW. "Semiconducting properties of polycrystalline titanium dioxide." Publisher:University of New South Wales. Materials Science & Engineering, 2008. http://handle.unsw.edu.au/1959.4/41262.
Повний текст джерелаАнотація:
Titanium dioxide, TiO2, has potential applications as a photoelectrode for photoelectrochemical generation of hydrogen by splitting water using solar energy and as a photocatalyst for water purification. This study is part of the UNSW research program to process TiO2-based oxide semiconductors as high-performance photoelectrodes and photocatalysts. This study investigates the effect of defect disorder on semiconducting properties of polycrystalline TiO2. This study involved the processing of high-purity polycrystalline TiO2 and determination of its semiconducting properties through measurement of electrical conductivity and thermoelectric power at elevated temperatures (1073-1323K) in controlled oxygen activities [1x10-13 Pa < p(O2) < 75 kPa]. The study included two types of experiments: Determination of electrical properties under conditions of gas/solid equilibrium. The data obtained was used to derive defect disorder and related semiconducting properties Monitoring of electrical properties during equilibration. This data was used to determine the chemical diffusion coefficient. The data obtained under equilibrium conditions indicates that oxygen may be used as a dopant to impose controlled semiconducting properties. In reduced conditions TiO2 is an n-type semiconductor and under oxidizing conditions TiO2 is a p-type semiconductor. The n-type behaviour is associated with oxygen vacancies as the predominant defects and titanium interstitials as the minority defects. The p-type behaviour is closely related to titanium vacancies that are formed during prolonged oxidation. Charge transport at elevated temperature was shown to involve substantial contribution from ions. Analysis of electrical properties enabled determination of several defect-related quantities including the activation enthalpy for oxygen vacancy formation, and the activation energy of the electrical conductivity components related to electrons, holes and ions. The kinetic data obtained during gas/solid equilibration enabled determination of the chemical diffusion coefficient which exhibited a complex dependence on nonstoichiometry. In addition, prolonged oxidation showed that equilibration occurred in two kinetic regimes. One for highly mobile oxygen vacancies and titanium interstitials which quickly reached an ??operational equilibrium?? within hours and another slow kinetic regime for equilibration of titanium vacancies over many thousand hours. The determined chemical diffusion coefficient data may be used to select the processing conditions required to impose uniform concentration of defects within a TiO2.
13
Hastie, Jennifer E. "High power surface emitting semiconductor lasers." Thesis, University of Strathclyde, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.399721.
Повний текст джерела
14
Luo, F. L. "Digital control of power semiconductor converters." Thesis, University of Cambridge, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.383314.
Повний текст джерела
15
Lu, Bin Ph D. Massachusetts Institute of Technology. "AlGaN/GaN-based power semiconductor switches." Thesis, Massachusetts Institute of Technology, 2013. http://hdl.handle.net/1721.1/82354.
Повний текст джерелаАнотація:
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 209-219).
AlGaN/GaN-based high-electron-mobility transistors (HEMTs) have great potential for their use as high efficiency and high speed power semiconductor switches, thanks to their high breakdown electric field, mobility and charge density. The ability to grow these devices on large-diameter Si wafers also reduces device cost and makes them easier for wide market adoption. However, the development of AlGaN/GaN-based power switches has encountered three major obstacles: the limited breakdown voltage of AlGaN/GaN transistors grown on Si substrates; the low performance of normally-off AlGaN/GaN transistors; and the degradation of device performance under high voltage pulsed conditions. This thesis studies these issues and presents new approaches to address these obstacles. The first part of the thesis studies the breakdown mechanism in AlGaN/GaN-on-Si transistors. A new quantitative model-trap-limited space-charge impact-ionization model- is developed. Based on this model, a set of design rules is proposed to improve the breakdown voltage of AlGaN/GaN-on-Si transistors. New technologies have also been demonstrated to increase the breakdown voltage of AlGaN/GaN-on-Si transistors beyond 1500 V. The second part of the thesis presents three technologies to improve the performance of normally-off AlGaN/GaN transistors. First, a dual-gate normally-off MISFET achieved high threshold voltage, high current and high breakdown voltage simultaneously by using an integrated cascode structure. Second, a tri-gate AlGaN/GaN MISFET demonstrated the highest current on/off ratio in normally-off GaN transistors with the enhanced electrostatic control from a tri-gate structure. Finally, a new etch-stop barrier structure is designed to address low channel mobility, high interface density and non-uniformity issues associated with the conventional gate recess technology. Using this new structure, normally-off MISFETs demonstrated high uniformity, steep sub-threshold slope and a record channel effective mobility. The thesis concludes with a new dynamic on-resistance measurement technique. With this method, the hard- and soft-switching characteristics of GaN transistors were measured for the first time.
by Bin Lu.
Ph.D.
16
Spulber, Oana. "Advanced trench gated power semiconductor devices." Thesis, De Montfort University, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.678834.
Повний текст джерела
17
Unni, Vineet. "Next-generation GaN power semiconductor devices." Thesis, University of Sheffield, 2015. http://etheses.whiterose.ac.uk/11984/.
Повний текст джерела
18
Shea, Patrick Michael. "Lateral power MOSFETs hardened against single event radiation effects." Doctoral diss., University of Central Florida, 2011. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4705.
Повний текст джерелаАнотація:
The underlying physical mechanisms of destructive single event effects (SEE) from heavy ion radiation have been widely studied in traditional vertical double-diffused power MOSFETs (VDMOS). Recently lateral double-diffused power MOSFETs (LDMOS), which inherently provide lower gate charge than VDMOS, have become an attractive option for MHz-frequency DC-DC converters in terrestrial power electronics applications. There are growing interests in extending the LDMOS concept into radiation-hard space applications. Since the LDMOS has a device structure considerably different from VDMOS, the well studied single event burn-out (SEB) or single event gate rapture (SEGR) response of VDMOS cannot be simply assumed for LDMOS devices without further investigation. A few recent studies have begun to investigate ionizing radiation effects in LDMOS devices, however, these studies were mainly focused on displacement damage and total ionizing dose (TID) effects, with very limited data reported on the heavy ion SEE response of these devices. Furthermore, the breakdown voltage of the LDMOS devices in these studies was limited to less than 80 volts (mostly in the range of 20-30 volts), considerably below the voltage requirement for some space power applications. In this work, we numerically and experimentally investigate the physical insights of SEE in two different fabricated LDMOS devices designed by the author and intended for use in radiation hard applications. The first device is a 24 V Resurf LDMOS fabricated on P-type epitaxial silicon on a P+ silicon substrate. The second device is a much different 150 V SOI Resurf LDMOS fabricated on a 1.0 micron thick N-type silicon-on-insulator substrate with a 1.0 micron thick buried silicon dioxide layer on an N-type silicon handle wafer. Each device contains internal features, layout techniques, and process methods designed to improve single event and total ionizing dose radiation hardness. Technology computer aided design (TCAD) software was used to develop the transistor design and fabrication process of each device and also to simulate the device response to heavy ion radiation. Using these simulations in conjunction with experimentally gathered heavy ion radiation test data, we explain and illustrate the fundamental physical mechanisms by which destructive single event effects occur in these LDMOS devices. We also explore the design tradeoffs for making an LDMOS device resistant to destructive single event effects, both in terms of electrical performance and impact on other radiation hardness metrics.ID: 030646200; System requirements: World Wide Web browser and PDF reader.; Mode of access: World Wide Web.; Thesis (Ph.D.)--University of Central Florida, 2011.; Includes bibliographical references (p. 161-166).
Ph.D.
Doctorate
Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering
19
Wang, Jue. "Silicon carbide power devices." Thesis, Heriot-Watt University, 2000. http://hdl.handle.net/10399/579.
Повний текст джерела
20
Zhang, Xiaohu. "Failure mechanisms in wideband semiconductor power devices." College Park, Md. : University of Maryland, 2006. http://hdl.handle.net/1903/3653.
Повний текст джерелаАнотація:
Thesis (Ph. D.) -- University of Maryland, College Park, 2006.Thesis research directed by: Mechanical Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
21
Fletcher, R. G. "Power semiconductor devices in A.C. circuit protection." Thesis, Imperial College London, 1987. http://hdl.handle.net/10044/1/7921.
Повний текст джерела
22
Khanniche, M. S. "Phase change cooling of power semiconductor devices." Thesis, Swansea University, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.669698.
Повний текст джерела
23
Robinson, Francis Victor Place. "The control of power semiconductor device switching." Thesis, Heriot-Watt University, 1992. http://hdl.handle.net/10399/1438.
Повний текст джерела
24
Charboneau, Bryan Charles. "Double-Sided Liquid Cooling for Power Semiconductor Devices Using Embedded Power Technology." Thesis, Virginia Tech, 2005. http://hdl.handle.net/10919/31907.
Повний текст джерелаАнотація:
Power electronics is a constantly growing and demanding technical field. Consumer demand and developing technologies have made the improvement of power density a primary emphasis of research for this area. Power semiconductors present some of the major challenges for increasing system level power density due to high loss density and interconnection requirements. Advanced cooling schemes, such as double-sided, forced liquid convection or multi-phase flow, can be implemented with non-wire bond packaging to improve thermal management while maintaining proper electrical performance. Embedded power is one such packaging technology, which provides a compact structure for interface of power semiconductor to fluid flow.
The objective of this work was to identify the potential of implementing embedded power packaging with double-sided forced liquid convection. Physics based, electro-thermal models were first used to predict the improvement in heat transfer of double-sided, forced liquid convection with embedded power packaging over single-sided liquid cooled wire bond based packaging. A liquid module test bed was designed and constructed based on the electro-thermal models, which could be interfaced with high power MOSFET based samples implementing various packaging technologies. Experiments were used to verify the model predictions and identify practical limitations of high flow rate, double-sided liquid cooling with embedded power. An improvement of 45% to 60% in total junction to case thermal resistance is shown for embedded power packaging with double-sided liquid cooling for water flow rates between 0.25 and 4.5 gal/min.
Master of Science
25
Wang, Hongfang. "Investigation of Power Semiconductor Devices for High Frequency High Density Power Converters." Diss., Virginia Tech, 2007. http://hdl.handle.net/10919/27517.
Повний текст джерелаАнотація:
The next generation of power converters not only must meet the characteristics demanded by the load, but also has to meet some specific requirements like limited space and high ambient temperature etc. This needs the power converter to achieve high power density and high temperature operation. It is usually required that the active power devices operate at higher switching frequencies to shrink the passive components volume.
The power semiconductor devices for high frequency high density power converter applications have been investigated. Firstly, the methodology is developed to evaluate the power semiconductor devices for high power density applications. The power density figure of merit (PDFOM) for power MOSFET and IGBT are derived from the junction temperature rise, power loss and package points of view. The device matrices are generated for device comparison and selection to show how to use the PDFOM. A calculation example is given to validate the PDFOM. Several semiconductor material figures of merit are also proposed. The wide bandgap materials based power devices benefits for power density are explored compared to the silicon material power devices.
Secondly, the high temperature operation characteristics of power semiconductor devices have been presented that benefit the power density. The electrical characteristics and thermal stabilities are tested and analyzed, which include the avalanche breakdown voltage, leakage current variation with junction temperature rise. To study the thermal stability of power device, the closed loop thermal system and stability criteria are developed and analyzed. From the developed thermal stability criterion, the maximum switching frequency can be derived for the converter system design. The developed thermal system analysis approach can be extended to other Si devices or wide bandgap devices. To fully and safely utilize the power devices the junction temperature prediction approach is developed and implemented in the system test, which considers the parasitic components inside the power MOSFET module when the power MOSFET module switches at hundreds of kHz. Also the thermal stability for pulse power application characteristics is studied further to predict how the high junction temperature operation affects the power density improvement.
Thirdly, to develop high frequency high power devices for high power high density converter design, the basic approaches are paralleling low current rating power MOSFETs or series low voltage rating IGBTs to achieve high frequency high power output, because power MOSFETs and low voltage IGBTs can operate at high switching frequency and have better thermal handling capability. However the current sharing issues caused by transconductance, threshold voltage and miller capacitance mismatch during conduction and switching transient states may generate higher power losses, which need to be analyzed further. A current sharing control approach from the gate side is developed. The experimental results indicate that the power MOSFETs can be paralleled with proper gate driver design and accordingly the switching losses are reduced to some extent, which is very useful for the switching loss dominated high power density converter design.
The gate driving design is also important for the power MOSFET module with parallel dice inside thus increased input capacitance. This results in the higher gate driver power loss when the traditional resistive gate driver is implemented. Therefore the advanced self-power resonant gate driver is investigated and implemented. The low gate driver loss results in the development of the self-power unit that takes the power from the power bus. The overall volume of the gate driver can be minimized thus the power density is improved.
Next, power semiconductor device series-connection operation is often used in the high power density converter to meet the high voltage output such as high power density boost converter. The static and dynamic voltage balancing between series-connected IGBTs is achieved using a hybrid approach of an active clamp circuit and an active gate control. A Scalable Power Semiconductor Switch (SPSS) based on series-IGBTs is developed with built-in power supply and a single optical control terminal. An integrated package with a common baseplate is used to achieve a better thermal characteristic. These design features allow the SPSS unit to function as a single optically controlled three-terminal switching device for users. Experimental evaluation of the prototype SPSS shows it fully achieved the design objectives. The SPSS is a useful power switch concept for building high power density, high switching frequency and high voltage functions that are beyond the capability of individual power devices.
As conclusions, in this dissertation, the above-mentioned issues and approaches to develop high density power converter from power semiconductor devices standpoint are explored, particularly with regards to high frequency high temperature operation. To realize such power switches the related current sharing, voltage balance and gate driving techniques are developed. The power density potential improvements are investigated based on the real high density power converter design. The power semiconductor devices effects on power density are investigated from the power device figure of merit, high frequency high temperature operation and device parallel operation points of view.Ph. D.
26
Sirajullah, Zahed. "The power of Japanese industrial policy concerning semiconductors." Thesis, Boston University, 1997. https://hdl.handle.net/2144/27773.
Повний текст джерелаАнотація:
Boston University. University Professors Program Senior theses.PLEASE NOTE: Boston University Libraries did not receive an Authorization To Manage form for this thesis. It is therefore not openly accessible, though it may be available by request. If you are the author or principal advisor of this work and would like to request open access for it, please contact us at open-help@bu.edu. Thank you.
2031-01-02
27
Wilson, Susan Lynn. "High power grating-outcoupled surface-emitting semiconductor laser." Ann Arbor, Mich. : ProQuest, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3214770.
Повний текст джерелаАнотація:
Thesis (Ph.D. in Electrical Engineering)--S.M.U.Title from PDF title page (viewed July 20, 2007). Source: Dissertation Abstracts International, Volume: 67-04, Section: B, page: 2165. Adviser: Gary Evans. Includes bibliographical references.
28
Kim, Kyungbum. "ALL-SEMICONDUCTOR HIGH POWER MODE-LOCKED LASER SYSTEM." Doctoral diss., University of Central Florida, 2006. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/2482.
Повний текст джерелаАнотація:
The objective of this dissertation is to generate high power ultrashort optical pulses from an all-semiconductor mode-locked laser system. The limitations of semiconductor optical amplifier in high energy, ultrashort pulse amplification are reviewed. A method to overcome the fundamental limit of small stored energy inside semiconductor optical amplifier called "eXtreme Chirped Pulse Amplification (X-CPA)" is proposed and studied theoretically and experimentally. The key benefits of the concept of X-CPA are addressed. Based on theoretical and experimental study, an all-semiconductor mode-locked X-CPA system consisting of a mode-locked master oscillator, an optical pulse pre-stretcher, a semiconductor optical amplifier (SOA) pulse picker, an extreme pulse stretcher/compressor, cascaded optical amplifiers, and a bulk grating compressor is successfully demonstrated and generates >kW record peak power. A potential candidate for generating high average power from an X-CPA system, novel grating coupled surface emitting semiconductor laser (GCSEL) devices, are studied experimentally. The first demonstration of mode-locking with GCSELs and associated amplification characteristics of grating coupled surface emitting SOAs will be presented. In an effort to go beyond the record setting results of the X-CPA system, a passive optical cavity amplification technique in conjunction with the X-CPA system is constructed, and studied experimentally and theoretically.Ph.D.
Optics and Photonics
Optics
29
Scahill, Charlanne Mary. "Design of high power, single frequency semiconductor lasers." Thesis, University of Cambridge, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.624851.
Повний текст джерела
30
Pusino, Vincenzo. "High power, high frequency mode-locked semiconductor lasers." Thesis, University of Glasgow, 2014. http://theses.gla.ac.uk/5174/.
Повний текст джерелаАнотація:
Integrated mode-locked laser diodes are effective sources of periodic sequences of optical pulses, which have always been of great interest for a range of spectroscopy, imaging and optical communications applications. However, some disadvantages prevent their widespread use, such as the restricted tuning of their repetition rate and their output power levels never exceeding a few mW. This thesis reports on the work done to address those limitations. Two main findings are presented, the first being the generation of ultra-high repetition rate optical signals through external injection of two continuous wave signals. This mechanism is much simpler than other techniques previously proposed to increase the repetition rate of monolithic modelocked laser, and has proved successful in generating optical signals up to quasi-THz. It is based on injection of two continuous wave signals whose spacing is an integer multiple of the pulsed cavity free spectral range and whose injection wavelengths coincide with two of the monolithic laser modes. This technique allows discrete tunability of the repetition rate with a step equal to the injected cavity free spectral range, and the injected laser has been shown to lock up to a repetition rate of 936 GHz, corresponding to 26 times that of the free-running semiconductor laser (36 GHz). The presented scheme is suitable for integration, opening the way for a successful on-chip generation of ultra-high repetition rate optical signals exploiting coupled cavity phenomena. The second main finding of this thesis regards the changes induced on the pulsed operation of monolithic passively mode-locked lasers by a blue bandgap detuning applied to their saturable absorber. The quantum well intermixing technique has been used for attaining an area-selective bandgap shift on the fabricated chip, being fully postgrowth. The lasers with a detuned absorber were found to have an extended range of gain section currents and absorber voltages in which stable mode-locking operation took place. Furthermore, a comparison of mode-locked devices fabricated on the same chip, respectively with and without a bandgap detuned absorber, showed that the emitted pulses had greater peak power and were less affected by optical chirp when the bandgap of the absorbing section was shifted. A new intermixing technique has also been developed as part of this work to address some inconsistencies of the pre-existing one; the newly introduced approach has been found to provide better spatial resolution and a more precise control of the attained bandgap shift.
31
Ming, Ranick Ng Kian. "Three dimensional RESURF effect in power semiconductor devices." Thesis, University of Cambridge, 2002. https://www.repository.cam.ac.uk/handle/1810/272010.
Повний текст джерела
32
Nunnally, Clay. "Magnetoresistance in semiconductor-metal hybrids for power applications." Diss., Columbia, Mo. : University of Missouri-Columbia, 2008. http://hdl.handle.net/10355/5614.
Повний текст джерелаАнотація:
Thesis (Ph. D.)--University of Missouri-Columbia, 2008.The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on June 11, 2009) Vita. Includes bibliographical references.
33
Tallarico, Andrea Natale <1988>. "Characterization and Modeling of Semiconductor Power Devices Reliability." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amsdottorato.unibo.it/7990/1/Tallarico_PhD_Thesis.pdf.
Повний текст джерелаАнотація:
This thesis aims at studying, characterizing and modeling the trapping and de-trapping mechanisms occurring during the ON-state operation mode and leading to the degradation of semiconductor power devices. In this operating condition, the combined effect of moderate electric fields, high currents and temperatures due to self-heating effects can seriously affect the long-term reliability leading to device failure. Detailed analyses are performed on both silicon and gallium nitride based technologies by means of accelerated life test methods and electro-thermal simulations, aimed at understanding the physical origins of the degradation.
In particular, this thesis provides the following contributions: i) the role of the interface and oxide trapped charge induced by negative bias temperature instability (NBTI) stress in p-channel Si-based U-MOSFETs is investigated. The impact of relevant electrical and physical parameters, such as stress voltage, recovery voltage and temperature, is accounted for and proper models are also proposed.
In the field of innovative semiconductor power devices, this work focuses on the study of GaN-based devices. In particular, three different subtopics are considered: ii) a thermal model, accounting for the temperature dependence of the thermal boundary resistance (TBR), is implemented in TCAD simulator in order to realistically model self-heating effects in GaN-based power devices; iii) the degradation mechanisms induced by ON-state stress in GaN-based Schottky barrier diodes (SBDs) are proposed by analyzing their dependence on the device geometry; iv) the trapping mechanisms underlying the time-dependent gate breakdown and their effects on the performance of GaN-based power HEMTs with p-type gate are investigated, and an original empirical model representing the relationship between gate leakage current and time to failure is proposed.
34
Choi, Kyu-Won. "Hierarchical power optimization for ultra low-power digital systems." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04082004-180111/unrestricted/choi%5Fkyu-won%5F200312%5Fphd.pdf.
Повний текст джерела
35
Gazzoni, Jean Carlos. "Comparação de perdas em semicondutores em inversores ZCZVT." Universidade Tecnológica Federal do Paraná, 2011. http://repositorio.utfpr.edu.br/jspui/handle/1/227.
Повний текст джерелаАнотація:
CAPESEste trabalho apresenta um estudo comparativo de perdas em semicondutores empregados em diferentes técnicas de comutação suave aplicadas a inversores alimentados em tensão para aplicações industriais. As técnicas a serem avaliadas são as de transição sob corrente e tensão nulas simultaneamente, conhecida como ZCZVT (Zero-Current and Zero-Voltage Transition). Para que possa ser realizada uma comparação de forma justa, é proposta uma metodologia de projeto do circuito auxiliar para os inversores ZCZVT com circuito auxiliar ressonante e ZCZVT com circuito auxiliar não ressonante, de tal forma que todos os Transistores Bipolares de Porta Isolada (Insulated Gate Bipolar Transistors – IGBTs) assistidos por estes circuitos de auxílio à comutação tenham condições de comutação semelhantes, i.e., comutem sob taxas de variação de tensão e corrente semelhantes. Para tanto, esta metodologia baseia-se nas restrições dinâmicas apresentadas pelos IGBTs em condições de comutação sob corrente e tensão nulas. A partir desta metodologia, tendo sido asseguradas as condições ideais de comutação para todos os IGBTs da ponte monofásica, desenvolveu-se um estudo comparativo dos esforços, perdas e limitações de cada um dos circuitos auxiliares (ressonante e não ressonante). As simulações dos inversores com a tecnologia de transistores IGBTs disponíveis no mercado serviu de base para a montagem de protótipos. Os protótipos são implementados através de um circuito de teste onde a estratégia de chaveamento dos dispositivos semicondutores é elaborada por meio de dispositivos lógicos programáveis de FPGA. Após a aquisição de dados experimentais, os mesmos são comparados com as simulações realizadas a fim de se determinar os reais benefícios e limitações de um inversor em relação ao outro.
This work presents a comparative study of semiconductor losses applied to Voltage Source Inverter - VSI for industrial drives applications with different soft-switching techniques. The evaluated techniques are Zero Current Zero Voltage Transition Inverters, known as ZCZVT. In order to make a fair comparison of them, it is proposed a unified design methodology for the auxiliary circuit of both ZCZVT inverters, with on-resonant auxiliary circuit, in such a way that all the IGBTs transistors assisted by theses auxiliary circuits have similar switching conditions, i.e., similar dv/dt and di/dt during transitions between the switches on and off states. Therefore, this methodology is based on the main physical constrains showed by IGBTs operating under switching conditions. By means of this methodology, the ideal conditions of switching for all IGBTs of the single phase bridge have being assured. Additionally, it was developed a comparative study of the stresses, losses and limitations of each one of the auxiliary circuits (resonant and non-resonant). The simulations of the inverters with some important IGBT technologies available on the market served as the basis to assembly the laboratory prototypes. The prototypes are implemented by a circuit under test with the switching strategy is developed using Field Programmable Gate Array - FPGA. After the experimental data acquisition, the results are compared with the simulations carried out in order to determine actual benefits and limitations of each inverter.
36
Shea, Patrick. "DESIGN AND MODELING OF RADIATION HARDENED LDMOSFET FOR SPACE CRAFT POWER SYSTEMS." Master's thesis, University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/2822.
Повний текст джерелаАнотація:
NASA missions require innovative power electronics system and component solutions with long life capability, high radiation tolerance, low mass and volume, and high reliability in space environments. Presently vertical double-diffused MOSFETs (VDMOS) are the most widely used power switching device for space power systems. It is proposed that a new lateral double-diffused MOSFET (LDMOS) designed at UCF can offer improvements in total dose and single event radiation hardness, switching performance, development and manufacturing costs, and total mass of power electronics systems. Availability of a hardened fast-switching power MOSFET will allow space-borne power electronics to approach the current level of terrestrial technology, thereby facilitating the use of more modern digital electronic systems in space. It is believed that the use of a p+/p-epi starting material for the LDMOS will offer better hardness against single-event burnout (SEB) and single-event gate rupture (SEGR) when compared to vertical devices fabricated on an n+/n-epi material. By placing a source contact on the bottom-side of the p+ substrate, much of the hole current generated by a heavy ion strike will flow away from the dielectric gate, thereby reducing electrical stress on the gate and decreasing the likelihood of SEGR. Similarly, the device is hardened against SEB by the redirection of hole current away from the base of the device's parasitic bipolar transistor. Total dose hardness is achieved by the use of a standard complementary metal-oxide semiconductor (CMOS) process that has shown proven hardness against total dose radiation effects.M.S.E.E.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
37
Yatim, Abdul Halim bin Mohamed. "A microprocessor controlled three-phase insulated gate transistor PWM inverter drive." Thesis, University of Bradford, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.292639.
Повний текст джерела
38
Zhang, Yaping. "High-power, high-brightness laser diodes with distributed phase correction." Thesis, University of Nottingham, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.246369.
Повний текст джерела
39
Guan, Lingpeng. "Novel low voltage power semiconductor devices and IC technologies /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20GUAN.
Повний текст джерела
40
Hoban, Peter Thomas. "The transient electrical performance of high power semiconductor devices." Thesis, Staffordshire University, 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.242620.
Повний текст джерела
41
MacLean, Alexander James. "Power scaling and wavelength control of semiconductor disk lasers." Thesis, University of Strathclyde, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.487871.
Повний текст джерелаАнотація:
The semiconductor disk laser (SDL) takes advantage of the potential for band-gap engineering in semiconductor multilayers to give a wavelength flexible laser source; the free-space cavity not only gives the freedom of design to achieve good beam quality and power scaling, but also to insert wavelength control elements into the cavity for spectral narrowing and tuning, and for second harmonic generation (SHG). Thermal modelling using finite element analysis (FEA) was used to compare the different thermal management techniques used to dissipate the heat generated by the optical pumping process, which ultimately limits the output power achievable in these devices: an intracavity diamond heatspreader was chosen as the most appropriate technique where wavelength diversity is required.
42
Huang, S. "Advanced high power semiconductor devices based on trench technology." Thesis, University of Cambridge, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.604696.
Повний текст джерелаАнотація:
MOS-gated power semiconductor devices have dominated the application areas in power electronics. Research on improving performance of these devices have always been motivated by industrial need. These devices were conventionally fabricated using DMOS technology. Trench technology, however, has now been widely adopted to enhance the behaviour of MOS-gated power semiconductor devices. The trench IGBT is very attractive for high voltage applications. This thesis first discusses the performance optimisation and design of device structure and technology parameters for high voltage trench IGBTs based on detailed simulations on 65. KV and 1.8 KV devices. A detailed short-circuit analysis of 1.2 KV PT and NPT IGBTs is also presented based on numerical simulation and experimental results. To improve the device performance further for high voltage power devices especially the IGBT, four novel device structure concepts, which are expected to be a new generation of power devices for high voltage applications and termed dynamic n-buffer IGBT (DB-IGBT), dual-channel IEGT (DC-IEGT), single gate MOS controlled current saturation thyristor (MCST) and anode injection efficiency controlled IGBT (IEC-IGBT), are then proposed and studied. By incorporating trench gates at the anode end of the basic trench IGBT structure, the DB-IGBT shows advantages over the conventional IGBT in terms of trade-off between turn-off energy loss and on-state voltage drop, and is very attractive for high frequency switching applications. The DC-IEGT which allows for an additional p-channel to collect holes during turn-off also shows superior overall performance over the conventional IEGT and IGBT and is characterised by low on-state voltage drop, fast switching and large SOA. The MCST operates in thyristor-like mode in the on-state when the anode voltage is low, and enters the IGBT-like mode automatically as the anode voltage increases. It offers low on-state voltage drop, low turn-off energy loss and high voltage current saturation capability. The anode injection enhancement effect due to reduction of the anode contact area in a transparent p-anode IGBT is discussed for the first time.
43
Finney, Stephen Jon. "The reduction of switching losses in power semiconductor devices." Thesis, Heriot-Watt University, 1994. http://hdl.handle.net/10399/1345.
Повний текст джерела
44
Lee, Shinwook. "HIGH POWER MODE-LOCKED SEMICONDUCTOR LASERS AND THEIR APPLICATIONS." Doctoral diss., University of Central Florida, 2008. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3195.
Повний текст джерелаАнотація:
In this dissertation, a novel semiconductor mode-locked oscillator which is an extension of eXtreme Chirped Pulse Amplification (XCPA) is investigated. An eXtreme Chirped Pulse Oscillator (XCPO) implemented with a Theta cavity also based on a semiconductor gain is presented for generating more than 30ns frequency-swept pulses with more than 100pJ of pulse energy and 3.6ps compressed pulses directly from the oscillator. The XCPO shows the two distinct characteristics which are the scalability of the output energy and the mode-locked spectrum with respect to repetition rate. The laser cavity design allows for low repetition rate operation <100MHz. The cavity significantly reduces nonlinear carrier dynamics, integrated self phase modulation (SPM), and fast gain recovery in a Semiconductor optical Amplifier (SOA). Secondly, a functional device, called a Grating Coupled Surface Emitting Laser (GCSEL) is investigated. For the first time, passive and hybrid mode-locking of a GCSEL is achieved by using saturable absorption in the passive section of GCSEL. To verify the present limitation of the GCSEL for passive and hybrid mode-locking, a dispersion matched cavity is explored. In addition, a Grating Coupled surface emitting Semiconductor Optical Amplifier (GCSOA) is also investigated to achieve high energy pulse. An energy extraction experiment for GCSOA using stretched pulses generated from the colliding pulse semiconductor mode-locked laser via a chirped fiber bragg grating, which exploits the XCPA advantages is also demonstrated. Finally, passive optical cavity amplification using an enhancement cavity is presented. In order to achieve the interferometric stability, the Hänsch-Couillaud Method is employed to stabilize the passive optical cavity. The astigmatism-free optical cavity employing an acousto-optic modulator (AOM) is designed and demonstrated. In the passive optical cavity, a 7.2 of amplification factor is achieved with a 50 KHz dumping rate.Ph.D.
Optics and Photonics
Optics and Photonics
Optics PhD
45
Law, Victor John. "Radio frequency plasma power spectroscopy for semiconductor device processing." Thesis, University of Ulster, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.413866.
Повний текст джерела
46
Zeng, Guang. "Some aspects in lifetime prediction of power semiconductor devices." Universitätsverlag Chemnitz, 2018. https://monarch.qucosa.de/id/qucosa%3A34891.
Повний текст джерелаАнотація:
Power electronics, which fully covers the generation, conversion, transmission and usage of electrical energy, is a key technology for human welfare. With the development of technologies, the requirements on the reliability of power electronic systems are keep increasing. Long term operation under harsh environments is often accompanied by higher switching frequency and higher power density. To allow a reliable and sustainable performance of the power electronic systems, precise lifetime estimation of the power semiconductor devices is of significant importance. This work covers some aspects in the lifetime prediction of power semiconductor devices, especially IGBT and diode, in power module and transfer-molded discrete package. Difference in device temperature determination was illustrated using analytical calculation, simulation and measurement. In addition, temperature calculation in the frequency domain was demonstrated which gives benefits in the application with several hundred devices. Furthermore, different control strategies in the power cycling test were compared. The linear cumulative damage theory was validated by using the power cycling test. For the high power IGBT module used in the MMC HVDC application, power cycling lifetime with 50 Hz heating processes was investigated. For the transfer-molded discrete package, the first lifetime model with comparable scope like the lifetime model of power modules was proposed.Leistungselektronik, welche direkt relevant für die Erzeugung, Umwandlung, Übertragung und Nutzung elektrischer Energie ist, ist eine Schlüsseltechnologie für das Wohl der Menschen. Mit der Entwicklung von Technologien steigen die Anforderungen an die Zuverlässigkeit leistungselektronischer Systeme. Der Langzeitbetrieb unter rauen Umgebungsbedingungen geht häufig mit einer höheren Schaltfrequenz und einer höheren Leistungsdichte einher. Um eine zuverlässige und nachhaltige Operation der leistungselektronischen Systeme zu ermöglichen, ist die genaue Lebensdauerabschätzung der Halbleiter-Leistungsbauelemente von großer Bedeutung. Diese Arbeit befasst sich mit einigen Aspekten der Lebensdauerabschätzung von den Halbleiter-Leistungsbauelementen. Unterschied in der Temperaturabstimmung der Halbleiter-Leistungsbauelemente wird anhand von Berechnung, Simulation und Messung veranschaulicht. Darüber hinaus bietet die Temperaturberechnung im Frequenzbereich Vorteile bei der Anwendung mit mehreren hundert Bauelementen. Darüber hinaus wurden verschiedene Regelstrategien im Lastwechseltest verglichen. Die lineare kumulative Alterungstheorie wurde unter Verwendung des Lastwechseltests validiert. Für das in der MMC-HGÜ-Anwendung verwendete Hochleistungs-IGBT-Modul wurden Alterungsprozesse bei 50 Hz Erwärmung untersucht. Für das Diskrete-Gehäuse wird das erste Lebensdauermodell vorgestellt, welches ein vergleichbares Anwendungsbereich wie das Lebensdauermodell von Leistungsmodulen hat.
47
Kozak, Joseph Peter. "Hard Switched Robustness of Wide Bandgap Power Semiconductor Devices." Diss., Virginia Tech, 2021. http://hdl.handle.net/10919/104874.
Повний текст джерелаАнотація:
As power conversion technology is being integrated further into high-reliability environments such as aerospace and electric vehicle applications, a full analysis and understanding of the system's robustness under operating conditions inside and outside the safe-operating-area is necessary. The robustness of power semiconductor devices, a primary component of power converters, has been traditionally evaluated through qualification tests that were developed for legacy silicon (Si) technologies. However, new devices have been commercialized using wide bandgap (WBG) semiconductors including silicon carbide (SiC) and gallium nitride (GaN). These new devices promise enhanced capabilities (e.g., higher switching speed, smaller die size, lower junction capacitances, and higher thermal conductance) over legacy Si devices, thus making the traditional qualification experiments ineffective.
This work begins by introducing a new methodology for evaluating the switching robustness of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). Recent static acceleration tests have revealed that SiC MOSFETs can safely operate for thousands of hours at a blocking voltage higher than the rated voltage and near the avalanche boundary. This work evaluates the robustness of SiC MOSFETs under continuous, hard-switched, turn-off stresses with a dc-bias higher than the device rated voltage. Under these conditions, SiC MOSFETs show degradation in merely tens of hours at 25si{textdegree}C and tens of minutes at 100si{textdegree}C. Two independent degradation and failure mechanisms are unveiled, one present in the gate-oxide and the other in the bulk-semiconductor regions, detected by the increase in gate leakage current and drain leakage current, respectively. The second degradation mechanism has not been previously reported in the literature; it is found to be related to the electron hopping along the defects in semiconductors generated in the switching tests. The comparison with the static acceleration tests reveals that both degradation mechanisms correlate to the high-bias switching transients rather than the high-bias blocking states.
The GaN high-electron-mobility transistor (HEMT) is a newer WBG device that is being increasingly adopted at an unprecedented rate. Different from SiC MOSFETs, GaN HEMTs have no avalanche capability and withstand the surge energy through capacitive charging, which often causes significant voltage overshoot up to their catastrophic limit. As a result, the dynamic breakdown voltage (BV) and transient overvoltage margin of GaN devices must be studied to fully evaluate the switching ruggedness of devices. This work characterizes the transient overvoltage capability and failure mechanisms of GaN HEMTs under hard-switched turn-off conditions at increasing temperatures, by using a clamped inductive switching circuit with a variable parasitic inductance. This test method allows flexible control over both the magnitude and the dV/dt of the transient overvoltage. The overvoltage robustness of two commercial enhancement-mode (E-mode) p-gate HEMTs was extensively studied: a hybrid drain gate injection transistor (HD-GIT) with an Ohmic-type gate and a Schottky p-Gate HEMT (SP-HEMT). The overvoltage failure of the two devices was found to be determined by the overvoltage magnitude rather than the dV/dt. The HD-GIT and the SP-HEMT were found to fail at a voltage overshoot magnitude that is higher than the breakdown voltage in the static current-voltage measurement. These single event failure tests were repeated at increasing temperatures (100si{textdegree}C and 150si{textdegree}C), and the failures of both devices were consistent with room temperature results. The two types of devices show different failure behaviors, and the underlying mechanisms (electron trapping) have been revealed by physics-based device simulations.
Once this single-event overvoltage failure was established, the device's robustness under repetitive overvoltage and surge-energy events remained unclear; therefore, the switching robustness was evaluated for both the HD-GIT and SP-HEMT in a clamped, inductive switching circuit with a 400 V dc bias. A parasitic inductance was used to generate the overvoltage stress events with different overvoltage magnitude up to 95% of the device's destructive limit, different switching periods from 10 ms to 0.33 ms, different temperatures up to 150si{textdegree}C, and different negative gate biases. The electrical parameters of these devices were measured before and after 1 million stress cycles under varying conditions. The HD-GITs showed no failure or permanent degradation after 1-million overvoltage events at different switching periods, or elevated temperatures. The SP-HEMTs showed more pronounced parametric shifts after the 1 million cycles in the threshold voltage, on-resistance, and saturation drain current. Different shifts were also observed from stresses under different overvoltage magnitudes and are attributable to the trapping of the holes produced in impact ionization. All shifts were found to be recoverable after a relaxation period.
Overall, the results from these switching-oriented robustness tests have shown that SiC MOSFETs show a tremendous lifetime under static dc-bias experiments, but when excited by hard-switching turn-off events, the failure mechanisms are accelerated. These results suggest the insufficient robustness of SiC MOSFETs under high bias, hard switching conditions, and the significance of using switching-based tests to evaluate the device robustness. These inspired the GaN-based hard-switching turn-off robustness experiments, which further demonstrated the dynamic breakdown voltage phenomena. Ultimately these results suggest that the breakdown voltage and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static breakdown voltage. Both sets of experiments provide further evidence for the need for switching-oriented robustness experiments to be implemented by both device vendors and users, to fully qualify and evaluate new power semiconductor transistors.Doctor of Philosophy
Power conversion technology is being integrated into industrial and commercial applications with the increased use of laptops, server centers, electric vehicles, and solar and wind energy generation. Each of these converters requires the power semiconductor devices to convert energy reliably and safely. textcolor{black}{Silicon has been the primary material for these devices; however,} new devices have been commercialized from both silicon carbide (SiC) and gallium nitride (GaN) materials. Although these devices are required to undergo qualification testing, the standards were developed for silicon technology. The performance of these new devices offers many additional benefits such as physically smaller dimensions, greater power conversion efficiency, and higher thermal operating capabilities. To facilitate the increased integration of these devices into industrial applications, greater robustness and reliability analyses are required to supplement the traditional tests. The work presented here provides two new experimental methodologies to test the robustness of both SiC and GaN power transistors. These methodologies are oriented around hard-switching environments where both high voltage biases and high conduction current exist and stress the intrinsic semiconductor properties. Experimental evaluations were conducted of both material technologies where the electrical properties were monitored over time to identify any degradation effects. Additional analyses were conducted to determine the physics-oriented failure mechanisms. This work provides insight into the limitations of these semiconductor devices for both device designers and manufacturers as well as power electronic system designers.
48
Chakrabarti, Abhimanyu. "Transmission line matrix modelling for semiconductor transport." Thesis, University of East Anglia, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.338228.
Повний текст джерела
49
Chen, Wei. "Fast switching low power loss devices for high voltage integrated circuits." Thesis, University of Cambridge, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.262863.
Повний текст джерела
50
Walker, Philip. "Electrical and thermal modelling of power semiconductor devices using numerical methods." Thesis, University of Liverpool, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.237525.
Повний текст джерела