Дисертації: "MOM capacitors"

1

Orozco, montes Maileth. "Implémentation d'un générateur de nanoparticules en phase gazeuse fondé sur la pulvérisation cathodique magnétron pour la synthèse de films minces nanocomposities céramique/nanoparticules métalliques." Thesis, Limoges, 2017. http://www.theses.fr/2017LIMO0082/document.

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Ces travaux de thèse portent sur l’étude d’un générateur de nanoparticules (NPs) en phase gazeuse basé sur la pulvérisation cathodique magnétron. La mise en oeuvre d’un spectromètre d’émission optique et d’une microbalance à quartz a permis d’observer l’influence des paramètres du procédé (nature et débit des gaz, courant cathodique, configuration magnétique) sur les espèces présentes dans le plasma et la vitesse de dépôt des NPs. Ceci a conduit à une meilleure compréhension du procédé et à l’établissement d’un point de fonctionnement. Des analyses par microscopique électronique en transmission (MET) ont mis en évidence des NPs d’argent cristallisées en vol dont la taille augmente (de 2,5 ± 0,5 nm à 5,2 ± 0,5 nm de diamètre) avec la longueur d’agrégation. L’association de cette source à un réacteur de pulvérisation magnétron conventionnelle a permis la synthèse de nanocomposites constitués de nanoparticules métalliques (Cu ou Ag) dans une matrice céramique diélectrique amorphe et transparente (nitrure ou oxyde d’aluminium). Un décalage de la Résonance Plasmon de Surface (RPS) vers le rouge a été observé avec l’augmentation de la permittivité de la matrice ainsi qu’un élargissement de la RPS avec la diminution de la taille des NPs. Enfin, les propriétés électriques des nanocomposites ont été étudiés au sein de capacités de type Métal/Isolant/Métal (MIM) permettant une modulation de la permittivité avec le taux de dopage en NPs d’argent (5% et 10% vol.)
This thesis is dedicated to the study of free nanoparticles (NPs) source based on magnetron sputtering. Setting up an optical emission spectrometer and a quartz microbalance allowed to observe the influence of the process parameters (gas composition and flow rate, cathodic current, magnetic configuration) on the plasma species and the NPs deposition rate. This lead to a better understanding of the process and the establishment of a process operating windows. Transmission Electron Microscopy (TEM) analysis revealed crystallized silver NPs whose size increased (from 2.5 ± 0.5 nm to 5.2 ± 0.5 nm in diameter) when the aggregation length increased. The free NPs source coupled to a conventional magnetron sputtering chamber allowed the deposition of nanocomposites thin films consisting of metallic NPs (Cu ou Ag) embedded in dielectric transparent amorphous matrix (aluminum nitride or oxide). A red shift of the Surface Plasmon Resonance (SPR) was observed with the increase of the matrix permittivity value. A broadening of the SPR with the decrease of the NPs size was also evidenced. Finally, the electrical properties of the nanocomposites have been studied by means of a Metal/Insulator/Metal capacitor pointing out a modulation of the permittivity with the silver NPs content (5% and 10% vol.)

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2

Quémerais, Thomas. "Conception et étude de la fiabilité des amplificateurs de puissance fonctionnant aux fréquences millimétriques en technologies CMOS avancées." Grenoble INPG, 2010. http://www.theses.fr/2010INPG0158.

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Avec l'émergence d'applications millimétriques telles que le radar automobile ou le WHDMI, la fiabilité est devenue un enjeu extrêmement important pour l'industrie. Dans un émetteur/récepteur radio, les problèmes de fiabilité concernent principalement les transistors MOS intégrés dans les amplificateurs de puissance, compte-tenu des niveaux relativement élevés des puissances. Ces composants sont susceptibles de se détériorer fortement par le phénomène de l'injection de porteurs chauds impactant lourdement les performances des amplificateurs. Ce travail de thèse concerne la conception et l'étude de la fiabilité des amplificateurs de puissance fonctionnant aux fréquences millimétriques en technologies CMOS avancées. Le mémoire est articulé autour de quatre chapitres. Les deux premiers chapitres concernent l'étude, la conception, la modélisation et la caractérisation des éléments actifs et passifs intégrés sur silicium et utilisés pour réaliser des amplificateurs de puissance aux fréquences millimétriques. Le troisième chapitre décrit les trois amplificateurs de puissance conçus et réalisés pour les tests de fiabilité. Enfin, le dernier chapitre propose une étude complète de la fiabilité de ces circuits jusqu'au calcul de leur temps de vie
With the emergence of millimeter-wave applications such as automotive radar or WHDMI, the reliability became a very important issue for the industry. In a radio transceiver, the main reliability problems concern the MOS transistors used in the power amplifiers, due to the high power level. These devices are subject to deterioration by the hot carrier phenomenon. This impacts heavily the power amplifiers performances. This thesis work concerns the design and the study of the reliability of millimeter-wave power amplifiers in advanced CMOS technologies. The manuscript is divided into four chapters. The two first one concern the study, the design, the modeling and the characterization of integrated active and passive elements on silicon and used into power amplifiers at millimeter wave frequencies. The third chapter describes the three power amplifiers designed and realized for reliability tests. The final chapter provides a comprehensive study of the reliability of these circuits to calculate their lifetime

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3

Miao, Bing. "Hafnium based MIM capacitors for hostile environments." Thesis, University of Newcastle Upon Tyne, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.506721.

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4

Wakrim, Tariq. "Commutation de capacitance dans les mémoires résistives (ReRAM), application aux mémoires d’impédance (ZRAM ou mem-capacitors)." Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAT085/document.

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Les mémoires résistives ReRAM (ou memristors) sont destinées à remplacer les mémoires non volatiles Flash. Les ReRAM utilisent le changement de résistance d’une structure MIM (Métal-Isolant-Métal) soumise à un stress en tension. Jusqu’à présent, l’attention était focalisée sur les mécanismes qui régissent la commutation de résistance dans les dispositifs ReRAM. Moins d’attention a été accordée à la variation de capacitance, c'est-à-dire à la variation de capacité des structures MIM lorsque ces dernières sont soumises à un stress en tension. C’est sur ce dernier point que notre travail porte. Nous étudions la variation d’impédance (conductance et capacitance dans le domaine RF) dans des structures MIM à base de HfO2. Au-delà d’une tension seuil (Set) une diminution de la capacitance est observée, conjointement à une augmentation de conductance. Des cycles mémoires capacité-tension (C-V) et conductance-tension (G-V) sont obtenus de manière reproductible. Des caractérisations en fréquence (C-f et G-f), sous différentes polarisations continues, sont effectuées pour mieux comprendre les mécanismes de commutation de l’impédance. La diminution de capacitance dans l’état conducteur (ON) est attribuée au caractère inductif des filaments conducteurs formés pendant l’étape de Set. Les mécanismes de transport conduisant à l’apparition de ce caractère inductif sont discutés. Nous montrons également l’influence du procédé de dépôt (ALD) de HfO2 sur les caractéristiques C-V et G-V, ainsi que les modifications apportées par l’emploi d’une structure bicouche. Ce travail ouvre la voie à la réalisation de dispositifs à mémoire de capacitance (mem-capacitors), et plus généralement de composants à mémoire d’impédance (ZRAM). Le potentiel de ces dispositifs pour réaliser un filtre reconfigurable (programmable en tension) est démontré d’une manière pratique
Resistive random access memories (ReRAM) hold great potential for replacing Flash memories. A ReRAM memory (or MEMRISTOR) uses a resistive switching phenomenon found in Metal-Insulator-Metal (MIM) structures under a voltage stress. Most researches were focused on the mechanisms governing the resistance switching in ReRAM devices and less attention has been paid to capacitance variation of MIM structures under a voltage stress. Our work is focused on that latter phenomenon. We study impedance variation (conductance and capacitance in the RF domain) in HfO2-based MIM structures. Above a threshold voltage (Set), concurrently to conductance increase, a decrease in the capacitance value is observed. Reproducible capacitance-voltage (C-V) and conductance-voltage (G-V) memory cycles are obtained. Frequency dependent characterizations (C-f and G-f), under different DC bias voltages, are performed with the aim of understanding the mechanisms of impedance switching. The capacitance decrease observed in the conducting (ON) state is attributed to the inductance of the filament created during the Set stage. Transport phenomena responsible for the filament inductive behavior are discussed. Impact of HfO2 deposition process (ALD), as well as the use of bi-layer structures, on C-V and G-V characteristics are shown. This work paves the way for the realization of new capacitance memory devices (mem-capacitors) and most generally for impedance memories (ZRAM). Potential of these devices to design reconfigurable filters (controlled by voltage bias) is demonstrated in a practical way

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5

Do, Ky Hien Carleton University Dissertation Engineering Electrical. "Fabrication and characterization of microwave thin-film mim capacitors." Ottawa, 1991.

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6

Ayöz, Suat. "High-frequency optimisation and modelling of RF MEM variable capacitors." Thesis, University of Cambridge, 2010. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.608913.

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7

Aydogdu, Birsu. "Comparison Of Sorption Capacities On Different Samples Of Mcm-41." Master's thesis, METU, 2013. http://etd.lib.metu.edu.tr/upload/12615610/index.pdf.

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ABSTRACT COMPARISON OF SORPTION CAPACITIES OF HYDROCARBONS ON DIFFERENT SAMPLES OF MCM-41 AYDOGDU, Birsu M. Sc., Department of Chemical Engineering Supervisor: Prof. Dr. Hayrettin YÜ
CEL Co-Supervisor: Prof. Dr. Gü
rkan KARAKAS January 2013, 69 pages MCM-41(Mobil Composition Matter-41) is one of the three members of M41S family and has a highly ordered hexagonal honeycomb like structure with a narrow pore size distribution in mesopore range, high surface area, high pore volume and high thermal stability. These features make MCM-41 proper to use for adsorption, catalysis, ion exchange and separation processes. . In this study sorption capacities of C8 aromatics (o-, m-, p-xylene and ethylbenzene at 30 °
C, 50 °
C and 65 °
C) on a MCM-41 sample synthesized in our laboratory were determined gravimetrically by using a commercial automated electro balance system and compared with results obtained in a previous and similar MSc thesis study with a sample of different origin and characteristics
specifically low BET surface area (492 m2/g). MCM-41 sample was synthesized by hydrothermal synthesis method with cetyltrimethylammoniumbromide (CTAMBr as surfactant) and tetraethyl ortosilicate (TEOS as silica source) in basic conditions. This MCM-41 sample was calcined at 540 oC for 8 h and characterized by XRD, nitrogen adsorption at 77 K, TGA, TEM, SEM and SEM-EDX. According to XRD data, main characteristic peak for synthesized MCM-41 was obtained at 2&theta
=2.28°
. Three small reflection peaks can be seen at 2&theta
values of 2.59, 4.27°
and 4.5°
. XRD pattern of the MCM-41, indicated that the desired structure of MCM-41 was successfully synthesized. Surface area, pore volume and average pore diameter were obtained from the nitrogen adsorption data at 77 K as 1154 m2/g, 1.306 cm3/g and 2.75 nm respectively. TGA analysis showed that the 540 oC is proper for the calcination. SEM -EDX analysis gave an oxygen atomic concentration 66.40% and silicon atomic concentration 33.60%. These results showed that the chemical composition of the synthesize material was in almost pure SiO2 form. The adsorbed amount for all isomers at the same pressure decreased as the temperature of the adsorption isotherms increases as expected for physical adsorption. Nitrogen adsorption of MCM-41 in this study showed type IV isotherm with H2 type hysteresis loop according the IUPAC classification. However, for o-,m-, and p-xylene an approximately linear increase in the adsorbed amount as a function of relative pressure was observed from the adsorption isotherms. Except for adsorption isotherms of m-xylene and p-xylene at 65 oC all isotherms of xylenes showed hysteresis loops. Hysteresis loops narrowed down with increasing temperature. p-xylene and m-xylene adsorption isotherms at 65 oC were reversible and did not show any hysteresis loop. Ethylbenzene adsorption isotherms at 30 oC, 50 °
C and 65 oC also showed a linear increase in the adsorption amount as a function of relative pressure like xylenes. At 50 °
C and 65 oC adsorption isotherms of ethylbenzene were reversible without a hysteresis loop. For all adsorbates volume of adsorbed amounts were calculated on the assumption that they exist as saturated liquids at the isotherm temperature and found to be significantly lower than pore volume obtained from nitrogen adsorption isotherm at 77K. Sorption capacities of these hydrocarbons on MCM-41 were also very low when compared to values found in a previous study which involved a MCM-41 sample of significantly lower surface area ( 492 m2/g ). This may be attributed to structure degradation which requires further investigation.

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8

YESMIN, Panecatl Bernal. "Síntese e caracterização do material mesoporoso MCM-41 para o desenvolvimento de capacitores MOS." Universidade Federal de Pernambuco, 2015. https://repositorio.ufpe.br/handle/123456789/15471.

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Submitted by Haroudo Xavier Filho (haroudo.xavierfo@ufpe.br) on 2016-02-26T16:11:44Z No. of bitstreams: 2 license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) 5.-Tesis doutorado Yesmin 2015 UFPE Bibliot.pdf: 2813580 bytes, checksum: c994d000e414c2f79bd7b8711d5f2714 (MD5)
Made available in DSpace on 2016-02-26T16:11:44Z (GMT). No. of bitstreams: 2 license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) 5.-Tesis doutorado Yesmin 2015 UFPE Bibliot.pdf: 2813580 bytes, checksum: c994d000e414c2f79bd7b8711d5f2714 (MD5) Previous issue date: 2015-06-05
CAPES
CNPq
FACEPE
Neste trabalho, apresentamos a síntese e caracterização do material mesoporoso MCM-41 para o desenvolvimento de capacitores MOS. A motivação deste trabalho deve-se às propriedades interessantes que MCM-41 apresenta, tais como: área superficial e volume de poro grande e estrutura ordenada de poros. Inicialmente apresentamos a síntese do material mesoporoso MCM-41 pelo método Sol-Gel, e sua caracterização estrutural (DRX e IV), morfológica (MEV e TEM) e texturais (Análise de Adsorção e Dessorção de Nitrogênio), e fazemos uma comparação de resultados com o mesmo material produzido pela Sigma-Aldrich. Também foram obtidos filmes pelo método químico, que foram caracterizados por MEV e DRX e em seguida foram fabricados capacitores MOS. As medidas elétricas do capacitor MOS com dielétrico de MCM-41 foram comparadas com capacitores com dielétrico de SiO2 térmico. Os resultados mostraram uma clara diferença nas curvas de Corrente-Tensão. Conclui-se que a água confinada dentro do filme dielétrico é associada com os valores elevada de capacitância por unidade de área, estes valores permanecem altos depois do aquecimento, indicando que a resposta dielétrica é devida á água ligada ao material dielétrico, formando camadas paralelas á superfície do substrato. Capacitores de MCM-41 foram expostos a vários solventes polares e apolares, assim como á radiação gama e apresentaram distorção na resposta da capacitância e deslocamento nas curvas de corrente – tensão. Finalmente, capacitores de MCM-41 foram hidrolisados com o objetivo de aumentar a concentração dos grupos silanol na superfície do MCM-41 e como consequência alterar a capacitância do dispositivo.
In this work, we report the synthesis and characterization of MCM-41 mesoporous material for the development of devices types MOS capacitors. The motivation of this work is due to the MCM-41 interesting properties such as: surface area and pore volume large and pore ordered structure. Initially, we present a synthesis of MCM-41 mesoporous material by sol-gel method and their structural characterization (XRD and IR), morphological (SEM and TEM) and texture (Nitrogen Desorption and Adsorption Analysis) and make a comparison with the same material produced by Sigma. Also, films were obtained by chemical method, which were characterized by SEM and XRD, and then MOS capacitors were fabricated. The electrical characteristics MCM-4 MOS capacitors were compared with thermal SiO2, the results showing a clear difference in the voltage-current curves. It concludes that water confined within the dielectric film is associated with high values of capacitance per unit area these values remain high even after heating, indicating a dielectric response due to water strongly bonded to the dielectric material forming layers parallel to the substrate surface. The MCM-41 capacitors were exposed to various polar and nonpolar solvents and gamma radiation and showed good results were due to variations in the response to capacitance and the voltage-current curves showed displacement and distortion. Finally, the MCM-41 capacitors were hydrolyzed in order to be able to increase the concentration of silanol groups on the surface of MCM-41; as a consequence the material is more sensitive to moisture and therefore, the capacitance of the device response.

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9

Guiller, Olivier. "Intégration de capacités verticales débouchantes au sein d'un interposeur silicium." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT021/document.

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La densité des circuits intégrés n’a pas cessé d’augmenter depuis la découverte du transistor en 1947, à travers la réduction de la taille de leurs composants. Cependant, cette miniaturisation se heurte aujourd’hui à certaines barrières et la réduction de la longueur de grille des transistors ne permet plus à elle seule l’augmentation des performances globales des circuits intégrés. L’industrie de la microélectronique s’est donc tournée vers de nouvelles solutions d’intégrations hétérogènes visant à développer la diversification des fonctionnalités proposées par les circuits. Parmi ces solutions, l’intégration 3D consistant à empiler plusieurs puces de silicium les unes sur les autres à l’aide de « Through Silicon Vias » (TSV) apparait très prometteuse. Toutefois, de telles structures mettront du temps à atteindre leur maturité puisqu’elles requièrent l’évolution de tout l’écosystème industriel. Une solution intermédiaire en termes de maturité technologique réside dans l’utilisation de l’interposeur : un substrat aminci placé entre les puces haute densité et le « Ball Grid Array » faisant office de plateforme d’intégration permettant le placement côte à côte de puces hétérogènes ainsi que la réalisation d’une forte densité d’interconnexions. Cependant, l’ajout de l’interposeur dans le système a pour effet l’augmentation de l’impédance du réseau de distribution de puissance. L’intégration d’une capacité de découplage au sein de l’interposeur répond à cette problématique en assurant l’intégrité de l’alimentation dans des structures tridimensionnelles.L’objectif de cette thèse de doctorat consiste en l’étude de l’intégration d’un nouveau type de capacité intégrée au sein de l’interposeur silicium. Cette capacité basée sur un empilement Métal-Isolant-Métal (MIM) tridimensionnelle a pour particularité de traverser l’intégralité de l’épaisseur de l’interposeur et d’être co-intégrée avec les TSV.La première étape de l’étude de ce nouveau composant intégré a été la définition d’une architecture performante, réalisée à travers une étude de modélisation permettant l’évaluation de l’influence des nombreux paramètres géométriques et matériaux entrant en jeu. Cette étude a permis de mettre en avant les faibles valeurs d’ESR et d’ESL atteignable par la structure (de l’ordre du m et fH respectivement). Ensuite, la réalisation de la capacité a nécessité le développement de procédés de fabrication innovants permettant le dépôt d’un empilement MIM dans des matrices de vias profonds ainsi que sa co-intégration avec les TSV. Enfin, les performances du composant ont été évaluées à travers la réalisation et la caractérisation d’un démonstrateur de test ainsi qu’une campagne de simulations électromagnétiques par éléments finis. Une densité de capacité de 20 nF.mm-2 a été atteinte sur ce démonstrateur, offrant un gain d’un facteur supérieur à 6 par rapport à une structure planaire
Integrated circuits density never stopped rising since the discovery of the transistor in 1947, through components size shrinking. However, this miniaturization now encounters barriers and reduction of transistor’s gate size alone no longer allows integrated circuits overall performances increase. Therefore, microelectronic industry turned to new heterogeneous integration solutions aiming to develop the diversification of functionalities offered by the circuits. Among these solutions, 3D integration involving stacking several silicon dies on top of each other with the help of Through Silicon Vias (TSV) appears to be promising. Nevertheless, such structures will take times to reach maturity since they require the evolution of the whole industrial ecosystem. A transitional solution in term of technological maturity lies in the use of the interposer: a thinned substrate placed between the high density silicon dies and the Ball Grid Array acting as an integration platform allowing side by side placement of heterogeneous dies as well as high density interconnections. However, the addition of the interposer in the system leads to the increase of the Power Delivery Network impedance. The integration of a decoupling capacitor on the interposer resolves this issue by ensuring power integrity within 3D structures.The objective of this PhD thesis consists in the study of different aspects of a new kind of integrated capacitor within the silicon interposer. This 3D Metal-Insulator-Metal (MIM) capacitor has the particularity to cross over the whole silicon interposer’s thickness and to be co-integrated with TSV.The first step of this new integrated component study has been the definition of an efficient architecture, achieved through a modeling study allowing the influence evaluation of the numerous geometrical and material parameters coming into play. This modeling study pointed out the low ESR and ESL values achievable by the structure (in the m and fH range respectively). Then, the fabrication of the capacitor required the development of innovative process steps allowing the deposition of a MIM stack in deep vias matrices as well as co-integration with TSV. Finally, component performances have been evaluated through the fabrication of a test demonstrator as well as a finites elements electromagnetic simulation campaign. A capacitance density of 20 nF.mm-2 has been reached on this demonstrator, showing an increase up to a factor 6 compared to a planar structure

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10

Ferrand, Julien. "Stabilisation en phase quadratique de zircone déposée par PEALD : application aux capacités MIM." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAI065/document.

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Depuis plus de dix ans les capacités MIM (Métal Isolant Métal) sont des composants passifs largement intégrés au niveau des interconnections des puces de microélectronique. A cause de la miniaturisation et de la réduction de la surface des puces, la densité de capacité des capacités MIM doit être constamment augmentée. Une solution est l'utilisation d'un isolant avec une constante diélectrique élevée dit « high-k ». Pour les prochaines générations de condensateurs, des densités de capacité supérieur à 30 fF/µm² sont visées. L'oxyde de zirconium (ou zircone) a été sélectionné pour remplacer de l'oxyde de tantale actuellement utilisé. Il possède une constante diélectrique qui dépend de sa structure cristalline. Elle est respectivement de 17, 47 et 37 dans les phases monoclinique, quadratique et cubique. Il est donc nécessaire de déposer la zircone dans la phase quadratique. Cependant, les couches minces de zircone ne sont pas entièrement cristallisées dans la phase quadratique. De plus, elles ne répondent pas aux critères de fiabilité requis par la microélectronique. L'objectif de cette thèse est la stabilisation de la zircone dans la phase quadratique par le dopage. Le tantale et le germanium sont les deux dopants choisis grâce à une étude de sélection de matériaux. Des couches minces d'environ 8 nm de zircone dopée à différentes concentrations ont été réalisées par PEALD (Plasma Enhanced Atomic Layer Deposition). Après les dépôts, des recuits à 400°C pendant 30 min ont été effectués afin de reproduire les traitements thermiques subis par les couches lorsqu'elles sont intégrées dans des puces de microélectronique. Plusieurs types de caractérisations ont été effectuées afin d'étudier l'influence des dopants sur la structure cristalline de la zircone mais aussi sur ses propriétés physico-chimiques. Des tests électriques sur des capacités MIM intégrées ont permis de mesurer les propriétés électriques des couches et la fiabilité de la zircone dopée a été évaluée. Ce travail a pour but la fabrication d'une capacité MIM planaire à base d'oxyde de zirconium dopée dont la densité de capacité sera supérieure à 30 fF/µm² pour des applications de découplage
For more than ten years Metal-Insulator-Metal capacitors (MIM) have been integrated at the level of copper interconnections. All new technology nodes have led to a decrease of the surface of chips; capacitance density must be thus enhanced. The best solution is to use a material with a high dielectric constant commonly named “high-k”. For the next MIM capacitor generation, capacitance density has to be higher than 30 fF/µm². Tantalum oxide, currently used, has reached its limits and it must be replaced. Zirconium dioxide has a high dielectric constant of 47 in the tetragonal phase with a sufficient band gap for MIM applications. When deposited in thin films, zirconia is not fully crystalized in the tetragonal phase. Moreover, this pure zirconium oxide does not fulfill the reliability criteria. The aim of this work is to stabilize zirconia in its tetragonal phase by alloying it with other elements. Tantalum and Germanium are the two dopants selected thanks to a bibliographic study. Thin layers of zirconia of 8 nm alloyed with Tantalum and Germanium have been deposited by Plasma Enhanced Atomic Layer Deposition (PEALD). Samples were annealed at 400°C during 30 minutes after deposition to reproduce the thermal conditions that microelectronic chips are submitted to. Different characterization technics have been used to study the effect of dopants on zirconia's crystalline structure and its physic-chemical properties. Tests have been made on integrated MIM capacitors with Titanium Nitride electrodes to determine the electrical properties of the layers. Reliability of zirconia doped layers was also evaluated. The purpose of this work is the production of zirconia based planar MIM capacitor with a capacitance density of 30 fF/µm²

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11

Madassamy, Sandrine. "Etude et optimisation de capacités MIM 3D à haute densité d'énergie fortement intégrées sur silicium." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT044.

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Le stockage de l’énergie reste une problématique majeure pour le développement d’objets embarqués (Internet of Things) à faible facteur de forme. En effet, pour le stockage et la restitution d’énergie électrique, les dispositifs les plus couramment utilisés sont les batteries, les supercondensateurs et les condensateurs électrochimiques ou céramiques. Toutefois, le contexte de la miniaturisation nécessite de fabriquer des systèmes de stockage à forte densité d’intégration, compatibles avec des techniques d’intégration de type SIP (System in Package) et ultimement SoC (System on Chip). Or, les technologies connues dans l’art antérieur produisent des composants à forte épaisseur, via des filières technologiques exotiques, incompatibles avec une co-intégration directe sur des composants silicium. Pour répondre à ces exigences, nous proposons une nouvelle approche pour l’intégration de condensateurs de très faible épaisseur sur silicium. Ces condensateurs présentent une meilleure fiabilité et de meilleures performances en linéarité que les condensateurs céramiques et peuvent stocker une densité énergétique proche de celle d’un condensateur électrochimique.Cette thèse est axée sur la conception, le développement, la réalisation, la caractérisation électrique et fiabilité de capacités MIM (Métal/Isolant/Métal) à forte densité d’intégration et présentant une forte densité énergétique. Ces condensateurs sont modelés dans une nanostructure poreuse ordonnée et développée par un procédé électrochimique. Cette nanostructure 3D permet de décupler la surface spécifique développée, par rapport à une structure planaire simple ou une microstructure 3D telle qu’actuellement exploitée par la société IPDIA. Ce nanocomposant MIM comportant un isolant à base d’alumine, déposé par ALD (Atomic Layer Deposition) d’une épaisseur variant entre 15nm et 21nm. Pour cette gamme d’épaisseur, une densité de capacité de l’ordre de 200nF/mm² à 300nF/mm² est obtenue sur une simple structure MIM, avec un champ de claquage de l’ordre de 7MV/cm et une densité d’énergie volumique maximale de 1.3mWh/cm3. Cette dernière valeur est supérieure d’une décade aux technologies actuellement exploitées par la société IPDIA. Une attention particulière a été apportée à la réduction des parasites de la structure, et lui permettant ainsi de répondre à des transitions rapide en courant. Pour cela, la résistance série de ces structures a été optimisée par l’amélioration du contact entre les nanostructures MIM et les électrodes externes. La stabilité de la capacité MIM en température et en tension est comparable aux performances des technologies de référence IPDIA (respectivement avec un coefficient thermique de 193ppm/°C et un coefficient de tension de 489 ppm/V2), lesquelles sont basées sur une structure composite de type ONO (multicouche oxyde-nitrure). Elle est par ailleurs meilleure que celle observée pour les condensateurs céramiques multicouches disponibles sur le marché. Notre capacité présente également, une excellente robustesse en température et a été utilisée jusqu’à 375°C. Les performances démontrées sur les prototypes réalisés au cours de ce travail, permettent d’envisager un vaste domaine d’applications, incluant des applications de stockage, de filtrage de rails d’alimentation, de mise en forme de signaux analogiques et de puissance. Le niveau de maturité atteint sur les premiers démonstrateurs permet d’envisager un transfert industriel dans les mois à venir
The energy storage components remain one of the limiting features for scaling of the Internet of Things objects. Indeed, the storage devices nowadays available as batteries, supercapacitors and electrochemical or ceramic capacitors are still quite bulky and remain incompatible with reduced aspect ratio, while roadmap toward miniaturization requires concept with high integration density compatible with integration techniques like SiP ((System in Package) and on longer term SoC (System on Chip). However, technologies known from the prior art, produce components with too large thickness, inflexible shape (mostly circular or rectangular), through exotic technologies that are incompatible with direct co-integration on silicon components. To overcome those limitations, we have proposed a novel approach for the integration of very low thickness capacitors. Those capacitors have better reliability and stability performances than ceramic capacitors and are able to store energy density approaching electrochemical capacitor.This thesis is focused on the development of the capacitive structure, the processing steps, its electrical and reliability characterization and finally the electrical optimization of MIM (Metal/Isolator/Metal) capacitors. Those capacitive structures are based on a porous and self-arranged nano-template obtained by an electrochemical process. Those nanostructures allow to increase the specific surface density with respect to conventional planar or microstructures that are currently exploited by IPDIA. The MIM structure consists of alumina dielectric, deposited by ALD (Atomic Layer Deposition) with a thickness between 15nm and 21nm. For this thickness, capacitance density is obtained in the range of 200nF/mm² and 300nF/mm² for a simple MIM nanostructure, with a breakdown field about 7 MV/cm and a maximum volumetric energy density of about 1.3mWh/cm3. This last value corresponds to a decade higher with respect to current IPDIA technologies. A specific optimization has been conducted to reduce structure parasitic, and thus enable faster current transition on switching events. For that, a technic to reduce the serial resistance between the MIM nanostructure and the external electrodes has been investigated. The temperature and voltage linearity of this MIM capacitor is on par with actual IPDIA reference technologies (respectively thermal coefficient of 193ppm/°C and quadratic voltage coefficient of 489 ppm/V²), which are based on an ONO composite dielectric (multi-layer nitride oxide). This performance is outperforming the Multi-Layer Ceramic Capacitors that are currently used for equivalent application. Furthermore, demonstration of operation up to 375°C has been demonstrated for this structure. With these capacitors it is envisioned to address a large span of applications, ranging from energy storage, to filtering of power rails, or analogic and power signal conditioning. The maturity obtained on demonstrators allows to envisage an industrial transfer in the coming months

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12

Ha, Sang-Woo. "Instrumentation for pressure measurement during thermal decomposition of binders in multilayer ceramic capacitors /." free to MU campus, to others for purchase, 2004. http://wwwlib.umi.com/cr/mo/fullcit?p1426065.

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13

Bajolet, Aurélie. "Intégration de capacités MIM tridimensionnelles de 35nF/mm2 et au-delà dans des technologies CMOS et BiCMOS." Grenoble INPG, 2006. http://www.theses.fr/2006INPG0071.

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Pour répondre à la miniaturisation incessante des dispositifs électroniques, les dimensions des composants sont constamment réduites. Cette réduction de taille atteint aujourd'hui les composant passifs comme les capacités Métal-Isolant-Métal (MIM), dont la densité doit être augmentée. Face à cette problématique, des capacités MIM tridimensionnelles émergent, permettant ainsi d'atteindre 35nF/mm2 avec un empilement de TiN/Al2O3/TiN. Ce travail de thèse porte sur la modélisation, la caractérisation électrique et l'intégration de ces nouvelles capacités. L'utilisation de diverses méthodes de calcul nous a permis de comprendre l'origine physique de la résistance série de ce type de composant. Les interactions entre le TiN et l'Al2O3 ont de plus été caractérisées électriquement et corrélées au procédé de dépôt du TiN. Enfin, une solution de réalisation est proposée pour atteindre une densité de capacité de l'ordre de 100nF/mm2
Ln order to face the continuous shrinking of electronic devices, component sizes are scaled down. This tendency also reaches passive components such as Metal Insulator Metal capacitors, whose density must be increased. To solve this problem, three-dimensional capa ci tors are coming out, allowing reaching 35nF/mm2 with a TiN/Al2O3/TiN stack. This work deals with these new devices modelling, electrical characterization and integration. The use of several calculation methods leads to a better understanding of series resistance origin. Interactions between TiN and AI2O3 are also studied through electrical characterizations and related to TiN deposition method. Finally, a solution is proposed to realize capacitors of about 100nF/mm2

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14

Lemenager, Maxime. "Atomic Layer Deposition of thin dielectric films for high density and high reliability integrated capacitors." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI085.

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Le stockage d’énergie dans les systèmes embarqués fait toujours l’objet d’importants efforts de R&D car il nécessite une constante diminution du volume occupé par les composants électroniques. Il apparaît que la taille des composants discrets que sont les condensateurs est un des freins à la miniaturisation des dispositifs finaux. Bien que des technologies, principalement basées sur la gravure profonde du silicium à l’échelle micrométrique, aient permis des avancées considérables, elles se montrent dorénavant limitées en termes de densité d’intégration. De ce fait, Murata IPS a développé une nouvelle technologie 3D à l’échelle nanométrique permettant une plus forte surface développée. L’utilisation d’une telle matrice requiert une méthode de dépôt de l’empilement MIM telle que l’ALD, adaptée aux structures à fort rapport d’aspect. Le but de cette thèse est ainsi l’intégration de la structure MIM dans la nouvelle matrice 3D dans le respect des contraintes inhérentes à l’industrie de manière à donner lieu à la cinquième génération des technologies PICS™. Le premier challenge résidait dans la conformalité des dépôts que nous nous sommes efforcés d’obtenir avec un équipement de production. Cela a permis de démontrer une densité de capacité supérieure à 1µF/mm² en utilisant un film diélectrique d’alumine de 10nm. Il s’avère également que l’intégration des électrodes TiN joue un rôle important sur la structure 3D. En effet, les contraintes ont dû être réduites pour assurer la tenue mécanique de la structure, notamment en jouant sur le pulse NH3. Les interfaces métal-diélectriques ont également fait l’objet d’une étude approfondie où l’influence de l’oxydation du TiN pendant le dépôt diélectrique a pu être mise en évidence et caractérisée électriquement. Cette étude a amené à l’intégration d’un matériau supplémentaire jouant le rôle de barrière aux interfaces, produisant des condensateurs avec une durée de vie supérieure à 10ans dans les conditions d’utilisation visées
Energy storage in embedded systems is still the subject of major R&D efforts as it requires a constant decrease in the volume of electronic components. It appears that the size of the discrete components, such as capacitors, is one of the brakes to the miniaturization of the final devices. Although technologies mainly based on silicon deep etching at the micrometric scale have made considerable progresses, they are now limited in terms of integration density. As a result, Murata IPS is developing a new 3D technology enabling a higher developed surface area. The use of such a matrix requires a MIM stack deposition technique such as ALD which is adapted to high aspect ratios. The aim of this thesis has been thus to integrate the MIM structure into the new 3D matrix while respecting the constraints inherent to the industry in order to give rise to the fifth generation of PICS™ technologies. The first challenge has been the achievement of sufficient step coverage of the films with an industrial equipment. A capacitance density greater than 1µF/mm² using a 10nm alumina film has been demonstrated. It also turns out that the TiN electrodes integration plays an important role on the 3D structure. Indeed, the mechanical stress had to be reduced to ensure the mechanical robustness of the structure, in particular by playing on the NH3 pulse. The metal-dielectric interfaces have also been the subject of an in-depth study where the influence of TiN oxidation during dielectric deposition has been shown and electrically characterized. This study has then led to the integration of an additional barrier material at the interfaces, producing capacitors with a 10-year lifetime under the intended voltage and temperature conditions

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15

Chaker, Ahmad. "Etude des structures MIM à base de dioxyde de titane pour des applications DRAM." Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAT007/document.

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Le développement des mémoires dynamiques (DRAM) à haute performance basées sur la structure métal-isolateur-métal (MIM) nécessite de remplacer la couche de dioxyde de silicium par des matériaux diélectriques à haute permittivité diélectrique. L'utilisation de ces isolants dits high-k permet de réduire la taille du dispositif DRAM tout en conservant une densité de capacité élevée et un faible courant de fuite pour diminuer la fréquence de rafraichissement. Parmi les nombreux matériaux high k, le dioxyde de titane (TiO2) est l'un des candidats les plus prometteurs en raison de sa constant diélectrique relativement élevée pouvant atteindre 170 dans le TiO2 cristallisé en phase rutile. De plus, il est possible d’obtenir cette phase à basse température par le procédé ALD (< 250 °C) si le dépôt est réalisé sur un substrat RuO2 (phase rutile) grâce à une très faible différence de paramètres de maille entre les deux matériaux. L'objectif principal de cette thèse est d'étudier les mécanismes des réactions chimiques qui se produisant à l'interface RuO2/TiO2 lors du dépôt et leur influence sur les propriétés structurales et diélectriques du film TiO2, en particulier l'influence des espèces oxydantes, le plasma O2 et le H2O. L’influence des électrodes supérieure et inferieures sur les propriétés électriques et structurales de TiO2 a également été étudiée. Ensuite, la constante diélectrique, la conductivité ac et la tangente de perte des structures MIM à base d’oxyde de titane dopé aluminium ont été étudiés dans une gamme de fréquences large bande, de 1 Hz à 2 GHz. Enfin, la réalisation des MIM tridimensionnelles (3D) utilisant un substrat de silicium structuré en réseaux des trous coniques denses a été démontrée. Les structures MIM 3D réalisées ont permis d’augmenter sensiblement la densité de capacité tout en gardant de bonnes performances en termes de courant de fuite
The development of high performance dynamic random access memory (DRAM) based on metal-insulator-metal (MIM) structure made it necessary to replace the conventional silicon dioxide layer by dielectric materials with high dielectric constants. The use of these so-called high-k insulators allows aggressive scaling of DRAM devices while keeping high capacitance density and, more importantly, low leakage current. Among the numerous high k dielectrics, titanium dioxide (TiO2) is one of the most attractive candidate due to its rather high dielectric constant (k). Rutile TiO2 is the interesting phase due to its high dielectric constant and the possibility to deposit this phase at low temperature by ALD (< 250 °C) by using RuO2 substrate thanks to a very small lattice mismatch between the two materials. The main objective of this thesis is to investigate the surface chemical reactions mechanisms at the RuO2/TiO2 interface and their influence on the ALD TiO2 film properties, especially the influence of oxidizing species, namely, H2O or O2 plasma. The influence of bottom and top electrode on electrical and structural proprieties of TiO2 MIM structure was also studied. Then, the dielectric constant, the ac conductivity and the loss tangent of aluminum doped titanium oxide are measured through a wide band frequency range, from 1 Hz to 2 GHz. Finally, the feasibility of three-dimensional (3D) MIM structures was studied by using dense array of truncated conical holes etched in a silicon substrate. The 3D MIM capacitors showed a large increase in the capacitance density while retaining very good electrical properties especially a leakage current comparable to planar MIM devices

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16

Pointet, John. "Elaboration et caractérisation de structures métal-isolant-métal à base de TiO2 déposé par Atomic Layer Deposition." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT089/document.

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Les besoins de la microélectronique pour les condensateurs de type DRAM sont résumés dans la feuille de route ITRS (International Technology Roadmap for Semiconductors). Pour descendre en dessous du noeud technologique 22 nm, des performances électriques telles qu'une épaisseur d'oxyde équivalent (EOT) < 0.5 nm et un niveau de courant de fuite < 1.10-7 A/cm² à 0.8 V sont nécessaires. Ces performances sont difficiles à atteindre si l'on considère des oxydes standards largement utilisés tels que le SiO2, le Si3N4 ou l'Al2O3. Le dioxyde de Titane constitue un matériau diélectrique de choix pour ce type d'application si l'on considère sa forte constante diélectrique, la plus haute des oxydes binaires. Selon les conditions de croissance de la couche de TiO2, celle-ci peut se présenter sous forme amorphe ou posséder une structure cristalline appelé phase anatase ou phase rutile. Cette dernière présente une très forte constante diélectrique (90 à 170 selon l'orientation de la maille cristalline) et en fait un atout indéniable pour le développement de condensateur DRAM. Toutefois, cette phase rutile est aussi à l'origine d'un fort courant de fuite mesuré à partir des structures Métal - Isolant - Métal (MIM) associées. De ce fait, il est primordial de savoir contrôler ces courants de fuite tout en gardant la forte valeur de constante diélectrique de la phase rutile. Dans ce travail, nous proposons de travailler sur la croissance des couches minces de TiO2 intégrées dans des structures MIM et déposées sur des substrats différents tels que des électrodes de RuO2/Ru ou de Pt. La technique de dépôt employée pour les couches minces de TiO2 est la technique ALD pour son contrôle très précis de l'épaisseur déposée et sa souplesse d'utilisation pour ce type d'applications. Les propriétés physico-chimiques des couches de TiO2 et l'influence du substrat sur ces propriétés sont analysées. Des compositions différentes de diélectriques sont élaborées au moyen de la technique de dépôt par ALD et notamment des couches minces de TiO2 dopés à l'aluminium. Les propriétés électriques de ces couches sont étudiées afin de déterminer les performances électriques des structures MIM associées en termes de courant de fuite et de densité capacitive
The requirements for future dynamic random access memory (DRAM) capacitors are summarized in the International Technology Roadmap for Semiconductors. For sub-22 nm node, performances like equivalent oxide thickness (EOT) < 0.5 nm and leakage current density < 1.10-7 A/cm² at 0.8 V are required but are difficult to meet. Titanium dioxide (TiO2) is an attractive dielectric material for such application regarding its high dielectric constant (k). Depending on its growth conditions, TiO2 can be prepared in amorphous, anatase or rutile phase. From the structural point of view, it is generally preferred that TiO2 remains amorphous throughout a complete technological process to minimize leakage transport along grain boundaries. However, the rutile phase exhibits very high dielectric constant ranging from 90 to 170, depending on the lattice orientation. Due to this high dielectric constant, TiO2 rutile phase is considered as a promising material for capacitors in future generations of Dynamic Random Access Memories (DRAMs). A key issue is how to control the high leakage current of rutile phase while keeping the highest dielectric constant in order to get the best electrical performances. In this work, we investigate the growth of high dielectric constant rutile TiO2 films in Metal - Insulator - Metal (MIM) structures deposited on different substrates such as RuO2/Ru or Pt electrodes using ALD (Atomic Layer Deposition). A study of physico-chemical properties of TiO2 layer and influence of bottom electrodes on TiO2's crystalline structure is proposed. Different compositions of dielectrics are processed using flexibility of ALD deposition technique, including Al-doped TiO2 layers and pure TiO2 layers. Electrical properties in terms of leakage current or capacitance density of MIM structures embedding that kind of dielectrics and comparison between these MIM structures in terms of electrical performances is proposed in order to determine the best dielectric film composition to meet the requirements for next generation of DRAM capacitors

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17

Bécu, Stéphane. "Etude des non-linéarités de permittivité de diélectriques utilisés en microélectronique : application aux capacités MIM [Métal-Isolant-Métal]." Phd thesis, Université de Provence - Aix-Marseille I, 2006. http://tel.archives-ouvertes.fr/tel-00131164.

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Анотація:

Le besoin grandissant de fabriquer des circuits aux fonctions de plus en plus nombreuses
nécessite de développer des dispositifs électroniques nouveaux. Les condensateurs
METAL-ISOLANT-METAL (MIM) intégrés dans les interconnexions des circuits font
partie de ces dispositifs. La course à la réduction de surface de substrat occupée impose
de réduire les dimensions de ces condensateurs MIM et d'augmenter leur densité surfacique
de capacité.
Pour atteindre cette performance il est nécessaire d'utiliser des diélectriques à plus forte
permittivité que SiO2. Les oxydes métalliques Al2O3, HfO2 et Ta2O5 font partie des candidats
intéressants pour remplir ce rôle de diélectrique à forte permittivité. Néanmoins
l'utilisation de tels matériaux ne va pas sans poser de problèmes de courants de fuite, de
relaxation diélectrique et de non-linéarités en tension. Du fait de leurs faibles amplitudes,
les non-linéarités de capacité en fonction de la tension sont des phénomènes peu étudiés
et donc mal compris. Pour certaines applications spécifiques il est nécessaire de contrôler
et de limiter ces non-linéarités. Cela nécessite d'abord d'étudier en profondeur leurs caractéristiques et notamment leurs origines physiques.
Après des rappels généraux sur la physique des diélectriques, ce manuscrit de thèse
présente une étude ab initio des propriétés diélectriques du cristal alpha-Al2O3 qui permet
d'extraire le tenseur diélectrique entre 0 et 1E16 Hz et qui montre que la contribution
électronique à la permittivité ne dépend pas du champ électrique. Cette première partie,
théorique, est suivie d'une étude exhaustive de capacités MIM à base d'alumine amorphe
dont on tire les principales caractéristiques des non-linéarités de capacitéen fonction du
champ électrique appliqué. Nous proposons ensuite deux modèles physiques (un qui repose
sur la polarisation dipolaire et un qui repose sur la polarisation ionique) afin d'interpréter
les caractéristiques C(V,T). La dernière partie de ce manuscrit de thèse propose de comparer
les caractéristiques électriques des capacités à base d'alumine à celles de capacités
utilisant d'autres diélectriques, en particulier le Ta2O5, le Si3N4 et le SiO2. La fin de cette
partie est consacrée à l'étude de capacités « multicouches » pour lesquelles on propose
un modèle simple pour prévoir les non-linéarités de capacité en fonction de la tension
appliquée.
Ainsi ce travail de recherche fournit une vue générale des propriétés diélectriques de
matériaux diélectriques utilisés en microélectronique tant d'un point de vue théorique
que d'un point de vue expérimental.

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Monnier, Denis. "Étude des dépôts par plasma ALD de diélectriques à forte permittivité diélectrique (dits "High-k") pour les applications capacités MIM." Grenoble INPG, 2010. http://www.theses.fr/2010INPG0036.

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Анотація:

La miniaturisation des composants dans la micorélectronique touche maintenant les composants passifs comme les capacités MIM (Métal/Isolant/Métal). Pour augmenter la densité de capacité des capacités MIM, les diélectriques conventionnels (Si02, E = 3. 9) sont remplacés par des diélectriques à haute permittivité diélectrique dits « high-k » comme Zr02. Sa permittivité E est égale à 47 lorsqu'il se trouve sous la phase tétragonale. Le procédé de dépôt de Zr02 est la méthode PEALD. Nous avons étudié le procédé de dépôt de Zr02 avec les précurseurs TEMAZ et ZyALD. Les propriétés thermodynamiques du TEMAZ ont été analysées par spectrométrie de masse. L'influence des paramètres du procédé PEALD et de post-traitements sur les mécanismes de formation de la zircone tétragonale a été étudiée. De nombreuses méthodes de caractérisation (XRD, Raman, TEM, SIMS, XPS, caractérisations électriques. . . ) ont été employées afin d'établir un optimum propriétés des films de Zr02 / performance du procédé de dépôt
The continuous decreasing size of integrated circuits in the field of microelectronics is now applied to passive components such as MIM (Metal/Insulator/Metal) capacitors. To increase the capacitance density of MIM capacitors, new materials with high permittivity are required to replace silica (Si02, E = 3. 9). Zr02 permittivity is around 47 for the tetragonal phase. Zr02 is deposited by PEALD. We studied the Zr02 deposition method with TEMAZ and ZyALD precursors. Thermodynamic properties of TEMAZ have been analyzed by Knudsen cell mass spectrometry. PEALD process parameters and post-treatments influence on the tetragonal zirconia synthesis have been investigated. Various characterisation methods (XRD, Raman spectroscopy, TEM, SIMS, XPS, electrical characterisation) were employed to establish an optimum between Zr02 films properties and deposition process performance

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19

Tetsi, Emmanuel. "Développement de films minces à base de nanoparticules diélectriques et optimisatisation des conditions de dépôt pour fabriquer des condensateurs de découplage utilisés dans des assemblages à haute densité de modules électroniques." Thesis, Bordeaux, 2019. http://www.theses.fr/2019BORD0113/document.

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Анотація:

Dans le cadre de l’intégration tridimensionnelle (3D) associée à l’utilisation d’un nombre croissant de circuits intégrés (CIs), le besoin en condensateurs de découplage à forte densité de capacité (≥ 1 μF.cm-2), capables d’opérer sur une gamme de fréquences de plus en plus étendue, est crucial afin de limiter les fluctuations de tension d’alimentation au niveau des CIs. Le principal frein au développement de ces condensateurs réside dans l’obtention de couches minces (≤ 100 nm) à partir de matériaux ayant une forte permittivité relative (ε_r > 200 à 1 GHz), des technologies compatibles avec une intégration à grande échelle, et peu coûteux.L’approche proposée dans cette thèse s’appuie d’une part, sur la possibilité de synthétiser des nanoparticules diélectriques à base de Ba0.6Sr0.4TiO3 [BST] (Ø = 16 ± 2 nm, ε_r = 260 à 1 kHz) - obtenues en milieux fluides supercritiques - comme matériau diélectrique et d’autre part, sur la pulvérisation de jets ou spray coating comme technologie de dépôt en couches minces. Dans un premier temps, les nanoparticules de BST ont été synthétisées et fonctionnalisées par l’acide 3-aminopropylphosphonique (APA), dans le but de les disperser dans un solvant et d’obtenir des suspensions colloïdales stables. Les ligands ont aussi pour fonction d’améliorer la tenue mécanique des films (auto-assemblage) sur le substrat de cuivre (Cu). La variation de paramètres liés à la solution à base des nanoparticules (concentration, durée de dispersion mécanique) et à la technique de dépôt (température du substrat, débit), ont permis d’optimiser les conditions pour obtenir des films uniformes à base de nanoparticules fonctionnalisées (BST-APA). Des films de 200 ± 50 nm d’épaisseur ont ainsi pu être obtenus. Après dépôt de plots d’aluminium (Al) sur les films à base de BST-APA et utilisés comme électrode supérieure, les caractéristiques capacité-tension (C-V) et courant-tension (I-V) des condensateurs de structure Al/BST-APA/Cu ont permis d’extraire une densité de capacité élevée (0.71 μF.cm-2) et une densité de courant de fuite (25 μA.cm-2) mesurées à 1 V. Les résultats obtenus au cours de cette thèse montent que la pulvérisation de jets est une alternative aux procédés coûteux reportés (ablation laser, pulvérisation) dans l’état de l’art, pour la fabrication de condensateurs de hautes performances.Mots clés : Condensateurs MIM, couches minces, fluides supercritiques, diélectriques, Ba0.6Sr0.4TiO3, pulvérisation de jets, nanofabrication
Within the three-dimensional (3D) integration associated with the use of an increasing amount of integrated circuits (ICs), there is strong need of high capacitance density (≥ 1 μF.cm-2) decoupling capacitors, able to operate on large frequency bandwidth, in order to reduce the noise that can compromise the signal integrity in ICs. The main challenge of these capacitors relies on the deposition of thin films (≤ 100 nm) using innovative materials with high relative permittivity (ε_r > 200 à 1 GHz) and «low cost» technologies compatible with large scale integration.On one hand, the proposed approach in this thesis benefits from the possibility of synthetizing – by the supercritical fluid technology – and using Ba0.6Sr0.4TiO3 (BST) nanoparticles (Ø = 16 ± 2 nm, ε_r = 260 at1 kHz) as dielectric material and on the other hand, from the use of spray coating as technique for the deposition of these materials as thin films. First of all, the BST nanoparticles synthesized are functionalized with specific ligands (3-aminopropylphosphonic acid, APA), in order to obtain colloidal suspensions composed by aggregates with size (Ø < 100 nm) showing few fluctuations during two months. The other function of ligands is to improve the adhesion of the deposited films (self-assembling) on the copper (Cu) substrate. Different solvent are studied for the preparation of the solutions : N-méthyl-2-pyrrolidone (NMP), water, methanol and ethanol. The variation of different parameters related to the solution and the deposition technique helped us to define the optimal conditions leading to different thickness of film (200 – 1000 nm) based on pristine (BST) and functionalized nanoparticles (BST-APA). Using ethanol instead of NMP as solvent, enabled us to prevent de formation of a copper oxide layer and organic residues. After deposition of aluminum pads (Al) on BST or BST-APA films and used as top electrode, the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of capacitors with metal-insulator-metal (MIM) structure enabled us to achieve high capacitance density (~ 0.7 μF.cm-2) and low leakage current (~ 25 μA.cm-2) at 1 V.Keywords: MIM capacitors, thin films, supercritical fluids, Ba0.6Sr0.4TiO3, spray coating, nanofabrication in cleanroom

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20

Deloffre, Emilie. "Fabrication et caractérisation physico-chimique et électrique d'empilements TiN/Ta2O5/Tin : application aux capacités MIM pour les circuits intégrés analogiques et radiofréquence." Grenoble INPG, 2005. http://www.theses.fr/2005INPG0160.

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Анотація:

Depuis 40 ans, les progrès de l'industrie microélectronique visent une réduction drastique et continue des dimensions des composants qui concerne également les composants passifs tels que les capacités Métal-Isolant-Métal (MIM). Cela se traduit par une augmentation de la densité de capacité impliquant que l'épaisseur du diélectrique soit réduite. Cependant une diminution de l'épaisseur des films isolants " conventionnels" conduit à une détérioration des performances électriques de la capacité MIM. Face à cette problématique, notre étude s'est tournée vers des matériaux de permittivité diélectrique plus élevée. Le diélectrique Ta2O5 a été choisi car il présente une constante diélectrique élevée (є= 25) et permet d'obtenir une bonne linéarité en tension de la capacité tout en conservant des courants de fuite relativement faibles. Ce travail porte sur l'étude des empilements TiNfTa2O5/TiN et des caractéristiques électriques de la capacité MIM associée. Nous avons étudié et comparé différentes méthodes de dépôt (MOCVD, ALD et PEALD) pour la réalisation des structures TiNfTa2O5/TiN. L'utilisation d'un large éventail de techniques de caractérisation nous a conduit à une meilleure compréhension de la composition chimique et de la densité des films de Ta2O5, des propriétés de l'interface TiNfTa2O5 ainsi que des contaminants présents dans l'empilement MIM. Pour ces différents points, nous avons analysé l'impact de différents post-traitements ainsi que celui de la technique de dépôt utilisée. Ces études nous ainsi permis de corréler les propriétés des matériaux de l'empilement TiNfTa2O5/TiN aux caractéristiques électriques de la capacité MIM
As device dimensions of ultra large scale integration (ULSI) integrated circuits continues to scale down, the surface area of MIM (Metal-Insulator-Metal) capacitor has to decrease, thus requiring an increase of capacitance density. However, decreasing the dielectric thickness of conventional insulators such as Si02 (є = 3. 9) and Si3N4 (є = 7) leads to unacceptable electrical performances of the capacitor. Higher dielectric constant materials are developed to cope with continuous performance improvements in advanced capacitors structures. Tantalum oxide has been regarded as one of the most promising dielectric materials due to its high dielectric constant (є = 25) low linearity coefficients and leakage current obtained when it is integrated in MIM capacitors. Physico-chemical properties of TiNfTa2O5/TiN stacks were studied as weil as the electrical performances of the capacitor (conduction mechanisms, model of C(V) curves). , MOCVD, PEALD and ALD deposition methods have been investigated for processing Ta2O5 films. Thanks to various and welladapted characterisation methods (XRR, FTIR-ATR, ERDA, AR-XPS. . . ), we obtain a better understanding of the chemical composition and density of Ta2O5 films, of the interface TiNfTa2O5 properties and of the contamination of MIM structures. We analyzed impact of the deposition method and the influence of various post-treatrnents in order to correlate material properties of TiNfTa2O5fTiN stacks to electrical performances of MIM capacitor

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21

Kahn, Maurice. "Elaboration par PE-MOCVD à injection pulsée et caractérisation de matériaux à forte permittivité de type multicouches ou alliées pour des appliations capacités MIM." Grenoble 1, 2008. http://www.theses.fr/2008GRE10091.

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Анотація:

Avec l'augmentation accrue du nombre de fonctions embarquées directement au dessus du circuit intégrés, les capacités Métal Isolant Métal (MIM) sont devenues des composants essentiels en microélectronique. Pour permettre une augmentation de la densité d'intégration des composants, des matériaux à forte permittivité ou high κ sont utilisés comme diélectriques. Cet isolant doit satisfaire plusieurs critères: une forte valeur de capacité surfacique, de faibles courants de fuite ainsi qu'une très bonne stabilité de la capacité surfacique avec la tension appliquée (linéarité en tension). Cependant, aucun n'est parvenu à satisfaire tous les critères, ce qui nécessite d'autres approches comme l'utilisation d'oxyde en structures multicouches ou alliées. De plus, la linéarité en tension des capacités est mal maîtrisée et son origine mal comprise. Ainsi, nous avons tout d'abord étudié le rôle du matériau d'électrode (TiN, Pt, WSi2,3 et WSi2,7) et de son interface avec l'oxyde d'yttrium déposé par MOCVD avec ou sans assistance plasma sur les performances électriques. On observe une dépendance de la linéarité en tension selon le matériau d'électrode utilisée. Un modèle double couche a été proposé pour décrire la non linéarité des capacités MIM en tension. Puis, différentes structures bicouches, multicouches ou alliées ont été étudiées (LaAlO3/Y2O3, structures à base de HfO2 et Al2O3, SrTiO3/Y2O3). Les bicouches SrTiO3/Y2O3 ont permis l'obtention d'une valeur de capacité surfacique de 10 fF/µm² et de minimiser la non-linéarité (paramètre α de -750 ppm/V²)
Because of increasing number of embedded functions in silicon integrated circuits (ICs), Metal-Insulator-Metal (MIM) capacitors become more and more essential devices in microelectronics. To increasing the integration density of devices, high κ material must be used as dielectric. This insulator has to fulfill several requirements such as a high capacitance density, low leakage currents and minimum variation of capacitance values with the voltage bias (so-call the capacitance linearity). However, none can fulfill all the requirements. Therefore, others way shall be study such as oxides in nanolaminates or mixed structures. Moreover, the voltage linearity is badly controlled and its origin misunderstood. Thus, we studied the role of the electrode material (TiN, Pt, WSi2,3 et WSi2,7) and its interface with the yttrium oxide deposited by MOCVD with or without plasma enhanced on electric properties. We notice that the voltage linearity depends on the electrode material used. A double layer model was suggested to describe the MIM capacitance voltage linearity. Then, different bilayers, multilayers and mixed structures was studied (LaAlO3/Y2O3, structures base on HfO2 and Al2O3, SrTiO3/Y2O3). SrTiO3/Y2O3 bilayer structures allowed to obtain a capacitance density of 10 fF/µm² and to minimize the voltage linearity (a quadratic parameter α of -750 ppm/V²)

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22

Wilt, Heather Dawn. "Supplementation of zinc and biotin : effect on growth performance, plasma and fecal zinc concentrations, and metabolic capacities and biochemcal phenotypes of fecal flora in nursery pigs /." free to MU campus, to others for purchase, 2004. http://wwwlib.umi.com/cr/mo/fullcit?p1426115.

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23

Senkovska, Irena, and Stefan Kaskel. "Ultrahigh porosity in mesoporous MOFs: promises and limitations." Royal Society of Chemistry, 2014. https://tud.qucosa.de/id/qucosa%3A35957.

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Анотація:

Mesoporous MOFs are currently record holders in terms of the specific surface area with values exceeding 7000 m2 gˉ¹, a textural feature unattained by traditional porous solids such as zeolites, carbons and even by graphene. They are promising candidates for high pressure gas storage and also for conversion or separation of larger molecules, whose size exceeds the pore size of zeolites. The rational strategies for synthesis of mesoporous MOF are outlined and the unambiguous consistent assessment of the surface area of such ultrahighly porous materials, as well as present challenges in the exciting research field, of mesoporous MOFs are discussed. The crystallinity, dynamic properties, functional groups, and wide range tunability render these materials as exceptional solids, but for the implementation in functional devices and even in industrial processes several aspects and effective characteristics (such as volumetric storage capacities, recyclability, mechanical and chemical stability, activation) should be addressed.

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24

Stoeck, Ulrich, Simon Krause, Volodymyr Bon, Irena Senkovska, and Stefan Kaskel. "A highly porous metal–organic framework, constructed from a cuboctahedral super-molecular building block, with exceptionally high methane uptake." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2014. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-138864.

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Анотація:

A highly porous metal–organic framework Cu2(BBCDC) (BBCDC = 9,9′-([1,1′-[b with combining low line]iphenyl]-4,4′-diyl)[b with combining low line]is(9H-[c with combining low line]arbazole-3,6-[d with combining low line]i[c with combining low line]arboxylate) (DUT-49) with a specific surface area of 5476 m2 g−1, a pore volume of 2.91 cm3 g−1, a H2 excess uptake of 80 mg g−1 (77 K, 50 bar), a CO2 excess uptake of 2.01 g g−1 (298 K, 50 bar) and an exceptionally high excess methane storage capacity of 308 mg g−1 (298 K, 110 bar) was obtained using an extended tetratopic linker
Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG-geförderten) Allianz- bzw. Nationallizenz frei zugänglich

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25

Stoeck, Ulrich, Simon Krause, Volodymyr Bon, Irena Senkovska, and Stefan Kaskel. "A highly porous metal–organic framework, constructed from a cuboctahedral super-molecular building block, with exceptionally high methane uptake." Royal Society of Chemistry, 2012. https://tud.qucosa.de/id/qucosa%3A27787.

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Анотація:

A highly porous metal–organic framework Cu2(BBCDC) (BBCDC = 9,9′-([1,1′-[b with combining low line]iphenyl]-4,4′-diyl)[b with combining low line]is(9H-[c with combining low line]arbazole-3,6-[d with combining low line]i[c with combining low line]arboxylate) (DUT-49) with a specific surface area of 5476 m2 g−1, a pore volume of 2.91 cm3 g−1, a H2 excess uptake of 80 mg g−1 (77 K, 50 bar), a CO2 excess uptake of 2.01 g g−1 (298 K, 50 bar) and an exceptionally high excess methane storage capacity of 308 mg g−1 (298 K, 110 bar) was obtained using an extended tetratopic linker.
Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG-geförderten) Allianz- bzw. Nationallizenz frei zugänglich.

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26

CHEN, NAI-CHEN, and 陳迺媜. "Design and Synthesis of High-Density Common-Centroid MOM Capacitors for Low-Power Data Converters." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/85350948258790013524.

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Анотація:

碩士
國立中正大學
電機工程研究所
104
Compared with different types of capacitors, including MOS capacitors and metal-insulator-metal (MIM) capacitors, the metal-oxide-metal (MOM) capacitors, which are realized through metal interconnections, have the advantages of less leakage current, lower fabrication cost, and higher capacitance density. However, most of the previous work on common-centroid capacitor placement and routing did not apply MOM capacitors resulting in sub-optimal solutions in terms of capacitance density, layout area, and power consumption of the data converters. In this thesis, we ﬁrst analyze and compare most of the commonly applied MOM capacitor structures for data converters. Based on the analysis and comparisons, we further propose the mortise-and-tenon structure not only to achieve even smaller parasitic and higher capacitance density but also to enable automatic layout synthesis and optimization of high-density common-centroid MOM capacitor arrays for low-power data converters. Experimental results show that the proposed MOM structure and layout synthesis approach can produce highly matched ratioed capacitors for data converters with much smaller layout area and lower power consumption.

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27

Yeh, Chun-Hsiang, and 葉竣翔. "Automatic Layout Synthesis of Array-type MiM Capacitors." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/81445653402495140014.

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Анотація:

碩士
國立中央大學
電機工程研究所
96
As semiconductor technology continues to shrink, the problem of process variation is inevitable. The parameter variations should have certain spatial correlations during IC manufacturing process because all of devices are made from the common physical process. It is the closer the less for the spatial correlation of two devices. In analog-circuit layout automation, it is to determine the best layout placement of devices by considering spatial correlation and decide, in turn, the routing styles for improving the matching of desired parameters. In this thesis, two routing styles, via-less channel routing (VLCR) and balanced-via channel routing (BVCR), are proposed for completing the layout design. An example of array-type MiM capacitors is used to demonstrate the performance of the proposed channel router. In the experiment, the cases of different capacitance ratios in different segment units are considered and the evaluation of post-simulation is performed by SPICE conjunction with the parasitic parameter extractor Calibre. From the result, it is observed that routing might contribute extra up to 5 percent of mismatch after the placement determined. Routing results in the great effect on the desired performance.

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28

Huang, Meng-yuan, and 黃盟元. "Balanced-Via Channel Routing for Array-type MiM Capacitors." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/60144060730254321416.

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Анотація:

碩士
國立中央大學
電機工程研究所
97
Devices mismatch is usually caused by the process variation. The uncontrollable process variation has become a severe problem as the semiconductor technology continues to shrink. We proposed the Balanced-Via Channel Routing (BVCR) to implement the optimum placement which generated by yield evaluator. Based on routing style of BVCR and design rules, the routing wires between devices can be balanced. Furthermore, the automatic system of BVCR can reduce the design costs and speed-up the time to market.

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29

Hung, Lai Chun, and 賴軍宏. "The Application of High-k Dielectrics in MIM Capacitors." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/17757012882312535917.

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Анотація:

碩士
國立交通大學
電子工程系
91
Process technology improving rapidly and the devices are continuous scaling down. The application of high-k dielectric materials has attracted a great attention. At present, there are large amounts of researches and developments for high-k dielectric materials and the high-k technology has reached a colossal success. In integrated circuits, the total capacitor area usually consumes a large portion of the whole chip size and the capacitance will change as different operating frequency. For this reason, there will be a required challenge in the application of radio frequency (RF) ICs for using high-k dielectric materials to make capacitor area small, further increase the circuit density in chip and maintain the capacitance characteristics at high frequency (or RF). The capacitor using MIM structure and high-k dielectric will play a very important and critical role in order to improve the property of RF silicon integrated circuits or wireless communication RF integrated circuits, which is due to the high conductive electrode and the low parasitic capacitance. In this study, we have developed the approach to deposit high-k dielectric films. We deposited the thin metal film using PVD followed by subsequent oxidation and annealing at 400 oC. Applying this method, we have fabricated higher density MIM capacitors using high-k AlTaOx dielectrics and suitable for RF measurement. In order to investigate the characteristics of capacitors at RF region, the S-parameters is measured. The capacitance of the device at different frequencies was extracted from equivalent circuit model by simulation software. From the measurement of devices, a very high capacitance density of 10 fF/m2 is obtained, with small capacitance reduction of 5 % from 10KHz to 30GHz, low loss tangent < 0.03. Small voltage dependence of capacitance < 600 ppm, mathematical derived from S-parameters, is obtained at 1 GHz, which ensures this MIM capacitor useful for high precision circuits operated at RF regime and process compatible with existing VLSI back-end integration.

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30

Tsai, Yu-Chen, та 蔡雨蓁. "Application of SrTiO3 high-κdielectric for MIM capacitor". Thesis, 2008. http://ndltd.ncl.edu.tw/handle/21787864785769462310.

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Анотація:

碩士
國立交通大學
電機學院微電子奈米科技產業專班
96
With the device down-scaling, the dynamic random access memory (DRAM) requires higher and higher capacitance density. Those high-dielectric constant (high-κ) materials with middleκvalue cannot meet the requirement for the future DRAM application. In this thesis, metal-insulator-metal (MIM) capacitors with high-κdielectric SrTiO3 which has dielectric constant higher than 100 are investigated. Characteristics of STO films deposited at 350�aC/80W and 400�aC/150W are compared. The STO film deposited at substrate temperature of 400oC, Ar/O2 ratio of 18:12, and RF power of 150W showsκvalue higher than 240. After post-deposition annealing at 500�aC for 30 min in O2 ambient, theκvalue as high as 360 is demonstrated. With the help of various material analysis, the reason for such a high κ value is not clear. Post-deposition annealing (PDA) will change the properties of the STO films. The highest capacitance could be obtained after PDA at 500oC due to crystallization of the STO film. Above 600oC, grain size becomes small because of the super saturation of grain growth. The STO film is re-crystallized at 800�aC, however, it will produce high density of defects at grain boundaries when the grain grows up. The leakage current will increase with the grain re-growth. Annealing in O2 ambient for sufficient thermal budget can reduce leakage current. The films annealed in atmosphere nitrogen have lower barrier height between STO and Pt electrode, which results in strong Shcottky emission current at low electric field. The Ar/O2 gas flow ratio also affects the STO properties. The leakage current of STO will be reduced with the increase of oxygen flow rate. But the excess oxygen will reduce the dielectric constant. We find a balance between leakage current and dielectric constant that the Ar/O2 =18:12 is the proper deposition condition for STO. The dielectric constant, leakage current, capacitance-voltage coefficient, and dielectric loss are correlated. Especially, as the capacitance-voltage coefficient increases, the dielectric loss decreases. The mechanism is not clear and is worthy to investigate.

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31

Chang, Chia-Tung, and 張家棟. "Properties of HfO2 MIM Capacitors with TaSiN and TaN Electrodes." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/13771748662833205764.

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Анотація:

碩士
逢甲大學
電子工程所
95
With the RTA process, the leakage current can be decreased effectively and no degradation of VCC characteristics. For the use of bottom electrode TaN, we found that VCC characteristics are different clearly with various nitrogen concentrations. Because of dielectric thickness are the same, the capacitance density is higher due to higher dielectric k value. We can know the difference of interface traps from the VCC characteristic curves. It is believed that the decrease of interface traps if the oxygen signals are decreased and leading to a better characteristic. For the 30% and 40% condition, the leakage and VCC characteristic degradation can be found, which are related to microstructure of dielectric. The result of VCC characteristic is bad with TaSiN bottom electrodes, and VCC characteristic is worse with the plasma treatment. Furthermore study is needed using TaSiN bottom electrode.

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32

Chen, Yi Jung, and 陳怡蓉. "TDDB Evaluation of Silicon Nitride MIM Capacitors in GaAs MMIC." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/53263933896654183862.

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Анотація:

碩士
長庚大學
電子工程學研究所
97
Metal-Insulator-Metal capacitor (MIMCAP) is a key passive component utilized in GaAs based MMIC technologies. And the dielectric used in MIMCAP is silicon nitride (Si3N4) because of its compatibility with the GaAs processing. Understanding Si3N4 capacitor dielectric integrity and reliability becomes increasingly more important. Many literature reports show two test methods of ramp voltage and constant voltage stress testing for capacitor failure acceleration on TDDB (time-dependent dielectric breakdown) lifetime estimated. TDDB theory has been successful in predicting the reliability of products and has been used effectively as an in-process monitor tool. In this study, we have compared the effect of the ramped voltage and constant voltage testing on TDDB lifetime estimated of 100nm silicon nitride dielectric. By the breakdown measurements on the TDDB lifetime as estimated can quantify the breakdown characteristics and uniformity of the Si3N4 films. In addition to that breakdown voltage and lifetime predictions by Weibull Distribution, it is possible to track the defects per area of capacitors. All of the MIM capacitors used in this study are manufactured using a special reliability mask, and the test structures include various sizes of capacitors ranging from 10Kμm2 to 250Kμm2 and capacitor corner check. The ramp voltage and constant voltage testing are destructive and oftentimes to identify the cause of the dielectrics failure. Combining these breakdown marks with an optical microscope inspection and cross section check of the 10Kμm2 capacitors and corner check structures are reported in this paper. That can make the identification and classification of the dielectric breakdown mechanisms for our conclusions.

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33

Chen, Guan Lin, and 陳冠麟. "The Research of Electric Characteristics and Reliability of High-k MIM Capacitors." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/63208791067889313113.

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Анотація:

碩士
國立交通大學
電子工程系所
95
In RF integrated circuits, MIM capacitors are used for impedance matching, filter and analog frequency tuning circuits. For DRAM, MIM capacitors are used to storage charges; they will influence some parameters of the memory, such as work voltage, device speed, and the data retention time. However, the capacitor area of above all usually consumes a large portion of the whole chip size. In order to reduce chip size and cost, we must continue scaling down the size of MIM capacitors. In this study, we have fabricated MIM capacitors using high-�� TiTaO dielectrics. From the measurement of devices, a very high capacitance density of 23 fF/um2 is obtained, with small capacitance reduction of 1.8 % from 100 KHz to 10GHz. And Small voltage dependence of capacitance < 550 ppm, mathematical derived from S-parameters, is obtained at 1 GHz, which ensures this MIM capacitor useful for high precision circuits operated at RF regime. We also have investigated the characteristic of capacitance, leakage, and VCC before and after constant-voltage stress.

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34

俞孟廷. "Improved Leakage Current for TiO2-Based MIM Capacitors by Embedding Ge Nanocrystals." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/18830865448216666488.

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Анотація:

碩士
國立清華大學
工程與系統科學系
102
With Pd as electrode, crystalline TiO2-based MIM capacitors were found to demonstrate improved leakage current by adopting nitrogen plasma treatment due to the passivation of grain boundary related defects. Through the introduction of Ge nanocrystals into crystalline TiO2, the leakage current can be further suppressed by near 3 orders to be 4.610-7 A/cm2 at -1 V while maintaining high capacitance density of 25.2 fF/μm2. The major role of nanocrystals is to trap electrons and then suppress leakage current by inducing Coulomb blockade effect or building an internal field to compensate the applied external field. The MIM capacitors developed in this work also display other intriguing features in terms of small TCC of 88 ppm/℃, low loss tangent of 0.020 and satisfactory capacitance change of 1.74 % after 10-year operation under 2.5 V stress. The MIM capacitor technology not only exhibits the prominent performance which is advantageous over other TiO2-based capacitors, it also possesses the capability to implement low-leakage/high-reliability MIM capacitors for next generation circuits.

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35

Lin, Yi-Tsung, and 林益宗. "Study on ZrO2 films by using RF reactive magnetron sputtering for MIM capacitors." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/77936559136903668053.

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Анотація:

碩士
國立高雄應用科技大學
機械與精密工程研究所
96
In this study, ZrO2 thin films were grown on a SiO2/Si and Cu/SiO2/Si substrate using RF magnetron sputtering., and the ZrO2 films were analyzed using XRD, ESCA, AFM, SEM and TEM. The capacitor devices were synthesized by lithography process, which was used in semiconductor industry and PCB industry. For electrical properties, Keithley 236 Source-Measure Unit is used to measure the I-V curves, and the C-V curves are obtained by E4284A precision LCR meter. Capacitor performance of ZrO2 dielectric films deposited on Cu metal electrodes to form MIM structures with Cu top electrodes is demonstrated. Both ZrO2 and Cu metal were synthesized by RF reactive magnetron sputtering. When the thickness of the film was reduced, the capacitance density and leakage current density increased. Furthermore, the dielectric constant was observed to decrease with decreasing film thickness. The dielectric and electrical properties of the 67 nm thickness ZrO2 films have the capacitance density of 2.547 fF/μm2 at 100 kHz and the leakage current density of 5.3110-5A/cm2 was achieved at 1V.

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36

Lin, Shan-Kai, and 林山凱. "The Study on the Device Properties of Thin-Film Resistors and MIM Capacitors." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/57373825366159335306.

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碩士
國立雲林科技大學
電子與資訊工程研究所
93
Until recently, the metal-insulator-metal ( MIM ) capacitors and thin-film resistors have attracted great attention in integrated circuit and communication chip application. So, the inclusion of precision on-chip passive devices is a new challenge for current and future interconnect architectures. Precision metal-insulator-metal capacitors and thin film resistors are widely used in analog and mixed signal circuits and specific SoC applications. However, the area of capacitors usually occupies a large portion of the whole ICs, because must be reduced capacitors area. But, we need to obtain highly desirable to increase the capacitance per unit area. In order to achieve this goal, it is necessary to apply high dielectric-constant (k) dielectrics for high frequency MIM capacitors because the capacitance density is ε0k/td and reducing dielectric thickness td usually generates undesired high leakage current. MIM Capacitors and thin film resistors of passive devices were investigted in this thesis. Metal-insulator-metal (MIM) capacitors with high-k Ta2O5 material and tantalum nitride ( TaNx ) as thin film resistors were investigated. The high-k Ta2O5 material has serials conditions were investigated. In this experimentation found higher power deposition will to obtain smaller leakage current density than lower power deposition. Another, leakage current density will increase as the annealing temperature. The RMS (Rq) value of the surface roughness increases as the temperature rises by atomic electron microscope measuremented. Higher binding energy will to acquire with higher power bombardment by Auger electron spectrometer (AES) measuremented. The capacitance will be subjected to inner inductance affect in high frequency. The inductance will calculate at resonance frequency. The parasitical capacitors and resistors will calculate by measurement and simulation s parameter. In thin film resistors experimentation were investigated by using sputtering method bombardment tantalum with difference nitrogen flow. When increasing nitrogen flow ratio, the current noise of TaNx TFR increased. With increasing nitrogen flow ratio, the current noise of TaNx TFR increased. N2 plasma treatment exhibited a more stable TCR than those with NH3 plasma treatment. The resistance of TaNx(5%) TFR is stable as increasing frequency.

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37

Chen, Chao-Wen, and 陳昭文. "Study of Plasma and Annealing Process on High-K MIM Capacitor." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/80853022838623405934.

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Анотація:

碩士
逢甲大學
電子工程所
93
The MIM structure is TaN/HfO2/Ta2O5/TaN in this work, all thin films are deposited using sputter system, and some samples with different treatment are split after dielectrics deposition. It includes RTA, furnace annealing and NH3 plasma treatments. Process temperature is limited at 500 °C to conform to the back-end process of integrated circuit. According to ITRS Roadmap 2004, the requirements of RF IC bypass capacitor are capacitance density of 12fF/μm2 and leakage current of 10-8 A/cm2 at 1 V. As expected, high capacitance density 12.6fF/μm2 and low leakage current 10-8 A/cm2 can be achieved. In this work, capacitor linearity VCC also shows an improvement trend. The results mentioned above, it will be investigated to understand electrical mechanisms of leakage, breakdown electric field, and capacitor linearity VCC using some material analysis techniques.

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38

Tsao, Kuo-tung, and 曹國棟. "Study of MIM capacitor with different bottom electrodes on electrical characteristics." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/12786862128123110304.

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Анотація:

碩士
逢甲大學
電子工程所
95
The MIM structure is TaN/HfO2/bottom electrode in this work. Different metals are used as bottom electrode and different plasma treatments after dielectrics deposition are investigated; which include N2, NH3, and H2 plasma treatments. Process temperature is limited at 300 °C due to the requirement of back-end process. Different bottom electrodes of Al, Ni, Ti and TiN are tested; it is found that Ti and TiN are good materials. In the VCC characteristics and leakage currents of MIM capacitors, N2 and NH3 plasma can improve VCC characteristics and leakage currents, but H2 plasma make these electrical characteristics more badly. Compared to N2 plasma, NH3 plasma can more effectively improve electrical characteristics of MIM capacitors. According to the results mentioned above, the mechanisms of leakage currents, breakdown electric field, and VCC characteristics will be investigated using some material analysis techniques.

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39

Shih, Teng-Yuan, and 石登元. "Ferroelectric of HfO2 dielectric layer by high power impulse magnetron sputtering for MIM capacitors." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/96874343596052353124.

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Анотація:

碩士
國立臺灣師範大學
機電工程學系
104
Ferroelectric material is now one of the popular research objectives. Due to the current development of technology, the size of electronic components become smaller and smaller. However, the film thickness of the conventional ferroelectric material is about few hundred nanometers and the current leakage is large, thus effecting the application of ferroelectric material used in memory devices. Therefore, scientists began looking for new ferroelectric materials such as HfO2, ZrO2 and other materials with the opportunity to replace the conventional ferroelectric materials. HfO2 is the choice for many researchers who try to use different deposition methods to find out the ferroelectric properties in HfO2 films. In this research, we used High Power Impulse Magnetron Sputtering (HIPIMS) for the deposition of HfO2 ferroelectric layers. The basic structure of the sample was Al/HfO2/Mo/p-Si which Al and Mo depositing by DC sputter. In Group 1, we doped Zr into HfO2 to form HfO2:Zr layer. In Group 2, we deposited a Zr layer above the HfO2 layer. In Group 3, we formed two different structures in which TiN and ZrN were separately deposited above and at the below HfO2. Then measurements of ferroelectric and physical properties were performed for all the samples. Keywords: HIPIMS, Ferroelectric material, HfO2

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40

Revathy, P. "High-k Dielectrics For Metal-Insulator-Metal Capacitors." Thesis, 2013. http://etd.iisc.ernet.in/handle/2005/2597.

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Metal-insulator-metal (MIM) capacitors are used for analog, RF, and DRAM applications in ICs. The International Technology Roadmap for Semiconductors (ITRS) specifies continuing increase in capacitance density (> 7 fF/ m2), lower leakage current density (< 10 8 A/cm2), very low effective oxide thickness (EOT < 1 nm, for DRAM applications), and better capacitance density-voltage (C-V) linearity ( < 100 ppm/V2, for analog/RF applications). In addition, the maximum fabrication/processing temper-ature should not be greater than 400 0C, in order to be compatible with the thermal budget of back-end fabrication steps. Low dielectric constants of conventional SiO2 and Si3N4 capacitors limit the capacitance densities of these devices. Although scaling down of dielectric thickness increases the capacitance density, it results in large leakage current density and poor C-V linearity. In this work, the effects of high-k materials (Eu2O3, Gd2O3, TiO2) on the device performance of MIM capacitors are studied. The performance of multi-dielectric stack, and doped-dielectric stack devices are also investigated. The effects of anneal temperature, anneal ambient, anneal mode, and dielectric thickness on device performance are evaluated. C-V, current density-voltage (J-V), and reliability measurements are performed to benchmark the electrical performance, and this is correlated to the structural and material properties of the films through ellipsometry, scanning electron microscopy (SEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) measurements. High-performance MIM capacitors are fabricated by using (RF sputtered) Eu2O3 dielectric. The fabricated devices are subjected to different anneal conditions, to study their device performance. Forming gas (FG) and argon (Ar) annealed devices are shown to have higher capacitance densities (7 fF/ m2jF G), lower leakage current densities (3.2 10 8 A/cm2jAr at -1 V), and higher , compared to oxygen (O2) annealed de-vices ( 100kHz = 193 ppm/V2jO2). The electrical characterization results are correlated with the surface chemical states of the films through XPS measurements. The annealing ambient is shown to alter the surface chemical states, which, in turn, modulate the electrical characteristics. High-density MIM capacitors are fabricated by using (RF sputtered) Gd2O3, and Gd2O3-Eu2O3 stacked dielectrics. The fabricated Gd2O3 capacitors are also subjected to different anneal conditions, to study their device performance. Although Gd2O3 capacitors provide high capacitance density (15 fF/ m2), they suffer from high leakage current density, high , and poor reliability. Therefore, stacked dielectrics of Gd2O3 and Eu2O3 (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) are fabricated to reduce leakage current density, improve , and improve reliability, with only a marginal reduction in capacitance density, compared to Gd2O3 capacitors. Density of defects and barrier/trap heights are extracted for the fabricated capacitors, and correlated with the device characteristics. High-performance MIM capacitors with bilayer dielectric stacks of (ALD-deposited) TiO2-ZrO2, and Si-doped ZrO2 are characterized. Devices with (ALD-deposited) TiO2/ ZrO2/TiO2 (TZT) and AlO-doped TZT stacks are also characterized. The influence of doping on the device performance is studied. The surface chemical states of the deposited films are analyzed by high-resolution XPS. The structural analysis of the samples is performed by XRD measurements, and this is correlated to the electrical characteristics of the devices. Reliability measurements are performed to study the effects of constant voltage and current stress on device performance. High capacitance density (> 45 fF/ m2), low leakage current density (< 5 10 8 A/cm2 at -1 V, for most devices), and sub-nm EOT are achieved. These parameters exceed the ITRS specifications for DRAM storage capacitors.

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41

Chen, Pin Hsuan, and 陳品璇. "Enhanced Device Reliability for HfZrOx-based Ferroelectric MFM Capacitor by NH3 Plasma Treatment." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/uz87v6.

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42

Tung, I.-Cheng, and 董宜承. "The Characteristic Analysis of DRAM MIM Capacitor and STT-MRAM LLG-based Model." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/q6p6r9.

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Анотація:

碩士
國立臺灣大學
電子工程學研究所
107
Since Samsung released 20nm DRAM products in 2015, DRAM has now migrated to the 1x, 1y, 1z era. The main challenge is how to maintain the sufficient capacitance in the limited area to prevent the sensing error as DRAM capacitor scaling. How to increasing the effective area of capacitor or decrease the equivalent oxide thickness (EOT) is the main solution. The problem could be solved by means of changing the structure or materials. However, high dielectric constant oxide generally has the lower energy gap. Therefore, under the condition of the low leakage current, achieve the minimum of equivalent oxide thickness (EOT) to be the next generation DRAM products. On the other hand, Spin-Transfer Torque Magnetic Radom Access Memory (STT-MRAM) has emerged as a promising candidate for the next generation of non-volatile memory. STT-MRAM switching the magnetization through Magnetic Tunneling Junction (MTJ) with polarized current to change their resistance state as data. STT-MRAM has many advantages, including non-volatility, high speed, low power dissipation, and high endurance. In the first part, investigate on ZrO2-based film as DRAM capacitor. During atomic layer deposition (ALD) process, fabricate ZrO2-Al2O3-ZrO2 (ZAZ) film and investigate on the relationship between the locations of interposed layer Al2O3 and electrical characteristics. On the other hand, analyze the ZAZ film with the various location at the different ALD process temperature, and conduct time dependent dielectric breakdown (TDDB) analysis to prevent whether the dielectric has 10-year lifetime on the normal operation or not. In the next chapter, simulate the leakage current of ZAZ film with the various location of Al2O3 the by TCAD simulation, and explain the asymmetry factor of leakage current with the various location of Al2O3 In the second part, establish the model of perpendicular Magnetic Tunneling Junction (pMTJ) on the basis of Landau-Lifshitz-Gilbert (LLG) equation. Through the drive current, the dynamic magnetization as a function of time would be switched between high resistant state (HRS) and low resistant state (LRS). The accuracy of the model had been verified with the theorems. Furthermore, according to Fokker-Planck theorem, simulate the initial angle distribution of magnetization owing to thermal fluctuation. Based on the other’s experiment, run the LLG-based model many times to predict write error rate (WER) of STT-MRAM by means of Monte Carlo method and plot Shmoo plot to determine the operation point for WER=1E-6. On the other hand, analyze the change of reliability issue plot after considering the diameter and thickness variation of MTJ owing to process variation.

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43

Ou, Wei-Yuan, and 歐瑋元. "Investigation of Modulation of Quadratic Voltage Coefficient of Capacitance in MIM Capacitors Using SiO2/TiO2 Stacked Dielectric." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/24987465385529988775.

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44

Huang, Yun-Pei, and 黃勻珮. "Electrical Analysis and Physical Model of the Voltage Coefficient of Capacitance of the TiN/HfAlO/TiN MIM Capacitors." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/72625129346397398754.

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Анотація:

碩士
國立交通大學
電子工程系所
97
In this thesis, we use HfAlO as the dielectric layer in MIM capacitors. HfAlO films with two different Al percentages were deposited. The Al percentages are 10% and 14.7%. The thickness of samples is divided into three kinds of thickness: 15nm, 25nm, and 35nm. The capacitance density is 13.6 fF/μm2 with 10% Al content and the dielectric constant is about 23 at 3V and 1MHz. The capacitance density is 11.3 fF/μm2 with 14.7% Al content and the dielectric constant is about 19.5. The lower Al percentage is (Hf content is higher), the higher capacitance density is. The capacitance density meets the requirement of 2013 ITRS. The leakage current densities of the samples with 15nm-thick HfAlO and 10% and 14.7% Al content are 1.88×10-8 and 1.72×10-8 (A/cm2) at 1V bias, respectively. The leakage current mechanism is identified to be Ohmic Conduction at low electric field, Schottky Emission Conduction at moderate electric field, and Frenkel-Poole conduction at high electric field. The lowest parabolic voltage coefficient of capacitance (VCC-��) in this thesis is about 259(ppm/V2) with Al content of 14% Al content and thickness of 35nm. A physical model considering the pre-existing border traps was proposed to account for the VCC-��. From the frequency and electrode bias voltage dependences the spatial and energy distribution from Si substrate surface and from HfAlO conduction band edge could be extracted, respectively. The orders of the magnitude of the extracted border trap volume densities are around 3×1017 (cm-3eV-1), which have positive correlation with the VCC-��. Increasing the Al content can reduce the trap density and the VCC-��. The limitations of detectable space and energy depth of the physical model are also discussed briefly.

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45

Chen, Teng-Chuan, and 陳登荃. "Back-End Integrable On-Chip MIM Decoupling Capacitors Featuring High Capacitance with Low Leakage Current by Orthorhombic HfZrOx." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/r9g6g8.

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46

Hung, Kuo-Wei, and 洪國瑋. "Improving the Electrical Characteristics of NixTi1-xO High K Dielectric by Plasma Treatment and Pre-oxidation Treatment for MIM Capacitors." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/86582060788486740155.

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Анотація:

碩士
逢甲大學
產業研發碩士班
94
RTA( Rapid Thermal Annealing) Technology has been applied to the process in VLSI, extensive with thermal budget, because RTA technology can insert the advantage of bringing the environment that the chip is in up to more than 1000 degrees Centigrade within short time, have already been adopted extensively gradually. In this work, the first oxidization of nickel/titanium film is completed by RTA. Then,the second oxidization at 450℃ using furnace. Finally, NiTiO3 film is melted by nitrogen treatment at 450 ℃. We find that it will improve property by directly oxidization after pre-oxidation and post-oxidation treatment.

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47

Mao, Chih Jen, and 毛智仁. "Investigation of the relationship of the MIM capacitor Leakage Current Characteristics with different Bottom Plate Material growth conditions." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/03546447610834332201.

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Анотація:

碩士
國立交通大學
工學院碩士在職專班半導體材料與製程設備組
97
Double MMC (Metal Insulator Metal Capacitor) structure is one of the high capacitor solutions for saving chip size by stacking two dielectric layers of capacitor area without impacting Breakdown Voltage. We found that ARC TTN (Anti-Reflect Coating Ti/TiN) for SiO2 capacitor bottom plate metal with lower process temperature will lead to worse metal surface roughness and more compressive capacitor dielectric. The Stress difference will affect dielectric pinhole level. Both metal roughness and dielectric pinhole cause capacitor leakage current higher. But higher temperature TTN capacitor bottom plate metal with PVD process will not. So it can get better capacitor breakdown voltage. And double MMC with Si3N4, or ONO stack film dielectric have neither serious pinhole nor worse leakage current impact.

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48

Tsai, Wu-Han, and 蔡武翰. "Effects of sputtering power and substrate temperature on high dielectric constant thin films and it’s applications to MIM on-chip capacitors." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/77338402837329280060.

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Анотація:

碩士
崑山科技大學
電腦與通訊研究所
102
Transparent conductive film refers to the visible light range with a high transmittance rate, and has good electrical conductivity of the film, due to the nature of special optical and electronic properties can be applied in various fields. The aluminum nitride film as an insulating layer of MIM capacitor chips because of the heat resistance, thermal conductivity of about 170 ~ 190 W / mK and a high degree of insulation, suitable for application of high-power LED, electronics, optoelectronics, semiconductors, mechanical and metallurgical aspects much attention; especially in applications requiring high thermal conductivity simultaneously with high electrical insulation, and is considered to have a high potential for application. In this study, using RF magnetron RF sputtering deposition of zinc oxide doped with aluminum (AZO) of the transparent conductive film, by changing the sputtering conditions of RF power, substrate temperature, working pressure and other parameters to explore the process parameters for the deposition of single AZO and the conductive thin film optical effects, and MIM capacitor is to use the chip DC magnetron DC sputtering deposition of aluminum (Al) and aluminum nitride (AlN), aluminum nitride by (AlN) film thickness, the leakage current Discussion density and capacitance density, its analysis to define the optimum process conditions of AZO transparent conductive film with Al / AlN / Al of MIM chip capacitor. In the study of the physical properties of thin films by micro-FE-SEM and AFM observation of structural changes in the film and the surface roughness; in terms of the optical properties of the transparent conductive film by UV-visible spectrophotometer to analyze the optical penetration rate of AZO films; in electricity properties, its measurement using the Hall carrier concentration and electron mobility rate, while MIM capacitors in electrical nature of the wafer using I-V and C-V measurements capacitance density and leakage current density. The experimental results obtained by, AZO film at a substrate temperature of 70 ℃ and when the sputtering power of 250 W, a resistivity of 7 × 10-4 Ω-cm (sheet resistance of 175.2 Ω / sq), and in the visible (300 ~ 800 nm) of the average Transmittance approximately 78% (at 415 nm) ~ 92.5% (at 630 nm), while the MIM capacitor according to the wafer ITRS Roadmap 2012 the year for 2014 MIM capacitance density of at least 7 fF/μm2 above specifications and we in the aluminum nitride (AlN) thickness of 50nm silicon substrates can reach 10.6 fF/μm2, obviously consistent with the needs of the experimental results; leakage current section also meet the specifications required (10-8 A / cm2 at 1V). Based on the above experimental results obtained in the present paper is to study the use of a transparent conductive film and MIM capacitors chip optimum parameters of the future as a major research combined with a transparent chip capacitor .

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49

Bertaud, Thomas. "Élaboration et caractérisation large bande de matériaux "high-k" en structure "MIM"." Phd thesis, 2010. http://tel.archives-ouvertes.fr/tel-00555345.

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Анотація:

Afin d'améliorer les performances électriques des circuits intégrés (densité d'intégration, vitesse et fiabilité), des matériaux à permittivité élevée sont introduits dans les composants passifs, notamment les capacités " Métal-Isolant-Métal " (MIM). De nombreux diélectriques, allant d'une permittivité moyenne (SixNy, Ta2O5, HfO2, ZrO2) à très élevée (les pérovskites SrTiO3 et BaTiO3) en passant par les alliages de plusieurs éléments (HfTiO, TiTaO ou Pb(ZrxTi1-x)O3) sont largement étudiés comme candidats prometteurs. Ces composants et ces matériaux ont pour vocation de fonctionner à des fréquences de plus en plus élevées, jusqu'à plusieurs gigahertz. La permittivité complexe Er (permittivité réelle E'r et pertes E''r) des diélectriques peut varier avec la fréquence : des phénomènes de relaxation et de résonance peuvent apparaître. La caractérisation de ces matériaux et l'évaluation des performances des composants intégrant ces diélectriques deviennent nécessaires sur une très large bande de fréquence. Ce travail de thèse a pour objectifs d'obtenir les caractéristiques électriques des diélectriques sur une très large bande de fréquences, du continu à plusieurs dizaines de gigahertz, en configuration in-situ, c'est-à-dire en films minces et avec les mêmes procédés d'intégration que dans le composant MIM final. Pour cela, un outil générique, allant du développement de la technologie nécessaire à la réalisation des structures de test et aux procédures d'extraction des propriétés à hautes fréquences, a été développé, validé grâce au SixNy puis appliqué à différents diélectriques : AlN [1], TiTaO [2], HfO2 et ZrO2 [3,4]. [1] T. Bertaud et al., Microelectron. Eng. 88, 564 (2011). [2] T. Bertaud et al., J. Appl. Phys. 110, 044110 (2011). [3] T. Bertaud et al., IEEE Electr. Device L. 31 (2), 114 (2010). [4] T. Bertaud et al., IEEE T. Compon. Pack. 2 (3), 502 (2012).

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50

Monnier, D. "Etude des dépôts par plasma ALD de diélectriques à forte permittivité diélectrique (dits « High-K ») pour les applications capacités MIM." Phd thesis, 2010. http://tel.archives-ouvertes.fr/tel-00520511.

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Анотація:

La miniaturisation des composants dans la micorélectronique touche maintenant les composants passifs comme les capacités MIM (Métal/Isolant/Métal). Pour augmenter la densité de capacité des capacités MIM, les diélectriques conventionnels (SiO2, ε = 3.9) sont remplacés par des diélectriques à haute permittivité diélectrique dits « high-k » comme ZrO2. Sa permittivité ε est égale à 47 lorsqu'il se trouve sous la phase tétragonale. Le procédé de dépôt de ZrO2 est la méthode PEALD. Nous avons étudié le procédé de dépôt de ZrO2 avec les précurseurs TEMAZ et ZyALD. Les propriétés thermodynamiques du TEMAZ ont été analysées par spectrométrie de masse. L'influence des paramètres du procédé PEALD et de post-traitements sur les mécanismes de formation de la zircone tétragonale a été étudiée. De nombreuses méthodes de caractérisation (XRD, Raman, TEM, SIMS, XPS, caractérisations électriques...) ont été employées afin d'établir un optimum propriétés des films de ZrO2 / performance du procédé de dépôt.

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