Дисертації з теми "MOLECULAR QUANTUM-DOT CELLULAR AUTOMATA (QCA)"

Field-Coupled nanocomputing (FCN) paradigms offer fundamentally new approaches for digital computing without involving current transistors. Such paradigms perform computations using local field interactions between nanoscale building blocks which are organized with purposes. Among several FCN paradigms currently under active investigation, the Molecular Quantum-dot Cellular Automata (MQCA) is found to be the most promising and its unique features make it attractive as a candidate for post-CMOS nanocomputing. MQCA is based on electrostatic interactions among quantum cells with nanometer scale eliminating the need of charge transportation, hence its energy consumption is significantly decreased. Meanwhile it also possesses the potential of high throughput if efficient pipelining of information propagation is introduced. This could be realized adopting external clock signals which precisely control the adiabatic switching and direction of data flow in MQCA circuits. In this work, in order to model MQCA as electronic devices and analyze its information propagation with clock taken into account, an effective algorithm based on ab-initio simulations and modelling of molecular interactions has been applied in presence of a proposed clock mechanism for MQCA, including the binary wire, the wire bus and the majority voter. The quantitative results generated depict compelling clocked information propagation phenomena of MQCA devices and most importantly, provide crucial feedback for future MQCA experimental implementations

Quantum-dot cellular automata is an emerging technology for digital computation that follows the More than Moore trends and aims to the simultaneous reduction of both device size and power consumption. In particular, the basic QCA device is a cell made of dots and in which a bunch of free charges are allowed to move without leaving the cell itself. Depending on which dots the free charges occupy inside the cell (called also charge localization inside the cell) the binary information could be encoded and the interaction between nearby cells is performed by the electrostatic interaction. This means that no current flows between QCA devices, thus strongly reducing the power dissipation. Regarding the physical implementation of the QCA technology, different solutions were proposed in literature (semiconductor, metallic, magnetic and molecular) and in some cases (metallic and magnetic) a prototype or more advanced circuits were developed. Among all the implementations proposed, molecular QCA is the most promising, since high operating frequencies (THz) and non cryogenic work temperature (room temperature) could be achieved due to the nanometer size of a molecular system. However, a molecular prototype still does not exist and in literature only preliminary attempts to demonstrate the molecular QCA feasibility were carried out. The main difficulties to achieve a molecular prototype arise from the lack of control in the fabrication processes at the molecular scale and the current resolution of the electronic instruments to read the state of a single molecular QCA cell. The work of this thesis focused on the characterization from an electronic point of view of a molecule synthesized ad hoc for QCA computing and called bis-ferrocene. The molecule was synthesized by a group of the chemical department of the University of Bologna, in collaboration with the ST Microelectronics company. This work aimed to evaluate the bis-ferrocene properties as QCA device both at the equilibrium and in presence of a bias system. In addition, the interaction between nearby molecules was evaluated and the simulation of the simplest QCA circuit, a molecular wire, was performed. The methodology adopted to carry on this analysis come from the needs to model the bis-ferrocene molecule by means of some figures of merit that could be measured by electronic instrumentations. This is because in literature all the candidate molecules proposed for QCA were characterized using chemical quantities derived from mathematical approximations (energy levels and molecular orbitals). Moreover, all the steps of this work were performed with the aim to set-up an experimental demonstration of the QCA functionalities focusing on a bis-ferrocene wire. For this reasons, the choice of the bias system, the QCA circuit and the definition of a new methodology come from the experimental scheme studied in this work. In particular, the scheme proposed here focused on the experimental evaluation of the three main mechanism involved during QCA computation: how to force the two logic states at the input (write-in system), the interaction between molecules (information propagation) and, finally, the study of system able to recognize the charge localization inside the cell (read-out stage). In addition, given the results obtained during parallel experimental activities, a fault tolerance evaluation of the bis-ferrocene wire in presence of real fabrication defects was performed.

Molecular-based quantum cellular automata (m-QCA), as an extension of quantum-dot QCAs, offer a novel alternative in which binary information can be encoded in the molecular charge configuration of a cell and propagated via nearest-neighbor Coulombic cell–cell interactions. Appropriate functionality of m-QCAs involves a complex relationship between quantum mechanical effects, such as electron transfer processes within the molecular building blocks, and electrostatic interactions between cells. The influence of structural distortions of single m-QCA are addressed in this paper within a minimal model using an diabatic-to-adiabatic transformation. We show that even small changes of the classical square geometry between driver and target cells, such as those induced by distance variations or shape distortions, can make cells respond to interactions in a far less symmetric fashion, modifying and potentially impairing the expected computational behavior of the m-QCA.

Semiconductor industry seems to approach a wall where physical geometry and power density issues could possibly render the device fabrication infeasible. Quantum-dot Cellular Automata (QCA) is a new nanotechnology that claims to offer the potential of manufacturing even denser integrated circuits, which can operate at high frequencies and low power consumption. In QCA technology, the signal propagation occurs as a result of electrostatic interaction among the electrons as opposed to flow to the electrons in a wire. The basic building block of QCA technology is a QCA cell which encodes binary information with the relative position of electrons in it. A QCA cell can be used either as a wire or as logic. In QCA, the directionality of the signal flow is controlled by phase-shifted electric field generated on a separate layer than QCA cell layer. This process is called clocking of QCA circuits. The logic realization using regular structures such as PLAs have played a significant role in the semiconductor field due to their manufacturability, behavioral predictability and the ease of logic mapping. Along with these benefits, regular structures in QCA's would allow for uniform QCA clocking structure. The clocking structure is important because the pioneers of QCA technology propose it to be fabricated in CMOS technology. This thesis presents a detailed design implementation and a comparative analysis of logic realization using regular structures, namely Shannon-Lattices and PLAs for QCAs. A software tool was developed as a part of this research, which automatically generates complete QCA-Shannon-Lattice and QCA-PLA layouts for single-output Boolean functions based on an input macro-cell library. The equations for latency and throughput for the new QCA-PLA and QCA-Shannon-Lattice design implementations were also formulated. The correctness of the equations was verified by performing simulations of the tool-generate layouts with QCADesigner. A brief design trade-off analysis between the tool-generated regular structure implementation and the unstructured custom layout in QCA is presented for the full-adder circuit.

The defects and fault tolerance study is essential in the QCA devices in order to know its characteristics. Knowing the characteristics, one can understand the flow of information in a QCA system with and without manufacturing and operational defects. The manufacturing defects could be at device level or cell level. At the device level, the cell could be rotated, displaced vertically or horizontally, the cell could be missing or the size of the cell could be different. At the cell level, there could be a missing dot, dot could be displaced from its position or the size of the dots could be different. The operational defects are due to its surrounding, such as temperature or stray charge. Each of these defects and fault tolerances can be studies in detail in order to find the optimum working conditions where the information can be safely transmitted to the appropriate locations in the device.The theoretical studies have shown that at absolute temperature and without any defect, the QCA devices are operational. But it is almost impossible to manufacture a perfect or defect free device, and also it is impractical to think about operating a system at absolute zero temperature environment.Therefore, it is important to investigate the fault tolerant properties with defects and higher temperatures to see how far the QCA device can operate safely. Many studies have been done to investigate the fault tolerant properties in QCA devices. However, these studies have not completely exhausted the study of defects and temperature effects. In this study, the dot displacement and missing dots with temperature effects are investigated for the basic QCA devices and a Full Adder. In order to study fault tolerant properties, the existing theoretical model and computer simulation programs have been expanded and used. The defect characteristics have been simulated using normal distribution.
Department of Physics and Astronomy

Molecular quantum-dot cellular automaton (QCA) offers an alternative paradigm for computing at the nano-scale. Such Q C A circuits require an external clock, which can be generated using a network of submerged electrodes, to synchronize information flow, and provide the required power to drive the computation. In this thesis, the effect of electrode separation and applied potential on the likelihood of different Q C A cell states of molecular cells located above and in between two adjacent electrodes is analysed. Using this analysis, estimates of operational ranges are developed for the placement, applied potential, and relative phase between adjacent clocking electrodes to ensure that only those states that are used in the computation, are energetically favourable. Conclusions on the trade-off between cell size and applied clocking potential are drawn and the temperature dependency on the operation of fundamental Q C A building blocks is considered. Lastly, the impact of random phase shifts on the underlying clocking network is investigated and a set of universal Q C A building blocks is classified into distinct groups based on their sensitivity to these random phase shifts.
Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate

Thesis (M.S.E.E.)--University of Notre Dame, 2006.
Thesis directed by Gregory L. Snider for the Department of Electrical Engineering. "June 2006." Includes bibliographical references (leaves 64-65).

碩士
國立交通大學
資訊科學系所
94
Quantum-dot cellular automata (QCA) is a novel nano-scale computing mechanism that can represent binary information based on spatial distribution of electron charge configuration in molecules. A QCA physical synthesis flow consists of four stages: partitioning, placement, pin-assignment and channel routing. Because wire crossings in QCA layout increase the complexity of circuit layout design, this work focus on minimizing wire crossings of the circuit under synthesis. In this paper, the problem of QCA placement is mapped to a famous problem “k-layer bigraph crossing problem” and a new heuristic is developed for this problem. Pin assignment stage is prior to channel routing stage, which provides a legal pin assignment for the following channel routing stage. Finally, a new cycle breaking algorithm to reduce wire crossings in channel routing stage is presented. Based on our experimental results, placement and cycle breaking obtain good crossing reduction. We also simulate our circuit by QCA Design 2.0.3 and obtain correct simulation result and other benchmark circuits does not have simulation result since they are too large to complete simulation in time.

This paper details the design and simulation of a fault-tolerant Quantum-dot Cellular Automata (QCA) NOT gate. A version of the standard NOT gate can be constructed to take advantage to the ability to easily integrate redundant structures into a QCA design. The fault-tolerant characteristics of this inverter are analyzed with QCADesigner v2.0.3 (Windows version) simulation software. These characteristics are then compared with the characteristics of two other non-redundant styles of NOT gates. The redundant version of the gate is more robust than the standard style for the inverter. However, another simple inverter style seems to be even more than this fault-tolerant design. Both versions of the gate will need to be studied further in the future to determine which design is most practical.
Thesis (M.S.)--Wichita State University, College of Engineering, Dept. of Electrical and Computer Engineering
"July 2006."
Includes bibliographic references (leaves 31-33)

Quantum-Dot Cellular Automata (QCA) is currently being investigated as an alternative to CMOS technology. There has been extensive study on a wide range of circuits from simple logical circuits such as adders to complex circuits such as 4-bit processors. At the same time, little if any work has been done in considering the possibility of reconfiguration to reduce power in QCA devices. This work presents one of the first such efforts when considering reconfigurable QCA architectures which are expected to be both robust and power efficient. We present a new reconfiguration scheme which is highly robust and is expected to dissipate less power with respect to conventional designs. An adder design based on the reconfiguration scheme will be presented in this thesis, with a detailed power analysis and comparison with existing designs. In order to overcome the problems of routing which comes with reconfigurability, a new wire crossing mechanism is also presented as part of this thesis.

Today leading VLSI experts predict a hard wall for CMOS and other conventional fabrication technology due to fundamental physical limits (ultra-thin gate oxide, short channel effects, doping fluctuations, etc.), and increasingly difficult and expensive lithography in nanoscale. Extensive research conducted in recent years at nanoscale aiming to surpass CMOS has proposed Quantum Dot Cellular Automata as a viable alternative for nanoscale computing. Quantum Dot Cellular Automata (QCA) paradigm is an innovatory approach to computing, which encodes binary information by means of charge configuration of nanostructures instead of current switching devices. The fundamental building block of QCA devices is the QCA cell, and electrostatic interaction between neighboring cells governs the design of all QCA wires and logic gates. The two primary logic elements in QCA technology are: majority voter and inverter. Binary wires and inverter chains are used for interconnection purposes. Logic operation AND, and OR can be achieved by maneuvering inputs to the majority voter. Clocking enables precise control over timing and data flow direction, as well as power gain in QCA circuits. Also proper clocking can achieve computational pipelining and can drastically reduce circuit power dissipation. Manufacturing of a QCA cell is expected to result in defects like cell displacement, misalignment, and absence of cell or additional cell in circuitry, causing the circuit to exhibit faulty behavior. So a well-defined testing scheme becomes necessary for this technology. Though the technology is different from conventional CMOS design, it is shown to be effective and realistic to use existing testing schemes at this stage. Stuck-at (s-a-v) fault model is quite acceptable in this regard in spite of the fact, that this model does not incorporate all the defective behaviors occurring in the fabrication process. With this in view, single stuck-at value faults have been considered for testing QCA circuits. In this thesis a new strategy for designing QCA logic, exhaustively testable for single s-a-v faults, is presented. In particular, the method facilitates QCA functionality testing. Any combinational logic can be implemented using only AND-OR gates (with negated signals available), and in QCA this generally results in reduced test set for exhaustive fault detection within the data path. Previously this strategy was used for QCA logic testing considering only primary inputs (either true or complemented, but not both) feeding different majority voters, which fails for general circuits where fanouts are allowed for primary inputs and their complement. Here, a design scheme has been proposed which makes testing possible for any combinational QCA circuit. The extension to modular design testing is also presented. Two design approaches are proposed for testing modular and non-modular logic. The first design uses 2 n ( n = primary inputs) ' Test Enable ' majority voters, and is tested with two 4-bit vectors regardless of complexity of design and the input size. Second design employs n majority voters for the same purpose, thus requiring lesser number of majority voters, but at the price of increased vector length. Application specific conditions would decide which design becomes optimal. Without going into the features of a particular QCA fabrication, errors on logic level is addressed, such that the approach achieves generality, and could be applied to any particular implementation of QCA. Also to overcome the fault masking in modular circuit design, a solution has been presented. To verify the scheme, a simulation and layout tool, QCADesigner version 2.0.3 was used. First the fault free circuit was designed and simulated. Then random s-a-v faults were injected in different locations of data path. In all cases, 100% fault coverage was achieved confirming the validity of proposed approach