Дисертації з теми "Low latitude current systems"
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Tsunomura, Satoru. "On the Contribution of Global Scale Polar-originating Ionospheric Current Systems to Geomagnetic Disturbances in Middle and Low Latitudes." 京都大学 (Kyoto University), 1999. http://hdl.handle.net/2433/182006.
Повний текст джерелаGammon, Tammy Lea. "Improved arcing-fault current models for low-voltage power systems (<1kV)." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/15675.
Повний текст джерелаYokoyama, Yoshihiro. "Characteristics of the mesoscale field-aligned currents in the dusk sector of the auroral oval based on data from the Swarm satellites." Kyoto University, 2021. http://hdl.handle.net/2433/261602.
Повний текст джерелаArbetter, Barry Steven. "DC-DC converter utilizing hysteretic current-mode control for low-voltage microprocessor systems with power management." Diss., Connect to online resource, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3219222.
Повний текст джерелаMiwa, Hidekazu. "High-Efficiency Low-Voltage High-Current Power Stage Design Considerations for Fuel Cell Power Conditioning Systems." Thesis, Virginia Tech, 2009. http://hdl.handle.net/10919/42519.
Повний текст джерелаMaster of Science
Ziegler, Silvio. "New current sensing solutions for low-cost high-power-density digitally controlled power converters." University of Western Australia. School of Electrical, Electronic and Computer Engineering, 2009. http://theses.library.uwa.edu.au/adt-WU2010.0077.
Повний текст джерелаMendoza, Arenas Juan José. "Spin and energy transport in boundary-driven low-dimensional open quantum systems." Thesis, University of Oxford, 2014. http://ora.ox.ac.uk/objects/uuid:44b89c4d-e9eb-4136-a540-c80bcabeb6f6.
Повний текст джерелаMOSCA, CARMELO. "Methodologies for Frequency Stability Assessment in Low Inertia Power Systems." Doctoral thesis, Politecnico di Torino, 2021. http://hdl.handle.net/11583/2895393.
Повний текст джерелаHeim, Marcus Edwin Allan. "ANALYSIS OF MOS CURRENT MODE LOGIC (MCML) AND IMPLEMENTATION OF MCML STANDARD CELL LIBRARY FOR LOW-NOISE DIGITAL CIRCUIT DESIGN." DigitalCommons@CalPoly, 2015. https://digitalcommons.calpoly.edu/theses/1422.
Повний текст джерелаGeury, Thomas. "Smart matrix converter-based grid-connected photovoltaic system for mitigating current and voltage-related power quality issues on the low-voltage grid." Doctoral thesis, Universite Libre de Bruxelles, 2017. http://hdl.handle.net/2013/ULB-DIPOT:oai:dipot.ulb.ac.be:2013/243967.
Повний текст джерелаDoctorat en Sciences de l'ingénieur et technologie
info:eu-repo/semantics/nonPublished
Park, Jinsung. "A highly linear and low flicker-noise CMOS direct conversion receiver front-end for multiband applications." Diss., Available online, Georgia Institute of Technology, 2007, 2007. http://etd.gatech.edu/theses/available/etd-07092007-054701/.
Повний текст джерелаDr. Chang-Ho Lee, Committee Member ; Dr . Kevin T Kornegay, Committee Member ; Dr. Emmanouil M Tentzeris, Committee Member ; Dr. Joy Laskar, Committee Chair ; Dr. Oliver Brand, Committee Member.
Xiong, Zhijie. "Radio Frequency Low Noise and High Q Integrated Filters in Digital CMOS Processes." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/5043.
Повний текст джерелаLatzo, Curtis Thomas. "Approaches to Arc Flash Hazard Mitigation in 600 Volt Power Systems." Scholar Commons, 2011. http://scholarcommons.usf.edu/etd/3198.
Повний текст джерелаKeskar, Neeraj. "High bandwidth wide LC-Resr compliant sigma-delta boost DC-DC switching converters." Diss., Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/22530.
Повний текст джерелаMarusiak, David. "MOS CURRENT MODE LOGIC (MCML) ANALYSIS FOR QUIET DIGITAL CIRCUITRY AND CREATION OF A STANDARD CELL LIBRARY FOR REDUCING THE DEVELOPMENT TIME OF MIXED-SIGNAL CHIPS." DigitalCommons@CalPoly, 2014. https://digitalcommons.calpoly.edu/theses/1363.
Повний текст джерелаDomagk, Max. "Identifikation und Quantifizierung korrelativer Zusammenhänge zwischen elektrischer sowie klimatischer Umgebung und Elektroenergiequalität." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-211866.
Повний текст джерелаPower quality levels in public low voltage grids are influenced by many factors which can either be assigned to the electrical environment (connected consumers, connected genera-tion, network characteristics) or to the non-electrical environment (e.g. climatic conditions) at the measurement site. Type and amount of connected consumers (consumer topology) are expected to have a very high impact on power quality (PQ) levels. The generation topology is characterized by number and kind of equipment and generating installations like photovoltaic systems which are connected to the LV grid. The electrical parameters of the grid define the network topology. The parameters which are most suitable to describe each of the three topologies and the climatic environment will be identified. Voltage and current quality in public low voltage (LV) grids vary depending on location and time. They are quantified by a set of different parameters which either belong to events (e.g. dips) or to variations (e.g. harmonics). This thesis exclusively addresses continuous parameters describing variations. Continuous phenomena like harmonics are closely linked to an one-day-cycle which implies a more or less periodic behavior of the continuous power quality parameters. Consumer topologies such as office buildings or residential areas differ in their use of equipment. Time series analysis is used to distinguish between different consumer topologies and to identify characteristic weeks. The clustering of one-day time series is applied to identify characteristic days within the weeks of certain topologies. Based on the results, emission profiles for certain current quality parameters of different consumer topologies will be defined. Due to the characteristic harmonic current emission of certain consumer topologies which represents the typical user behaviour a classification system is developed. It is used to automatically classify the emission profiles of harmonic currents for unknown measurements and to estimate a likely consumer topology. A classification measure is introduced in order to identify unusual or false classified emission profiles. The usage behaviour of equipment by customers usually varies over the year. Subsequently, the levels of PQ parameters like harmonics may show seasonal variations which are identified by using newly defined parameters. The introduction of new device technologies on a large scale like the transition from incandescent to LED lamps might result in long-term changes to the levels of PQ parameters (e.g. harmonics). The analysis of the long-term behavior (trend) will be applied in order to quantify global trends (looking on the measurement duration as a whole) and local trends (looking on individual segments of the whole time series)
Lin, Shi-Kai, and 林詩凱. "Design of a Current-reused Low Noise Amplifier for Ultra-Wideband Systems." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/09362239086668679354.
Повний текст джерела雲林科技大學
電子與資訊工程研究所
97
In this thesis, we design two broadband low noise amplifiers (LNAs) for ultra-wideband (UWB) communication systems, which are implemented in TSMC 0.18 μm CMOS technology. The design of the amplifiers concentrates on low power-consumption and low costs as well. The first design utilizes a current topology to save the power and the second design is used two stage cascade topology with a inter-stage network to achieve the high gain performance. In the first section, the measurement of the first LNA shows that the maximum gain is 13.2 dB, 3-dB bandwidth is from 3.1 GHz to 10.6 GHz, the minimum noise figure is 3.33 dB, S11 is less than -10.3dB, IIP3 is better than -3.3 dBm, and the total power consumption is 9.2 mW. The chip size is 0.91 mm2. In the second section, the simulated maximum gain is 13.2 dB, 3-dB bandwidth is from 3.1 GHz to 10.6 GHz, the minimum noise figure is 3.6 dB, S11 is less than -12.4 dB, IIP3 is better than -17 dBm, and the total power consumption is 14.2 mW. The chip size is 1.05 mm2.
Chang, Chih-Rong, and 張致榮. "The Design of Integrated Platform with RF for MIMO-OFDM Systems and Dynamic Current Scaling for Low-power Design." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/10743057188438431419.
Повний текст джерела國立交通大學
資訊科學與工程研究所
101
In recent years, multiple-input multiple-output (MIMO) technology has been used widely in various communication systems. The main reason is that it can provide the efficiency and quality of data transmission. In addition, the orthogonal-frequency division multiplexing (OFDM) technology provides high-speed data transmission, as well as for operating in multipath over frequency selective fading channels, which has been adopted by many transmission systems. Therefore, the combination of these two technologies in next-generation wireless communication systems, MIMO-OFDM has become one of the most crucial technologies. There are some topics in wireless communication development. First issue is algorithm verification platform development. Second issue is application-specific integrated circuit (ASIC) implementation for low-power design. MIMO-OFDM system is very sensitive to the non-ideal front-end effects so need develop algorithms to solve them. However, only the development of algorithms without hardware to verify the algorithm is not valuable enough. In thesis we integrated a set of self-developed algorithm verification platform. This experimental platform integrated with field programmable gate array (FPGA), digital-to-analog converters (DAC), analog-to-digital converters (ADC), universal serial bus (USB) and radio frequency (RF) hardware module, combined with software graphical user interface (GUI), USB firmware, and comprises of MATLAB algorithms for solving non-ideal channel effects. The 4x4 MIMO-OFDM wireless communication system platforms are realized by combined with software and hardware co-design. Using this prototype platform makes the developed algorithms can accurate analysis and evaluate performance and verification. On the other hand, power consumption is more and more important issue on ASIC implementation. Another part of thesis we propose a dynamic current scaling (DCS) mechanism to achieve low-power design. For example the DCS mechanism is applied to fast Fourier transform (FFT) processor to achieve the 40% power saving.
"Development of high-performance low-dropout regulators for SoC applications." 2010. http://library.cuhk.edu.hk/record=b5894389.
Повний текст джерела"July 2010."
Thesis (M.Phil.)--Chinese University of Hong Kong, 2010.
Includes bibliographical references.
Abstracts in English and Chinese.
Acknowledgments
Table of Content
List of Figures
List of Tables
List of Publications
Chapter Chapter 1 - --- Background of LDO Research
Chapter 1.1 --- Structure of a LDO --- p.1-1
Chapter 1.2 --- Principle of Operation of LDO --- p.1-2
Chapter 1.3 --- Steady-State Specification of LDO --- p.1-3
Chapter 1.4 --- High-Frequency Specification of LDO --- p.1-3
Chapter 1.5 --- Dynamic Specification of LDO --- p.1-4
Chapter 1.6 --- An Advanced LDO Structure --- p.1-4
Chapter 1.7 --- Contribution and Outline of the Thesis --- p.1-5
References --- p.1-6
Chapter Chapter 2 - --- PSRR Analysis
Chapter 2.1 --- Modeling of the PSRR of LDO --- p.2-3
Chapter 2.2 --- Analysis of LDO Circuit Using Proposed Modeling --- p.2-6
Chapter 2.3 --- Conclusion of Chapter --- p.2-12
References --- p.2-13
Chapter Chapter 3- --- An Output-Capacitorless LDO with Direct Voltage-Spike Detection
Chapter 3.1 --- Analysis of Output-Capacitorless LDO --- p.3-5
Chapter 3.2 --- LDO with Proposed Voltage-Spike Detection Circuit --- p.3-7
Chapter 3.3 --- Experimental Results --- p.3-15
Chapter 3.4 --- Conclusion of Chapter --- p.3-21
References --- p.3-22
Chapter Chapter 4 - --- A LDO with Impedance Adjustment and Loop-Gain Boosting Technique
Chapter 4.1 --- Proposed LDO --- p.4-3
Chapter 4.2 --- Experimental Results --- p.4-7
Chapter 4.3 --- Comparison --- p.4-11
Chapter 4.4 --- Conclusion of Chapter --- p.4-12
Reference --- p.4-13
Chapter Chapter 5 - --- Conclusion and Future Work
"Design of on-chip low-dropout regulators for energy-aware wireless SoC in nano-scale CMOS technologies." Thesis, 2011. http://library.cuhk.edu.hk/record=b6075191.
Повний текст джерелаRemotely- or battery-powered wireless system-on-a-chip (SoC) needs energy-efficient and high-integration power-management solutions due to their energy-aware characteristics. Low-dropout regulator (LDO) is a good solution because of its excellent performances such as low power consumption, fast load-transient response and high power-supply ripple rejection (PSRR). Moreover, it is easy to be fully integrated since no inductor is needed to be the energy-storage element. Recent development of output-capacitorless LDO (OCL-LDO) realizes on-chip, local voltage regulation to enable more effective integrated power management for SoC. In this thesis, OCL-LDOs with low power consumption and fast load-transient response are investigated and presented in this thesis. LDO with output capacitor for high-PSRR operation to provide clean power supply to RF circuits is also reported. Three LDOs are developed and fabricated to verify the proposed ideas.
The first design is an ultra low-power voltage regulator for remotely powered energy-autonomous devices. It has been fabricated in a commercial 0.18-mum CMOS technology and applied to a passive UHF RFID tag IC. With the low-power voltage reference circuit and sub-threshold operations, the total quiescent current is 700 nA under a 1.8-V power supply. The output voltage of the regulator is 1.45 V with load capability of 50 muA. The temperature coefficients of the voltage reference and the output voltage are only 9 and 43 ppm/°C, respectively. A POR signal with 150-ns-width pulse is also generated to reset the digital processing part in the tag IC.
The second design is a fast-transient OCL-LDO, which has been implemented in a commercial 90-nm CMOS technology. Experimental result verifies that it is stable for a capacitive load from 0 to 50 pF and with load capability of 100 rnA. Moreover, the gain-enhanced structure provides sufficient loop gain to improve line regulation to 3.78 mV/V and load regulation to 0.1 mV/mA, respectively. The embedded voltage-spike detection circuit enables pseudo Class-AB operation to drive the power transistor promptly. The maximum overshoot and undershoot under a 1.2-V supply are less than 66 mV for full load current changes within 100-ns edge time, and the recovery time is less than 5 mus. While the measured power consumption is only 6 muW under a 0.75-V supply.
Guo, Jianping.
Adviser: Ka Nang Leung.
Source: Dissertation Abstracts International, Volume: 73-06, Section: B, page: .
Thesis (Ph.D.)--Chinese University of Hong Kong, 2011.
Includes bibliographical references.
Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web.
Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web.
Abstract also in Chinese.
Domagk, Max. "Identifikation und Quantifizierung korrelativer Zusammenhänge zwischen elektrischer sowie klimatischer Umgebung und Elektroenergiequalität." Doctoral thesis, 2015. https://tud.qucosa.de/id/qucosa%3A29896.
Повний текст джерелаPower quality levels in public low voltage grids are influenced by many factors which can either be assigned to the electrical environment (connected consumers, connected genera-tion, network characteristics) or to the non-electrical environment (e.g. climatic conditions) at the measurement site. Type and amount of connected consumers (consumer topology) are expected to have a very high impact on power quality (PQ) levels. The generation topology is characterized by number and kind of equipment and generating installations like photovoltaic systems which are connected to the LV grid. The electrical parameters of the grid define the network topology. The parameters which are most suitable to describe each of the three topologies and the climatic environment will be identified. Voltage and current quality in public low voltage (LV) grids vary depending on location and time. They are quantified by a set of different parameters which either belong to events (e.g. dips) or to variations (e.g. harmonics). This thesis exclusively addresses continuous parameters describing variations. Continuous phenomena like harmonics are closely linked to an one-day-cycle which implies a more or less periodic behavior of the continuous power quality parameters. Consumer topologies such as office buildings or residential areas differ in their use of equipment. Time series analysis is used to distinguish between different consumer topologies and to identify characteristic weeks. The clustering of one-day time series is applied to identify characteristic days within the weeks of certain topologies. Based on the results, emission profiles for certain current quality parameters of different consumer topologies will be defined. Due to the characteristic harmonic current emission of certain consumer topologies which represents the typical user behaviour a classification system is developed. It is used to automatically classify the emission profiles of harmonic currents for unknown measurements and to estimate a likely consumer topology. A classification measure is introduced in order to identify unusual or false classified emission profiles. The usage behaviour of equipment by customers usually varies over the year. Subsequently, the levels of PQ parameters like harmonics may show seasonal variations which are identified by using newly defined parameters. The introduction of new device technologies on a large scale like the transition from incandescent to LED lamps might result in long-term changes to the levels of PQ parameters (e.g. harmonics). The analysis of the long-term behavior (trend) will be applied in order to quantify global trends (looking on the measurement duration as a whole) and local trends (looking on individual segments of the whole time series).