Статті в журналах: "LNA CIRCUIT"

1

Malmqvist, R., C. Samuelsson, A. Gustafsson, P. Rantakari, S. Reyaz, T. Vähä-Heikkilä, A. Rydberg, J. Varis, D. Smith, and R. Baggen. "A K-Band RF-MEMS-Enabled Reconfigurable and Multifunctional Low-Noise Amplifier Hybrid Circuit." Active and Passive Electronic Components 2011 (2011): 1–7. http://dx.doi.org/10.1155/2011/284767.

Повний текст джерела

Анотація:

A K-band (18–26.5 GHz) RF-MEMS-enabled reconfigurable and multifunctional dual-path LNA hybrid circuit (optimised for lowest/highest possible noise figure/linearity, resp.) is presented, together with its subcircuit parts. The two MEMS-switched low-NF (higher gain) and high-linearity (lower gain) LNA circuits (paths) present 16.0 dB/8.2 dB, 2.8 dB/4.9 dB and 15 dBm/20 dBm of small-signal gain, noise figure, and 1 dB compression point at 24 GHz, respectively. Compared with the two (fixed) LNA subcircuits used within this design, the MEMS-switched LNA circuit functions show minimum 0.6–1.3 dB higher NF together with similar values ofP1 dBat 18–25 GHz. The gain of one LNA circuit path is reduced by 25–30 dB when the MEMS switch and active circuitry used within in the same switching branch are switched off to select the other LNA path and minimise power consumption.

Стилі APA, Harvard, Vancouver, ISO та ін.

2

Ma, Zhenyang, Jiahao Liu, Zhaobin Duan, Chunlei Shi, and Shaonan He. "Analysis of Indirect Lightning Effects on Low-Noise Amplifier and Protection Design." Electronics 12, no. 24 (December 6, 2023): 4912. http://dx.doi.org/10.3390/electronics12244912.

Повний текст джерела

Анотація:

In order to analyze the interference mechanisms of indirect lightning effects on a low-noise amplifier (LNA), a circuit model of the LNA was constructed based on the advanced design system 2020 (ADS 2020) software. Lightning pulse injection simulations were conducted to explore the influence of lightning pulses on the performance of the LNA. A pin injection test was performed to investigate the interference and damage threshold of the LNA. A protective circuit incorporating the transient voltage suppressor (TVS) and Darlington structure was designed through simulation, employing the ADS 2020 for the LNA. The research findings reveal that the interference threshold for the LNA is 60 V, while the damage threshold is determined to be 100 V. The protective circuit demonstrates a measured insertion loss of 0.1 dB, a response time of 1.5 ns, and a peak output voltage of 20 V. The research results indicate that the protective circuit can effectively reduce the impact of lightning’s indirect effects on the LNA. In the future, we will continue the design work of the protective circuit and proceed with physical fabrication and experimental validation.

Стилі APA, Harvard, Vancouver, ISO та ін.

3

Zhang, Yu, Shu Hui Yang, and Yin Chao Chen. "Design and Simulation of a 5.8GHz Low Noise Amplifier Used in RFID." Applied Mechanics and Materials 441 (December 2013): 133–36. http://dx.doi.org/10.4028/www.scientific.net/amm.441.133.

Повний текст джерела

Анотація:

A 5.8GHz single-stage low noise amplifier (LNA) for radio frequency identification devices (RFID) applications was proposed according to the theory of LNA. It has been realized by ATF-541M4 transistor and its peripheral circuit, such as bias circuit, input and output matching network. The proposed LNA provides a gain of 12.696dB from the analysis of ADS. The LNA achieves 0.951dB noise figure (NF) at the frequency of 5.8GHz. The simulation results show that this LNA has good noise characteristic, the NF is less than other published paper.

Стилі APA, Harvard, Vancouver, ISO та ін.

4

Chopde, Abhay, Prashik Sadar, Ashutosh Sabale, Piyush Thite, and Raghvendra Zarkar. "Design of 2.4 GHz LNA of 400 MHz Bandwidth." International Journal of Innovative Technology and Exploring Engineering 11, no. 3 (January 30, 2022): 65–69. http://dx.doi.org/10.35940/ijitee.c9760.0111322.

Повний текст джерела

Анотація:

Low Noise Amplifier (LNA) is the most important front-end block of the receiver. LNA’s Noise figure (NF) and Scattering Parameters affect the overall performance of the whole receiver circuit. Nowadays in the era of 5G technology, The quality of data that is being transmitted is increased. So there is a need for higher bandwidth to transfer data with higher speed. In such a case, communication blocks need an update. The research is carried out for the advancement of the LNA. The primary goal of LNA design is to lower the Noise Figure and return losses. The paper aims to design a 2.4 GHz LNA having a bandwidth of 400 MHz. The circuit is designed with the help of single-stub microstrip lines. We tried to keep the length of microstrip lines as minimum as possible. The transistor ATF-21170 Gallium Arsenide Field Effect Transistor (GaAs FET) is used in this work. The circuit is simulated in the Keysight Advance Design System (ADS). The amplifier is manually designed using standard methods. LNA is unconditionally stable for the frequency range of 2.2 GHz to 2.6 GHz. To build impedance matching circuits of the amplifier smith chart is used. It is observed that the LNA gain (S21) is greater than 15.3 dB, NF less than 1.2 dB, Input return loss (S11) is less than -13.3 dB, Output return loss (S22) is less than -17.1 dB over the 400 MHz bandwidth ranging from 2.2 to 2.6 GHz. This has, to the best of the authors' knowledge, not been presented in literature before.

Стилі APA, Harvard, Vancouver, ISO та ін.

5

Wei, Yiding, Jun Liu, Dengbao Sun, Guodong Su, and Junchao Wang. "From Netlist to Manufacturable Layout: An Auto-Layout Algorithm Optimized for Radio Frequency Integrated Circuits." Symmetry 15, no. 6 (June 16, 2023): 1272. http://dx.doi.org/10.3390/sym15061272.

Повний текст джерела

Анотація:

Layout stitching is a repetitive and tedious task of the radio frequency integrated circuit (RFIC) design process. While academic research on layout splicing algorithms mainly focuses on analog and digital circuits, there is still a lack of well-developed algorithms for RFICs. An RFIC system usually has a symmetrical layout, such as transmitter and receiver components, low-noise amplifier (LNA), an SPDT switch, etc. This paper aims to address this gap by proposing an automated procedure for the layout of RFICs by relying on the basic device/PCell structure based on the interconnection among circuit topologies. This approach makes the in-series generation of layouts and automatic splicing based on circuit logic possible, resulting in superior stitching performance compared with related modules in Advanced Design System. To demonstrate the physical application possibilities, we implemented our algorithm on an LNA and a switch circuit.

Стилі APA, Harvard, Vancouver, ISO та ін.

6

Castagnola, Juan L., Fortunato C. Dualibe, Agustín M. Laprovitta, and Hugo García-Vázquez. "A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio." Electronics 9, no. 5 (May 11, 2020): 785. http://dx.doi.org/10.3390/electronics9050785.

Повний текст джерела

Анотація:

This work presents a new design methodology for radio frequency (RF) integrated circuits based on a unified analysis of the scattering parameters of the circuit and the gm/ID ratio of the involved transistors. Since the scattering parameters of the circuits are parameterized by means of the physical characteristics of transistors, designers can optimize transistor size and biasing to comply with the circuit specifications given in terms of S-parameters. A complete design of a cascode low noise amplifier (LNA) in MOS 65 nm technology is taken as a case study in order to validate the approach. In addition, this methodology permits the identification of the best trade-off between the minimum noise figure and the maximum gain for the LNA in a very simple way.

Стилі APA, Harvard, Vancouver, ISO та ін.

7

Zhou, Shaohua, and Jian Wang. "An Experimental Investigation of the Degradation of CMOS Low-Noise Amplifier Specifications at Different Temperatures." Micromachines 13, no. 8 (August 6, 2022): 1268. http://dx.doi.org/10.3390/mi13081268.

Повний текст джерела

Анотація:

To investigate the relationship between the specifications degradation of a low-noise amplifier (LNA) and temperature, we experimentally investigated the degradation characteristics of the specifications of the LNA at different temperatures. The small-signal gain (S21) of the LNA decreases with increasing temperature. This paper discusses and analyzes the experimental results in detail, and the reasons for the degradation of LNA specifications with temperature changes are known. Finally, we have tried to use the structure already available in the literature for the PA temperature compensation circuit for the temperature compensation of the LNA. The results show that the existing circuit structure for PA temperature compensation in the literature can also effectively compensate for the S21 and NF degradation of the LNA due to the temperature increase.

Стилі APA, Harvard, Vancouver, ISO та ін.

8

Charisma, Atik, Nahal Widianto, M. Reza Hidayat та Handoko Rusiana Iskandar. "Low Noise Amplifier Dual Stage dengan Metode π-Junction untuk Long Term Evolution (LTE)". TELKA - Telekomunikasi Elektronika Komputasi dan Kontrol 8, № 2 (21 листопада 2022): 116–25. http://dx.doi.org/10.15575/telka.v8n2.116-125.

Повний текст джерела

Анотація:

Long Term Evolution (LTE) merupakan teknologi tanpa kabel yang memerlukan komponen-komponen elektronika untuk mendukung performansinya. Salah satu komponen elektronika tersebut yaitu Low Noise Amplifier (LNA) sebagai penguat di bagian penerima. Penelitian ini merancamg Low Noise Amplifier dengan bantuan software berdasarkan perhitungan. LNA bekerja pada frekuensi 1,8 GHz yang merupakan pita frekuensi LTE. Tahapan perancangan LNA dimulai dari pemilihan transistor, rangkaian DC bias, dan penyesuai impedansi. Transistor ATF 34143 menjadi pilihan untuk LNA karena sesuai dengan spesifikasi yang dibutuhkan. Komponen perancangan LNA untuk rangkaian DC meliputi resistor, kapasitor, dan induktor. Salah satu metode yang digunakan pada rangkaian penyesui impedansi yaitu metode π-junction pada bagian input dan output. Rangkaian penyesuai impedansi menggunakan mikrostrip. Sebuah transitor ditambahkan secara cascade untuk meningkatkan performansi LNA. Paremeter-parameter penting sebagai kinerja LNA yaitu noise figure, faktor kestabilan, dan gain. Hasil simulasi perancangan LNA ini memperoleh nilai noise figure sebesar 0,561 dB, gain 36,463 dB, dan faktor kestabilan 1,785. Parameter hasil perancangan telah memenuhi spesfikasi LNA serta kebutuhan LTE.Long Term Evolution (LTE) is a wireless technology that requires electronic components to support its performance. One of the electronic components is the Low Noise Amplifier (LNA) as an amplifier at the receiver. This study designed a Low Noise Amplifier with the help of software based on calculations. LNA works on the 1.8 GHz frequency which is the LTE frequency band. The LNA design stages start from the selection of transistors, DC bias circuits, and impedance matching. The ATF 34143 transistor is the choice for LNA because it fits the required specifications. LNA design components for DC circuits include resistors, capacitors, and inductors. One of the methods used in impedance matching circuits is the π-junction method on the input and output sections. Impedance adjustment circuit using microstrip. A transistor is added cascade to improve LNA performance. Important parameters as the performance of LNA are noise figure, stability factor, and gain. The simulation results of this LNA design obtain a noise figure value of 0.561 dB, a gain of 36.463 dB, and a stability factor of 1.785. The design parameters have met the LNA specifications and LTE requirements.

Стилі APA, Harvard, Vancouver, ISO та ін.

9

Radic, Jelena, Alena Djugova, and Mirjana Videnovic-Misic. "Influence of current reuse LNA circuit parameters on its noise figure." Serbian Journal of Electrical Engineering 6, no. 3 (2009): 439–49. http://dx.doi.org/10.2298/sjee0903439r.

Повний текст джерела

Анотація:

A 2.4 GHz low noise amplifier (LNA) with a bias current reuse technique is proposed in this work. To obtain the optimum noise figure (NF) value, dependence of NF on its most influential LNA parameters has been analyzed. Taking into account the LNA design requirements for other figures of merit, values of the circuit parameters are given for the optimum noise figure.

Стилі APA, Harvard, Vancouver, ISO та ін.

10

Sampath Kumar, V., and Kartik Upreti. "Novel low noise amplifier approach for deep brain stimulation." Journal of Physics: Conference Series 2570, no. 1 (August 1, 2023): 012033. http://dx.doi.org/10.1088/1742-6596/2570/1/012033.

Повний текст джерела

Анотація:

Abstract This paper presents an analysis for a multi-stage Low Noise Amplifier (LNA) for application on deep brain stimulation. A low noise amplifier (LNA) with high gain, moderate bandwidth and reduced noise is designed and simulated using LT Spice and PTM BSIM4 CMOS models. The novel LNA circuit topology is proposed which uses a cascaded style to improve mid-band gain of an LNA. The proposed LNA achieves a gain margin which ranges between 60-67 (dB), 2X times; Phase Margin which ranges between 145 to 154 (deg), 3X times; Gain which ranges between 66 to 75 (dB), 2X times and bandwidth from kHz to MHz range. The current biasing circuit is used for enhancing stability and gain range. Also, optimal noise figure is achieved with the help of cascading input matching along with source degeneration technique.

Стилі APA, Harvard, Vancouver, ISO та ін.

11

Li, Dongze, Qingzhen Xia, Jiawei Huang, Jinwei Li, Hudong Chang, Bing Sun, and Honggang Liu. "A 4-mW Temperature-Stable 28 GHz LNA with Resistive Bias Circuit for 5G Applications." Electronics 9, no. 8 (July 30, 2020): 1225. http://dx.doi.org/10.3390/electronics9081225.

Повний текст джерела

Анотація:

This paper presents a low power two-stage single-end (SE) 28 GHz low-noise amplifier (LNA) in 90 nm silicon-on-insulator (SOI) CMOS technology for 5G applications. In this design, the influence of bias circuit is discussed. The 1200 Ω resistor which was adopted in bias circuit can feed DC voltage as well as keep whole circuit unconditionally stable. The gate bias points are set to 0.55 V to make the circuit low-power and temperature-stable. Measurement results illustrated that the LNA achieved a maximum small signal gain of 18.1 dB and an average 3.1 dB noise figure (NF) in operating frequency band. Measured S11 was below −10 dB between 25 GHz and 29 GHz and reverse isolation S12 was below −25 dB throughout the band. It consumed only 4 mW by proper selection of bias point with core area of 0.16 mm2 without pads. The fabricated LNA has demonstrated a gain variation of 3 dB and a NF variation of 1.9 dB from −40 °C to 125 °C with power variation of 0.8 mW. It suggests that the proposed SOI CMOS LNA can be a promising candidate for 5G applications.

Стилі APA, Harvard, Vancouver, ISO та ін.

12

Heidari Jobaneh, Hemad. "The Design of an Ultralow-Power Ultra-wideband (5 GHz–10 GHz) Low Noise Amplifier in 0.13 μm CMOS Technology". Active and Passive Electronic Components 2020 (30 березня 2020): 1–12. http://dx.doi.org/10.1155/2020/8537405.

Повний текст джерела

Анотація:

The calculation and design of an ultralow-power Low Noise Amplifier (LNA) are proposed in this paper. The LNA operates from 5 GHz to 10 GHz, and forward body biasing technique is used to bring down power consumption of the circuit. The design revolves around precise calculations related to input impedance, output impedance, and the gain of the circuit. MATLAB and Advanced Design System (ADS) are utilized to design and simulate the LNA. In addition, TSMC 0.13 μm CMOS process is used in ADS. The LNA is biased with two different voltage supplies in order to reduce power consumption. Noise Figure (NF), input matching (S11), gain (S21), IIP3, and power dissipation are 1.46 dB–2.27 dB, −11.25 dB, 13.82 dB, −8.5, and 963 μW, respectively.

Стилі APA, Harvard, Vancouver, ISO та ін.

13

Shin, Low Wen, and Arjuna Marzuki . "5GHz MMIC LNA Design Using Particle Swarm Optimization." Information Management and Business Review 5, no. 6 (June 30, 2013): 257–62. http://dx.doi.org/10.22610/imbr.v5i6.1050.

Повний текст джерела

Анотація:

This research presents an optimization study of a 5 GHz Monolithic Microwave Integrated Circuit (MMIC) design using Particle Swarm Optimization (PSO). MMIC Low Noise Amplifier (LNA) is a type of integrated circuit device used to capture signal operating in the microwave frequency. This project consists of two stages: implementation of PSO using MATLAB and simulation of MMIC design using Advanced Design System (ADS). PSO model that mimics the biological swarm behavior is developed to optimize the MMIC design variables in order to achieve the required circuit performance and specifications such as power gain, noise figure, drain current and circuit stability factor. Simulation results show that the proposed MMIC design fulfills the circuit stability factor and achieves a power gain of 19.73dB, a noise figure of 1.15 dB and a current of 0.0467A.

Стилі APA, Harvard, Vancouver, ISO та ін.

14

Hidayat, M. Reza, Ilham Pazaesa, and Salita Ulitia Prini. "Analytical Performance of Low Noise Amplifier Using Single-Stage Configuration for ADS-B Receiver." Jurnal Elektronika dan Telekomunikasi 21, no. 2 (December 31, 2021): 91. http://dx.doi.org/10.14203/jet.v21.91-97.

Повний текст джерела

Анотація:

Automatic dependent surveillance-broadcast (ADS-B) is an equipment of a radar system to reach difficult areas. For radar applications, an ADS-B requires a low noise amplifier (LNA) with high gain, stability, and a low noise figure. In this research, to produce an LNA with good performance, an LNA was designed using a BJT transistor 2SC5006 with DC bias, VCE = 3 V, and current Ic = 10 mA, also a DC supply with VCC = 12 V, to achieve a high gain with a low noise figure. The initial LNA impedance circuit was simulated using 2 elements and then converted into 3 elements to obtain parameters according to the target specification through the tuning process, impedance matching circuit was used to reduce return loss and voltage standing wave ratio (VSWR) values. The LNA sequence obtains the working frequency of 1090 MHz, return loss of -52.103 dB, a gain of 10.382, VSWR of 1.005, a noise figure of 0.552, stability factor of 0.997, and bandwidth of 83 MHz. From the simulation results, the LNA has been successfully designed according to the ADS-B receiver specifications.

Стилі APA, Harvard, Vancouver, ISO та ін.

15

Agarwal, Nitin, Manish Gupta, and Manish Kumar. "AN EXTENSIVE REVIEW ON: LOW NOISE AMPLIFIER FOR MILLIMETER AND RADIO FREQUENCY WAVES." Jurnal Teknologi 84, no. 1 (November 27, 2021): 231–39. http://dx.doi.org/10.11113/jurnalteknologi.v84.16524.

Повний текст джерела

Анотація:

In today’s world, radio receiver system is a prevailing wireless technology in that the major part is Low Noise Amplifier (LNA) which widely used to improve weak signals in many applications with millimeter and radio frequency waves such as optical communication, multimode transceivers and measurement instrumentations. The real drawbacks of LNA is that it fails to maintain specific properties in critical conditions like as minimum power consumption, provide low noise figure, input matching and linearity. Additionally, promoted by various application demands, design methods and control methods must require to improve performance of LNA. The performance of LNA can be improved by adding extra components in basic circuit by proper arrangement for millimeter and radio frequency waves. The review paper provides information about design methodology, optimization techniques and control techniques. The different design of LNA is reviewed and analyzed such as 3-stage near-mm Wave LNA, 5-stage near-mm Wave LNA, common-gate amplifier, shunt-feedback amplifier, Resistor-terminated common-source amplifier, Traditional inductor-less amplifiers, cascode connection and double common source. This review paper also provides the information about design circuit diagram. The performance improvement of LNA can be achieved with the help of different techniques and our review based on optimization and control techniques with parameter tuning. Finally, the direction for the future study is presented based on review analysis of LNA.

Стилі APA, Harvard, Vancouver, ISO та ін.

16

Yang, Hsin Chia, and Mu Chun Wang. "Extensive 6.0-18.0 GHz Frequency Low Noise Amplifiers Integrated to Form LC-Feedback Oscillators." Advanced Materials Research 225-226 (April 2011): 1075–79. http://dx.doi.org/10.4028/www.scientific.net/amr.225-226.1075.

Повний текст джерела

Анотація:

Low Voltage supplied radio-frequency (RF) CMOS devices by TSMC 0.18 micron process are used for the RF circuit designs of low noise amplifiers. Three components, low noise amplifiers (LNA), Class-E power amplifiers (PA), and LC oscillator simultaneously working at 6.0 to 18.0 GHz, are explored. The scenario combining two matched amplifiers, LNA and PA, and then amplifying the coupled signals from the oscillators is proven to be working. LNA usually runs prior to PA to suppress the noises, and thus the whole set functions like an integrated LNA, whose forward gain may be promoted as high as at least over 40 dB just as expected. At 6.0, 12.0 and 18.0 GHz, magnitudes of both S11 and S22 in the Smith Chart are deliberately tuned to approach to zero as shown. And Noise Figure determined to be 1.175 gives promising integrated circuit.

Стилі APA, Harvard, Vancouver, ISO та ін.

17

Lee, Lini, Roslina Mohd Sidek, Sudhanshu Shekhar Jamuar, and Sabira Khatun. "Cascode Current Mirror for a Variable Gain Stage in a 1.8 GHz Low Noise Amplifier (LNA)." ECTI Transactions on Electrical Engineering, Electronics, and Communications 6, no. 1 (January 25, 2007): 47–52. http://dx.doi.org/10.37936/ecti-eec.200861.171760.

Повний текст джерела

Анотація:

A high frequency CMOS variable gain low noise amplifier (VGLNA) constructed based on an inductive source degenerated LNA and a cascode current mirror is proposed. The 'variable' concept is to prevent the unwanted saturation phenomenon due to large input signal. A cascode current mirror cell which consumes minimal voltage headroom without sacrificing the accuracy of the circuit is proposed in the circuit. With a 0.18 m CMOS technology, this technique is applied on a VGLNA operating at 1.8 GHz for GSM band application. The simulation results reveal that the maximum gain is 17.29 dB with gain tuning range of 9.56 dB. The noise ¯gure (NF) is less than 0.92 dB with the power consumption of 9.34 mW at power supply of 1.8 V. Comparison with several same operating frequency LNA circuits published show that this work demonstrated among the lowest NF and highest IIP3 with compromise on the gain.

Стилі APA, Harvard, Vancouver, ISO та ін.

18

Shrestha, Bijaya. "Design of Low Noise Amplifier for 1.5 GHz." SCITECH Nepal 13, no. 1 (September 30, 2018): 40–47. http://dx.doi.org/10.3126/scitech.v13i1.23500.

Повний текст джерела

Анотація:

Low Noise Amplifier (LNA) is a front-end device of a radio frequency (RF) receiver used to increase the amplitude of an RF signal without much additional noise, thereby increasing the noise figure of the system. This paper presents design, simulation, and prototype of an LNA operating at 1.5 GHz for the bandwidth of 100 MHz. The circuit was simulated using Advanced Design System (ADS). The components used are Surface Mount Devices (SMDs); with transistor "Infineon BFP420" as a major component. Other components are resistors, capacitors, and inductors; inductors being superseded by microstrip lines. The circuit was fabricated on FR4 board. The measurements of several parameters of LNA were made using Vector Network Analyzer (VNA), Noise Figure Meter; and Spectrum Analyzer. The LNA has minimum gain of 15.4 dB and maximum noise figure of 1.33 dB. It is unconditionally stable from 50 MHz to 10 GHz. DC supply is 5V and the current consumption is 10 mA. This LNA offers Output-ThirdOrder-Intercept-Point (OJP3) of about 1 4 dBm.

Стилі APA, Harvard, Vancouver, ISO та ін.

19

Muhamad, Maizan, Norhayati Soin, and Harikrishnan Ramiah. "Linearity improvement of differential CMOS low noise amplifier." Indonesian Journal of Electrical Engineering and Computer Science 14, no. 1 (April 1, 2019): 407. http://dx.doi.org/10.11591/ijeecs.v14.i1.pp407-412.

Повний текст джерела

Анотація:

This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of -34.33 dB, S12 of −37.09 dB and IIP3 of -7.79 dBm.

Стилі APA, Harvard, Vancouver, ISO та ін.

20

Ghosh, Sumalya, Bishnu Prasad De, K. B. Maji, R. Kar, D. Mandal, and A. K. Mal. "Optimal Design of Ultra-Low-Power 2.4 GHz LNA for IEEE 802.15.4/Bluetooth Applications." Journal of Circuits, Systems and Computers 29, no. 16 (June 30, 2020): 2050261. http://dx.doi.org/10.1142/s0218126620502618.

Повний текст джерела

Анотація:

In this paper, an evolutionary computation-based optimal design of low power, high gain inductive source degenerated CMOS cascode low noise amplifier (LNA) circuit is presented for 2.4[Formula: see text]GHz frequency. The main challenge for the design of radio frequency (RF) LNAs at nanometer range is the thermal noise generated in the short-channel MOSFETs. The short-channel effects (SCEs), such as velocity saturation and channel-length modulation, are considered for the design of CMOS LNA. The evolutionary algorithm taken for this work is Moth-Flame Optimization (MFO) algorithm. MFO is utilized for the optimization of noise figure (NF) while satisfying all the other design performance parameters like gain, matching parameters at input/output, power dissipation, linearity, stability. Optimal values of the sizes of the transistors and other design parameters in designing the LNA circuit are also obtained from the MFO algorithm. The CMOS LNA circuit is designed by using MFO-based optimal design parameters in CADENCE software with a standard 0.18[Formula: see text][Formula: see text]m CMOS process. The designed LNA shows a gain of 15.28[Formula: see text]dB, NF of 0.376[Formula: see text]dB, the power dissipation of 936[Formula: see text][Formula: see text]W and IIP3 of [Formula: see text][Formula: see text]dBm at 2.4[Formula: see text]GHz. The designed LNA achieves better trade-off which results in an FOM of 42.3[Formula: see text]mW[Formula: see text] and may be useful in the receiver module of IEEE 802.15.4 for WLAN applications.

Стилі APA, Harvard, Vancouver, ISO та ін.

21

Muhamad, Maizan, Hanim Hussin, and Norhayati Soin. "Design of 130nm RFCMOS differential low noise amplifier." Indonesian Journal of Electrical Engineering and Computer Science 19, no. 1 (July 1, 2020): 172. http://dx.doi.org/10.11591/ijeecs.v19.i1.pp172-177.

Повний текст джерела

Анотація:

In this paper, an inductively degenerated CMOS differential low noise amplifier circuit topology is presented. This low noise amplifier is intended to be used for wireless LAN application. The differential low noise amplifier proposed provide high gain, low noise and large superior out of band IIP3. The LNA is designed in 130 nm CMOS technology. Simulated results of gain and NF at 2.4GHz are 20.46 dB and 2.59 dB, respectively. While the simulated S11 and S22 are −11.18 dB and −9.49 dB, respectively. The IIP3 is −9.05 dBm. The LNA consumes 3.4 mW power from 1.2V supply.

Стилі APA, Harvard, Vancouver, ISO та ін.

22

Ibrahim, Abu Bakar, Che Zalina Zulkifli, Shamsul Arrieya Ariffin, and Nurul Husna Kahar. "High frequency of low noise amplifier architecture for WiMAX application: A review." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 3 (June 1, 2021): 2153. http://dx.doi.org/10.11591/ijece.v11i3.pp2153-2164.

Повний текст джерела

Анотація:

The low noise amplifier (LNA) circuit is exceptionally imperative as it promotes and initializes general execution performance and quality of the mobile communication system. LNA's design in radio frequency (R.F.) circuit requires the trade-off numerous imperative features' including gain, noise figure (N.F.), bandwidth, stability, sensitivity, power consumption, and complexity. Improvements to the LNA's overall performance should be made to fulfil the worldwide interoperability for microwave access (WiMAX) specifications' prerequisites. The development of front-end receiver, particularly the LNA, is genuinely pivotal for long-distance communications up to 50 km for a particular system with particular requirements. The LNA architecture has recently been designed to concentrate on a single transistor, cascode, or cascade constrained in gain, bandwidth, and noise figure.

Стилі APA, Harvard, Vancouver, ISO та ін.

23

Yu, Bing Liang, Xiao Ning Xie та Wen Yuan Li. "A Full Integrated LNA in 0.18μm SiGe BiCMOS Technology". Applied Mechanics and Materials 380-384 (серпень 2013): 3287–91. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3287.

Повний текст джерела

Анотація:

A fully integrated low noise amplifier (LNA) for wireless local area network (WLAN) application is presents. The circuit is fabricated in 0.18μm SiGe BiCMOS technology. For the low noise figure, a feedback path is introduced into the traditional inductively degenerated common emitter cascade LNA, which decreases the inductance for input impedance matching, therefore reduces the thermal noise caused by loss resistor. Impedance matching and noise matching are achieved at the same time. Measured results show that the resonance point of the output resonance network shifts from 2.4GHz to 2.8GHz, due to the parasitic effects at the output. At the frequency of 2.8GHz, the LNA achieves 2.2dB noise figure, 19.4dB power gain. The core circuit consumes only 13mW from a 1.8V supply and occupies less than 0.5mm2.

Стилі APA, Harvard, Vancouver, ISO та ін.

24

Sim, Taejoo, Dong-min Lee, Wansik Kim, Kichul Kim, Jeung Won Choi, Min-Su Kim та Junghyun Kim. "High-Q Transformer Neutralization Technique for W-Band Dual-Band LNA Using 0.1 μm GaAs pHEMT Technology". Journal of Electromagnetic Engineering and Science 23, № 6 (30 листопада 2023): 482–89. http://dx.doi.org/10.26866/jees.2023.6.r.193.

Повний текст джерела

Анотація:

In this study, a dual-band low-noise amplifier (LNA) was implemented by applying a transformer-based neutralization technology to the W-band. Incorporating the neutralization technique was difficult owing to performance degradation in the W-band. However, circuit performance was enhanced thanks to the layout optimization of transformer-based neutralization networks, and the improved operation was confirmed in the W-band. The neutralization technique was implemented in four stages with a 0.1-μm gallium arsenide (GaAs) pseudomorphic high-electron-mobility-transistor monolithic microwave integrated circuit LNA. The LNA showed small signal gains of 20.3 dB and 21.7 dB and noise figures of 5.0 dB and 6.4 dB (at 84 GHz and 96 GHz, respectively) while consuming 46 mW from a 1-V supply.

Стилі APA, Harvard, Vancouver, ISO та ін.

25

Uzzal, Mohammad Mohiuddin. "Design, simulation and optimization of a single stage Low Noise Amplifier (LNA) for very low power L- Band satellite handheld applications." AIUB Journal of Science and Engineering (AJSE) 17, no. 2 (July 31, 2018): 37–42. http://dx.doi.org/10.53799/ajse.v17i2.7.

Повний текст джерела

Анотація:

In first stage of each microwave receiver, there is a Low Noise Amplifier (LNA) stage, and this LNA plays an important role to determine the quality factor of the receiver. The design of a LNA requires the trade-off of many important parameters including gain, Noise Figure (NF), stability, power consumption, cost and design complexity. In this paper, we have designed and simulate a single stage stable LNA circuit having gain 11.78 dB and noise figure 1.86 dB using microwave BJT AT3103 with Agilent package Advance Design Systems (ADS). This LNA operates at center frequency of 2 GHZ and it can be used in L-Band satellite modem for tracking applications.

Стилі APA, Harvard, Vancouver, ISO та ін.

26

Huang, Chaoyu, Zhihao Zhang, Xinjie Wang, Hailiang Liu, and Gary Zhang. "An MMIC LNA for Millimeter-Wave Radar and 5G Applications with GaN-on-SiC Technology." Sensors 23, no. 14 (July 22, 2023): 6611. http://dx.doi.org/10.3390/s23146611.

Повний текст джерела

Анотація:

This paper presents a monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) that is compatible with n257 (26.5–29.5 GHz) and n258 (24.25–27.5 GHz) frequency bands for fifth-generation mobile communications system (5G) and millimeter-wave radar. The total circuit size of the LNA is 2.5 × 1.5 mm2. To guarantee a trade-off between noise figure (NF) and small signal gain, the transmission lines are connected to the source of gallium nitride (GaN)-on-SiC high electron mobility transistors (HEMT) by analyzing the nonlinear small signal equivalent circuit. A series of stability enhancement measures including source degeneration, an RC series network, and RF choke are put forward to enhance the stability of designed LNA. The designed GaN-based MMIC LNA adopts hybrid-matching networks (MNs) with co-design strategy to realize low NF and broadband characteristics across 5G n257 and n258 frequency band. Due to the different priorities of these hybrid-MNs, distinguished design strategies are employed to benefit small signal gain, input-output return loss, and NF performance. In order to meet the testing conditions of MMIC, an impeccable system for measuring small has been built to ensure the accuracy of the measured results. According to the measured results for small signal, the three-stage MMIC LNA has a linear gain of 18.2–20.3 dB and an NF of 2.5–3.1 dB with an input–output return loss better than 10 dB in the whole n257 and n258 frequency bands.

Стилі APA, Harvard, Vancouver, ISO та ін.

27

Hu, Lian, Ziqiang Yang, Yuan Fang, Qingfeng Li, Yixuan Miao, Xiaofeng Lu, Xuechun Sun, and Yaxin Zhang. "A 110–170 GHz Wideband LNA Design Using the InP Technology for Terahertz Communication Applications." Micromachines 14, no. 10 (October 10, 2023): 1921. http://dx.doi.org/10.3390/mi14101921.

Повний текст джерела

Анотація:

This paper proposes a low-noise amplifier (LNA) for terahertz communication systems. The amplifier is designed based on 90 nm InP high-electron-mobility transistor (HEMT) technology. In order to achieve high gain of LNA, the proposed amplifier adopts a five-stage amplification structure. At the same time, the use of staggered tuning technology has achieved a large bandwidth of terahertz low-noise amplification. In addition, capacitors are used for interstage isolation, sector lines are used for RF bypass, and Microstrip is used to design matching circuits. The entire LNA circuit was validated using accurate electromagnetic simulation. The simulation results show that at 140 GHz, the small signal gain is 25 dB, the noise figure is 4.4 dB, the input 1 dB compression point is −19 dBm, and the 3 dB bandwidth reaches 60 GHz (110–170 GHz), which validates the effectiveness of the design.

Стилі APA, Harvard, Vancouver, ISO та ін.

28

Bouraoui, Mariem, Amel Neifar, Imen Barraj, and Mohamed Masmoudi. "A Low-Power WLAN CMOS LNA for Wireless Sensor Network Wake-Up Receiver Applications." Journal of Sensors 2023 (May 5, 2023): 1–11. http://dx.doi.org/10.1155/2023/7753558.

Повний текст джерела

Анотація:

Wireless communication integration is related to many challenges such as reliability, quality of service, communication range, and energy consumption. As the overall performance of wireless sensor networks (WSN) will be improved if the capacity of each sensor node is optimized, several techniques are used to fine-tune the various circuits of each node. In recent works, the wake-up receiver nodes have been introduced to minimize latencies without increasing energy consumption. To overcome the sensitivity of wake-up receiver limitations, a design of a low-noise amplifier (LNA) with several design specifications is required. This article discusses the relevance of the wake-up receiver in WSN applications and provides a brief study of this component. An LNA design for WSN wake-up receiver applications is presented. The challenging task of the LNA design is to provide equitable trade-off performances such as noise figure, gain, power consumption, impedance matching, and linearity. The LNA circuit is designed for wireless personal area network (WLAN) standards utilizing RF-TSMC CMOS 0.18 μm. Two innovative techniques are applied to the LNA topology to improve its performance: forward body biasing is used to reduce power consumption by 11.43 mW, and substrate resistance is added to reduce noise by 1.8 dB. The developed LNA achieves a noise figure of 1.6 dB and a power gain of 21.7 dB at 5.2 GHz. At 0.6 V, the designed LNA dissipates 0.87 mW.

Стилі APA, Harvard, Vancouver, ISO та ін.

29

Kim, Bruce, and Sang-Bock Cho. "A Secure Tunable LNA Design for Internet of Things." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000705–8. http://dx.doi.org/10.4071/isom-2017-thp22_138.

Повний текст джерела

Анотація:

Abstract This paper describes the design of through-silicon via (TSV)-based inductors for a secure tunable low-noise amplifier (LNA) in Internet of Things (IoT) devices. To improve cybersecurity infrastructure, we designed a tunable LNA with hardware security. Our secure design for tunable LNA uses a ring oscillator-based physically unclonable function (PUF) circuit. For the 3D inductors, we use ferromagnetic materials to achieve high inductance with a good quality factor.

Стилі APA, Harvard, Vancouver, ISO та ін.

30

SODA, Masaaki, Ningyi WANG, and Michio YOTSUYANAGI. "Low-Voltage Operational Active Inductor for LNA Circuit." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E93-A, no. 12 (2010): 2609–15. http://dx.doi.org/10.1587/transfun.e93.a.2609.

Повний текст джерела

Стилі APA, Harvard, Vancouver, ISO та ін.

31

Kamiyama, Masataka, Daiki Oki, Satoru Kawauchi, Cong Bing Li, Nobuo Takahashi, Seiichi Banba, Toru Dan, and Haruo Kobayashi. "Triple-Band CMOS Low Noise Amplifier Design Utilizing Transformer Couplings." Key Engineering Materials 698 (July 2016): 142–48. http://dx.doi.org/10.4028/www.scientific.net/kem.698.142.

Повний текст джерела

Анотація:

This paper describes multi-band low noise amplifiers (LNAs) utilizing input matching transformers. We investigate a conventional dual-band LNA circuit utilizing a transformer, and show our analysis and simulation results for its circuit. Based on this, we propose a triple band LNA with transformers. We have calculated characteristics of the dual-band and triple-band LNAs. As the results, the LNAs show gain of 20dB while maintaining good input matching, in the frequencies at 2.59GHz, 3.50GHz and 5.41 GHz. Then we discuss configuration and design of coupling coefficients of the transformers.

Стилі APA, Harvard, Vancouver, ISO та ін.

32

Singh, Rashmi, and Rajesh Mehra. "Low Noise Amplifier using Darlington Pair At 90nm Technology." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 4 (August 1, 2018): 2054. http://dx.doi.org/10.11591/ijece.v8i4.pp2054-2062.

Повний текст джерела

Анотація:

The demand of low noise amplifier (LNA) has been rising in today’s communication system. LNA is the basic building circuit of the receiver section satellite. The design concept demonstrates the design trade off with NF, gain, power consumption. This paper reports on with analysis of wideband LNA. This paper shows the schematic of LNA by using Darlington pair amplifier. This LNA has been fabricated on 90nm CMOS process. This paper is focused on to make comparison of three stage and single stage LNA. Here, the phase mismatch between these patameters is quantitavely analyzed to study the effect on gain and noise figure (NF). In this paper, single stage LNA has shown the 23 dB measured gain, while the three stages LNA has demonstrated 29 dB measured gain. Here, LNA designed using darlington pair shows low NF of 3.3-4.8 dB, which comparable to other reported single stage LNA designs and appreciably low compared to the three stages LNA. Hence, findings from this paper suggest the use of single stage LNA designed using Darlington pair in transceiver satellite applications.

Стилі APA, Harvard, Vancouver, ISO та ін.

33

Aneja, Aayush, and Xue Li. "Design and Analysis of a Continuously Tunable Low Noise Amplifier for Software Defined Radio." Sensors 19, no. 6 (March 13, 2019): 1273. http://dx.doi.org/10.3390/s19061273.

Повний текст джерела

Анотація:

This paper presents the design and analysis of a continuously tunable low noise amplifier (LNA) with an operating frequency from 2.2 GHz to 2.8 GHz. Continuous tuning is achieved through a radio frequency impedance transformer network in the input matching stage. The proposed circuit consists of four stages, namely transformer stage, tuning stage, phase shifter and gain stage. Frequency tuning is controlled by varying output current through bias voltage of tuning stage. The circuit includes an active phase shifter in the feedback path of amplifier to shift the phase of the amplified signal. Phase shift is required to further achieve tunability through transformer. The LNA achieves a maximum simulated gain of 18 dB. The LNA attains a perfect impedance match across the tuning range with stable operation. In addition, it achieves a minimum noise figure of 1.4 dB.

Стилі APA, Harvard, Vancouver, ISO та ін.

34

Xiang, Yong, Yan Bin Luo, Ren Jie Zhou, and Cheng Yan Ma. "A Low Noise Amplifier with 1.1dB Noise Figure and +17dBm OIP3 for GPS RF Receivers." Applied Mechanics and Materials 336-338 (July 2013): 1490–95. http://dx.doi.org/10.4028/www.scientific.net/amm.336-338.1490.

Повний текст джерела

Анотація:

A 1.575GHz SiGe HBT(heterojunction bipolar transistor) low-noise-amplifier(LNA) optimized for Global Positioning System(GPS) L1-band applications was presented. The designed LNA employed a common-emitter topology with inductive emitter degeneration to simultaneously achieve low noise figure and input impedance matching. A resistor-bias-feed circuit with a feedback resistor was designed for the LNA input transistor to improve the gain compression and linearity performance. The LNA was fabricated in a commercial 0.18µm SiGe BiCMOS process. The LNA achieves a noise figure of 1.1dB, a power gain of 19dB, a input 1dB compression point(P1dB) of -13dBm and a output third-order intercept point(OIP3) of +17dBm at a current consumption of 3.6mA from a 2.8V supply.

Стилі APA, Harvard, Vancouver, ISO та ін.

35

Manjula, J., and A. Ruhan Bevi. "A 79GHz Adaptive Gain Low Noise Amplifier for Radar Receivers." International Journal of Engineering & Technology 7, no. 2.24 (April 25, 2018): 227. http://dx.doi.org/10.14419/ijet.v7i2.24.12037.

Повний текст джерела

Анотація:

This paper presents an Adaptive Gain 79GHz Low Noise Amplifier (LNA) suitable for Radars applications. The circuit schematic is a two stage LNA consists of Differential cascode configuration followed by a simple common source amplifier with an Adaptive Biasing (ADB) circuit. Adaptive biasing is a three- stage common source amplifier to decrease output voltage as input power increases. The circuit is simulated in 180nm CMOS technology and the simulation results have proved that the circuit operates at the center frequency 79GHz with adaptive biasing for adaptive gain. The gain analysis shows a decrease of 35-30dB with an increase in input power -50 to 0 dB. At 79GHz the circuit has achieved the input reflection coefficient (S11) of -24.7dB, reverse isolation (S12) of -3 dB, forward transmission coefficient (S21) of -2.97dB and output reflection coefficient (S22) of -5.62 dB with the reduced noise figure of 0.9 dB and a power consumption of 236 mW.

Стилі APA, Harvard, Vancouver, ISO та ін.

36

Zhang, Meng, Zhong Fang, Yu Hao, Wei Du, Xuchao Pan, Junjie Jiao, and Yong He. "Research on Electromagnetic Damage Effects in Navigation Receiver by PCI Testing." Advances in Engineering Technology Research 8, no. 1 (October 7, 2023): 294. http://dx.doi.org/10.56028/aetr.8.1.294.2023.

Повний текст джерела

Анотація:

The EMP couples with electronic devices via cables, inducing electromagnetic damage effects. This paper elucidates the operational principles of a navigation receiver and simplifies the study by focusing on the radio frequency front-end module. Many PCI tests were conducted on its signal input port, yielding the damage threshold of the navigation receiver. An analysis of the output waveforms of the modules that incurred damage was also performed. Through infrared research, it was discovered that the damaged LNA experiences a rapid temperature rise to around 73°C during operation with applied power. The electromagnetic damage effect in the LNA primarily stems from internal MOS transistor short circuits. The BPF protects the subsequent circuit stages but is also susceptible to damage.

Стилі APA, Harvard, Vancouver, ISO та ін.

37

Malz, Stefan, Bernd Heinemann, Rudolf Lachner та Ullrich R. Pfeiffer. "J-band amplifier design using gain-enhanced cascodes in 0.13 μm SiGe". International Journal of Microwave and Wireless Technologies 7, № 3-4 (26 травня 2015): 339–47. http://dx.doi.org/10.1017/s175907871500080x.

Повний текст джерела

Анотація:

This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at high-frequencies and with improved efficiency, while maintaining unconditional stability. The SSA was fabricated in a SiGe BiCMOS technology by Infineon with fT/fmax values of 250/360 GHz. It has measured 19.5 dB gain at 212 GHz with a 3 dB bandwidth of 21 GHz. It draws 65 mA from a 3.3 V supply. On the other hand, a LNA was designed in a SiGe BiCMOS technology by IHP with fT/fmaxof 300/450 GHz. The LNA has measured 22.5 dB gain at 233 GHz with a 3 dB bandwidth of 10 GHz and a simulated noise figure of 12.5 dB. The LNA draws only 17 mA from a 4 V supply. The design methodology, which led to these record results, is described in detail with the LNA as an example.

Стилі APA, Harvard, Vancouver, ISO та ін.

38

Sawarkar, Kishor G., and Kushal R. Tuckley. "Negative image amplifier technique for performance enhancement of ultra wideband LNA." International Journal of Electrical and Computer Engineering (IJECE) 9, no. 1 (February 1, 2019): 221. http://dx.doi.org/10.11591/ijece.v9i1.pp221-230.

Повний текст джерела

Анотація:

The paper aims at designing of two stage cascaded ultra-wideband (UWB) low noise amplifier (LNA) by using negative image amplifier technique. The objective of this article is to show the performance improvement using negative image amplifier technique and realization of negative valued lumped elements into microstrip line geometry. The innovative technique to realize the negative lumped elements are carried out by using Richard’s Transformation and transmission line calculation. The AWR microwave office tool is used to obtain characteristics of UWB LNA design with hybrid microwave integrated circuit (HMIC) technology. The 2-stage cascaded LNA design using negative image amplifier technique achieves average gain of 23dB gain and low noise figure of less than 2dB with return loss less than -8dB for UWB 3-10GHz. The Proper bias circuit is extracted using DC characteristics of transistor at biasing point 2V, 20mA and discussed in detail with LNA layout. The negative image matching technique is applied for both input and output matching network. This work will be useful for all low power UWB wireless receiver applications.

Стилі APA, Harvard, Vancouver, ISO та ін.

39

Wang, Shengjie, Fuxue Yan, Yishu Sun, Yang Zhang, and Jun Lin. "Research on Low Noise Chopping Amplifier Circuit Based on Feedback Regulation." Journal of Physics: Conference Series 2651, no. 1 (December 1, 2023): 012150. http://dx.doi.org/10.1088/1742-6596/2651/1/012150.

Повний текст джерела

Анотація:

Abstract In order to overcome the limitation of 1/f noise on long-period magnetotelluric sensors, it is necessary to use low-noise chopping technology for signal conditioning. However, the static operating point drift of Junction Field-Effect Transistor (JFET) is difficult to achieve stable amplification with the chopper technology. This paper proposes a low noise amplifier (LNA) with chopper technology based on feedback adjustment. The LNA reduces the turning frequency of the circuit, and maintains the JFET static point. At 375mHz, its noise is 2.55 nV / Hz .

Стилі APA, Harvard, Vancouver, ISO та ін.

40

Galante-Sempere, David, Javier del Pino, Sunil Lalchand Khemchandani, and Hugo García-Vázquez. "Miniature Wide-Band Noise-Canceling CMOS LNA." Sensors 22, no. 14 (July 13, 2022): 5246. http://dx.doi.org/10.3390/s22145246.

Повний текст джерела

Анотація:

In this paper, a wide-band noise-canceling (NC) current conveyor (CC)-based CMOS low-noise amplifier (LNA) is presented. The circuit employs a CC-based approach to obtain wide-band input matching without the need for bulky inductances, allowing broadband performance with a very small area used. The NC technique is applied by subtracting the input transistor’s noise contribution to the output and achieves a noise figure (NF) reduction from 4.8 dB to 3.2 dB. The NC LNA is implemented in a UMC 65-nm CMOS process and occupies an area of only 160 × 80 μm2. It achieves a stable frequency response from 0 to 6.2 GHz, a maximum gain of 15.3 dB, an input return loss (S11) < −10 dB, and a remarkable IIP3 of 7.6 dBm, while consuming 18.6 mW from a ±1.2 V DC supply. Comparisons with similar works prove the effectiveness of this new implementation, showing that the circuit obtains a noteworthy performance trade-off.

Стилі APA, Harvard, Vancouver, ISO та ін.

41

FATHIANPOUR, A., and S. SEYEDTABAII. "EVOLUTIONARY SEARCH FOR OPTIMIZED LNA COMPONENTS GEOMETRY." Journal of Circuits, Systems and Computers 23, no. 01 (January 2014): 1450011. http://dx.doi.org/10.1142/s021812661450011x.

Повний текст джерела

Анотація:

In this paper, an optimized design procedure based on genetic algorithm (GA) for automatic synthesis of dual-band concurrent fully integrated low-noise amplifiers (LNA) targeted to 802.16d @ 3.5 GHz and 802.11b, g @ 2.4 GHz standards is discussed. The algorithm delivers the circuit elements geometry, rather than their values, and bias levels to secure the best level of LNA gain, input matching, output matching and power consumption. Working on the components geometry level aims at considering the elements parasitic effects. The basic cascode and a current reuse folded cascode LNA's are tried. GA as an optimization engine is programmed in MATLAB and performance evaluation in 0.18 μm RF CMOS TSMC technology is ceded to HSPICE. Results indicate that the automated scheme well computes the desired circuit in an acceptable time span; otherwise, it may be explored by either tremendous manual trial and error or astronomical cycles of an exhaustive search. This is not accomplished without imposing certain approximate search space constraints.

Стилі APA, Harvard, Vancouver, ISO та ін.

42

Yin, Xin, Yi Yao, and Jin Ling Jia. "The Special Research on a Low Noise Amplifier." Advanced Materials Research 605-607 (December 2012): 2057–61. http://dx.doi.org/10.4028/www.scientific.net/amr.605-607.2057.

Повний текст джерела

Анотація:

This paper studies a low noise amplifier design method for 5.8G wireless local area network. Using the software of designing RF circuit ADS(Advanced Design System) and Avago Technologies’s ATF-36077,we designed a three-cascade LNA. In 5.725G~5.85GHz range, noise figure less than 0.5dB, more than 30dB gain, input and output standing wave ratio less than 1.3dB.The LNA meet the design requirements.

Стилі APA, Harvard, Vancouver, ISO та ін.

43

Li, Di, Chunlong Fei, Qidong Zhang, Yani Li, Yintang Yang, and Qifa Zhou. "Ultrahigh Frequency Ultrasonic Transducers Design with Low Noise Amplifier Integrated Circuit." Micromachines 9, no. 10 (October 12, 2018): 515. http://dx.doi.org/10.3390/mi9100515.

Повний текст джерела

Анотація:

This paper describes the design of an ultrahigh frequency ultrasound system combined with tightly focused 500 MHz ultrasonic transducers and high frequency wideband low noise amplifier (LNA) integrated circuit (IC) model design. The ultrasonic transducers are designed using Aluminum nitride (AlN) piezoelectric thin film as the piezoelectric element and using silicon lens for focusing. The fabrication and characterization of silicon lens was presented in detail. Finite element simulation was used for transducer design and evaluation. A custom designed LNA circuit is presented for amplifying the ultrasound echo signal with low noise. A Common-source and Common-gate (CS-CG) combination structure with active feedback is adopted for the LNA design so that high gain and wideband performances can be achieved simultaneously. Noise and distortion cancelation mechanisms are also employed in this work to improve the noise figure (NF) and linearity. Designed by using a 0.35 μm complementary metal oxide semiconductor (CMOS) technology, the simulated power gain of the echo signal wideband amplifier is 22.5 dB at 500 MHz with a capacitance load of 1.0 pF. The simulated NF at 500 MHz is 3.62 dB.

Стилі APA, Harvard, Vancouver, ISO та ін.

44

Malhotra, Ankit, and Thorsten M. Buzug. "A Summing Configuration based Low Noise Amplifier for MPI and MPS." Current Directions in Biomedical Engineering 4, no. 1 (September 1, 2018): 83–86. http://dx.doi.org/10.1515/cdbme-2018-0021.

Повний текст джерела

Анотація:

AbstractMagnetic particle imaging (MPI) is a novel tomographic imaging modality which uses static and dynamic magnetic fields to measure the magnetic response generated by superparamagnetic iron oxide nanoparticles (SPIONs). For the characterization of the SPIONs magnetic particle spectroscopy (MPS) is used. In the current research, a low noise amplifier (LNA) suitable for MPI and MPS is presented. LNA plays a significant role in the receive chain of MPI and MPS by amplifying the signals from the nanoparticles while keeping the noise induced through its own circuitry minimal. The LNA is based on the summing configuration and fabricated on a printed circuit board (PCB). Moreover, the prototyped LNA is compared with a commercially available pre-amplifier. The input voltage noise of the prototyped LNA with a receiving coil of series resistance of 0.551 mΩ and an inductance of 130 μH is 561 pV/√Hz with a noise figure (NF) of 11.57 dB.

Стилі APA, Harvard, Vancouver, ISO та ін.

45

Kalra, Dheeraj, Vishal Goyal, Manish Kumar, and Mayank Srivastava. "Mutually coupled CG-CS current reuse low noise amplifier architecture for 4 – 14 GHz frequency." Journal of Electrical Engineering 74, no. 3 (June 1, 2023): 177–83. http://dx.doi.org/10.2478/jee-2023-0023.

Повний текст джерела

Анотація:

Abstract The current research paper presents a design of a mutually coupled cascode Common Gate Common Source (CG-CS) Low Noise Amplifier (LNA) using current reuse technique. The proposed design provides a significant improvement in the gain and noise performance of the LNA, while also reducing power consumption. Mutually coupled inductors help in reducing the size of the circuit while transformer connected at the output provide output impedance matching. Proposed LNA simulated for the 4–14 GHz RF frequency. Mathematical analysis of proposed LNA has been analyzed using the small signal model henceforth input impedance; gain and Noise Figure (NF) have been derived from it. The design and simulation results show that the proposed LNA design with current reuse technique achieved a maximum gain of 17.87 dB, minimum NF of 5.45 dB, and input reflection coefficient less than –10 dB for the 10 GHz bandwidth. These results indicate a significant improvement in the overall performance of the LNA compared to conventional designs as Figure of Merit (FoM) is 17.34.

Стилі APA, Harvard, Vancouver, ISO та ін.

46

Huang, Shaomin, Zhongpan Yang, and Chao Hua. "A 1.4mW 900MHz LNA with Noise-Canceling Technique in 130nm CMOS Process." Journal of Circuits, Systems and Computers 27, no. 01 (August 23, 2017): 1850003. http://dx.doi.org/10.1142/s0218126618500032.

Повний текст джерела

Анотація:

A noise-canceling low noise amplifier (LNA) structure is proposed in this paper. The LNA works in the 900[Formula: see text]MHz ISM band. The techniques of noise canceling and current-reusing are proposed to improve the noise performance and reduce the power dissipation. The noise cancellation schema is realized by mutually canceling the noise currents of the common-source and common-gate amplifiers. A prototype of the LNA is designed and fabricated in a standard 130[Formula: see text]nm CMOS process. Measurement results under a 1.2[Formula: see text]V supply voltage show that the proposed LNA achieves a voltage gain of 18[Formula: see text]dB and a noise figure of 2[Formula: see text]dB. The whole circuit only consumes a power dissipation of 1.4[Formula: see text]mW.

Стилі APA, Harvard, Vancouver, ISO та ін.

47

Abbas, Mohammed Nadhim, and Farooq Abdulghafoor Khaleel. "Mixed Linearity Improvement Techniques for Ultra-wideband Low Noise Amplifier." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 4 (August 1, 2018): 2038. http://dx.doi.org/10.11591/ijece.v8i4.pp2038-2045.

Повний текст джерела

Анотація:

We present the linearization of an ultra-wideband low noise amplifier (UWB-LNA) operating from 2GHz to 11GHz through combining two linearization methods. The used linearization techniques are the combination of post-distortion cancellation and derivative-superposition linearization methods. The linearized UWB-LNA shows an improved linearity (IIP3) of +12dBm, a minimum noise figure (NFmin.) of 3.6dB, input and output insertion losses (S11 and S22) below -9dB over the entire working bandwidth, midband gain of 6dB at 5.8GHz, and overall circuit power consumption of 24mW supplied from a 1.5V voltage source. Both UWB-LNA and linearized UWB-LNA designs are verified and simulated with ADS2016.01 software using BSIM3v3 TSMC 180nm CMOS model files. In addition, the linearized UWB-LNA performance is compared with other recent state-of-the-art LNAs.

Стилі APA, Harvard, Vancouver, ISO та ін.

48

Kim, Bruce C., Sukeshwar Kannan, Sai Shravan Evana, and Seok-Ho Noh. "System-on-Chip Integrated MEMS Packages for RF LNA Testing and Self-Calibration." Journal of Microelectronics and Electronic Packaging 8, no. 4 (October 1, 2011): 154–63. http://dx.doi.org/10.4071/imaps.302.

Повний текст джерела

Анотація:

In this paper, we present MEMS-enhanced integrated package design which provides the capability to self-test and self-calibrate integrated circuit chips. We have developed a novel test technique where the test stimulus is generated by modulating the RF carrier signal with another signal mixed with additive white Gaussian noise. This novel test stimulus is provided as the input to the RF circuit and the peak-to-average ratio (PAR) is measured at the output. Simulations were carried out for fault-free and fault-induced circuit conditions, and their corresponding PARs were stored in the look-up table (LUT). Test simulations were performed and the results were compared with the look-up table to verify whether the device is fault-free. In faulty circuit conditions, calibration was performed using a tuning circuit made of MEMS switches. The entire validation of the design using the test technique and self-calibration of the RF circuit was automated using the calibration algorithm. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.

Стилі APA, Harvard, Vancouver, ISO та ін.

49

Chen, Wenzhe, Jaifei Yao, and Tian Xia. "A 28 GHz LNA Circuit Layout Debug through Electromagnetic Analysis." Journal of Circuits, Systems and Computers 29, no. 16 (July 6, 2020): 2050262. http://dx.doi.org/10.1142/s021812662050262x.

Повний текст джерела

Анотація:

This paper presents the debug process of a 28[Formula: see text]GHz low noise amplifier (LNA) circuit layout. This study is guided utilizing an electromagnetic (EM) simulation program where inductive coupling, the parasitics of dc voltage line and ground line are extracted and simulated, their impacts on LNA performance are also quantitatively characterized. For validation, the circuit was designed and fabricated using GF8HP 0.13[Formula: see text]um SiGe BiCMOS process. The measurement shows that the gain S21 is 23.22[Formula: see text]dB, S11 and S22 are [Formula: see text] and [Formula: see text][Formula: see text]dB, respectively, and the noise figure is 4.26[Formula: see text]dB. The power consumption is 14.25[Formula: see text]mW, the chip area including pads is 540[Formula: see text][Formula: see text][Formula: see text]um.

Стилі APA, Harvard, Vancouver, ISO та ін.

50

Cruz-Acosta, Jose Manuel, David Galante-Sempere, Sunil Lalchand Khemchandani, and Javier del Pino. "A 0.38 V Fully Differential K-Band LNA with Transformer-Based Matching Networks." Applied Sciences 13, no. 9 (April 27, 2023): 5460. http://dx.doi.org/10.3390/app13095460.

Повний текст джерела

Анотація:

The implementation of a 0.38 V K-band low-power fully differential low-noise amplifier (LNA) in a 45 nm silicon-on-insulator (SOI) process is presented. The proposed architecture employs a two-stage approach with transformer-based interstage matching networks to minimize circuit area. The proposed LNA covers the frequency range from 20.3 to 24.1 GHz, it achieves a noise figure (NF) as low as 2.2 dB, and a gain of 12.9 dB, with a power consumption of 11.7 mW from a 0.38 V DC supply in a very compact area (0.15 mm2) excluding pads. Non-linearity simulations show the proposed circuit achieves a Po1dB of −7.3 dBm, and an OIP3 (Output Third Order Intercept) of 7 dBm. The transformers allow improved area use since they are simultaneously used as matching networks, RF chokes to bias the active devices, baluns at the input and output terminals to convert the single-ended signal into differential mode, and vice versa, and facilitates the interconnection with the upcoming stages. We used a state-of-the-art tool that generates the desired inductances to perform impedance matching for a given frequency and coupling factor value. A comparison with similar works proves the proposed LNA achieves a very low NF and the lowest power consumption reported in a differential circuit.

Стилі APA, Harvard, Vancouver, ISO та ін.

Статті в журналах з теми "LNA CIRCUIT"

Оформте джерело за APA, MLA, Chicago, Harvard та іншими стилями