Статті в журналах з теми "Interconnect architectures"
Оформте джерело за APA, MLA, Chicago, Harvard та іншими стилями
Ознайомтеся з топ-50 статей у журналах для дослідження на тему "Interconnect architectures".
Біля кожної праці в переліку літератури доступна кнопка «Додати до бібліографії». Скористайтеся нею – і ми автоматично оформимо бібліографічне посилання на обрану працю в потрібному вам стилі цитування: APA, MLA, «Гарвард», «Чикаго», «Ванкувер» тощо.
Також ви можете завантажити повний текст наукової публікації у форматі «.pdf» та прочитати онлайн анотацію до роботи, якщо відповідні параметри наявні в метаданих.
Переглядайте статті в журналах для різних дисциплін та оформлюйте правильно вашу бібліографію.
Marrakchi, Zied, Hayder Mrabet, Umer Farooq, and Habib Mehrez. "FPGA Interconnect Topologies Exploration." International Journal of Reconfigurable Computing 2009 (2009): 1–13. http://dx.doi.org/10.1155/2009/259837.
Повний текст джерелаFarahani, Esmat Kishani, and Reza Sarvari. "Design of n-Tier Multilevel Interconnect Architectures by Using Carbon Nanotube Interconnects." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23, no. 10 (October 2015): 2128–34. http://dx.doi.org/10.1109/tvlsi.2014.2360713.
Повний текст джерелаHollman, Richard. "High Speed Electroplating of 200um High Cu Bumps for Die Stacking Architectures." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, DPC (January 1, 2016): 000611–30. http://dx.doi.org/10.4071/2016dpc-tp13.
Повний текст джерелаSuboh, Suboh, Vikram Narayana, Mohamed Bakhouya, Jaafar Gaber, and Tarek El‐Ghazawi. "Methodology for adapting on‐chip interconnect architectures." IET Computers & Digital Techniques 8, no. 3 (May 2014): 109–17. http://dx.doi.org/10.1049/iet-cdt.2013.0021.
Повний текст джерелаEzhumalai, P., A. Chilambuchelvan, and C. Arun. "Novel NoC Topology Construction for High-Performance Communications." Journal of Computer Networks and Communications 2011 (2011): 1–6. http://dx.doi.org/10.1155/2011/405697.
Повний текст джерелаNeumann, B., T. von Sydow, H. Blume, and T. G. Noll. "Design and quantitative analysis of parametrisable eFPGA-architectures for arithmetic." Advances in Radio Science 4 (September 6, 2006): 251–57. http://dx.doi.org/10.5194/ars-4-251-2006.
Повний текст джерелаYanushkevich, S. N., V. P. Shmerko, and B. Steinbach. "Spatial Interconnect Analysis for Predictable Nanotechnologies." Journal of Computational and Theoretical Nanoscience 5, no. 1 (January 1, 2008): 56–69. http://dx.doi.org/10.1166/jctn.2008.007.
Повний текст джерелаKrishnan, Gokul, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Umit Y. Ogras, and Yu Cao. "Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks." ACM Journal on Emerging Technologies in Computing Systems 18, no. 2 (April 30, 2022): 1–22. http://dx.doi.org/10.1145/3460233.
Повний текст джерелаGAO, Shanghua, Hiroaki YOSHIDA, Kenshu SETO, Satoshi KOMATSU, and Masahiro FUJITA. "Interconnect-Aware Pipeline Synthesis for Array-Based Architectures." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E92-A, no. 6 (2009): 1464–75. http://dx.doi.org/10.1587/transfun.e92.a.1464.
Повний текст джерелаPalaniappan, Arun, and Samuel Palermo. "Power Efficiency Comparisons of Interchip Optical Interconnect Architectures." IEEE Transactions on Circuits and Systems II: Express Briefs 57, no. 5 (May 2010): 343–47. http://dx.doi.org/10.1109/tcsii.2010.2047319.
Повний текст джерелаSnider, Gregory S., and R. Stanley Williams. "Nano/CMOS architectures using a field-programmable nanowire interconnect." Nanotechnology 18, no. 3 (January 3, 2007): 035204. http://dx.doi.org/10.1088/0957-4484/18/3/035204.
Повний текст джерелаYang, Xiaokuo, Li Cai, Weidong Peng, and Peng Bai. "Fast and robust magnetic quantum cellular automata interconnect architectures." Micro & Nano Letters 6, no. 8 (2011): 636. http://dx.doi.org/10.1049/mnl.2011.0187.
Повний текст джерелаWang, Haitong, Neil C. Audsley, Xiaobo Sharon Hu, and Wanli Chang. "Meshed Bluetree: Time-Predictable Multimemory Interconnect for Multicore Architectures." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39, no. 11 (November 2020): 3787–98. http://dx.doi.org/10.1109/tcad.2020.3012239.
Повний текст джерелаCoiffic, J. C., M. Fayolle, S. Maitrejean, L. E. F. Foa Torres, and H. Le Poche. "Conduction regime in innovative carbon nanotube via interconnect architectures." Applied Physics Letters 91, no. 25 (December 17, 2007): 252107. http://dx.doi.org/10.1063/1.2826274.
Повний текст джерелаR. Murthy, A. S., and Sridhar T. "Power Efficient Clock Distribuition for Switched Capacitor DC-DC Converters." Indonesian Journal of Electrical Engineering and Computer Science 10, no. 1 (April 1, 2018): 27. http://dx.doi.org/10.11591/ijeecs.v10.i1.pp27-36.
Повний текст джерелаBakhouya, M., S. Suboh, J. Gaber, T. El-Ghazawi, and S. Niar. "Performance evaluation and design tradeoffs of on-chip interconnect architectures." Simulation Modelling Practice and Theory 19, no. 6 (June 2011): 1496–505. http://dx.doi.org/10.1016/j.simpat.2010.10.008.
Повний текст джерелаGangwar, Anup, M. Balakrishnan, Preeti Ranjan Panda, and Anshul Kumar. "Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures." International Journal of Parallel Programming 35, no. 6 (May 25, 2007): 507–27. http://dx.doi.org/10.1007/s10766-007-0045-2.
Повний текст джерелаVenkatesan, R., J. A. Davis, K. A. Bowman, and J. D. Meindl. "Optimal n-tier multilevel interconnect architectures for gigascale integration (GSI)." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9, no. 6 (December 2001): 899–912. http://dx.doi.org/10.1109/92.974903.
Повний текст джерелаPitwon, Richard, Kai Wang, and Alex Worrall. "Embedded Photonics Interconnect Eco-system for Data Center Applications." International Symposium on Microelectronics 2013, no. 1 (January 1, 2013): 000361–66. http://dx.doi.org/10.4071/isom-2013-tp54.
Повний текст джерелаElsherbini, Adel. "(Invited) Advancing 3D Packaging for Heterogenous Systems Integration." ECS Meeting Abstracts MA2022-02, no. 17 (October 9, 2022): 848. http://dx.doi.org/10.1149/ma2022-0217848mtgabs.
Повний текст джерелаMOKRIAN, PEDRAM, MAJID AHMADI, and GRAHAM JULLIEN. "ON THE REDUCTION OF INTERCONNECT EFFECTS IN DEEP SUBMICRON IMPLEMENTATIONS OF DIGITAL MULTIPLICATION ARCHITECTURES." Journal of Circuits, Systems and Computers 15, no. 01 (February 2006): 83–106. http://dx.doi.org/10.1142/s0218126606002952.
Повний текст джерелаHarris, I. G., and R. Tessier. "Testing and diagnosis of interconnect faults in cluster-based FPGA architectures." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 21, no. 11 (November 2002): 1337–43. http://dx.doi.org/10.1109/tcad.2002.804108.
Повний текст джерелаPande, Sandeep, Fearghal Morgan, Gerard Smit, Tom Bruintjes, Jochem Rutgers, Brian McGinley, Seamus Cawley, Jim Harkin, and Liam McDaid. "Fixed latency on-chip interconnect for hardware spiking neural network architectures." Parallel Computing 39, no. 9 (September 2013): 357–71. http://dx.doi.org/10.1016/j.parco.2013.04.010.
Повний текст джерелаChaintoutis, Charidimos, Behnam Shariati, Adonis Bogris, Paul Dijk, Chris Roeloffzen, Jerome Bourderionnet, Ioannis Tomkos, and Dimitris Syvridis. "Free Space Intra-Datacenter Interconnects Based on 2D Optical Beam Steering Enabled by Photonic Integrated Circuits." Photonics 5, no. 3 (August 1, 2018): 21. http://dx.doi.org/10.3390/photonics5030021.
Повний текст джерелаRyan, E. Todd, Andrew J. McKerrow, Jihperng Leu, and Paul S. Ho. "Materials Issues and Characterization of Low-k Dielectric Materials." MRS Bulletin 22, no. 10 (October 1997): 49–54. http://dx.doi.org/10.1557/s0883769400034205.
Повний текст джерелаKeller, Robert. "(Invited) Assessing Reliability of Materials for Electronic Interconnects." ECS Meeting Abstracts MA2022-02, no. 17 (October 9, 2022): 861. http://dx.doi.org/10.1149/ma2022-0217861mtgabs.
Повний текст джерелаRajan, Mahesh, Douglas Doerfler, Courtenay T. Vaughan, Marcus Epperson, and Jeff Ogden. "Application Performance on the Tri-Lab Linux Capacity Cluster - TLCC." International Journal of Distributed Systems and Technologies 1, no. 2 (April 2010): 23–39. http://dx.doi.org/10.4018/jdst.2010040102.
Повний текст джерелаMohamed, Khaled Salah. "Work around Moore’s Law: Current and next Generation Technologies." Applied Mechanics and Materials 110-116 (October 2011): 3278–83. http://dx.doi.org/10.4028/www.scientific.net/amm.110-116.3278.
Повний текст джерелаBerbes Villalón, Dalia M., Laura Sánchez Jiménez, Manuel de la Iglesia Campos, María E. Díaz Aguirre, and Tatiana Delgado Fernández. "An IoT architecture for smart cities based on the FIWARE platform." Revista de Ciencia y Tecnología, no. 38 (October 31, 2022): 20–27. http://dx.doi.org/10.36995/j.recyt.2022.38.003.
Повний текст джерелаKhitun, Alexander. "Magnetic Interconnects Based on Composite Multiferroics." Micromachines 13, no. 11 (November 17, 2022): 1991. http://dx.doi.org/10.3390/mi13111991.
Повний текст джерелаGarcía-Ortiz, A., T. Murgan, L. Indrusiak, L. Kabulepa, and M. Glesner. "High Level Estimation of Power Consumption in Point-to-Point Interconnect Architectures." Journal of Integrated Circuits and Systems 1, no. 1 (November 16, 2004): 23–31. http://dx.doi.org/10.29292/jics.v1i1.251.
Повний текст джерелаPande, P. P., C. Grecu, M. Jones, A. Ivanov, and R. Saleh. "Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures." IEEE Transactions on Computers 54, no. 8 (August 2005): 1025–40. http://dx.doi.org/10.1109/tc.2005.134.
Повний текст джерелаMurali, S., D. Atienza, P. Meloni, S. Carta, L. Benini, G. De Micheli, and L. Raffo. "Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15, no. 8 (August 2007): 869–80. http://dx.doi.org/10.1109/tvlsi.2007.900742.
Повний текст джерелаLambrechts, A., P. Raghavan, M. Jayapala, Bingfeng Mei, F. Catthoor, and D. Verkest. "Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, no. 1 (January 2009): 151–55. http://dx.doi.org/10.1109/tvlsi.2008.2002993.
Повний текст джерелаBHATELÉ, ABHINAV, and LAXMIKANT V. KALÉ. "QUANTIFYING NETWORK CONTENTION ON LARGE PARALLEL MACHINES." Parallel Processing Letters 19, no. 04 (December 2009): 553–72. http://dx.doi.org/10.1142/s0129626409000419.
Повний текст джерелаMOADELI, MAHMOUD, WIM VANDERBAUWHEDE, and ALI SHAHRABI. "COMMUNICATION MODELING OF QoS-AWARE WORMHOLE-ROUTED NoCs." Journal of Interconnection Networks 09, no. 04 (December 2008): 409–23. http://dx.doi.org/10.1142/s0219265908002357.
Повний текст джерелаKrishnan, Gokul, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-Sun Seo, Umit Y. Ogras, and Yu Cao. "SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks." ACM Transactions on Embedded Computing Systems 20, no. 5s (October 31, 2021): 1–24. http://dx.doi.org/10.1145/3476999.
Повний текст джерелаJohn Famoriji, Oluwole, Xu Yan, Mehdi Khan, Rao Kashif, Akinwale Fadamiro, Md Sadek Ali, and Fujiang Lin. "Wireless Interconnect in Multilayer Chip-Area-Networks for Future Multimaterial High-Speed Systems Design." Wireless Communications and Mobile Computing 2017 (2017): 1–8. http://dx.doi.org/10.1155/2017/6083626.
Повний текст джерелаLee, Jaechul, Cédric Killian, Sebastien Le Beux, and Daniel Chillet. "Distance-aware Approximate Nanophotonic Interconnect." ACM Transactions on Design Automation of Electronic Systems 27, no. 2 (March 31, 2022): 1–30. http://dx.doi.org/10.1145/3484309.
Повний текст джерелаZhang, R., K. Roy, C. K. Koh, and D. B. Janes. "Exploring SOI device structures and interconnect architectures for low-power high-performance circuits." IEE Proceedings - Computers and Digital Techniques 149, no. 4 (2002): 137. http://dx.doi.org/10.1049/ip-cdt:20020451.
Повний текст джерелаBakhouya, Mohamed. "Evaluating the energy consumption and the silicon area of on-chip interconnect architectures." Journal of Systems Architecture 55, no. 7-9 (July 2009): 387–95. http://dx.doi.org/10.1016/j.sysarc.2009.07.002.
Повний текст джерелаJaadouni, Hatim, Chaimae Saadi, and Habiba Chaoui. "SDN/NFV architectures for edge-cloud oriented IoT." ITM Web of Conferences 46 (2022): 02004. http://dx.doi.org/10.1051/itmconf/20224602004.
Повний текст джерелаKaloyeros, Alain E., and Michael A. Fury. "Chemical Vapor Deposition of Copper for Multilevel Metallization." MRS Bulletin 18, no. 6 (June 1993): 22–29. http://dx.doi.org/10.1557/s0883769400047291.
Повний текст джерелаLee, Wei William, and Paul S. Ho. "Low-Dielectric-Constant Materials for ULSI Interlayer-Dielectric Applications." MRS Bulletin 22, no. 10 (October 1997): 19–27. http://dx.doi.org/10.1557/s0883769400034151.
Повний текст джерелаLyke, James C. "An Overview of Molecular Computing Approaches (Part II)." EDFA Technical Articles 6, no. 4 (November 1, 2004): 18–25. http://dx.doi.org/10.31399/asm.edfa.2004-4.p018.
Повний текст джерелаShekhawat, Gajendra, Arvind Srivastava, Shraddha Avasthy, and Vinayak Dravid. "Ultrasound holography for noninvasive imaging of buried defects and interfaces for advanced interconnect architectures." Applied Physics Letters 95, no. 26 (December 28, 2009): 263101. http://dx.doi.org/10.1063/1.3263716.
Повний текст джерелаShearer, Catherine. "Transient Liquid Phase Sintering Pastes in Heterogeneous Integration." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2017, DPC (January 1, 2017): 1–26. http://dx.doi.org/10.4071/2017dpc-wp1_presentation5.
Повний текст джерелаROY, KRISHNENDU, RAMACHANDRAN VAIDYANATHAN, and JERRY L. TRAHAN. "ROUTING MULTIPLE WIDTH COMMUNICATIONS ON THE CIRCUIT SWITCHED TREE." International Journal of Foundations of Computer Science 17, no. 02 (April 2006): 271–85. http://dx.doi.org/10.1142/s0129054106003826.
Повний текст джерелаAhmed, Moustafa, Yas Al-Hadeethi, Ahmed Bakry, Hamed Dalir, and Volker J. Sorger. "Integrated photonic FFT for photonic tensor operations towards efficient and high-speed neural networks." Nanophotonics 9, no. 13 (June 26, 2020): 4097–108. http://dx.doi.org/10.1515/nanoph-2020-0055.
Повний текст джерелаBelli, Laura, Simone Cirani, Luca Davoli, Gianluigi Ferrari, Lorenzo Melegari, and Marco Picone. "Applying Security to a Big Stream Cloud Architecture for the Internet of Things." International Journal of Distributed Systems and Technologies 7, no. 1 (January 2016): 37–58. http://dx.doi.org/10.4018/ijdst.2016010103.
Повний текст джерела