Дисертації: "High voltage fragmentation technology"

1

Benmamas, Arezki Lotfi. "Valorisation des systèmes d’éclairage à LED en fin de cycle de vie." Thesis, Troyes, 2021. http://www.theses.fr/2021TROY0044.

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Si l’éclairage solide permet une réduction conséquente de la consommation d’électricité, reste posé la problématique des dispositifs à base de LED. Cette thèse associée au projet RECYLED a consisté à identifier puis à développer des méthodes et des procédés en fonction des typologies des dispositifs (lampes, tubes et luminaires) et ce en vue d’une valorisation et d’une réutilisation de certains composants élémentaires. L’objectif, par une approche globale, incluant à la fois les aspects techniques, économiques et environnementaux était d’aboutir à un taux de recyclage de 80%. Trois scénarii ont été identifiés pour le recyclage des lampes et des tubes à LED, la réutilisation, le broyage et le désassemblage des lampes et des tubes à LED. Des études des déchets et des produits commercialisés, ont été menées afin de caractériser le gisement et de dimensionner les solutions de traitement proposées et estimer le potentiel de valorisation global. Concernant le désassemblage identifié comme le point bloquant, la technologie des puissances pulsées reposant sur la fragmentation est proposée. En ce qui concerne les tubes des solutions purement mécaniques ont été validées. Les méthodes proposées permettent d'obtenir un taux de valorisation matière de 74% pour les lampes et 94% pour les tubes. Ces taux sont à relier avec les prévisions estimées pour 2030 dans le cadre de ce travail qui aboutissent à un gisement annuel maximal évalué pour les lampes à LED à 2600 tonnes et pour les tubes et dalles à LED à 1600 tonnes
While solid-state lighting allows for a significant reduction in electricity consumption, the problem of the end-of-life of the LED-based devices remains. This thesis associated with the RECYLED project consisted in identifying and then developing methods and processes according to the typologies of the devices (lamps, tubes and luminaires) with a view to recovery and reuse of certain elementary components. The objective, through a comprehensive approach, including both technical, economic and environmental aspects, was to achieve a recycling rate of 80%. Three scenarios have been identified for the recycling of LED lamps and tubes, reuse, shredding and disassembly. Studies of waste and marketed products have been carried out in order to characterize the deposit and size the proposed treatment solutions and estimate the overall recovery potential. Regarding the disassembly identified as the blocking point, the technology of pulsed powers based on fragmentation is proposed. With regard to the tubes, purely mechanical solutions have been validated. The proposed methods make it possible to obtain a material recovery rate of 74% for the lamps and 94% for the tubes. These rates are to be linked with the forecasts estimated for 2030 as part of this work, which lead to a maximum annual deposit estimated for LED lamps at 2600 tons and for LED tubes and panels at 1600 tons

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2

Farag, Bassem. "High Voltage DC Arc Detection Model." Thesis, Uppsala universitet, Institutionen för informationsteknologi, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-358478.

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High voltage (HV) battery systems are widely used in many applications nowadays. And due to the safety concerns regarding lithium-ion cells, the safety of the lithium-ion based battery systems is vital. One crucial danger for lithium-ion cells is heat, And as arcs formation can lead to heat generation within the system, it is important to detect arcs that take place frequently within HV battery systems. This thesis is done in cooperation with Northvolt AB and it focuses on assessing the ability to detect the occurrence of arcs in the system, but it does not focus on preventing arcs.The goal is to build a detection system to identify the occurrence of arcs, both within the battery system and in the connection between the battery system and the load (vehicle). The detection circuit should not affect the ability of the isolation measurement unit inside the system, and the detection system should be protected at all times. The circuit was designed and tested using LTSPice software. This is due to the absence of a ready system to test the circuit against at Northvolt. The system was able to detect arcs both within the battery system and when connecting the battery system to the vehicle. Additionally, as required by Northvolt, the detection system is designed without affecting the isolation measurement unit and the detection system is kept safe at all times by using an isolation circuit. Future work is recommended to generalize the detection system so it can be used in different high voltage applications. This can be done by testing the system against other HV systems and updating the filter and amplifier’s values, as well as the software thresholds. Additionally, it is recommended that the software module is calibrated against the real system during hardware testing. This calibration will optimize the software module and, thus, result in better detection.

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3

Bahnam, Nadeen. "Container closure integritytesting with High Voltage LeakDetection." Thesis, Uppsala universitet, Nanoteknologi och funktionella material, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-439566.

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There are various methods that can be used for Container Closure Integrity Testing (CCIT).Each method has its pros and cons.The choice of the CCIT-method depends on various factors such as the material of the primary packaging and product properties. High Voltage Leak Detection(HVLD) is an effective method. The sensitivity of the method is quite high but its is unclear whether it can detect all the hole sizes that may entails a risk for microbial contamination. The theoretical calculations and practical experiments shows that HVLD can detect holes in different positions and it can detect holes that are a few micrometers. If HVLD detect hole size that are 5 micrometers, it means that alla sizes that can make risk for microbial contamination for productsmanufacturedonAstraZeneca PET BFS can be detected with HVLD.

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4

Jędrzejewski, Piotr. "Modelling the European High-voltage electricity transmission." Thesis, KTH, Energiteknik, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-284152.

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This Master’s thesis describes modelling of the cross-border electricity transmission network of Europe. Under this work an extension of The Open Source Energy Model Base for the European Union (OSeMBE) was developed, implementing interconnections to the already existing model. The model is built using the Open Source Energy Modelling System (OSeMOSYS). The purpose of the model is to find cost optimal shape of the electricity system of Europe in the modelling period from 2015 to 2050. The model was used to analyse plans for the development of the electricity interconnection network, defined by the European Union on the list of Projects of Common Interests. For the thesis four scenarios of the European electricity system’s future development were modelled. The aim was to analyse on which borders new interconnection capacity would be beneficial and to test the influence of the interconnection development on the whole electricity system, particularly generation capacities and CO2 emissions. The electricity flows were analysed on each border. For a better overview in the analysis four regions were defined. The regions are adequate to the four priority corridors for electricity defined in Trans-European Networks for Energy (TEN-E). The major finding of the scenario that optimized the capacity of the interconnections in Europe, was that only 16% of capacities planned as the PCI are needed to be built. Most of those capacities should be developed in the northern Europe, particularly on the subsea borders Germany-Norway, United Kingdom-Norway, Poland-Lithuania, but also land ones Finland-Sweden, Denmark-Germany. The analysis also included utilization factors of the interconnection lines. However, due to the simplifications and limitation of modelling tool OSeMOSYS, the results needs to be taken with certain dose of caution and may serve only for indicating the direction of further analysis. The work conducted under this Master’s thesis, might also be a base for the future work, such as deeper look on the already obtained data with purpose to find relationship between electricity generation sources being utilized and interconnections utilization. The model might be also improved by implementation interconnection representation to the borders which were omitted here due to the lack of cost data.
Detta examensarbetebeskriver modellering av Europas gränsöverskridande elektriska transmissionsnät. Under detta arbete utvecklades en utvidgning av Open Source Energy Model Base för Europeiska unionen (OSeMBE) för implementering av sammankopplingar med den redan existerande modellen. Modellen är byggd med hjälp av Open Source Energy Modeling System (OSeMOSYS). Syftet med modellen är att hitta en kostnadseffektiv form av Europas elsystem under modelleringsperioden 2015 till 2050. Modellen användes för att validera planer för utveckling av sammankoppling för elnätet, definierade av Europeiska unionen i listan över projekt av gemensamt intresse. Under denna avhandling modellerades fyra scenarier för det europeiska elsystemets framtida utveckling. Målet för scenarierna var att analysera för vilka gränser en ny sammankopplingskapacitet skulle vara till nytta, samt att testa påverkan av samtrafikutvecklingen på hela elsystemet, särskilt produktionskapacitet och koldioxidutsläpp. Därefter analyserades flödena av elektricitet vid varje gräns, och för att förenkla analysen delades området upp i fyra regioner. Regionerna är uppdelade i enlighet med de fyra prioriterade korridorerna för elektricitet, definierade i Transeuropeiska Nät för Energi (TEN-E). Det huvudsakligaresultatet i scenariot som optimerade kapaciteten för sammankopplingarna i Europa var att endast 16% av den kapacitet som planerades som PCI behöver byggas. De flesta av dessa kapaciteter bör utvecklas i norra Europa, särskilt vid havsgränserna Tyskland-Norge, Storbritannien-Norge, Polen-Litauen, men också Finland-Sverige och Danmark-Tyskland. Även användningsfaktorer för samtrafikledningarna analyserades i arbetet.

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Aliahmad, Mehran. "High voltage circuits for short loop SLICs in a low voltage submicron BiCMOS technology." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0006/NQ41393.pdf.

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6

Rashid, Suhail Jeremy. "High voltage packaging technology for wide bandgap power semiconductor devices." Thesis, University of Cambridge, 2008. https://www.repository.cam.ac.uk/handle/1810/252098.

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7

Wallström, Stina. "Biofilms on silicone rubber for outdoor high voltage insulation." Doctoral thesis, KTH, Fiber- och polymerteknik, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-171.

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Silicone rubber high voltage insulators are sometimes colonised by microorganisms which form a biofilm on the surface of the infected unit. In this work insulators exposed to the outdoor environment in Sweden, Sri Lanka and Tanzania respectively have been studied. The biofilms colonising the insulators were shown to be of roughly the same composition regardless of their origin. Algae in association with bacteria dominated the biofilms and provided nutrition to mold growth. The isolated microorganisms were further used to study the effect of a biofilm on different silicone rubber materials. New tools for diagnosing biological growth on polymeric materials were developed and used to analyse the silicone rubber samples. No evidence of biodegradation of the polydimethylsiloxane (PDMS) molecule has been found in this work. However, this does not mean that PDMS rubbers used in high voltage insulators can be called bioresistant. Silicone insulating materials always contain additives and these may promote or hinder growth. For this reason, an extensive test program was developed, in order to evaluate the effect of different additives on the degree of biological growth. The program spanned from fast and easy methods, useful for screening large amount of samples, to the construction of specially designed microenvironment chambers in which mixed biofilms, similar to those formed on the surface of silicone rubber insulators in the field, were successfully grown. The test program showed that the flame retardant zinc borate protected the materials, whereas alumina trihydrate (ATH) did not hinder biological growth. On the contrary, environmental scanning microscopy (ESEM) in combination with X-ray energy dispersive spectroscopy (EDS) showed that the surface roughening caused by the addition of ATH to the silicone rubber matrix made the materials more difficult to clean. Furthermore when the hydrophobic surface of a silicone rubber insulator is covered by a hydrophilic biofilm this leads to a reduction of the surface hydrophobicity of the material. This may alter the electrical properties of the insulator. It is therefore important to develop methods to identify biofouled units. In this work, laser-induced fluorescence (LIF) spectroscopy was explored as a tool for the detection of biofilms on silicone rubbers. The experiments revealed that weak traces of algae or fungal growth, even those not visible to the naked eye, could be detected by this technique. In addition, it was shown that photography and subsequent digital image analysis could be utilised to estimate the area covered by biofilm growth. The results obtained indicate that LIF spectroscopy in combination with image analysis could be used for field diagnostics of biological growth on insulators in service.

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8

Salemi, Arash. "Silicon Carbide Technology for High- and Ultra-High-Voltage Bipolar Junction Transistors and PiN Diodes." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-197913.

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Silicon carbide (SiC) is an attractive material for high-voltage and high-temperature electronic applications owing to the wide bandgap, high critical electric field, and high thermal conductivity. High- and ultra-high-voltage silicon carbide bipolar devices, such as bipolar junction transistors (BJTs) and PiN diodes, have the advantage of a low ON-resistance due to conductivity modulation compared to unipolar devices. However, in order to be fully competitive with unipolar devices, it is important to further improve the off-state and on-state characteristics, such as breakdown voltage, leakage current, common-emitter current gain, switching, current density, and ON-resistance. In order to achieve a high breakdown voltage with a low leakage current, an efficient and easy to fabricate junction edge protection or termination is needed. Among different proposed junction edge protections, a mesa design integrated with junction termination extensions (JTEs) is a powerful approach. In this work, implantation-free 4H-SiC BJTs in two classes of voltage, i.e., 6 kV-class and 15 kV-class with an efficient and optimized implantation-free junction termination (O-JTE) and multiple-shallow-trench junction termination extension (ST-JTE) are designed, fabricated and characterized. These terminations result in high termination efficiency of 92% and 93%, respectively. The 6 kV-class BJTs shows a maximum current gain of β = 44. A comprehensive study on the geometrical design is done in order to improve the on-state performances. For the first time, new cell geometries (square and hexagon) are presented for the SiC BJTs. The results show a significant improvement of the on-state characteristics because of a better utilization of the base area. At a given current gain, new cell geometries show a 42% higher current density and 21% lower ON-resistance. The results of this study, including an optimized fabrication process, are utilized in the 15 kV-class BJTs where a record high current gain of β = 139 is achieved. Ultra-high-voltage PiN diodes in two classes of voltage, i.e., 10+ kV using on-axis 4H-SiC and 15 kV-class off-axis 4H-SiC, are presented. O-JTE is utilized for 15 kV-class PiN diodes, while three steps ion-implantation are used to form the JTE in 10+ kV PiN diodes. Carbon implantation followed by high-temperature annealing is also performed for the 10+ kV PiN diodes in order to enhance the lifetime. Both type diodes depict conductivity modulation in the drift layer. No bipolar degradation is observed in 10+ kV PiN diodes.

QC 20161209

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Livermore, Luke. "Integration of offshore wind farms through High Voltage Direct Current networks." Thesis, Cardiff University, 2013. http://orca.cf.ac.uk/42892/.

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The integration of offshore wind farms through Multi Terminal DC (MTDC) networks into the GB network was investigated. The ability of Voltage Source Converter (VSC) High Voltage Direct Current (HVDC) to damp Subsynchronous Resonance (SSR) and ride through onshore AC faults was studied. Due to increased levels of wind generation in Scotland, substantial onshore and offshore reinforcements to the GB transmission network are proposed. Possible inland reinforcements include the use of series compensation through fixed capacitors. This potentially can lead to SSR. Offshore reinforcements are proposed by two HVDC links. In addition to its primary functions of bulk power transmission, a HVDC link can be used to provide damping against SSR, and this function has been modelled. Simulation studies have been carried out in PSCAD. In addition, a real-time hardware-in-the-loop HVDC test rig has been used to implement and validate the proposed damping scheme on an experimental platform. When faults occur within AC onshore networks, offshore MTDC networks are vulnerable to DC overvoltages, potentially damaging the DC plant and cables. Power reduction and power dissipation control systems were investigated to ride through onshore AC faults. These methods do not require dedicated fast communication systems. Simulations and laboratory experiments are carried out to evaluate the control systems, with the results from the two platforms compared.

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Panji, Arikson Heraldus. "Optimization of High Voltage Cable Dimension in Scania Electric Vehicle’s Systems." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-278073.

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With the increasing demand for electrified vehicles, the demand for electrical components, including cables, is rising too. Thus, it is important to develop a method to optimize the cable sizing to ensure the cable is technically robust and economically efficient. The aim of this project is to study and evaluate different cables’ designs to find the optimum dimension for “high voltage” class (automotive voltage class B) cables in the electrical vehicle system. Three important technical aspects in evaluating the optimum cross-section area (CSA) are the ampacity of the cable, short-circuit withstand capability and voltage drop.In this project, the ampacity of a cable placed in air is calculated by the analytical method based on IEC 60287 and by a finite-element simulation. These results are verified against direct measurements using a dc source and load. In DC calculation, the similarity of all three methods is high, within 96%. The formation of the cable also affects the ampacity of the cable. For DC currents, the vertical formation has a higher ampacity than the horizontal formation, by almost 2%. For AC currents, the trefoil formation has a higher ampacity than the horizontal and vertical formation, by around 6-9%.Calculations of short circuit withstand capability and voltage drop were performed to ensure cable performance. The larger CSA corresponds to both higher short circuit capability and lower voltage drop. In a short circuit, a duration around 0.5 s is critical since there is a significant difference between short circuit withstand capability before and after this. Voltage drop calculation is performed to ensure that the combination of CSA and length does not exceed 3% voltage drop at the load end side of the circuit. The Voltage drop is not found to be an important factor to consider. Based on those three factors, the optimization process is described with a flowchart.
Efterfrågan på elfordon ökar, och därmed ökar också efterfrågan på den elektriska komponenten. Därför är det viktigt att utveckla en metod för att optimera kabelstorleken så att kabeln är tekniskt robust och ekonomiskt effektiv. Syftet med detta projekt är att studera och utvärdera olika kablarnas konstruktioner för att hitta den optimala dimensionen för högspänningsklass (spänningsklass B) i elfordonssystemet. Tre viktiga tekniska aspekter vid utvärderingen av den optimala kabelstorleken är kabelns kapacitet, kortslutningsförmåga och spänningsfall.I detta projekt placeras kabeln i luften. Ampaciteten beräknas med hjälp av en analytisk metod baserad på IEC 60287 och en simulering med finita element metoden. Dessa resultat verifieras mot direkta mätningar med hjälp av en likströmskälla och elektrisk belastning. För DC-beräkning är likheten för alla tre metoderna mycket hög. Bildningen av kabeln påverkar också kabelns ampacitet. För DC-strömmar har den vertikala formationen en högre ampacitet än den horisontella formationen för nästan 2%. För växelströmmar har trefoilformationen en högre ampacitet än den horisontella och vertikala formationen med 6-9 %.Kortslutningsförmågan och spänningsfallberäkningen utfördes för att säkerställa kabelprestanda. En större CSA innebär högre kortslutningsförmåga och lägre spänningsfall. Spänningsfallberäkning utförs för att begränsa kabellängden för att säkerställa ett maximalt 3% spänningsfall vid kretsens laständsida. Spänningsfallet är en viktig faktor att beakta. Med hjälp av dessa tre faktorer beskrivs optimeringsprocessen med ett flödesschema.

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Xu, Jing. "Technology for Planar Power Semiconductor Devices Package with Improved Voltage Rating." Diss., Virginia Tech, 2008. http://hdl.handle.net/10919/26373.

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The high-voltage SiC power semiconductor devices have been developed in recent years. They cause an urgent in the need for the power semiconductor packaging to have not only low interconnect resistance, less noise, less parasitic oscillations, improved reliability, and better thermal management, but also High-Voltage (HV) blocking capability. The existing power semiconductor packaging technologies includes wire-bonding interconnect, press pack, flip-chip technology, metal posts interconnected parallel plates structure (MIPPS), dimple array interconnection (DAI), power overlay (POL) technology, and embedded power (EP) technology. None of them meets the requirements of low profile and high voltage rating. The objective of the work in this dissertation is to propose and design a high-voltage power semiconductor device packaging method with low electric field stress and low profile to meet the requirments of high-voltage blocking capability. The main contributions of the work presented in this dissertation are: 1. Understanding the electric field distribution in the package. The power semiconductor packaging is simulated by using Finite Element Analysis (FEA) software. The electric field distribution is known and the locations of high electric field concentration are identified. 2. Development of planar high-voltage power semiconductor device packaging method With the proposed structure in the dissertation, the electric field distribution of a planar device package is improved and the high electric field intensity is relieved. 3. Development of design guidelines for the propsed planar high-voltage device packaging method. The influence of the structure dimensions and the material properties is studied. An optimal design is identified. The design guideline is given. 4. Fabrication and experimental verification of the proposed high-voltage device packaging method A detailed fabrication procedure which follows the design guideline is presented. The fabricated modules are tested by using a high power curve tracer. Test results verify the proposed method. 5. Simplification of the structure model of the proposed device package The package structure model is simplified through the elimination of power semiconductor device internal structure model. The simplified model can be simulated by a non-power device simulator. The simulation results of the simplified model match the simulation results of the complete model very well.
Ph. D.

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Walford, Thomas. "Integration of an Electric Propulsion High Voltage Unit into the FLP2 SmallSat Testbench." Thesis, Luleå tekniska universitet, Rymdteknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-67459.

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This paper is based around the test bench for the Flexible LEO Platform, a proposed small satellite platform for use in Low Earth Orbit. The main focus of the paper is the integration of a High Voltage Unit into this test bench. The High Voltage Unit is used to power the Electric Propulsion Subsystem that is being developed at Airbus DS and is likely to be used in the platform. This integration focusses primarily on the data link between the on-board computer and the Power Control and Distribution Unit which supplies power to the High Voltage Unit, but no study on an on-board data link is complete without looking at the link from the satellite to ground. The paper will mainly build on two pieces of prior work completed in the development of this platform. The ﬁrst updated data chain between the ground and the on-board computer from packet level to frame level. The second began the electrical integration of the Power Control and Distribution Unit into the satellite test bench. The key areas addressed in the paper are ﬁrstly, the implementation of code within the on-board software to command the Power Control and Distribution Unit (both simulated and real) through telecommand and identify the corresponding telemetry that is produced. Secondly, conﬁrmation of a working data chain from the Ground Station to the High Voltage Unit of the Electric Propulsion Subsystem, via the Power Control and Distribution Unit, and if the chain is incomplete, linking them together fully. Thirdly, the robust test of this data chain to ensure that both the simulated and real engine can be controlled. Finally, a detailed documentation of the result along with the software developed and the production of a user manual.

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Afghari, Kamran. "A Study and Design of High Performance Voltage-Controlled Oscillators in 65nm CMOS Technology." Thesis, Linköpings universitet, Elektroniska komponenter, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-87278.

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In recent years, oscillators are considered as inevitable blocks in many electronic systems. They are commonly used in digital circuits to provide clocking and in analog/RF circuits of communication transceivers to support frequency conversion. Nowadays, CMOS technology is the most applicable solution for VLSI and especially for modern integrated circuits used in wireless communications. The main purpose of this project is to design a high performance voltage-controlled oscillator (LC VCO) using 65nm CMOS technology. To meet the state-of-the-art requirements, several circuit solutions have been explored and the design work ended-up with a Quadrature VCO. The circuit operates at center frequency of 2.4 GHz. The phase noise of QVCO obtained by simulation is -140 dBc/Hz at 1MHz offset frequency which is 6 dB less compared to conventional LC VCOs. The power consumption is 3.6mW and the tuning voltage can be swept from 0.2 V to 1.2 V resulting in 2.25 GHz - 2.55 GHz frequency range.

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Yu, Xiaoxi. "Valorisation de la biomasse lignocellulosique humide par la mise en place de procédés d'extraction et de séparation des polyphénols et des protéines : cas des tiges de colza." Thesis, Compiègne, 2015. http://www.theses.fr/2015COMP2246.

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Ce travail de thèse concerne l'étude et l'évaluation de l'extraction et de la séparation de molécules d'intérêt à partir des résidus de colza. L'impact des différents traitements (broyage, champs électriques pulsés, décharges électriques de hautes tensions et ultrasons) sur l'amélioration de l'extraction des polyphénols et des protéines à partir des tiges de colza a été comparé. Ces traitements permettent d'endommager les membranes et/ou parois cellulaires de manière mécanique, électrique ou acoustique, facilitant ainsi la libération des composés intracellulaires vers le milieu extérieur. La cinétique d'extraction, le rendement en polyphenols totaux et en protéines et la consommation énergétique sont principalement étudiés. De plus, l'efficacité des traitements étudiés pour l'extraction des polyphénols et protéines, en fonction du degré de maturité de la plante a été étudiée. Les méthodes testées pour la séparation des extractibles (polyphénols et protéines) concernent la coagulation, la filtration membranaire ainsi que le couplage de ces deux méthodes afin de réduire la consommation de solvants organiques et la rétention des polyphénols au cours de séparation. La séparation des extractibles a été évaluée par le biais de l'analyse de pureté et du taux de rétention. Enfin, des effets positifs du traitement électrique sur l'étape de séparation des extractibles tels que l'augmentation du flux du perméat et la diminution du colmatage ont été remarqués
This thesis work concerns the study and the evaluation of the extraction and the separation of valuable compounds from rapeseed residues. The impact of different treatments (grinding, pulsed electric fields, high voltage electrical discharges and ultrasound) on the enhancement of the extraction of polyphenols and proteins from rapeseed stems was compared. These treatments can damage cell membranes and 1 or cell walls mechanically, electrically or acoustically, thus facilitating the release of intracellular compounds to the surroundings. The extraction kinetics, yield of total polyphenols and proteins and energy consumption were mainly studied. In addition, influences of plant maturity on the efficiency of studied treatments for the extraction of polyphenols and proteins have been studied. The methods tested for the separation of extractives (polyphenols and proteins) include coagulation, membrane filtration and the combination of these two methods in order to reduce the consumption of organic solvents and the retention ofpolyphenols during separation. The separation of extractives was evaluated by means of analysis of purity and relative removal. Finally, positive effects of electrical treatment on the extractive separation step such as the increase ofpermeate flux and the decrease of membrane fouling have been observed

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Espinosa, Pablo A. "Design of a high-efficiency, high-performance zero-voltage-switched battery charger-discharger for the NASA EOS space platform." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-10312009-020419/.

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Linnet, Agnes. "Eliminating zero-missing phenomenon in long, high voltage, underground cables." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-253262.

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The maximum length of an high voltage underground cable (HV UGC) cable is oftenconstrained by the criterion that the cable cannot have more than 50% reactivepower compensation. If this limit is exceeded the current in the circuit breaker maynot have a zero crossing after energization, which is referred to as the zero missingphenomenon. This is problematic if a fault occur shortly after energization. Inthe past 10 years, different methods have been proposed which would allow greaterreactive power compensation. These methods either prevent the zero missing phenomenon(preventive methods) or provide a way to open the circuit breaker if afault occurs (handling methods).A new 200 km, 220 kV line has been proposed in Iceland referred to as Sprengisandslína.One proposed option is to build it as an OHL-UGC-OHL line as the voltagecriteria is not fulfilled if Sprengisandslína is built as an UGC with a 50% reactivepower compensation. The aim of this thesis is to see whether the zero missing phenomenoncan be avoided by implementing countermeasures - this gives a preliminaryresults whether Sprengisandslína can be built as an UGC. In this thesis the four differentpreventive methods are analyzed with a transient study for Sprengisandslína:(1) Pre-insertion resistor, (2) simultaneous synchronized switching, (3) synchronizedswitching where the cable is energized before the shunt reactor, and (4) synchronizedswitching where the shunt reactor is energized before the cable.Preliminary steady state studies were performed to determine the minimum numberof shunt reactors needed to fulfill the voltage criteria. The results showed thatthe minimum number needed were three assuming they are all of equal size locatedevenly along the cable (one at each end and one in the middle). Additionally, it isnecessary to see whether the generators would become underexcited if the cable isiiienergized with 100% reactive power compensation as it can reduce the lifetime ofthe generators. The results showed that the generators did not become underexcited.The countermeasure of synchronized switching where the shunt reactor is energizedbefore the cable and the countermeasure of simultaneous synchronized switchingwere shown to eliminate the zero-missing phenomenon when the cable was energizedwith 100% reactive power compensation. Synchronized switching where theshunt reactor is energized before the cable was seen to have lower switching overvoltages,21% higher than the nominal value, and the lower inrush current of 2.38kA. However, the method of simultaneous synchronized switching is cheaper andthe switching overvoltages and inrush current were within an acceptable margin(switching overvoltages were 35:9% higher than the nominal value and the inrushcurrent was 4.01 kA).The results of the study indicate that Sprengisandslína can be energized as an UGCwith 100% reactive power compensation if either the countermeasure of simultaneoussynchronized switching or synchronized switching where the shunt reactor isenergized before the cable are used. However, a detailed frequency study must beperformed before either of the countermeasures can be recommended.
Högsta längden på en högspänning underjordisk kabel begränsas ofta av de kriteriersom kabeln inte kan ha mer än 50% reaktiv effektkompensation. Om denna gränsöverskrids kan strömmen i strömbrytaren inte ha noll genomgang efter aktivering,kallad noll saknad fenomen. Detta är problematiskt om ett fel inträffar strax efteraktivering. Under de senaste 10 åren har olika metoder föreslagits, vilket skullemöjliggöra större reaktiv effektkompensation. Dessa metoder hindrar antingen detnollbristande fenomenet (förebyggande metoder) eller ger ett sätt att öppna strömbrytarenom ett fel uppstår (hanteringsmetoder).En ny 200 km, 220 kV linje har föreslagits på Island kallad Sprengisandslína. Ettföreslaget alternativ för att den här linjen ska byggas är att bygga den som en OHLUGC-OHL-linje, eftersom spänningskriterierna inte är uppfyllda om Sprengisandslínaär byggt som en UGC med en 50% reaktiv effektkompensation. Syftet meddenna avhandling är att se huruvida det saknade fenomenet kan undvikas genomatt genomföra motåtgärder - detta ger ett preliminärt resultat om Sprengisandslínakan byggas som en UGC. I denna avhandling analyseras de fyra olika förebyggandemetoderna med en övergående studie för Sprengisandslína: (1) Förinsättningsresistor,(2) Synkroniserad samtidigkoppling, (3) Synkroniserad inkoppling där kabelnaktiveras före shuntreaktorn och (4) ) synkroniserad inkoppling där shuntreaktornaktiveras före kabeln.Preliminära steady state studier utförs för att bestämma det minsta antalet shuntreaktorersom behövs för att uppfylla spänningskriterierna. Resultaten visade att detminsta antalet som behövdes var tre förutsatt att de alla är lika stora som liggerjämnt längs kabeln (en i varje ände och en i mitten). Dessutom är det nödvändigtatt se om generatorer skulle bli underexiterad om kabeln är energiserad med 100%iiiivreaktiva effektkompensation eftersom det kan minska generatorns livslängd. Resultatenvisade att generatorer inte blev underexiterad.Motståndet för synkroniserad omkoppling där shuntreaktorn aktiveras före kabelnoch motmätningen av samtidig synkroniserad omkoppling visades för att elimineradet nollmissande fenomenet när kabeln aktiverades med 100% reaktiv effektkompensation.Synkroniserad omkoppling där shuntreaktorn aktiveras innan kabeln visadesig ha lägre omkopplingsvolymer, 21% högre än nominellt värde och den lägre inbrusningsströmmenpå 2,38 kA. Metoden för samtidig synkroniserad omkopplingär emellertid billigare och omkopplingsvolymen och inströmmen var inom en acceptabelmarginal (omkopplingsvolymer var 35; 9% högre än nominellt värde ochinströmningsströmmen var 4,01 kA).De resultaten av studien indikerar att Sprengisandslína kan energiseras som en UGCmed 100% reaktiv effektkompensation om antingen motspelet av samtidig synkroniseradomkoppling eller synkroniserad omkoppling där shuntreaktorn aktiveras innankabeln installeras. En detaljerad frekvensstudie måste dock utföras innan någon avmotåtgärderna kan rekommenderas.

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17

Norgard, Peter. "Development of a gigawatt repetitive pulse modulator and high-pressure switch test stand and results from high-pressure switch tests." Diss., Columbia, Mo. : University of Missouri-Columbia, 2006. http://hdl.handle.net/10355/4584.

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Thesis (M.S.)--University of Missouri-Columbia, 2006.
The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on April 22, 2009) Includes bibliographical references.

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18

Oder, Stephen, Paula Arinello, Peter Caron, Scott Crawford, Stephen McGoldrick, and Douglas Bajgot. "Development of a Variable Output Power, High Efficiency Programmable Telemetry Transmitter Using GaN Amplifier Technology." International Foundation for Telemetering, 2012. http://hdl.handle.net/10150/581842.

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Cobham Electronic Systems, Inc. has developed a field-programmable telemetry transmitter module for higher-power (0.1W to 25W) airborne telemetry applications. A key feature of the transmitter is high DC to RF conversion efficiency over the entire variable output power range of 25dB through the use of GaN amplifiers. This high efficiency is realized by using a variable voltage DC-DC converter and dynamic bias control of the GaN amplifier elements. This feature is useful in that output power can be tailored to mission requirements and timelines, thereby extending battery life and increasing operation time. The transmitter receives configuration commands and can be programmed through an external data port. The transmitter can be configured for RF power and frequency over the telemetry S-Band frequency range, and has multiple data rates. The unit consists of RF, digital and power supply circuits. The RF transmitter is a PCM-FM type with a phase-locked loop, driver amplifiers, a power amplifier and a digital processor for RF control. The unit contains a digital processor, FPGA's, and flash memory. The power supplies contains all the regulator circuits to supply power to the rest of the unit, variable output drain voltage to the GaN devices, EMI filtering, under/overvoltage protection, a temperature sensor and a digital processor for power control. The electronics are housed in a compact aluminum housing.

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19

Bahat-Treidel, Eldad [Verfasser], and Günther [Akademischer Betreuer] Tränkle. "GaN Based HEMTs for High Voltage Operation. Design, Technology and Characterization / Eldad Bahat-Treidel. Betreuer: Günther Tränkle." Berlin : Universitätsbibliothek der Technischen Universität Berlin, 2012. http://d-nb.info/1022195859/34.

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20

Yoon, Sangwoong. "LC-tank CMOS Voltage-Controlled Oscillators using High Quality Inductor Embedded in Advanced Packaging Technologies." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4887.

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This dissertation focuses on high-performance LC-tank CMOS VCO design at 2 GHz. The high-Q inductors are realized using wiring metal lines in advanced packages. Those inductors are used in the resonator of the VCO to achieve low phase noise, low power consumption, and a wide frequency tuning range. In this dissertation, a fine-pitch ball-grid array (FBGA) package, a multichip module (MCM)-L package, and a wafer-level package (WLP) are incorporated to realize the high-Q inductor. The Q-factors of inductors embedded in packages are compared to those of inductors monolithically integrated on Si and GaAs substrates. All the inductors are modeled with a physical, simple, equivalent two-port model for the VCO design as well as for phase noise analysis. The losses in an LC-tank are analyzed from the phase noise perspective. For the implementation of VCOs, the effects of the interconnection between the embedded inductor and the VCO circuit are investigated. The VCO using the on-chip inductors is designed as a reference. The performance of VCOs using the embedded inductor in a FBGA and a WLP is compared with that of a VCO using the on-chip inductor. The VCO design is optimized from the high-Q perspective to enhance performance. Through this optimization, less phase noise, lower power consumption, and a wider frequency tuning range are obtained simultaneously.

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21

Brauer, Patrik. "High-Frequency Voltage Distribution Modelling of a Slotless PMSM from a Machine Design Perspective." Thesis, KTH, Elkraftteknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-224174.

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The introduction of inverters utilizing wide band-gap semiconductors allow for higher switching frequency and improved machine drive energy efficiency. However, inverter switching results in fast voltage surges which cause overvoltage at the stator terminals and uneven voltage distribution in the stator winding. Therefore, it is important to understand how next generation machine drives, with higher switching frequency, affect the voltage distribution. For this purpose, a lumped-parameter model capable of simulating winding interturn voltages for the wide frequency range of 0-10 MHz is developed for a slotless PMSM. The model includes both capacitive and inductive couplings, extracted from 2D finite element simulations, as well as analytically estimated resistive winding losses. The developed model of a single phase-winding is used to investigate how machine design aspects such as insulation materials and winding conductor distribution affects both voltage distribution and winding impedance spectrum. Validation measurements demonstrate that the model is accurate for the wide frequency range. The sensitivity analysis suggests that the winding conductor distribution affect both impedance spectrum and voltage distribution. For the slotless machine, capacitance between the winding and the stator is several times smaller than capacitance between turns. Therefore, the high-frequency effects are dominated by the capacitance between turns. Insulation materials that affect this coupling does therefore have an impact on the impedance spectrum but does not have any significant impact on the voltage distribution.
Nästa generations inverterare för styrning av elektriska maskiner, baserade på bredbandgaps komponenter, tillåter högre switchfrekvenser vilket skapar en energieffektivare drivlina. Nackdelen är att snabba spänningsflanker från den höga switchfrekvensen skapar överspänning på stators anslutningar och en ojämn spänningsfördelning i statorlindningen. Det är därför betydelsefullt att förstå hur dessa nya drivlinor påverkar lindningens spänningsfördelning. I denna rapport används en modell kapabel att simulera lindningens spänningsfördelning i det breda frekvensspektrumet 0-10 MHZ. Modellen är framtagen för en faslindning av en PMSM, utan statoröppning, som inkluderar både kapacitiva och induktiva kopplingar samt analytiskt beräknade lindningsförluster. Modellen används för att undersöka spänningsfördelningen i lindningen samt inverkan från designparametrar som isolationsmaterial och lindningsdistribution. Känslighetsanalysen visar att lindingsdistributionen har en signifikant påverkan på både impedansspektrumet och spänningsfördelningen. För den studerade maskintypen är det kapacitansen mellan varv som är dominerande för högfrekventa fenomen. Isolationsmaterial som påverkar denna koppling har en påverkan på impedansspektrumet men är liten för spänningsfördelningen.

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22

Kito, Y., H. Okubo, N. Hayakawa, Y. Mita, and M. Yamamoto. "Development of a 6600 V/210 V kVA hybrid-type superconducting transformer." IEEE, 1991. http://hdl.handle.net/2237/6880.

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23

Lindblom, Adam. "Inductive Pulse Generation." Doctoral thesis, Uppsala : Acta Universitatis Upsaliensis : Univ.-bibl. [distributör], 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-6699.

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24

Ning, Jing [Verfasser], Klaus [Akademischer Betreuer] Hofmann, and Rolf [Akademischer Betreuer] Jakoby. "Design of An Integrated High Voltage Controller in CMOS-Technology for Tunable Multiport Microwave Devices / Jing Ning. Betreuer: Klaus Hofmann ; Rolf Jakoby." Darmstadt : Universitäts- und Landesbibliothek Darmstadt, 2016. http://d-nb.info/1112269312/34.

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25

Suraparaju, Eswar Raju. "Wide Tuning Range I/Q DCO VCO and A High Resolution PFD implementation in CMOS 90 nm Technology." Wright State University / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=wright1451488990.

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26

Albrecht, Martin. "Enabling socio-technical transitions – electric vehicles and high voltage electricity grids as focal points of low emission futures." Licentiate thesis, KTH, Miljöstrategisk analys (fms), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-206973.

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Today humankind is facing numerous sustainability challenges that require us to question CO2 intensive practices like those present in the transport and energy sector. To meet those challenges, many countries have adopted ambitious climate targets. Achieving such targets requires an understanding of the wider socio-technical context of transitions. The aim of this licentiate thesis is therefore to analyse such socio-technical transitions towards low-emission futures enabled by the electrification of passenger cars and high voltage grid development. A combination of different transitions theories (for ex. Multi-level perspective and Technological innovation systems) and institutional theory has been used. To reach the aim paper I analyses the climate impacts of electric vehicles (EVs) and policy measures to achieve a breakthrough scenario for EVs. The results show that a mixture of short and long term policies are needed that take into account the technology development stage and behavioural aspects of EV adopters. Paper II addresses the need to include the high voltage transmission grid and its planning procedures as a central part of debates on transitions. Therefore the opportunities, challenges and reasons for conflict in the established regime are studied. The results show that in order to achieve a sustainable grid development regime, it is necessary to spend time on achieving legitimacy and social sustainability. The third paper uses semi-structured expert interviews and focuses on innovation dynamics for EV adoption. By focusing on dynamics instead of single policy measures, it is possible to grasp interactions within a niche, but also in between a niche, regime and landscape. The results show that strong initial technology legitimacy was needed to start substantial innovation dynamics. This could be further strengthened with a strong and broad coalition of actors. Both those factors led, if present, to an improved variety and match of policy instruments. As such this thesis has shown that transitions are not just about technology or policy instruments as such but about the dynamics and processes needed to enable them. This can be relevant in other transitions that otherwise may underestimate the importance of these components.

QC 20170512

Norstrat

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27

Saint-Laurent, Martin. "Modeling and Analysis of High-Frequency Microprocessor Clocking Networks." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7271.

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Integrated systems with billions of transistors on a single chip are a now reality. These systems include multi-core microprocessors and are built today using deca-nanometer devices organized into synchronous digital circuits. The movement of data within such systems is regulated by a set of predictable timing signals, called clocks, which must be distributed to a large number of sequential elements. Collectively, these clocks have a significant impact on the frequency of operation and, consequently, on the performance of the systems. The clocks are also responsible for a large fraction of the power consumed by these systems. The objective of this dissertation is to better understand clock distribution in order to identify opportunities and strategies for improvement by analyzing the conditions under which the optimal tradeoff between power and performance can be achieved, by modeling the constraints associated with local and global clocking, by evaluating the impact of noise, and by investigating promising new design strategies for future integrated systems.

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Sporrong, Kristofer, and Mattias Harrysson. "Elektrisk integrering och projektering av förnybar energi i svagt lokalt elnät." Thesis, Högskolan i Halmstad, Sektionen för ekonomi och teknik (SET), 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-19037.

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För att en kvalitativ och driftsäker kraftomvandling från vind till elkraft skall erhållas ställs krav på en mängd olika faktorer. Klimatologiska och tekniska faktorer kräver korrekt dimensionering och anpassning av omvandlingstekniken för att största möjliga energimängd skall kunna omvandlas på ett driftsäkert och energieffektivt vis som vindkraftsägare, nätägare kräver. Vinden är som bekant en oberäknelig kraftkälla. Variationerna i styrka och tid kan innebära en hel del driftoptimeringsproblematik med efterverkningar för vindkraftsverket, nätet och belastningen. Konsekvenserna kan bero på vilken typ av teknik som är installerad i de olika delarna av energisystemet och i områdets elnät. Varierande effektbehov och effektfaktor i tiden har också en signifikant betydelse för elnätets stabilitet. Anpassning av drift i elnätet mot den turbulenta vinden ger ofta avvikelser på spänning och effektflöden, speciellt i extrema situationer där svaga elnät existerar. God samverkan med vindkraftverket och nätets varierande aktiva och reaktiva effektbehov till energianvändaren kan ge förutsättningar för god elkvalitet och därmed optimerad och säker drift med få avbrott över tiden. Ofta kan och är det mekaniska, elektrotekniska val i vindkraftverket och tillhörande elsystem som spelar en avgörande roll för hur lönsam investeringen blir under verkets tekniska livslängd. Nätägaren eftersträvar en god interagering mellan elnät och elproduktion som ger upphov till få medeltalsfel mellan avbrott och elfel, detta kallas i branschen för ”Mean time between failures” MTBF. Enligt Svensk energi skall långsamma och snabba spänningsvariationer samt övertoner och erforderlig kortslutningseffekt utredas och jämföras mot de krav och villkor som råder vid elektrisk integrering av elproduktion i elnätet. Förstudien har kommit fram till två lämpliga anslutningsförslag med vindkraftsprojektering. Det beskrivs senare i rapporten förslag på två tillhörande Smart Grid varianter med energilagring för anslutningsförslagen i det befintligt svaga lokala elnätet.
To achieve a reliable and qualitative power conversion from the wind into electric power, a variety of factors and demands need to be obtained. Climatological and technological factors requires proper dimensioning and adjustment of the conversion technology, to harvest the greatest possible amount of energy and to be converted in a reliable and energy efficient way, that windmill owners, power grid owners require. The wind is as familiar an unpredictable power supply. The variations in intensity over time could mean a number of drive optimization problems with after-effects of the wind turbine, power grid and load. The consequences may depend on which type of technology that is installed in the different parts of the energy system. The area's power grid and varying power needs with characteristics over time, also has a significant importance. The turbulent wind gives deviations of voltage and power flow, especially in various extreme situations in weak power grids. Good interaction between the wind turbine and power grid with varying active and reactive power demand for the energy users, provides conditions for a good power quality and thus, an optimal and safe operation with few interruptions over time. It can be, and often is the mechanics, electro-technical choices in the wind turbine and associated electrical systems that play a critical role in how profitable installation is during the wind turbines technological life. The power grid owner strives for a good interaction between the power grid and electrical generation which rise for few faults between interruptions and errors. In the branch this is known as "Mean time between failures" MTBF. According to the Swedenergy, harmonics, slow and fast voltage variations including required short-circuit power should be investigated and compared with those requirements and terms that prevails with electrical integration of power into the grid. The feasibility study has concluded two suitable power connection proposals including wind mapping research, later in this report it is described and suggested two related Smart Grid variants with energy storage for the two power connection proposals in the existing weak local grid.
Judith Saari var betygsättare på muntlig presentation.

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Rosenbaum, Tommy. "Performance prediction of a future silicon-germanium heterojunction bipolar transistor technology using a heterogeneous set of simulation tools and approaches." Thesis, Bordeaux, 2017. http://www.theses.fr/2017BORD0550/document.

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Les procédés bipolaires semi-conducteurs complémentaires à oxyde de métal (BiCMOS) peuvent être considérés comme étant la solution la plus généralepour les produits RF car ils combinent la fabrication sophistiquée du CMOSavec la vitesse et les capacités de conduction des transistors bipolaires silicium germanium(SiGe) à hétérojonction (HBT). Les HBTs, réciproquement, sontles principaux concurrents pour combler partiellement l'écart de térahertzqui décrit la plage dans laquelle les fréquences générées par les transistors etles lasers ne se chevauchent pas (environ 0.3 THz à 30 THz). A_n d'évaluerles capacités de ces dispositifs futurs, une méthodologie de prévision fiable estsouhaitable. L'utilisation d'un ensemble hétérogène d'outils et de méthodes desimulations permet d'atteindre successivement cet objectif et est avantageusepour la résolution des problèmes. Plusieurs domaines scientifiques sont combinés, tel que la technologie de conception assistée par ordinateur (TCAO),la modélisation compacte et l'extraction des paramètres.Afin de créer une base pour l'environnement de simulation et d'améliorerla confirmabilité pour les lecteurs, les modèles de matériaux utilisés pour lesapproches hydrodynamiques et de diffusion par conduction sont introduits dèsle début de la thèse. Les modèles physiques sont principalement fondés surdes données de la littérature basées sur simulations Monte Carlo (MC) ou dessimulations déterministes de l'équation de transport de Boltzmann (BTE).Néanmoins, le module de TCAO doit être aussi étalonné sur les données demesure pour une prévision fiable des performances des HBTs. L'approchecorrespondante d'étalonnage est basée sur les mesures d'une technologie depointe de HBT SiGe pour laquelle un ensemble de paramètres spécifiques àla technologie du modèle compact HICUM/L2 est extrait pour les versionsdu transistor à haute vitesse, moyenne et haute tension. En s'aidant de cesrésultats, les caractéristiques du transistor unidimensionnel qui sont généréesservent de référence pour le profil de dopage et l'étalonnage du modèle. Enélaborant des comparaisons entre les données de références basées sur les mesureset les simulations, la thèse fait progresser l'état actuel des prévisionsbasées sur la technologie CAO et démontre la faisabilité de l'approche.Enfin, une technologie future de 28nm performante est prédite en appliquantla méthodologie hétérogène. Sur la base des résultats de TCAO, leslimites de la technologie sont soulignées
Bipolar complementary metal-oxide-semiconductor (BiCMOS) processescan be considered as the most general solution for RF products, as theycombine the mature manufacturing tools of CMOS with the speed and drivecapabilities of silicon-germanium (SiGe) heterojunction bipolar transistors(HBTs). HBTs in turn are major contenders for partially filling the terahertzgap, which describes the range in which the frequencies generated bytransistors and lasers do not overlap (approximately 0.3THz to 30 THz). Toevaluate the capabilities of such future devices, a reliable prediction methodologyis desirable. Using a heterogeneous set of simulation tools and approachesallows to achieve this goal successively and is beneficial for troubleshooting.Various scientific fields are combined, such as technology computer-aided design(TCAD), compact modeling and parameter extraction.To create a foundation for the simulation environment and to ensure reproducibility,the used material models of the hydrodynamic and drift-diffusionapproaches are introduced in the beginning of this thesis. The physical modelsare mainly based on literature data of Monte Carlo (MC) or deterministicsimulations of the Boltzmann transport equation (BTE). However, the TCADdeck must be calibrated on measurement data too for a reliable performanceprediction of HBTs. The corresponding calibration approach is based onmeasurements of an advanced SiGe HBT technology for which a technology specific parameter set of the HICUM/L2 compact model is extracted for thehigh-speed, medium-voltage and high-voltage transistor versions. With thehelp of the results, one-dimensional transistor characteristics are generatedthat serve as reference for the doping profile and model calibration. By performingelaborate comparisons between measurement-based reference dataand simulations, the thesis advances the state-of-the-art of TCAD-based predictionsand proofs the feasibility of the approach.Finally, the performance of a future technology in 28nm is predicted byapplying the heterogeneous methodology. On the basis of the TCAD results,bottlenecks of the technology are identified
Bipolare komplementäre Metall-Oxid-Halbleiter (BiCMOS) Prozesse bietenhervorragende Rahmenbedingungen um Hochfrequenzanwendungen zurealisieren, da sie die fortschrittliche Fertigungstechnik von CMOS mit derGeschwindigkeit und Treiberleistung von Silizium-Germanium (SiGe) Heterostruktur-Bipolartransistoren (HBTs) verknüpfen. Zudem sind HBTs bedeutendeWettbewerber für die teilweise Überbrückung der Terahertz-Lücke, derFrequenzbereich zwischen Transistoren (< 0.3 THz) und Lasern (> 30 THz).Um die Leistungsfähigkeit solcher zukünftigen Bauelemente zu bewerten, isteine zuverlässige Methodologie zur Vorhersage notwendig. Die Verwendungeiner heterogenen Zusammenstellung von Simulationstools und Lösungsansätzenerlaubt es dieses Ziel schrittweise zu erreichen und erleichtert die Fehler-_ndung. Verschiedene wissenschaftliche Bereiche werden kombiniert, wie zumBeispiel der rechnergestützte Entwurf für Technologie (TCAD), die Kompaktmodellierungund Parameterextraktion.Die verwendeten Modelle des hydrodynamischen Simulationsansatzes werdenzu Beginn der Arbeit vorgestellt, um die Simulationseinstellung zu erläuternund somit die Nachvollziehbarkeit für den Leser zu verbessern. Die physikalischenModelle basieren hauptsächlich auf Literaturdaten von Monte Carlo(MC) oder deterministischen Simulationen der Boltzmann-Transportgleichung(BTE). Für eine zuverlässige Vorhersage der Eigenschaften von HBTs muss dieTCAD Kon_guration jedoch zusätzlich auf der Grundlage von Messdaten kalibriertwerden. Der zugehörige Ansatz zur Kalibrierung beruht auf Messungeneiner fortschrittlichen SiGe HBT Technologie, für welche ein technologiespezifischer HICUM/L2 Parametersatz für die high-speed, medium-voltage undhigh-voltage Transistoren extrahiert wird. Mit diesen Ergebnissen werden eindimensionaleTransistorcharakteristiken generiert, die als Referenzdaten fürdie Kalibrierung von Dotierungspro_len und physikalischer Modelle genutztwerden. Der ausführliche Vergleich dieser Referenz- und Messdaten mit Simulationengeht über den Stand der Technik TCAD-basierender Vorhersagenhinaus und weist die Machbarkeit des heterogenen Ansatzes nach.Schlieÿlich wird die Leistungsfähigkeit einer zukünftigen Technologie in28nm unter Anwendung der heterogenen Methodik vorhergesagt. Anhand derTCAD Ergebnisse wird auf Engpässe der Technologie hingewiesen

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Freye, Claudius [Verfasser], Frank [Akademischer Betreuer] Jenau, and Thomas [Gutachter] Leibfried. "Methoden und Aspekte zur Leitfähigkeitsanalyse von Isolationsmaterialien der Kabeltechnologie und zur Isolationskoordination für Systeme der Hochspannungsgleichstromübertragung (HGÜ) : Methods and aspects for conductivity analysis of insulating materials in cable technology and for insulation coordination in high-voltage direct current transmission (HVDC) systems / Claudius Freye ; Gutachter: Thomas Leibfried ; Betreuer: Frank Jenau." Dortmund : Universitätsbibliothek Dortmund, 2020. http://d-nb.info/1214887627/34.

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Feinäugle, Peter. "Experimentelle und numerische Untersuchungen zu entladungsbasierten Elektronenstrahlquellen hoher Leistung." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-88973.

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Entladungsbasierte Elektronenquellen mit Kaltkathode waren gegen Ende des 19. Jahr hunderts weithin genutzte Forschungswerkzeuge und ermöglichten die Entdeckung des Elektrons und der Röntgenstrahlung. In jüngster Zeit erfahren sie erneutes Interesse in Wissenschaft und Industrie, motiviert durch ihre Fähigkeit, Elektronenstrahlen hoher Leistung für Produktionsprozesse (wie das Schweißen, die Materialverdampfung in der Vakuum beschichtung oder die Vakuum-Schmelzveredlung in der Metallurgie) basierend auf einem robusten Design sowie einfachen Versorgungs- und Steuerungssystemen zu erzeugen. Entladungsbasierte Elektronenquellen könnten also eine wirtschaftlich attraktive Alternative zu den gegenwärtig noch etablierten Elektronenstrahlkanonen mit Glühkathoden bieten. Trotz der langen Geschichte und vieler empirischer Ansätze, Gasentladungen zur Elektronenstrahlerzeugung für diverse Anwendungen zu nutzen, sind die bestimmenden Mechanismen bei dieser Art von Elektronenquellen immer noch unzulänglich verstanden. Es war deshalb das Ziel der für die vorliegende Dissertation durchgeführten experimentellen und theoretischen Arbeiten, nicht nur die technologischen Potentiale und Limitierungen entladungsbasierter Elektronenstrahlquellen zu untersuchen, sondern auch die Kenntnis grundlegender physikalischer Effekte zu verbessern. Analysiert wurden zunächst verschiedene, im Fraunhofer FEP vorhandene Kaltkathoden-Strahlquellen, die - ungeachtet der Tatsache, dass sie für unterschiedliche Anwendungen konstruiert wurden - sämtlich auf demselben Funktionsprinzip beruhen: Innerhalb des Gerätes wird eine Hochspannungs-Glimmentladung (HSGE) unterhalten. Ionen erfahren im Kathodenfall einen Energiezuwachs, treffen auf die Kathode und setzen dort Sekundärelektronen frei. Diese Elektronen werden in Richtung des Plasmas be schleu nigt und verlassen schließlich die Strahlquelle, um am Prozessort die beabsichtigte Wirkung zu erzielen. Zur Optimierung der Stabilität der die Ionen produzierenden Entladung, der Effizienz der Strahlerzeugung sowie der Strahlleistungsdichte und Kathodenlebensdauer wurden verschiedene Kombinationen von Kathodenmaterialien und Plasma-Arbeitsgasen experimentell untersucht. Die Abhängigkeit der Ausdehnung des Kathodenfalls von Strom und Spannung der Entladung wurde gemessen und konnte durch ein analytisches Modell erklärt werden. Emittanz und Richtstrahlwert sind wichtige Kenngrößen zur Charakterisierung der Qualität von Elektronenstrahlen. Beide wurden in dieser Arbeit für den Elektronenstrahl einer HSGE-basierten Kaltkathoden-Schweißstrahlquelle bestimmt, wobei zwei Ansätze verfolgt wurden: Zum einen konnte die Emittanz aus der Randstrahlgleichung gewonnen werden, die den experimentell beobachteten Verlauf des Strahldurchmessers entlang der Ausbreitungsachse analytisch beschreibt. Zum anderen wurde die Emittanz anhand des aus der numerischen Simulation berechneten Phasenraumprofils ermittelt. Eine Kernaufgabe dieser Arbeit war es, Software-Werkzeuge zur Simulation der Strahl erzeugung in verschiedenen geometrischen Konfigurationen zu entwickeln und zu validieren, mit denen künftig die Konstruktion und Optimierung neuer entladungsbasierter Strahlerzeuger unterstützt werden sollte. Da kommerziell verfügbare Programme zur Simulation der Erzeugung und Führung von Elektronenstrahlen grundlegende Effekte plasma basierter Quellen, wie z. B. die Raumladung der Ionen oder die ioneninduzierte Sekundär elektronen-Freisetzung, nicht berücksichtigen, wurde für diese Arbeit eine neue Herangehensweise favorisiert: „Particle-in-Cell“ (PIC)-Algorithmen werden in der Plasma forschung üblicherweise zur Modellierung von Entladungen sowie zum Studium nichtlinearer Probleme, wie z. B. Instabilitäten, verwendet. Deshalb wurde nun eine PIC-Simulations umgebung zur Modellierung der HSGE und der damit verbundenen Strahlerzeugung entwickelt. Die Simulation reproduziert experimentelle Ergebnisse, wie etwa die Charakteristik der Entladung, die Emittanz des Strahls oder die Ausdehnung des Kathodendunkelraums, in befriedigender Weise. Schließlich wurde im Rahmen dieser Arbeit eine entladungsbasierte Elektronenstrahlquelle neuen Typs entwickelt und charakterisiert, die die Einfachheit der bekannten Kaltkathoden-Strahler und vorteilhafte Leistungsparameter, z. B. eine hohe Strahlleistungsdichte und niedrige Arc-Rate, wie sie bisher nur mit traditionellen Glühkathodenstrahlern erreichbar waren, in sich vereinigt. Die Kathode bestand aus LaB6 - einem Material, das sowohl eine hohe Sekundärelektronen-Ausbeute als auch eine niedrige Austrittsarbeit aufweist - und wurde gegen die Halterung thermisch isolierend montiert. Dadurch kann sie von Ionen aus einer HSGE auf hohe Betriebstemperaturen geheizt werden und in erheblichem Maße thermisch freigesetzte Elektronen emittieren. Neben technisch nützlichen Gebrauchs eigenschaften weist diese so genannte „Hybrid-Kathode“ auch ein physikalisch interessantes Verhalten auf. Einige neuartige Effekte, die von Entladungen mit kalten Kathoden nicht bekannt waren, konnten beobachtet und erklärt werden, wie z.B. die auffällige „N-förmige“ Druck-Strom-Charakteristik, die bei plötzlicher Abschaltung der Entladung nur langsam und ungleichmäßig abklingende Elektronenemission, die Limitierung des erreichbaren Strahl stromes und eine Fülle von Kathodenverschleiß-Mechanismen. Physikalische Modelle zur Beschreibung verschiedener Aspekte der Hybridkathoden-Entladung wurden erarbeitet und mit den experimentellen Befunden verglichen
Discharge-based, cold-cathode electron sources were routinely used as research tools at the end of the 19th century and facilitated then the discovery of the electron and of the x-rays. In recent time, they experience a renewed interest in science and industry due to their capability of generating high power electron beams for production processes (like welding, evaporation of materials for vapor deposition, and vacuum melt refining in metallurgy) relying on rugged mechanic designs as well as simple supply and control systems. Hence, discharge-based electron sources could provide an economically attractive alternative to the currently established electron beam guns with thermionic cathodes. Despite the long history and many empirical trials to utilize electron beam generation by gas discharges in several applications, the mechanisms governing this kind of electron sources are far from being well understood. Therefore, it was the purpose of the theoretical and experimental work performed for this thesis not only to investigate in the technological potentials and limitations of discharge-based electron beam guns but also to improve the knowledge of physical basic effects. At first, several cold-cathode beam sources existing at Fraunhofer FEP were analyzed. Regardless that they were designed for different applications, all were based on the same function principle: A high-voltage glow-discharge (HVGD) is sustained inside the device. Ions gain energy in the cathode fall, hit the cathode and release secondary electrons. These electrons will be accelerated towards the plasma then and can finally leave the beam source to perform the desired action at the process site. In order to optimize stability of the ions generating discharge, efficiency of the beam generation, beam power density and longevity of the cathode, different combinations of cathode materials and plasma forming gases have been investigated experimentally. The dependence of the cathode dark space width on current and discharge voltage was measured and could be explained by an analytic model. Emittance and brightness are important measures which quantify the quality of electron beams. In this work, both were determined for the beam originating from a HVGD based cold-cathode electron gun designed for welding following two approaches: First the emittance could be extracted from the envelope equation which analytically describes the evolution of the experimentally observed beam diameter along the propagation axis. Second the emittance was calculated from numerically simulated traces in the phase space. It was a core purpose of this work to develop and validate software tools capable of simulating the beam formation in various geometric configurations. This task was aimed at supporting the design and optimization of new discharge-based beam sources. Since commercially available software for modeling electron beam generation and transport do not consider the key mechanisms of plasma-based sources like the ion space charge or the ion-dependent production of free electrons, a new attempt was favored for this work: Particle-in-Cell (PIC) are being used in plasma research for studying nonlinear problems like instabilities. Therefore, a PIC simulation environment was utilized to numerically model the HVGD and the related beam generation. The simulation satisfactorily reproduces experimental findings, like the characteristics of the discharge, the emittance of the beam or the cathode dark space dimension. Finally, a discharge-based electron-beam sources of a new type was developed and characterized in the frame of this work. It merges the simplicity of known cold cathode devices with beneficial performance parameters, like high beam power density and low arcing rate, which have been reached so far with traditional thermionic electron sources only. The cathode of the new beam source consists of LaB6 - a material with a high secondary electron yield and a low thermionic work function - and was mounted thermally insulated against the holder. Then, an elevated operation temperature resulting in considerable thermionic emission was maintained by ions extracted from a HVGD. Besides to technically advantageous features, this so called “hybrid“ cathode mode of beam generation shows a physically interesting behaviour. Several new effects - not known from traditional cold-cathode discharges - could be observed, like a peculiar “N-shaped“ appearance of the pressure-current characteristic, the slowly and irregularly decreasing electron emission after a sudden discharge cutoff, a limitation of achievable beam current, and a multitude of possible cathode wear mechanisms. Physical models describing various features of the hybrid cathode discharge were elaborated and compared with the experimental findings

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Ram, Prakash Ranjithh Raj. "Study of an Isolated and a Non-Isolated Modular DC/DC Converter : In Multi-Terminal HVDC/MVDC grid systems." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-278495.

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För sammankoppling av multi-terminala HVDC-system med punkt-till-punkt kopplingar ärDC-DC-omvandlaren den enda möjliga sammankopplingen. Därför genomgår problemenmed spänningsmatchning och likspänningsströmbegränsning i högspännings DC-systemomfattande forskning samt ligger i fokus för denna avhandling. Först analyseras toppmodernatopologier för högspännings DC-DC-omvandlare som används för samtrafik av flera terminalaHVDC-system. De analyserade topologierna jämförs sedan baserat på dess olika funktioner.Topologin för en konventionell icke-isolerad DC-DC-omvandlare analyseras när det gäller design,kostnad, storlek, förlust och effektstyrningskapacitet. Först skapas en matematisk modell ochsedan utförs en numerisk analys för olika arbetsområden. Därefter görs en jämförelse av entvåfas-icke-isolerad DC-omvandlare baserad på energilagring, maximal likströmsöverföring ochtotala förluster. Simulering utförs av en tvåfas och en trefas icke-isolerad DC-omvandlare iPSCAD med olika typer av styrenheter. Dessutom tas en isolerad omvandlartopologi och analyserasi detalj från matematisk modellering till validering med hjälp av simuleringsresultat.Olika typer av felanalyser för både isolerad och icke-isolerad omvandlartopologi görs. Slutligenutförs även analyser av DC-felet i olika möjliga anslutningar av omvandlaren i Multi-TerminalGrid, dvs Monopole, Bipole med både symmetriska och asymmetriska konfigurationer.
For interconnection of multi-terminal HVDC systems involving point-to-point links, aDC-DC converter is the only possible way to interconnect. Therefore, the issues of voltagematching and DC fault current limiting in high voltage DC systems are undergoing extensiveresearch and are the focus of this thesis. Starting with analyzing the state of the art highvoltage DC-DC converter topologies for interconnection of multi-terminal HVDC systems andbenchmarking each converter topology based on different functionalities. A basic non-isolatedDC-DC converter topology is analyzed in terms of design, cost, sizing, losses and power controlcapability. First, starting with the mathematical modeling and then the numerical analysis isdone for different operating regions. Next, it is compared with the two-phase non-isolated DCconverter based on energy storage, maximum DC power transfer, and total losses. Simulation oftwo-phase and three-phase non-isolated DC converter is done in PSCAD incorporating differenttypes of controllers. Then, an isolated converter topology is taken and analyzed in detail startingfrom mathematical modeling to validation using simulation results. Different types of faultsanalysis for both isolated and non-isolated converter topology is done. Finally, analyzing the DCfault in different possible connection of the converter in the multi-terminal grid, i.e. monopole,bipole in both symmetric and asymmetric configurations.

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Pallon, Love. "Polyethylene/metal oxide nanocomposites for electrical insulation in future HVDC-cables : probing properties from nano to macro." Doctoral thesis, KTH, Polymera material, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-193591.

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Nanocomposites of polyethylene and metal oxide nanoparticles have shown to be a feasible approachto the next generation of insulation in high voltage direct current cables. In order to reach an operationvoltage of 1 MV new insulation materials with reduced conductivity and increased breakdown strengthas compared to modern low-density polyethylene (LDPE) is needed.In this work polyethylene MgO nanocomposites for electrical insulation has been produced andcharacterized both from an electrical and material perspective. The MgO nanoparticles weresynthesized into polycrystalline nanoparticles with a large specific surface area (167 m2 g–1). Meltprocessing by extrusion resulted in evenly dispersed MgO nanoparticles in LDPE for the silane surfacemodified MgO as compared to the unmodified MgO. All systems showed a reduction in conductivityby up to two orders of magnitude at low loading levels (1–3 wt.%), but where the surface modifiedsystems were able to retain reduced conductivity even at loading levels of 9 wt.%. A maximuminteraction radius to influence the conductivity of the MgO nanoparticles was theoretically determinedto ca. 800 nm. The interaction radius was in turn experimentally observed around Al2O3 nanoparticlesembedded in LDPE using Intermodulation electrostatic force microscopy. By applying a voltage on theAFM-tip charge injection and extraction around the Al2O3 nanoparticles was observed, visualizing theexistence of additional localized energy states on, and around, the nanoparticles. Ptychography wasused to reveal nanometre features in 3D of electrical trees formed under DC-conditions. Thevisualization showed that the electrical tree grows by pre-step voids in front of the propagatingchannels, facilitating further growth, much in analogy to mechanical crack propagation (Griffithconcept). An electromechanical effect was attributed as possible mechanism for the formation of the voids.
Nanokompositer av polyeten och metalloxidpartiklar anses vara möjliga material att använda i morgondagens isolationshölje till högspänningskablar för likström. För att nå en transmissionsspänning på 1 MV behövs isolationsmaterial som i jämförelse med dagens polyeten har lägre elektrisk ledningsförmåga, högre styrka mot elektriskt genomslag och som kan kontrollera ansamling av rymdladdningar. De senaste årens forskning har visat att kompositer av polyeten med nanopartiklar av metalloxider har potential att nå dessa egenskaper. I det här arbetet har kompositer av polyeten och nanopartiklar av MgO för elektrisk isolation producerats och karaktäriserats. Nanopartiklar av MgO har framställts från en vattenbaserad utfällning med efterföljande calcinering, vilket resulterade i polykristallina partiklar med en mycket stor specifik ytarea (167m2 g-1). MgO-nanopartiklarna ytmodifierades i n-heptan genom att kovalent binda oktyl(trietoxi)silan och oktadekyl(trimetoxi)silan till partiklarna för att skapa en hydrofob och skyddande yta. Extrudering av de ytmodifierade MgO nanopartiklarna tillsammans med polyeten resulterade i en utmärkt dispergering med jämnt fördelad partiklar i hela kompositen, vilket ska jämföras med de omodifierade partiklarna som till stor utsträckning bildade agglomerat i polymeren. Alla kompositer med låg fyllnadsgrad (1–3 vikt% MgO) visade upp till 100 gånger lägre elektrisk konduktivitet jämfört med värdet för ofylld polyeten. Vid högre koncentrationer av omodifierade MgO förbättrades inte de isolerande egenskaperna på grund av för stor andel agglomerat, medan kompositerna med de ytmodifierade fyllmedlen som var väl dispergerade behöll en kraftig reducerad elektrisk konduktivitet upp till 9 vikt% fyllnadshalt. Den minsta interaktionsradien för MgO-nanopartiklarna för att minska den elektriska konduktiviten i kompositerna fastställdes med bildanalys och simuleringar till ca 800 nm. Den teoretiskt beräknade interaktionsradien kompletterades med observation av en experimentell interaktionsradie genom att mäta laddningsfördelningen över en Al2O3-nanopartikle i en polyetenfilm med intermodulation (frekvens-mixning) elektrostatisk kraftmikroskop (ImEFM), vilket är en ny AFM-metod för att mäta ytpotentialer. Genom att lägga på en spänning på AFM-kantilevern kunde det visualiseras hur laddningar, både injicerades och extraherades, från nanopartiklarna men inte från polyeten. Det tolkades som att extra energinivåer skapades på och runt nanopartiklarna som fungerar för att fånga in laddningar, ekvivalent med den gängse tolkningen att nanopartiklar introducera extra elektronfällor i den polymera matrisen i nanokompositer. Nanotomografi användes för att avbilda elektriska träd i tre dimensioner. Avbildningen av det elektriska trädet visade att tillväxten av trädet hade skett genom bildning av håligheter framför den framväxande trädstrukturen. Håligheterna leder till försvagning av materialet framför det propagerande trädet och förenklar på det sättet fortsatt tillväxt. Bildningen av håligheter framför trädstrukturen uppvisar en analogi till propagering av sprickor vid mekanisk belastning, i enlighet med Griffiths koncept.

QC 20161006

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Wang, Chung-Sheng, and 王忠勝. "A Study of High Voltage MOSFET in CMOS Technology." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/38867609814747863929.

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碩士
國立交通大學
電子工程系
88
The thesis uses the SVX (Smart Voltage Extension) approach to implement the high-voltage devices without modifying the processing steps of a standard, low-voltage n-well CMOS (Complementary Metal Oxide Semiconductor) technology. Through the special layout techniques, high-voltage n-type MOS transistor is usually capable to sustain about 10 times the nominal voltage of the 0.6-micrometer standard CMOS technique provided by TSMC. In order to investigate the forward and breakdown characteristics of n type high-voltage transistors sustained voltage above 30volts with various ranges of layout parameters, two approaches are adopted. First, TCAD (Technology Computer-Aided Design) is utilized to simulate devices' processes and electrical characteristics. The other is the measurement about static characteristics of the high-voltage devices. At last, third level and BSIM SPICE models were also derived for the high-voltage transistors by the device's parameter exactor (AURORA). Beside, it will be mentioned that high-voltage transistor are dedicated to applications of circuit level, such as level shifters and ESD(Electrostatic Discharge) circuits.

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Wu, Ping-Chen, and 吳秉宸. "Development and Improvement of GaN-based High-Voltage LED Technology." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/47162728991316068565.

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Hsu, Che-Lun, and 許哲綸. "Study of Electrostatic Discharge Protection Devices in High-Voltage BCD Technology." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/15421955459637229479.

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Анотація:

碩士
國立交通大學
電子工程系所
98
High-voltage (HV) transistors in smart power technologies have been extensively used for display driver integrated circuits (ICs), power supplies, power management and automotive electronics. However, the process complexity and the difficulty to guarantee the reliability of HV devices are greatly increased for the sake of sustaining such high operating voltage in HV ICs. As a result, the electrostatic discharge (ESD) reliability becomes challenging due to the severe latch-up threat in such a harsh environment. The ESD protection design with high efficiency is vital to the HV ICs for the requirement of reliability. To ensure the effectiveness and reliability of an ESD protection design, it has been generally approved that the I-V characteristics of ESD protection devices should locate within the ESD protection design window which defines the trigger voltage (Vt1) of ESD protection devices to be lower than the both junction and gate-oxide breakdown voltages of internal circuits (VBD,internal) and the snapback holding voltage (Vhold) larger than the power supply voltage (VDD). In HV technology, bipolar junction transistors, HV MOSFET and silicon controlled rectifier (SCR) have been used as on-chip ESD protection devices. Among the ESD protection devices, the SCR device is attractive and applicable for ESD protection because it exhibits extremely high failure current and low dynamic on-resistance with occupying the smallest layout area. Unfortunately, the impact of extremely low holding voltage resulted from double-carrier injection and inherent regenerative feedback mechanism causes SCR to be susceptible to quasi-static latch-up or transient-induced latch-up (TLU) danger under normal circuit operating condition, especially while SCR is used in the power-rail ESD clamp circuit. Consequently, ESD design effort is usually focused on boosting the holding voltage of ESD protection devices and minimizing the latch-up risk in HV ICs. Several ESD protection structures aimed at increasing the latch-up immunity have been investigated and reported in HV ICs. One way is to increase the holding voltage of ESD protection devices to be larger than the power supply voltage, and the other way is to increase the trigger or holding current of ESD protection devices above certain minimum latch-up triggered current to prevent latch-up during normal circuit operating condition. In addition, the ESD protection devices immunity against latch-up referred to the transmission-line-pulsing (TLP)-measured holding voltage, holding current and trigger current is insufficient because the latch-up event is a reliability test with the time duration longer than millisecond. Therefore, the holding voltage, holding current and trigger current measured from a dc curve tracer is more convincing than that measured by the TLP system while judging the validity of latch-up susceptibility. In this thesis, the ESD protection devices with high latch-up immunity have been designed and developed, and successfully verified in a 0.5-�慆 16-V bipolar CMOS DMOS (BCD) processes. The SCR devices are adopted as ESD protection devices in this work because of their superior ESD performance. From the dc experimental results, the high holding currents of the single SCR devices are accomplished by the implantation of N+-buried layer (NBL). Besides, the high immunity against transient-induced latch-up can be realized by the stacked configuration of SCR devices.

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37

YUN-JUNG, LIN, and 林昀融. "Study on 60V High Voltage LDMOS base on UHV BCD Technology." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/483r5z.

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Анотація:

碩士
亞洲大學
資訊工程學系
105
Because of electronic technologies products performance increase day by day, for Power supply needed also increasing, so for the device electricity efficiency related technologies are more important than before. In all electronic products will having DC to DC, DC to AC, AC to DC or AC to AC switching. How to reduce the power loss on device switching to let device achieve more energy efficiency become the most focus part of the electronic product. But some international manufacturers company have lot of technology and patents because they go into the research of High Voltage device more earlier and Taiwan's device company only recently began to enter this area now. BCD technology, which is mean integration for three different components: Bipolar, CMOS and DMOS on the one chip. Was proposed by STMicroelectronics in 1984 and called BCD1. The BCD1 is based on 4μm 60V VDMOS and till now they evolve to the 10th generation called BCD10. Which is based on now most popular technology of 90nm BCD process integration. In this study, HV LDMOS design base on 5th generation BCD5 0.6μm process technology. Because for the low cost and can for some 6” and 8” analog device fab to upgrade their product with using current equipment and process technology to help the old fab to transformation. In this study will using T-CAD simulation tool with 0.6μm process technology to design a 60V HVLDMOS device under 500V UHV device process for process integration. Because of using 0.6μm technology, in the design will using LOCOS process for isolation. First, because the isolation oxide will having lot of effect for our device spec, we will explore for the different LOCOS oxidation model in our T-CAD simulation to fit the silicon result. After that we will using the Poly-Buffered LOCOS process technology to reduce the Bird’s Beak for our device about 40%. Then we will take the best model put into our HVLDMOS design and fit the device same with the device produce from fab. Because of the demand for automotive electronic components are increasing day by day, so in this study we will design our 60V HV LDMOS base on 500V UHV device process. Only fix our 60V NLDMOS and 60V PLDMOS implant process and structure design slightly. As application on the switching device or energy management components. The specifications of this study are based on Fairchild's 60V high-voltage components as a reference. Finally, our 60V NLDMOS’s breakdown is about 13V higher than the Fairchild component and Idsat was nearly 100% increase compare to Fairchild component. In the PLDMOS part, because PLDMOS is more difficult to develop. In this study, for PLDMOS specification although BVD almost same like Fairchild's, but Idsat still have 100% increase with Fairchild’s. So this 60V LDMOS device can application on switching device or energy management component very well. Keyword: HVNLDMOS, HVPLDMOS, BCD integration, UHV device process, P-well.

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38

Dai, Chia-Tsen, and 戴嘉岑. "ESD Protection Design and Latchup Prevention in High-Voltage BCD Technology." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/5gzb89.

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Анотація:

博士
國立交通大學
電子研究所
106
Nowadays, the smart power technology has been developed and used to fabricate the display driver circuits, power switch, motor control systems, and so on. However, the process complexity and the reliability of high-voltage (HV) devices have become more challenging compared with the low-voltage (LV) devices. Among the various reliability specifications, on-chip electrostatic discharge (ESD) protection has been known as one of the important issues in HV integrated circuits (ICs). ESD is an inevitable event during fabrication, packaging and testing processes of integrated circuits. ESD protection design is therefore necessary to protect ICs from being damaged by ESD stress energies. In Chapter 2, the modified silicon-controlled rectifier (SCR) fabricated in a 0.25-μm HV Bipolar-CMOS-DMOS (BCD) technology has been proposed to seek for both effective ESD protection and latchup immunity. Experimental results show that one of the proposed SCRs has a high holding voltage of up to ~30 V in the 100-ns Transmission- line-pulsing (TLP) measurement results. However, through the experimental verification by using transient-induced latchup (TLU) test, the holding voltage of such proposed device decreases to ~20V. It is due to the increased bipolar junction transistor (BJT) current gains of the SCR path induced by the Joule heating effect in the long-term measurement. Such phenomenon is an unavoidable issue that should be carefully taken into consideration when applying SCR device for ESD protection in the HV applications. In Chapter 3, an on-chip ESD protection solution has been proposed in a 0.25-μm HV BCD process by using LV devices with stacked configuration For HV applications. Experimental results in silicon chip have verified that the proposed design can successfully protect the 60-V pins of a battery-monitoring IC against over 8-kV human-body-model (HBM) ESD stress. Moreover, stacked LV devices with sharing path technique can be more area-efficient to implement the whole-chip ESD protection in the HV CMOS ICs. In Chapter 4, the optimization of guard ring structures to improve latchup immunity in an HV double-diffused drain MOS (DDDMOS) process with the DDDMOS transistors has been investigated in a silicon test chip. The measurement results demonstrated that the test devices isolated with the specific guard ring structure of n-buried layer can highly improve the latchup immunity. In Chapter 5, the latchup path which may potentially exist at the interface between HV and LV circuits in a HV BCD technology has been investigated. Owing to the multiple well structures used to realize the HV device in the BCD process, the expected latchup path in the test structure was hardly triggered. However, a parasitic SCR path featuring a very low holding voltage is found in the experiment silicon chip. It may influence the ESD robustness of CMOS IC products with the HV and LV circuits integrated together. Thus, the layout rules at HV and LV interface should be carefully defined to avoid the occurrence of unexpected parasitic path. Chapter 6 summarizes the main results of this dissertation, where the future works based on the new proposed designs and test structures are discussed as well. The related works in this dissertation have been published in several international journals or conferences.

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39

Huang, Lai-De, and 黃來得. "Single-Photon Avalanche Diode Fabricated with Standard CMOS High Voltage Technology." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/25548709771133298730.

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Анотація:

碩士
國立交通大學
電子工程學系電子研究所
104
In this work, we investigate single-photon avalanche diodes (SPADs) in standard 0.18-m high-voltage CMOS technology provided by TSMC. The SPADs with various kinds of P-N junctions have been designed, fabricated, and characterized. Device simulation and afterward analysis are performed with Sentaurus-TCAD tool. Among the studied devices, 20-m-diameter SPADs formed with deep p-typed well (DPW) and n-typed buried layer (NBL) have the best performance including low dark count rate (DCR), high photon detection efficiency (PDE), low jitter and reduced breakdown voltage comparing with the previous ones in our group. Possible reasons for the improvement are discussed and explained by the simulation on revised doping profiles of the layers. However, the dependence of jitter on the photon wavelength exhibits unusual behavior around 720 nm and calls for further studies in the future.

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40

Mota, José Diogo Pereira Filgueiras da. "Optimised Design of High Voltage Lattice Transmission Towers." Dissertação, 2017. https://hdl.handle.net/10216/106196.

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41

Mota, José Diogo Pereira Filgueiras da. "Optimised Design of High Voltage Lattice Transmission Towers." Master's thesis, 2017. https://hdl.handle.net/10216/106196.

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42

Huang, Jing Wen, and 黃靖文. "Gd2O3/La2O3 of High Breakdown Voltage GaN HEMT with Field-Plate Technology." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/10577731565006749369.

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Анотація:

碩士
長庚大學
電子工程學系
99
Gallium nitride is a binary III / V direct bandgap semiconductor. It’s wide band gap of 3.4 eV, high-power and high-frequency devices. GaN can work at much hotter temperatures and run at much higher voltages than gallium arsenide transistors. They are perfect materials for power amplifiers at microwave frequencies. The high breakdown is 140V of La2O3. On the other hand, Gmax is 132mS/mm of La2O3. The paper consists of several parts : introduction, analysis materials and current characteristic for oxide layers (Gd2O3/La2O3), electrostatic discharge test, and so on. We implanted different oxide layers on GaN. In this case, we’re particularly interested in improving the power performance by inserting the thin lanthanum/gadolinium oxide layer on the bottom of conventional Ni/Au gate in AlGaN/GaN HEMT fabrication. The dielectric constant of Gd2O3/La2O3 are about 21.49/30.45 which provide a high channel control ability in FET. Study on measurement of results and ESD. We found gold plating process, the ESD damages could be prevented.

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43

Lin, Ruei-Ping, and 林芮萍. "Implementing Short-channel High-voltage Transistors Using Low-temperature a-InGaZnO Technology." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/f3chp2.

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Анотація:

碩士
國立交通大學
電子研究所
106
Recently, metal oxide semiconductors such as amorphous InGaZnO (a-IGZO) known as n-type semiconductors have been attracting significant attentions because of a variety of merits; in addition to good mobility、high device on/off current ratio and good uniformity, low processing temperature of a-IGZO thin-film transistors (TFTs) is important for flexible electronic devices and is compatible to the BEOL (Back End of Line) processes of CMOS logic circuits. As the CMOS technology aggressively scales, the voltage of power supply is continuously reduced to about 1V for low-power circuits. However, many applications such as automobile electronics, displays and home electronics still require high driving voltages. Thus, realizing on-chip bridging I/O circuits between high- and low-voltage devices becomes critical. The device for realizing high/low-voltage bridging I/O circuits typically operates at two different modes: high VG with low VD (Type-I) and low VG with high VD (Type-II). a-IGZO with a wide band gap oxide semiconductor is a good candidate for high-voltage device. On-chip bridging I/O circuits using the concept of monolithic three-dimensional (3D) integration of the a-IGZO technology in the BEOL process of logic circuits could potentially increase the integration density and reduce the cost. The figure of merit (FOM) of a high-voltage power device can be improved by increasing the device breakdown voltage (BV) and by reducing the device on-resistance (RON). Hence, scaling channel length of the a-IGZO TFT to reduce the RON is necessary. In this thesis, we successfully demonstrated short-channel devices using low-temperature a-IGZO to reduce the device RON and investigated the mechanism of on-current degradation in short-channel a-IGZO TFTs operated at high voltage. We observed that the threshold voltage (VTH) shifted toward more negatively as the channel length reduced or as VD in short-channel devices increased. This VTH shift phenomenon depended not only on the type of Schottky contacts, but also the oxidation of titanium contact. The oxidation of titanium generated a large number of oxygen vacancies and free electrons in a-IGZO and thus increased the conductivity of the a-IGZO channel. Another problem of short-channel a-IGZO TFTs is the reduced breakdown voltage at high VD. In contrast to long-channel devices, short-channel devices possess higher lateral electric field when applying the same VD, and the large portion of lateral voltage drops on the contact regions where channel and oxide breakdown could occur. Furthermore, we also observed an asymmetric degradation behavior of on-current in forward- and reverse-read modes before device breakdown. We also found two trends in the degradation of on-current under high VD: One was caused by the drift of oxygen ions toward drain and the other was induced by trapping/detrapping of electron at TiOx, which was oxidized from the Ti metal at the drain contact region. The influences of electron trapping/detrapping and drift of oxygen ion were more severe in short and long stress times in a-IGZO TFTs, respectively. Finally, the increased contact resistance induced by the drift of oxygen ions led to increased lateral electric field located near the drain contact and triggered the subsequent breakdown. The breakdown was not directly triggered by oxide breakdown, but was related to the hot carrier effect located at the drain contact. The reliability issues raised in this thesis should be continuously improved to enable the future high-voltage a-IGZO TFT technology.

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44

Chen, Tzong-Liang, and 陳宗良. "The Fabrication and Characterization of Tunable Holding voltage Electrostatic Discharge (ESD) Protection Device for High Voltage Integrated Circuit Technology." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/81601514683119457603.

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Анотація:

碩士
國立清華大學
電子工程研究所
90
A novel SCR-like (Silicon-Controlled Rectifier) device, called tunable holding voltage SCR device, for latchup-free and on-chip protection against electrostatic discharge (ESD) stress at output pad of LCD driver is presented. This device’s structure consists of a parasitic SCR and a P-I-N diode. The holding voltage ( ) of this device is tunable and determined by the layout dimension between anode and floating- . The holding voltage ( ) ranges from 10.4 V to 15.6 V as the spacing increases from 0 mm to 4 mm. The capability of a protection circuit using this novel device is demonstrated the human-body mode (HBM) ESD failure threshold of an output buffer is larger than 7000 V.

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45

Zheng, Zhiliang. "Low power high resolution data converter in digital CMOS technology." Thesis, 1999. http://hdl.handle.net/1957/33633.

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The advance of digital IC technology has been very fast, as shown by rapid development of DSP, digital communication and digital VLSI. Within electronic signal processing, analog-to-digital conversion is a key function, which converts the analog signal into digital form for further processing. Recently, low-voltage and low-power have become also an important factors in IC development. This thesis investigates some novel techniques for the design of low-power high-performance A/D converters in CMOS technology, and the non-ideal switched-capacitor effects of (SC) circuits. A new successive-approximation A/D converter is proposed with a novel error cancellation scheme. This A/D converter needs only a simple opamp, a comparator, and a few switches and capacitors. It can achieve high resolution with relative low power consumption. A new ratio-independent cyclic A/D converter is also proposed with techniques to compensate for the non-ideal effects. The implementation include a new differential sampling that is used to achieve ratio-independent multiple-by-two operation. Extensive simulations were performed to demonstrate the excellent performance of these data converters.
Graduation date: 1999

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46

Chang, Hsiuang-Chung, and 張湘忠. "Design and Research of High Voltage P-channel Lateral DMOSFET in CMOS Technology." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/32403611941623064445.

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Анотація:

碩士
國立清華大學
電機工程研究所
86
The high-voltage lind driving function in most telecommunication systems and planar display circuits is performed by dedicated HVICs or external discrete high voltage components. However, high-voltage line drivers, when integrated with low-voltage signal processing circuits on a single chip, can eliminate most of the external circuitry and reduce power consumption while increasing reliability. Such advantages become more appealing when an advanced technology is empowered with high voltage capability providing both complex DSP and line driving function on single chip. 　　To promote the performance of systems, Rsp and BV of high voltage devices are the major concerns in HVIC. The purpose of this work was to develop high performance 60V rated HVMOSFET employing RESURF principle and using as much of the existing conventional 1.0um CMOS process steps as possible. 　　Here emphasis is on a methodology of developing a high performance HVMOSFET in a low-voltage logic circuit process. An up front modeling study using Medici and Tsuprem4 was completed to look at device performance vs. fabrication variables. The simulation results help the formation of the window of process parameters and the various geometry ranges of devices. The relationship of trade-off between BV and Rsp are certified by measured data from hardware. Response Surface Analysis was applied to help us to get a more sensitive view in relationship between performance of devices and process parameters and cell geometry

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47

Hong, Bing-San, and 洪秉杉. "The Investigation of High Breakdown Voltage AlGaN/GaN HEMT with Field-Plate Technology." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/p856b9.

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Анотація:

碩士
長庚大學
電子工程學研究所
96
Pr2O3 high-k dioxide replacement materials have been demonstrated as the gate dielectric materials in AlGaN/GaN HEMT. The dielectric constant of and Pr2O3 are about 9.78 which provide a high channel control ability in FET. In this study, we are particularly interested in improving the power performance by inserting a thin praseodymium oxide (Pr2O3) layer on the bottom of conventional Ni/Au gate in AlGaN/GaN HEMT fabrication. It exhibits prolonged turn-on voltage, demonstrating its high swing probability, as compared with the conventional ones. The PAE enhances from 32.4% to 36.6%. And output power maximum enhances from 21.45 dBm to 21.48 dBm. A low-k benzocyclobutene (BCB) bridged and passivated layer for AlGaN/GaN high electron mobility transistors (HEMTs) with high reliability and linearity has been developed and characterized. In this study, we applied a low-k BCB-bridged interlayer to replace the conventional air-bridged process and the SiNx passivation technology of the 1 mm-wide power device fabrication. Furthermore, this novel technology has been qualified by using the 85–85 industrial specification (temperature = 85 oC, humidity = 85%) for 500 h. These results demonstrate a robust HEMT power device with a BCB passivation and bridged technology of future power device applications.

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48

Peng, Chih-Hsiang, and 彭志翔. "Novel Voltage-Controlled Oscillators and High Performance Self-Oscillating Mixer Constructed with CMOS Technology." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/67194518497801317422.

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Анотація:

碩士
長庚大學
電子工程研究所
94
This thesis proposes three circuits and they are designed, implemented, and measured. These circuits include two complementary simplified cross–coupled VCOs and a self–oscillating mixer fabricated in TSMC 0.18 μm 1P6M CMOS process. The Ku–band oscillator at the center frequency of 15 GHz associated with about –5 dBm output power. Measured phase noise is –103.11 dBc/Hz at 1 MHz offset. The Ku–band VCO achieves the FOM of –178.2 dBc/Hz. The dual–band VCO core draws 2 mA of current from 1.5 V power supply voltage. Measured phase noise at 1 MHz offset is –117.94 dBc/Hz and –111.09 dBc/Hz in the 2.14 GHz and 4.5 GHz band. The dual–band VCO achieves FOMs of –179.8 and –179.4 dBc/Hz, respectively. The conversion gain of the self–oscillating mixer (SOM) is about 6 dB at 9.2 GHz RF frequency. Measured LO phase noise is –135.6 dBc/Hz at 1 MHz offset. The SOM achieves the FOM of –198.609 dBc/Hz.

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49

Chang, Chia-Hung, and 張家宏. "A60-volt down to 5-volt DC Switching Converter using high-voltage CMOS technology." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/93168278969829598886.

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Анотація:

碩士
國立中興大學
電機工程學系所
104
The applications of portable electronic products are wide in the market, and consumers’ demands on the portable electronic products focuses on the smaller size, lighter weight and longer battery life. In order to fulfill all the consumers’ requirements, we need to integrate system into wafer. We reduce the power consumption of the system and use the voltage conversion circuit to supply different voltages required by the system to make the battery life longer. In facts, people usually use the portable electronic products in a particular time, it means only a little time the portable electronic product operates at heavy load current conditions, and most of the time portable electronic products are maintained in a standby mode and operates at light load conditions. To fulfill people’s behavior on using portable electronic products, we will design a system to reduce the power consumption when electronic products are operating at both light and heavy load current conditions and enhance the conversion efficiency of the overall system. The main purpose of this research is to achieve an applied voltage control mode buck converter regulator on portable electronic products. The regulator is available to various circuits of different voltages and when the system load changes, the regulator can automatically adjust the two power transistors’ switching time in order to make the system work efficiently and make the battery life of portable electronic products longer. Regulators simulation is the use of TSMC0.25um high-pressure processes to achieve circuit, the input voltage of 60V, an output voltage of 5V signals, the operating frequency of 400KHz, and the load current is 1A.

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50

Kelly, Roger James. "The integration of a high voltage cable fault location instrument with modern information technology." Thesis, 2002. http://hdl.handle.net/10321/2853.

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Анотація:

Dissertation submitted in compliance with the requirements for Master's Degree in Technology: Electrical Engineering (Light Current), Durban Institute of Technology, 2002.
Modern society as a whole seems destined to have an ever-increasing demand for power for both industrial and domestic use, as continued population growth means that cities, suburbs and industrial areas become larger and denser. At the same time the trend toward increased productivity in all segments of industry is influencing the development and techniques employed at locating faults in power cables and networks to ensure only limited downtime and reduced direct and indirect costs associated with the location of faults
M

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