Статті в журналах з теми "High speed ADC/DAC"
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Azarov, O. D., S. V. Bohomolov, and O. Y. Stahov. "MULTICHANNEL SPEED ADC-DAC SYSTEM BASED ON HIGH-LINE CURRENT-CURRENT CONVERTERS." Information technology and computer engineering 50, no. 1 (2021): 69–79. http://dx.doi.org/10.31649/1999-9941-2021-50-1-69-79.
Повний текст джерелаCheng, Li, Jiao Xu, Yi Xin Zhang, and Ning Yang. "Design of High-Speed and Low-Power Two-Channel Pipeline ADC." Advanced Materials Research 328-330 (September 2011): 1820–23. http://dx.doi.org/10.4028/www.scientific.net/amr.328-330.1820.
Повний текст джерелаWang, Li, Wenli Chen, Kai Chen, Renjun He, and Wenjian Zhou. "The Research on the Signal Generation Method and Digital Pre-Processing Based on Time-Interleaved Digital-to-Analog Converter for Analog-to-Digital Converter Testing." Applied Sciences 12, no. 3 (February 7, 2022): 1704. http://dx.doi.org/10.3390/app12031704.
Повний текст джерелаKakarla, Deepti. "An optimized design approach for 8-bit pipelined ADC using high gain amplifier." i-manager’s Journal on Electronics Engineering 12, no. 2 (2022): 23. http://dx.doi.org/10.26634/jele.12.2.18529.
Повний текст джерелаArafa, Kawther I., Dina M. Ellaithy, Abdelhalim Zekry, Mohamed Abouelatta, and Heba Shawkey. "Successive Approximation Register Analog-to-Digital Converter (SAR ADC) for Biomedical Applications." Active and Passive Electronic Components 2023 (January 4, 2023): 1–29. http://dx.doi.org/10.1155/2023/3669255.
Повний текст джерелаYe, Wen Hua, and Huan Li. "Design of Virtex-7 FPGA-Based High-Speed Signal Processor Carrier Board." Applied Mechanics and Materials 719-720 (January 2015): 534–37. http://dx.doi.org/10.4028/www.scientific.net/amm.719-720.534.
Повний текст джерелаChauhan, Sarita. "Implementation of 32-BIT Pipelined ADC Using 90nm Analog CMOS Technology." International Journal for Research in Applied Science and Engineering Technology 9, no. VII (July 31, 2021): 3073–80. http://dx.doi.org/10.22214/ijraset.2021.37002.
Повний текст джерелаShetty, Chaya, M. Nagabushanam, and Venkatesh Nuthan Prasad. "A 14-bit High Speed 125MS/s Low Power SAR ADC using Dual Split Capacitor DAC Architecture in 90nm CMOS Technology." International Journal of Circuits, Systems and Signal Processing 15 (June 29, 2021): 556–68. http://dx.doi.org/10.46300/9106.2021.15.62.
Повний текст джерелаBchir, Mounira, Thouraya Ettaghzouti, and Néjib Hassen. "A Novel High Frequency Low Voltage Low Power Current Mode Analog to Digital Converter Pipeline." Journal of Low Power Electronics 15, no. 4 (December 1, 2019): 368–78. http://dx.doi.org/10.1166/jolpe.2019.1621.
Повний текст джерелаVasudeva, G., and B. V. Uma. "Design and Implementation of High Speed and Low Power 12-bit SAR ADC using 22nm FinFET." WSEAS TRANSACTIONS ON SYSTEMS AND CONTROL 17 (January 3, 2022): 1–15. http://dx.doi.org/10.37394/23203.2022.17.1.
Повний текст джерелаIdros, Norhamizah, Alia Rosli, Zulfiqar Ali Abdul Aziz, Jagadheswaran Rajendran, and Arjuna Marzuki. "A 1.8 V high-speed 8-bit hybrid DAC with integrated rail-to-rail buffer amplifier in CMOS 180 nm." Microelectronics International 38, no. 2 (May 18, 2021): 46–54. http://dx.doi.org/10.1108/mi-10-2020-0073.
Повний текст джерелаReed, Lynn, John Hoenig, and Vema Reddy. "The Design and Characterization of an 8-bit ADC for 250°C Operation." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, HiTEN (January 1, 2015): 000027–32. http://dx.doi.org/10.4071/hiten-session1-paper1_5.
Повний текст джерелаJung, Youngho, and Jooyoung Jeon. "Delta-Sigma Modulator with Relaxed Feedback Timing for High Speed Applications." Electronics 8, no. 10 (October 9, 2019): 1138. http://dx.doi.org/10.3390/electronics8101138.
Повний текст джерелаZHU, ZHANGMING, GUANGWEN YU, JINGYU WANG, and YINTANG YANG. "A LOW DISTORTION BOOTSTRAPPED SWITCH FOR 4-BIT MDAC." Journal of Circuits, Systems and Computers 22, no. 01 (January 2013): 1250074. http://dx.doi.org/10.1142/s0218126612500740.
Повний текст джерелаZahrai, Seyed Alireza, Marina Zlochisti, Nicolas Le Dortz, and Marvin Onabajo. "A Low-Power High-Speed Hybrid ADC With Merged Sample-and-Hold and DAC Functions for Efficient Subranging Time-Interleaved Operation." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 11 (November 2017): 3193–206. http://dx.doi.org/10.1109/tvlsi.2017.2739108.
Повний текст джерелаBegum, Farhana, Sandeep Mishra, Md Najrul Islam, and Anup Dandapat. "A 10-bit 2.33 fJ/conv. SAR-ADC with high speed capacitive DAC switching using a novel effective asynchronous control circuitry." Analog Integrated Circuits and Signal Processing 100, no. 2 (April 9, 2019): 311–25. http://dx.doi.org/10.1007/s10470-019-01450-w.
Повний текст джерелаVerma, Deeksha, Khuram Shehzad, Sung Jin Kim, Young Gun Pu, Sang-Sun Yoo, Keum Cheol Hwang, Youngoo Yang, and Kang-Yoon Lee. "A Design of 10-Bit Asynchronous SAR ADC with an On-Chip Bandgap Reference Voltage Generator." Sensors 22, no. 14 (July 19, 2022): 5393. http://dx.doi.org/10.3390/s22145393.
Повний текст джерелаYani, Kalfika, Fiky Y. Suratman, and Koredianto Usman. "Design and Implementation Pulse Compression for S-Band Surveillance Radar." Journal of Measurements, Electronics, Communications, and Systems 7, no. 1 (December 30, 2020): 20. http://dx.doi.org/10.25124/jmecs.v7i1.2631.
Повний текст джерелаPawase, Ramesh, and N. P. Futane. "MEMS Seismic Sensor with FPAA Based Interface Circuit for Frequency-Drift Compensation using ANN." International Journal of Reconfigurable and Embedded Systems (IJRES) 6, no. 2 (May 28, 2018): 120. http://dx.doi.org/10.11591/ijres.v6.i2.pp120-126.
Повний текст джерелаChhetri, Sujit Rokka, Bikash Poudel, Sandesh Ghimire, Shaswot Shresthamali, and Dinesh Kumar Sharma. "Implementation of Audio Effect Generator in FPGA." Nepal Journal of Science and Technology 15, no. 1 (February 3, 2015): 89–98. http://dx.doi.org/10.3126/njst.v15i1.12022.
Повний текст джерелаYang, Yu-Xiang, Shi-Zhan Bai, Hai-Jun Lin, Jian-Min Li, and Fu Zhang. "Design of multi-frequency electrical impedance tomography system based on multisine excitation and integer-period sampling." Acta Physica Sinica 71, no. 5 (2022): 058703. http://dx.doi.org/10.7498/aps.71.20211375.
Повний текст джерелаTsvetkov, A. N., and Doan Ngok Shi. "Hardware-software complex for experimental research of electric drives of asynchronous motors with squirrel-cage rotor with traditional winding and motors with combined winding." Power engineering: research, equipment, technology 23, no. 6 (April 1, 2022): 157–65. http://dx.doi.org/10.30724/1998-9903-2021-23-6-157-165.
Повний текст джерелаTsvetkov, A. N., V. Yu Kornilov, A. R. Safin, A. G. Logacheva, T. I. Petrov, and N. E. Kuvshinov. "Control measuring and information system of the experimental stand." Power engineering: research, equipment, technology 22, no. 4 (November 15, 2020): 88–98. http://dx.doi.org/10.30724/1998-9903-2020-22-4-88-98.
Повний текст джерелаHuang, Fu Xiang, Zhi Qiang Gao, and Xiao Wei Liu. "Design of 16 bit 200kHz Feedforward Sigma-Delta ADC Applied in Silicon Gyroscope." Key Engineering Materials 645-646 (May 2015): 548–54. http://dx.doi.org/10.4028/www.scientific.net/kem.645-646.548.
Повний текст джерелаShrestha, Manish Man, Bibek Ropakheti, Uddhav Bhattarai, Ajay Adhikari, and Shreeram Thakur. "Intelligent Wireless Ultrasonic Device for Damage Detection of Metallic Structures." Scientific World 14, no. 14 (February 15, 2021): 31–36. http://dx.doi.org/10.3126/sw.v14i14.34979.
Повний текст джерелаRikan, Behnam, Sang-Yun Kim, Hamed Abbasizadeh, Arash Hejazi, Reza Rad, Khuram Shehzad, Keum Hwang, Youngoo Yang, Minjae Lee, and Kang-Yoon Lee. "A 10- and 12-Bit Multi-Channel Hybrid Type Successive Approximation Register Analog-to-Digital Converter for Wireless Power Transfer System." Energies 11, no. 10 (October 8, 2018): 2673. http://dx.doi.org/10.3390/en11102673.
Повний текст джерелаRomashov, V. V., K. A. Yakimenko, and A. N. Doktorov. "Wideband high-speed DAC-based frequency synthesizer." Journal of Physics: Conference Series 2388, no. 1 (December 1, 2022): 012114. http://dx.doi.org/10.1088/1742-6596/2388/1/012114.
Повний текст джерелаRiewruja *, Vanchai, and Amphawan Chaikla. "A high-speed algorithmic ADC." International Journal of Electronics 91, no. 12 (December 2004): 719–33. http://dx.doi.org/10.1080/00207210412331332862.
Повний текст джерелаSaifutdinov, A. I., and S. S. Sysoev. "Development of a Probe System for Measuring the Plasma Parameters and the High-Energy Part of the Electron-Energy Distribution Function." Instruments and Experimental Techniques 65, no. 1 (February 2022): 75–79. http://dx.doi.org/10.1134/s0020441222010195.
Повний текст джерелаLee, B. G., and S. G. Lee. "Input-tracking DAC for low-power high-linearity SAR ADC." Electronics Letters 47, no. 16 (2011): 911. http://dx.doi.org/10.1049/el.2011.1642.
Повний текст джерелаKristianti, Veronica Ernita, Hamzah Afandi, Eri Prasetyo Wibowo та Djoko Purnomo. "A 8-Bit DAC Design in AMS 0.35 μm CMOS Process for High-Speed Communication Systems". Advanced Materials Research 646 (січень 2013): 178–83. http://dx.doi.org/10.4028/www.scientific.net/amr.646.178.
Повний текст джерелаLi, Donggen. "Comparative Study of High Speed ADCs." Highlights in Science, Engineering and Technology 27 (December 27, 2022): 146–52. http://dx.doi.org/10.54097/hset.v27i.3731.
Повний текст джерелаNguyen, Cong Luong, Huu Nhan Phan, and Jong-Wook Lee. "A 12-b Subranging SAR ADC Using Detect-and-Skip Switching and Mismatch Calibration for Biopotential Sensing Applications." Sensors 22, no. 9 (May 9, 2022): 3600. http://dx.doi.org/10.3390/s22093600.
Повний текст джерелаOlieman, Erik, Anne-Johan Annema, and Bram Nauta. "An Interleaved Full Nyquist High-Speed DAC Technique." IEEE Journal of Solid-State Circuits 50, no. 3 (March 2015): 704–13. http://dx.doi.org/10.1109/jssc.2014.2387946.
Повний текст джерелаKiss, P., U. Moon, J. Steensgaard, J. T. Stonick, and G. C. Temes. "High-speed ADC with error correction." Electronics Letters 37, no. 2 (2001): 76. http://dx.doi.org/10.1049/el:20010069.
Повний текст джерелаHuang, Cheng, You Hui Li, Ya Dan Zhang, and Nan Wang. "Testing of High-Resolution Analog-to-Digital Converters Using Segmentation and Optimized Low-Precision DAC." Applied Mechanics and Materials 333-335 (July 2013): 1669–72. http://dx.doi.org/10.4028/www.scientific.net/amm.333-335.1669.
Повний текст джерелаBastos, J., A. M. Marques, M. S. J. Steyaert, and W. Sansen. "A 12-bit intrinsic accuracy high-speed CMOS DAC." IEEE Journal of Solid-State Circuits 33, no. 12 (1998): 1959–69. http://dx.doi.org/10.1109/4.735536.
Повний текст джерелаJung, Jaejin, Sangho Shin, Shin-Il Lim, Suki Kim, and Sung-Mo Kang. "Power efficient high-speed DAC for wideband communication applications." Analog Integrated Circuits and Signal Processing 70, no. 3 (August 4, 2011): 421–28. http://dx.doi.org/10.1007/s10470-011-9708-4.
Повний текст джерелаRohman, Fatkhur, Nurhadi Nurhadi, and Mira Esculenta Martawati. "Unjuk Kerja GPIO, PWM, ADC dan Timer pada Mikrokontroler STM32F103, ESP32S dan ATMega328." JURNAL ELTEK 19, no. 2 (October 29, 2021): 73. http://dx.doi.org/10.33795/eltek.v19i2.295.
Повний текст джерелаLi, H., J. Eckmueller, S. Sattler, H. Eichfeld, and R. Weigel. "A new BIST scheme for low-power and high-resolution DAC testing." Advances in Radio Science 1 (May 5, 2003): 289–93. http://dx.doi.org/10.5194/ars-1-289-2003.
Повний текст джерелаOsipov, Dmitry, Aleksandr Gusev, Vitaly Shumikhin, and Steffen Paul. "Noise shaping in SAR ADC." Facta universitatis - series: Electronics and Energetics 33, no. 1 (2020): 15–26. http://dx.doi.org/10.2298/fuee2001015o.
Повний текст джерелаKwon, Chan-Keun, Junil Moon, and Soo-Won Kim. "A 12-Bit 500-MS/s Current Steering CMOS DAC for High-Speed PLC Modems." Journal of Circuits, Systems and Computers 25, no. 10 (July 22, 2016): 1650122. http://dx.doi.org/10.1142/s021812661650122x.
Повний текст джерелаCidon, Israel, and Inder S. Gopal. "Paris: An approach to integrated high-speed private networks." International Journal of Digital & Analog Cabled Systems 1, no. 2 (April 1988): 77–85. http://dx.doi.org/10.1002/dac.4520010208.
Повний текст джерелаSHIN, YOUNG SAN, JAE-KYUNG WEE, JONG-CHAN HA, JI-HOON LIM, YONG-JU KIM, and YOUNG-SANG SON. "A SEAMLESS-CONTROLLED DIGITAL PLL USING DUAL LOOPS FOR HIGH SPEED SOCS." Journal of Circuits, Systems and Computers 20, no. 04 (June 2011): 741–56. http://dx.doi.org/10.1142/s021812661100758x.
Повний текст джерелаZhuang, Yuming, Benjamin Magstadt, Tao Chen, and Degang Chen. "High-Purity Sine Wave Generation Using Nonlinear DAC With Predistortion Based on Low-Cost Accurate DAC–ADC Co-Testing." IEEE Transactions on Instrumentation and Measurement 67, no. 2 (February 2018): 279–87. http://dx.doi.org/10.1109/tim.2017.2769238.
Повний текст джерелаKumawat, Mahesh, Abhishek Kumar Upadhyay, Sanjay Sharma, Ravi Kumar, Gaurav Singh, and Santosh Kumar Vishvakarma. "An improved current mode logic latch for high-speed applications." International Journal of Communication Systems 33, no. 13 (July 29, 2019): e4118. http://dx.doi.org/10.1002/dac.4118.
Повний текст джерелаSaito, Hiroshi. "VP dimensioning for high-speed data communication in ATM networks." International Journal of Communication Systems 7, no. 4 (1994): 275–81. http://dx.doi.org/10.1002/dac.4500070404.
Повний текст джерелаLi, Victor O. K., Jin-Fu Chang, Kuo-Chun Lee, and Tien-Shun Yang. "A survey of research and standards in high-speed networks." International Journal of Digital & Analog Communication Systems 4, no. 4 (October 1991): 269–309. http://dx.doi.org/10.1002/dac.4510040406.
Повний текст джерелаNilsson, Arne A., and Fuyung Lai. "Performance evaluation of error recovery schemes in high-speed networks." International Journal of Digital & Analog Communication Systems 5, no. 3 (1992): 177–87. http://dx.doi.org/10.1002/dac.4510050308.
Повний текст джерелаDimitrov, D. P., and T. K. Vasileva. "Eight-Bit Semiflash A/D Converter." VLSI Design 2007 (July 12, 2007): 1–7. http://dx.doi.org/10.1155/2007/80389.
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