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Автор: Grafiati
Опубліковано: 6 вересня 2023

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Статті в журналах з теми "Hardware identification"

1

Moein, Samer, Fayez Gebali, T. Aaron Gulliver, and Abdulrahman Alkandari. "Hardware Trojan Identification and Detection." International Journal on Cryptography and Information Security 7, no. 2 (June 30, 2017): 1–20. http://dx.doi.org/10.5121/ijcis.2017.7201.

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2

MACHER*, Georg, Harald SPORER, Eugen BRENNER, and Christian KREINER. "Signal-Layer Security and Trust-Boundary Identification based on Hardware-Software Interface Definition." Journal of Ubiquitous Systems and Pervasive Networks 10, no. 1 (March 7, 2018): 1–9. http://dx.doi.org/10.5383/juspn.10.01.001.

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3

Sugisaka, Masanori, Shuuji Motomura, Takashi Kitaguchi, Toshiyuki Furuta, and Hirotosi Eguchi. "Hardware-based neural identification: Linear dynamical systems." Artificial Life and Robotics 1, no. 3 (September 1997): 151–55. http://dx.doi.org/10.1007/bf02471131.

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4

Alex, Anish T., Michel Dumontier, Jonathan S. Rose, and Christopher W. V. Hogue. "Hardware-accelerated protein identification for mass spectrometry." Rapid Communications in Mass Spectrometry 19, no. 6 (2005): 833–37. http://dx.doi.org/10.1002/rcm.1853.

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5

Mondal, Anindan, Rajesh Kumar Biswal, Mahabub Hasan Mahalat, Suchismita Roy, and Bibhash Sen. "Hardware Trojan Free Netlist Identification: A Clustering Approach." Journal of Electronic Testing 37, no. 3 (June 2021): 317–28. http://dx.doi.org/10.1007/s10836-021-05953-1.

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6

Zheng Zhaoyang, 郑朝阳, 张天舒 Zhang Tianshu, 范广强 Fan Guangqiang, 刘洋 Liu Yang, 吕立慧 Lü Lihui, and 项衍 Xiang Yan. "Identification Method of Ozone Lidar Hardware Failure Data." Chinese Journal of Lasers 46, no. 4 (2019): 0404004. http://dx.doi.org/10.3788/cjl201946.0404004.

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7

Santana Farias, Marcos, Nadia Nedjah, and Luiza de Macedo Mourelle. "Hardware implementation of subtractive clustering for radionuclide identification." Integration 46, no. 3 (June 2013): 220–29. http://dx.doi.org/10.1016/j.vlsi.2012.10.005.

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8

Ji, Yong Gang, Han Ming Zheng, and Yan Peng Zhang. "Electromagnetic Identification Intelligent Vehicle System Design." Applied Mechanics and Materials 401-403 (September 2013): 1695–98. http://dx.doi.org/10.4028/www.scientific.net/amm.401-403.1695.

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This paper introduces the electromagnetic identification intelligent vehicles hardware system design diagram and software design process based MC9S12XSl28 microcontroller, focusing on the design of intelligent vehicle power unit circuit, the electromagnetic signal amplification circuit, the motor drive module, gives a detailed schematic. Software design give a specific design flow, integrated hardware and software design constitutes intelligent vehicles overall system.
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9

Cao, Qichun, Binqiang Wang, Gang Dong, Kekun Hu, and Hongbin Yang. "Operator Optimization Oriented Person Re-Identification." Journal of Physics: Conference Series 2284, no. 1 (June 1, 2022): 012019. http://dx.doi.org/10.1088/1742-6596/2284/1/012019.

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Abstract Using FPGA to accelerate the application of convolutional neural networks has attracted more and more attention. However, the design technology of the FPGA accelerator cannot follow up the latest achievements of the convolutional neural networks, nor can it consider optimizing the complex network structure combined with the characteristics of hardware to improve the accuracy of the network and simplify the implementation of hardware. To address these issues, in this paper, we adopt the development idea of algorithm-hardware co-design, compress the structure and optimize the operator for a state-of-the-art lightweight person re-identification network, and design a new network model SGCNet (Shift Gaussian Convolution Network). Specifically, SGCNet is obtained by structure optimization and operator replacement according to the optimization degree of the operator in the FPGA hardware environment. For convolution operation, only 1 × 1 kernel convolution operator is adopted in SGCNet, while spatial convolution is replaced by a more effective shift operation. SGCNet is more concise and clear in the operation types and complex structure of the network. Experimental evaluations demonstrate that SGCNet’s top-5 accuracy of 92.7% on ImageNet and R1 accuracy of 74.6% on CUHK03 of person re-identification data set, is higher than CMSNet network.
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10

Gude, Juan J., and Pablo García Bringas. "A Novel Control Hardware Architecture for Implementation of Fractional-Order Identification and Control Algorithms Applied to a Temperature Prototype." Mathematics 11, no. 1 (December 28, 2022): 143. http://dx.doi.org/10.3390/math11010143.

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In this paper, the conceptualization of a control hardware architecture aimed to the implementation of integer- and fractional-order identification and control algorithms is presented. The proposed hardware architecture combines the capability of implementing PC-based control applications with embedded applications on microprocessor- and FPGA-based real-time targets. In this work, the potential advantages of this hardware architecture over other available alternatives are discussed from different perspectives. The experimental prototype that has been designed and built to evaluate the control hardware architecture proposed in this work is also described in detail. The thermal-based process taking place in the prototype is characterized for being reconfigurable and exhibiting fractional behaviour, which results in a suitable equipment for the purpose of fractional-order identification and control. In order to demonstrate the applicability and effectiveness of the proposed control hardware architecture, integer- and fractional-order identification and control algorithms implemented in various control technologies have been applied to the temperature-based experimental prototype described before. Detailed discussion about results and identification and control issues are provided. The main contribution of this work is to provide an efficient and practical hardware architecture for implementing fractional-order identification and control algorithms in different control technologies, helping to bridge the gap between real-time hardware solutions and software-based simulations of fractional-order systems and controllers. Finally, some conclusions and concluding remarks are offered in the industrial context.
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Дисертації з теми "Hardware identification"

1

Krantz, Elias. "Experiment Design for System Identification on Satellite Hardware Demonstrator." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-71351.

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The subject of this thesis covers the process of online parameter estimation of agile satellites. Accurate knowledge of parameters such as moment of inertia and centre of mass play a crucial role in satellite attitude control and pointing performance. Typically, identification of parameters such as these is performed on-ground using post-processing algorithms. This thesis investigates the potential of performing the identification procedures in real-time on-board operating satellites, using only measurements available from typical satellite attitude sensors.    The thesis covers the areas of system identification and modelling of spacecraft attitude dynamics. An algorithm based on the Unscented Kalman Filter is developed for online parameter estimation of spacecraft moment of inertia parameters. The proposed method is successfully validated, both through simulation environments, and in practice using Airbus’ satellite hardware demonstrator INTREPID, a three-axis air-bearing table equipped with CMG actuators and typical attitude sensors.
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2

Linvåg, Elisabeth. "Co-design implementation of FPGA hardware acceleration of DNA motif identification." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2008. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8874.

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Pattern matching in bio-informatics is a discipline in sturdy growth, and has a great need for searching through large amounts of data. At NTNU, a prototype specified in VHDL has been developed for an FPGA-solution identifying short motifs or patterns in genetic data using a Position-Weight Matrix (PWM). But programming FPGAs using VHDL is a complicated and time consuming process that requires intimate knowledge of how hardware works, and the prototype is not yet complete in terms of required functionality. Consequently, a desirable alternative is to make use of co-design languages to facilitate the use of hardware for a software developer, as well as to integrate the environment for development of soft- and hardware. This thesis deal with specification and implementation of a co-design based alternative to the existing VHDL based solution, as well as an evaluation of productivity vs final performance of the newly developed solution compared to the VHDL based solution. The chosen co-design language is Impulse-C, created by Impulse Accelerated Technologies Inc., which is a co-design language designed for data-flow oriented applications, but with the flexibility to support other programming models as well. The programming model simplifies the expression of highly parallel algorithms through the use of well-defined data communication, message passing and synchronization mechanisms. The affiliated development environment, CoDeveloper, contains tools that allow the FPGA system to be developed and debugged using Impulse-C. The software-to-hardware compiler and optimizer translates C-language processes to (RTL) VHDL code, while optimizing the generated logic and identifying opportunities for parallelism. Ease-of-use for the CoDeveloper environment is evaluated in this thesis, based on the authors experiences with the tools. In total, four variations of the Impulse-C solution has been implemented; a basic solution and a multicore solution, both implemented in a floating-point and a 'fixed-point' version. The implemented solutions are analyzed through various experiments described in this thesis, done during simulation using CoDeveloper. Attempts were made to get the solutions to run on the target platform, the Cray XD1 supercomputer Musculus, but these were unsuccessful. A wrong choice of properties and constraints in Xilinx ISE are believed to have caused the FPGA programming file to be generated faulty. There was no time to confirm and correct this. Some information about device utilization and performance could still be extracted from the Xilinx ISE 'Static timing' and 'Place and route' reports.

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3

Rask, Ulf, and Pontus Mannestig. "Improvement of hardware basic testing : Identification and development of a scripted automation tool that will support hardware basic testing." Thesis, Blekinge Tekniska Högskola, Institutionen för programvaruteknik och datavetenskap, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:bth-3392.

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In the ever-increasing development pace, circuits and hardware are no exception. Hardware designs grow and circuits gets more complex at the same time as the market pressure lowers the expected time-to-market. In this rush, verification methods often lag behind. Hardware manufacturers must be aware of the importance of total verification if they want to avoid quality flaws and broken deadlines which in the long run will lead to delayed time-to-market, bad publicity and a decreasing market share. This paper discusses how a basic testing team may use an automated test environment in order to establish intellectual control regarding the testing and verification in a large hardware project. Company-specific factors that influence the design of an automated test environment are analyzed and a suggestion of a suitable environment is made. A prototype of the environment is constructed so that the project results may be evaluated in the real world. The thesis support the academic field in stating that large chips are hard to verify and that script-automation tools are one way to make verification of larger chips possible. Hardware verification should be made without complicated and untested software so that the debugging process only has the hardware to deal with. The thesis also indicates that an automated test tool increases the test rate, provides better test coverage and make regression testing feasible.
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4

Harder, Timothy A. "Identification of computer hardware and software used by the printing and publishing industry." Menomonie, WI : University of Wisconsin--Stout, 2005. http://www.uwstout.edu/lib/thesis/2005/2005hardert.pdf.

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5

Black, Derek J. "Development and feasibility of economical hardware and software in control theory application." Thesis, Kansas State University, 2017. http://hdl.handle.net/2097/38170.

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Анотація:
Master of Science
Department of Mechanical and Nuclear Engineering
Dale E. Schinstock
Control theory is the study of feedback systems, and a methodology investigated by many engineering students throughout most universities. Because of control theory's broad and interdisciplinary nature, it necessitates further study by application through experimental learning and laboratory practice. Typically, the hardware used to connect the theoretical aspects of controls to the practical can be expensive, big, and time consuming to the students and instructors teaching on the equipment. Alternatively, using cheaper sensors and hardware, such as encoders and motor drivers, can obfuscate the collected data in a way that creates a disconnect between developed theoretical models and actual system results. This disconnect can dissuade the idea that systems can and will follow a modeled behavior. This thesis attempts to assess the feasibility of a piece of laboratory apparatus named the NERMLAB. Multiple experiments will be conducted on the NERMLAB system and compared against time-tested hardware to demonstrate the practicality of the NERMLAB system in control theory application.
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6

Farias, Marcos Santana. "Hardware reconfigurável para identificação de radionuclídeos utilizando o método de agrupamento subtrativo." Universidade do Estado do Rio de Janeiro, 2012. http://www.bdtd.uerj.br/tde_busca/arquivo.php?codArquivo=7451.

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Fontes radioativas possuem radionuclídeos. Um radionuclídeo é um átomo com um núcleo instável, ou seja, um núcleo caracterizado pelo excesso de energia que está disponível para ser emitida. Neste processo, o radionuclídeo sofre o decaimento radioativo e emite raios gama e partículas subatômicas, constituindo-se na radiação ionizante. Então, a radioatividade é a emissão espontânea de energia a partir de átomos instáveis. A identificação correta de radionuclídeos pode ser crucial para o planejamento de medidas de proteção, especialmente em situações de emergência, definindo o tipo de fonte de radiação e seu perigo radiológico. Esta dissertação apresenta a aplicação do método de agrupamento subtrativo, implementada em hardware, para um sistema de identificação de elementos radioativos com uma resposta rápida e eficiente. Quando implementados em software, os algoritmos de agrupamento consumem muito tempo de processamento. Assim, uma implementação dedicada para hardware reconfigurável é uma boa opção em sistemas embarcados, que requerem execução em tempo real, bem como baixo consumo de energia. A arquitetura proposta para o hardware de cálculo do agrupamento subtrativo é escalável, permitindo a inclusão de mais unidades de agrupamento subtrativo para operarem em paralelo. Isso proporciona maior flexibilidade para acelerar o processo de acordo com as restrições de tempo e de área. Os resultados mostram que o centro do agrupamento pode ser identificado com uma boa eficiência. A identificação desses pontos pode classificar os elementos radioativos presentes em uma amostra. Utilizando este hardware foi possível identificar mais do que um centro de agrupamento, o que permite reconhecer mais de um radionuclídeo em fontes radioativas. Estes resultados revelam que o hardware proposto pode ser usado para desenvolver um sistema portátil para identificação radionuclídeos.
Radioactive sources include radionuclides. A radionuclide is an atom with an unstable nucleus, i.e. a nucleus characterized by excess of energy, which is available to be imparted. In this process, the radionuclide undergoes radioactive decay and emits gamma rays and subatomic particles, constituting the ionizing radiation. So, radioactivity is the spontaneous emission of energy from unstable atoms. Correct radionuclide identification can be crucial to planning protective measures, especially in emergency situations, by defining the type of radiation source and its radiological hazard. This project introduces the application of subtractive clustering method, in a hardware implemnetation, for an identification system of radioactive elements that allows a rapid and efficient identification. In software implementations, clustering algorithms, usually, are demanding in terms of processing time. Thus, a custom implementation on reconfigurable hardware is a viable choice in embedded systems, so as to achieve real-time execution as well as low power consumption. The proposed architecture for the hardware of subtractive clustering is scalable, allowing for the inclusion of more of subtractive clustering unit that operate in parallel. This provides greater flexibility to accelerate the hardware with respect to the time and area requirements. The results show that the expected cluster center can be identified with efficiently. The identification of these points can classify the radioactive elements present in a sample. Using the designed hardware, it is possible to identify more than one cluster center, which would lead to the recognition of more than one radionuclide in radioactive sources. These results reveal that the proposed hardware to subtractive cluster can be used to design a portable system for radionuclides identification.
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7

Maki, Phyllis A. "Identification of entry-level clerical/secretarial skills and competencies and utilization of hardware and software applications in Clark County businesses." PDXScholar, 1990. https://pdxscholar.library.pdx.edu/open_access_etds/3496.

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Business educators need to provide relevant career education and train students adequately for entry-level work and success in a dynamic and changing society. It is imperative, then, we identify those skills, knowledge, and attitudes necessary for success not only in today's office but also in the office of the future. To determine the competencies and skills required, a survey of businesses in the Clark County area was completed. The questionnaire was designed to assess current computer usage and technical and nontechnical skill requirements.
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8

Aykin, Murat Deniz. "Efficient Calibration Of A Multi-camera Measurement System Using A Target With Known Dynamics." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/3/12609798/index.pdf.

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Multi camera measurement systems are widely used to extract information about the 3D configuration or &ldquo
state&rdquo
of one or more real world objects. Camera calibration is the process of pre-determining all the remaining optical and geometric parameters of the measurement system which are either static or slowly varying. For a single camera, this consist of the internal parameters of the camera device optics and construction while for a multiple camera system, it also includes the geometric positioning of the individual cameras, namely &ldquo
external&rdquo
parameters. The calibration is a necessary step before any actual state measurements can be made from the system. In this thesis, such a multi-camera state measurement system and in particular the problem of procedurally effective and high performance calibration of such a system is considered. This thesis presents a novel calibration algorithm which uses the known dynamics of a ballistically thrown target object and employs the Extended Kalman Filter (EKF) to calibrate the multi-camera system. The state-space representation of the target state is augmented with the unknown calibration parameters which are assumed to be static or slowly varying with respect to the state. This results in a &ldquo
super-state&rdquo
vector. The EKF algorithm is used to recursively estimate this super-state hence resulting in the estimates of the static camera parameters. It is demonstrated by both simulation studies as well as actual experiments that when the ballistic path of the target is processed by the improved versions of the EKF algorithm, the camera calibration parameter estimates asymptotically converge to their actual values. Since the image frames of the target trajectory can be acquired first and then processed off-line, subsequent improvements of the EKF algorithm include repeated and bidirectional versions where the same calibration images are repeatedly used. Repeated EKF (R-EKF) provides convergence with a limited number of image frames when the initial target state is accurately provided while its bidirectional version (RB-EKF) improves calibration accuracy by also estimating the initial target state. The primary contribution of the approach is that it provides a fast calibration procedure where there is no need for any standard or custom made calibration target plates covering the majority of camera field-of-view. Also, human assistance is minimized since all frame data is processed automatically and assistance is limited to making the target throws. The speed of convergence and accuracy of the results promise a field-applicable calibration procedure.
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9

Senses, Engin Utku. "Blur Estimation And Superresolution From Multiple Registered Images." Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/3/12609929/index.pdf.

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Resolution is the most important criterion for the clarity of details on an image. Therefore, high resolution images are required in numerous areas. However, obtaining high resolution images has an evident technological cost and the value of these costs change with the quality of used optical systems. Image processing methods are used to obtain high resolution images with low costs. This kind of image improvement is named as superresolution image reconstruction. This thesis focuses on two main titles, one of which is the identification methods of blur parameters, one of the degradation operators, and the stochastic SR image reconstruction methods. The performances of different stochastic SR image reconstruction methods and blur identification methods are shown and compared. Then the identified blur parameters are used in superresolution algorithms and the results are shown.
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10

Seyed, Saboonchi Nima. "Hardware Security Module Performance Optimization by Using a "Key Pool" : Generating keys when the load is low and saving in the external storage to use when the load is high." Thesis, KTH, Radio Systems Laboratory (RS Lab), 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-158122.

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This thesis project examines the performance limitations of Hardware Security Module (HSM) devices with respect to fulfilling the needs of security services in a rapidly growing security market in a cost-effective way. In particular, the needs due to the introduction of a new electronic ID system in Sweden (the Federation of Swedish eID) and how signatures are created and managed. SafeNet Luna SA 1700 is a high performance HSM's available in the current market. In this thesis the Luna SA 1700 capabilities are stated and a comprehensive analysis of its performance shows a performance gap between what HSMs are currently able to do and what they need to do to address the expected demands. A case study focused on new security services needed to address Sweden's e Identification organization is presented. Based upon the expected performance demands, this thesis project proposes an optimized HSM solution to address the identified performance gap between what is required and what current HSMs can provide. A series of tests were conducted to measure an existing HSM's performance. An analysis of these measurements was used to optimize a proposed solution for selected HSM or similar HSMs. One of the main requirements of the new signing service is the capability to perform fifty digital signatures within the acceptable response time which is 300 ms during normal hours and 3000 ms during peak hours. The proposed solution enables the HSM to meet the expected demands of 50 signing request per second in the assumed two hours of peak rate at a cost that is 1/9 of the cost of simply scaling up the number of HSMs. The target audience of this thesis project is Security Service Providers who use HSMs and need a high volume of key generation and storing. Also HSM vendors consider this solution and add similar functionality to their devices in order to meet the desired demands and to ensure a better future in this very rapidly growing market.
Detta examensarbete undersöker prestandabegränsningar för Hardware Security Module (HSM) enheter med avseende på att uppfylla behov av säkerhetstjänster i en snabbt växande marknad och på ett kostnadseffektivt sätt. I synnerhet på grund av de säkerhetskrav som nu existerar/tillkommit efter införandet av ett nytt elektroniskt ID-system i Sverige (Federationen för Svensk eID) och hur underskrifter skapas och hanteras. SafeNet Luna SA 1700 är en högpresterande HSM enhet tillgänglig på marknaden. I den här avhandlingen presenteras nuvarande HSM kapacitet och en omfattande analys av resultatet visar ett prestanda gap mellan vad HSMS för närvarande kan göra och vad som behöver förbättras för att ta itu med de förväntade kraven. En fallstudie fokuserad på nya säkerhetstjänster som krävs i och med Sveriges nya e-Identifiering presenteras. Baserat på resultatet i den här avhandlingen föreslås en optimerad HSM lösning för att tillgodose prestanda gapet mellan vad HSM presterar och de nya krav som ställs. Ett flertal tester genomfördes för att mäta en befintlig HSM prestanda. En analys av dessa mätningar användes för att föreslå en optimerad lösning för HSMS (eller liknande) enheter. Ett av de huvudsakliga kraven för den nya signeringstjänsten är att ha en kapacitet av 50 digitala signaturer inom en accepterad svarstidsintervall, vilket är 300ms vid ordinarie trafik och 3000ms vid högtrafik. Förslagen i avhandlingen möjliggör HSM enheten att tillgodose kraven på 50 signeringen per sekund under två timmars högtrafik, och till en 1/9 kostnad genom att skala upp antalet HSMs. Målgruppen i den här avhandlingen är användare av HSMs och där behovet av lagring och generering av nycklar i höga volymer är stort. Även HSM leverantörer som kan implementera den här optimeringen/lösningen i befintlig funktionalitet för att tillgodose det här behovet i en alltmer växande marknad.
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Книги з теми "Hardware identification"

1

Alex, Anish. Hardware Accelerated protein identification. Ottawa: National Library of Canada, 2003.

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2

1928-, Moran Robert, and Business Communications Co, eds. Automatic product/people identification: Systems, hardware. Norwalk, Conn: Business Communications Co., 1987.

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3

Zhu, Yucai. Identification of Multivariable Industrial Processes: For Simulation, Diagnosis and Control. London: Springer London, 1993.

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4

Rao, A. Ravishankar. A Taxonomy for Texture Description and Identification. New York, NY: Springer US, 1990.

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5

Interactive system identification: Prospects and pitfalls. Berlin: Springer-Verlag, 1991.

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6

Bohlin, Torsten. Interactive System Identification: Prospects and Pitfalls. Berlin, Heidelberg: Springer Berlin Heidelberg, 1991.

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7

Heuring, Jerry. Collector's guide to E.C. Simmons Keen Kutter cutlery and tools: Identification & values. Paducah, KY: Collector Books, 2000.

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8

Wilson, H. Weber. Antique hardware price guide: A comprehensive collector's price and identification guide to vintage doorknobs, door bells, mail slots, hinges, door pulls, shutter hardware, and locksets. Iola, Wis: Krause Publications, 1999.

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9

Ehrlich, Paul R. The birder's handbook: A field guide to the natural history of North American birds : including all species that regularly breed north of Mexico. New York: Simon & Schuster, 1988.

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10

A Taxonomy for Texture Description and Identification. Springer My Copy UK, 1990.

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Частини книг з теми "Hardware identification"

1

Zhang, Guangjun. "Hardware Implementation and Performance Test of Star Identification." In Star Identification, 199–223. Berlin, Heidelberg: Springer Berlin Heidelberg, 2016. http://dx.doi.org/10.1007/978-3-662-53783-1_7.

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Tuyls, Pim. "Hardware Intrinsic Security." In Radio Frequency Identification: Security and Privacy Issues, 123. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-16822-2_11.

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Farahmandi, Farimah, M. Sazadur Rahman, Sree Ranjani Rajendran, and Mark Tehranipoor. "CAD for Security Asset Identification." In CAD for Hardware Security, 21–35. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-26896-0_2.

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Alex, Anish, Jonathan Rose, Ruth Isserlin-Weinberger, and Christopher Hogue. "Hardware Accelerated Novel Protein Identification." In Field Programmable Logic and Application, 13–22. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30117-2_4.

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Canyellas, Nicolau, Enrique Cantó, Giuseppe Forte, and Mariano López. "Hardware-Software Codesign of a Fingerprint Identification Algorithm." In Lecture Notes in Computer Science, 683–92. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11527923_71.

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Santana Farias, Marcos, Nadia Nedjah, and Luiza de Macedo Mourelle. "Reconfigurable Hardware to Radionuclide Identification Using Subtractive Clustering." In Algorithms and Architectures for Parallel Processing, 387–98. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-24669-2_37.

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Cox, David, and David Oswald. "$$\upmu $$ Proxy: A Hardware Relay for Anonymous and Secure Internet Access." In Radio Frequency Identification and IoT Security, 175–87. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-62024-4_13.

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Gogoi, Ankur, and Bibhas Ghoshal. "Application-Driven Fault Identification in NoC Designs." In VLSI and Hardware Implementations Using Modern Machine Learning Methods, 79–96. Boca Raton: CRC Press, 2021. http://dx.doi.org/10.1201/9781003201038-5.

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Kim, Mooseop, Jaecheol Ryou, Yongje Choi, and Sungik Jun. "Low Power AES Hardware Architecture for Radio Frequency Identification." In Advances in Information and Computer Security, 353–63. Berlin, Heidelberg: Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11908739_25.

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Simons, Robert A. "Identification of major vehicle-related hardware and technological trends." In Driverless Cars, Urban Parking and Land Use, 14–36. First edition. | Abingdon, Oxon ; New York : Routledge, 2020.: Routledge, 2020. http://dx.doi.org/10.1201/9780429469541-3.

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Тези доповідей конференцій з теми "Hardware identification"

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Hamers, Juan, and Lieven Eeckhout. "Automated hardware-independent scenario identification." In the 45th annual conference. New York, New York, USA: ACM Press, 2008. http://dx.doi.org/10.1145/1391469.1391710.

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Bianchi, Gea, Fabiola Casasopra, Gianluca C. Durelli, and Marco D. Santambrogio. "A hardware approach to protein identification." In 2015 IEEE Biomedical Circuits and Systems Conference (BioCAS). IEEE, 2015. http://dx.doi.org/10.1109/biocas.2015.7348382.

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Li, Weiwei, Mingshu Li, Yue Ma, and Qiusong Yang. "PMU-extended Hardware ROP Attack Detection." In 2018 12th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID). IEEE, 2018. http://dx.doi.org/10.1109/icasid.2018.8693210.

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Iavich, Maksim, Razvan Bocu, Giorgi Iashvili, and Sergiy Gnatyuk. "Novel Method of Hardware Security Problems Identification." In 2020 IEEE International Conference on Problems of Infocommunications. Science and Technology (PIC S&T). IEEE, 2020. http://dx.doi.org/10.1109/picst51311.2020.9467966.

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Jinhai, Zhang. "Hardware design of embedded fingerprint identification system." In 2011 International Conference on Consumer Electronics, Communications and Networks (CECNet). IEEE, 2011. http://dx.doi.org/10.1109/cecnet.2011.5769119.

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Farias, M. S., N. Nedjah, and L. de Macedo Mourelle. "Efficient hardware architecture for embedded radionuclide identification." In 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS). IEEE, 2013. http://dx.doi.org/10.1109/lascas.2013.6519032.

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Vaidya, Girish, and T. V. Prabhakar. "Hardware based identification for Intelligent Electronic Devices." In 2022 IEEE/ACM Seventh International Conference on Internet-of-Things Design and Implementation (IoTDI). IEEE, 2022. http://dx.doi.org/10.1109/iotdi54339.2022.00018.

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Heafield, Kenneth, Rohan Kshirsagar, and Santiago Barona. "Language Identification and Modeling in Specialized Hardware." In Proceedings of the 53rd Annual Meeting of the Association for Computational Linguistics and the 7th International Joint Conference on Natural Language Processing (Volume 2: Short Papers). Stroudsburg, PA, USA: Association for Computational Linguistics, 2015. http://dx.doi.org/10.3115/v1/p15-2063.

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Liang, Feng, and Chun Zhang. "Hardware Oriented Vision System of Logistics Robotics." In 2018 12th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID). IEEE, 2018. http://dx.doi.org/10.1109/icasid.2018.8693116.

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Rahman, Mostafizur, Iqbalur Rahman Rokon, and Miftahur Rahman. "Efficient hardware implementation of RSA cryptography." In 2009 3rd International Conference on Anti-counterfeiting, Security, and Identification in Communication (2009 ASID). IEEE, 2009. http://dx.doi.org/10.1109/icasid.2009.5276895.

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Звіти організацій з теми "Hardware identification"

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Maki, Phyllis. Identification of entry-level clerical/secretarial skills and competencies and utilization of hardware and software applications in Clark County businesses. Portland State University Library, January 2000. http://dx.doi.org/10.15760/etd.5379.

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Mohr, M. O. L51679 Diver Assisted Pipeline Repair Manual. Chantilly, Virginia: Pipeline Research Council International, Inc. (PRCI), December 1992. http://dx.doi.org/10.55274/r0010288.

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Анотація:
Much of the industries offshore pipeline system, especially in water depths of 100 ft. or less, is approaching its design life. As this pipeline system ages, the likelihood of a failure due to erosion and/or corrosion in any part of the system is expected to increase. Other factors such as operational errors, vessel related impacts, and environmental phenomenon all contribute to offshore pipeline failures. The basic technology for repairing damaged or failed pipelines offshore has been known for several years. This technology continues to be refined and developed to meet more hostile environments and to improve reliability. At the same time, attempts are being made to minimize the time taken to affect a repair, thereby reducing the downtime of the line and the total cost of the repair. Three volumes intended to provide the field engineer a guide for the identification and selection of an appropriate diver-assisted repair method for the determination of the required service support, the location of the appropriate repair hardware, and an estimation of the time and cost associated with the repair.
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