Статті в журналах з теми "Extensible processor"
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Martin, Grant. "What is a configurable, extensible processor?" ACM SIGDA Newsletter 38, no. 16 (August 15, 2008): 1. http://dx.doi.org/10.1145/1862846.1862847.
Повний текст джерелаMartin, Grant. "What is a configurable, extensible processor?" ACM SIGDA Newsletter 38, no. 17 (September 2008): 1. http://dx.doi.org/10.1145/1862849.1862850.
Повний текст джерелаGonzalez, R. E. "Xtensa: a configurable and extensible processor." IEEE Micro 20, no. 2 (2000): 60–70. http://dx.doi.org/10.1109/40.848473.
Повний текст джерелаMartin, Grant. "Multi-Processor SoC-Based Design Methodologies Using Configurable and Extensible Processors." Journal of Signal Processing Systems 53, no. 1-2 (November 29, 2007): 113–27. http://dx.doi.org/10.1007/s11265-007-0153-7.
Повний текст джерелаSun, F., S. Ravi, A. Raghunathan, and N. K. Jha. "Custom-Instruction Synthesis for Extensible-Processor Platforms." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 2 (February 2004): 216–28. http://dx.doi.org/10.1109/tcad.2003.822133.
Повний текст джерелаMisko, Joshua, Shrikant S. Jadhav, and Youngsoo Kim. "Extensible Embedded Processor for Convolutional Neural Networks." Scientific Programming 2021 (April 21, 2021): 1–12. http://dx.doi.org/10.1155/2021/6630552.
Повний текст джерелаNoori, Hamid, Farhad Mehdipour, Kazuaki Murakami, Koji Inoue, and Morteza Saheb Zamani. "An architecture framework for an adaptive extensible processor." Journal of Supercomputing 45, no. 3 (February 1, 2008): 313–40. http://dx.doi.org/10.1007/s11227-008-0174-4.
Повний текст джерелаDutheil, Julien Y., Sylvain Gaillard, and Eva H. Stukenbrock. "MafFilter: a highly flexible and extensible multiple genome alignment files processor." BMC Genomics 15, no. 1 (2014): 53. http://dx.doi.org/10.1186/1471-2164-15-53.
Повний текст джерелаBauer, L., M. Shafique, and J. Henkel. "Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set Adaptation." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 10 (October 2008): 1295–308. http://dx.doi.org/10.1109/tvlsi.2008.2002430.
Повний текст джерелаSano, Kentaro, Luzhou Wang, and Satoru Yamamoto. "Prototype implementation of array-processor extensible over multiple FPGAs for scalable stencil computation." ACM SIGARCH Computer Architecture News 38, no. 4 (September 14, 2010): 80–86. http://dx.doi.org/10.1145/1926367.1926381.
Повний текст джерелаLi, Lin, Shengbing Zhang, and Juan Wu. "Design of Deep Learning VLIW Processor for Image Recognition." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 38, no. 1 (February 2020): 216–24. http://dx.doi.org/10.1051/jnwpu/20203810216.
Повний текст джерелаCetin, E., R. C. S. Morling, and I. Kale. "An extensible complex fast Fourier transform processor chip for real-time spectrum analysis and measurement." IEEE Transactions on Instrumentation and Measurement 47, no. 1 (1998): 95–99. http://dx.doi.org/10.1109/19.728798.
Повний текст джерелаLagadec, Loïc, Damien Picard, Youenn Corre, and Pierre-Yves Lucas. "Experiment Centric Teaching for Reconfigurable Processors." International Journal of Reconfigurable Computing 2011 (2011): 1–14. http://dx.doi.org/10.1155/2011/952560.
Повний текст джерелаWAGGY, SCOTT B., ALEC KUCALA, and SEDAT BIRINGEN. "PARALLEL IMPLEMENTATION OF A NAVIER–STOKES SOLVER: TURBULENT EKMAN LAYER DIRECT SIMULATION." International Journal of Computational Methods 11, no. 05 (October 2014): 1350070. http://dx.doi.org/10.1142/s0219876213500709.
Повний текст джерелаWait, Eric, Mark Winter, and Andrew R. Cohen. "Hydra image processor: 5-D GPU image analysis library with MATLAB and python wrappers." Bioinformatics 35, no. 24 (June 26, 2019): 5393–95. http://dx.doi.org/10.1093/bioinformatics/btz523.
Повний текст джерелаHuang, LinYun, Young-Pil Lee, Yong-Seon Moon, and Young-Chul Bae. "Noble Implementation of Motor Driver with All Programmable SoC for Humanoid Robot or Industrial Device." International Journal of Humanoid Robotics 14, no. 04 (November 16, 2017): 1750028. http://dx.doi.org/10.1142/s0219843617500281.
Повний текст джерелаLi, Hong Yi, Cheng Yang, Xiao Yu Wu, and Ya Ning Wu. "A Kind of Video Abstracting System Base on Hadoop." Applied Mechanics and Materials 687-691 (November 2014): 2186–91. http://dx.doi.org/10.4028/www.scientific.net/amm.687-691.2186.
Повний текст джерелаVlahopoulos, Nickolas, and Michael M. Bernitsas. "Three-Dimensional Nonlinear Dynamics of Nonintegral Riser Bundle." Journal of Ship Research 35, no. 01 (March 1, 1991): 40–57. http://dx.doi.org/10.5957/jsr.1991.35.1.40.
Повний текст джерелаCASEAU, YVES, FRANÇOIS-XAVIER JOSSET, and FRANÇOIS LABURTHE. "CLAIRE: combining sets, search and rules to better express algorithms." Theory and Practice of Logic Programming 2, no. 6 (November 2002): 769–805. http://dx.doi.org/10.1017/s1471068401001363.
Повний текст джерелаSaadawi, Gilan M., and James H. Harrison. "Definition of an XML Markup Language for Clinical Laboratory Procedures and Comparison with Generic XML Markup." Clinical Chemistry 52, no. 10 (October 1, 2006): 1943–51. http://dx.doi.org/10.1373/clinchem.2006.071449.
Повний текст джерелаLOIDL, HANS-WOLFGANG, PHILIP W. TRINDER, and CARSTEN BUTZ. "TUNING TASK GRANULARITY AND DATA LOCALITY OF DATA PARALLEL GPH PROGRAMS." Parallel Processing Letters 11, no. 04 (December 2001): 471–86. http://dx.doi.org/10.1142/s0129626401000737.
Повний текст джерелаArsenault, Kristi R., Sujay V. Kumar, James V. Geiger, Shugong Wang, Eric Kemp, David M. Mocko, Hiroko Kato Beaudoing, et al. "The Land surface Data Toolkit (LDT v7.2) – a data fusion environment for land data assimilation systems." Geoscientific Model Development 11, no. 9 (September 5, 2018): 3605–21. http://dx.doi.org/10.5194/gmd-11-3605-2018.
Повний текст джерелаKamal, Mehdi, Ali Afzali-Kusha, Saeed Safari, and Massoud Pedram. "Design of NBTI-resilient extensible processors." Integration 49 (March 2015): 22–34. http://dx.doi.org/10.1016/j.vlsi.2014.12.001.
Повний текст джерелаShalaby, Nadia, Andy Bavier, Yitzchak Gottlieb, Scott Karlin, Larry Peterson, Xiaohu Qie, Tammo Spalink, and Mike Wawrzoniak. "Building extensible routers using network processors." Software: Practice and Experience 35, no. 12 (2005): 1155–94. http://dx.doi.org/10.1002/spe.667.
Повний текст джерелаXiao, Chenglong, and Emmanuel Casseau. "Exact custom instruction enumeration for extensible processors." Integration 45, no. 3 (June 2012): 263–70. http://dx.doi.org/10.1016/j.vlsi.2011.11.011.
Повний текст джерелаXiao, Chenglong, Shanshan Wang, Wanjun Liu, and Emmanuel Casseau. "Parallel custom instruction identification for extensible processors." Journal of Systems Architecture 76 (May 2017): 149–59. http://dx.doi.org/10.1016/j.sysarc.2016.11.011.
Повний текст джерелаFei, Y., S. Ravi, A. Raghunathan, and N. K. Jha. "A Hybrid Energy-Estimation Technique for Extensible Processors." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23, no. 5 (May 2004): 652–64. http://dx.doi.org/10.1109/tcad.2004.826546.
Повний текст джерелаFei Sun, S. Ravi, A. Raghunathan, and N. K. Jha. "Application-specific heterogeneous multiprocessor synthesis using extensible processors." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25, no. 9 (September 2006): 1589–602. http://dx.doi.org/10.1109/tcad.2005.858269.
Повний текст джерелаChen, Xiaoyong, Douglas L. Maskell, and Yang Sun. "Fast Identification of Custom Instructions for Extensible Processors." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 26, no. 2 (February 2007): 359–68. http://dx.doi.org/10.1109/tcad.2006.883915.
Повний текст джерелаLi, T., W. Jigang, Y. Deng, T. Srikanthan, and X. Lu. "Accelerating identification of custom instructions for extensible processors." IET Circuits, Devices & Systems 5, no. 1 (2011): 21. http://dx.doi.org/10.1049/iet-cds.2010.0073.
Повний текст джерелаBonzini, P., and L. Pozzi. "Recurrence-Aware Instruction Set Selection for Extensible Embedded Processors." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 10 (October 2008): 1259–67. http://dx.doi.org/10.1109/tvlsi.2008.2001863.
Повний текст джерелаGoyal, Puneet, and Narayan Chaturvedi. "Multiple Output Complex Instruction Matching Algorithm for Extensible Processors." International Journal of Computer Applications 49, no. 21 (July 31, 2012): 31–35. http://dx.doi.org/10.5120/7897-1240.
Повний текст джерелаYazdanbakhsh, Amir, Mehdi Kamal, Sied Mehdi Fakhraie, Ali Afzali-Kusha, Saeed Safari, and Massoud Pedram. "Implementation-aware selection of the custom instruction set for extensible processors." Microprocessors and Microsystems 38, no. 7 (October 2014): 681–91. http://dx.doi.org/10.1016/j.micpro.2014.05.007.
Повний текст джерелаLUKAC, RASTISLAV, PAVOL GALAJDA, and ALENA GALAJDOVA. "LUM PROCESSOR WITH NEURAL DECISION." International Journal of Pattern Recognition and Artificial Intelligence 20, no. 05 (August 2006): 747–62. http://dx.doi.org/10.1142/s0218001406004934.
Повний текст джерелаSCHAFFER, KEVIN, and ROBERT A. WALKER. "USING HARDWARE MULTITHREADING TO OVERCOME BROADCAST/REDUCTION LATENCY IN AN ASSOCIATIVE SIMD PROCESSOR." Parallel Processing Letters 18, no. 04 (December 2008): 491–509. http://dx.doi.org/10.1142/s0129626408003533.
Повний текст джерелаKWON, YOUNG-SU, and NAK-WOONG EUM. "APPLICATION-ADAPTIVE RECONFIGURATION OF MEMORY ADDRESS SHUFFLER FOR FPGA-EMBEDDED INSTRUCTION-SET PROCESSOR." Journal of Circuits, Systems and Computers 19, no. 07 (November 2010): 1435–47. http://dx.doi.org/10.1142/s0218126610006748.
Повний текст джерелаSun, Fei, Srivaths Ravi, Anand Raghunathan, and Niraj K. Jha. "A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 26, no. 11 (November 2007): 2035–45. http://dx.doi.org/10.1109/tcad.2007.906457.
Повний текст джерелаKamal, Mehdi, Ali Afzali-Kusha, Saeed Safari, and Massoud Pedram. "Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors." ACM Journal on Emerging Technologies in Computing Systems 10, no. 3 (April 2014): 1–25. http://dx.doi.org/10.1145/2567665.
Повний текст джерелаSari, Aitzan, and Mihalis Psarakis. "A Flexible Fault Injection Platform for the Analysis of the Symptoms of Soft Errors in FPGA Soft Processors." Journal of Circuits, Systems and Computers 26, no. 08 (April 11, 2017): 1740009. http://dx.doi.org/10.1142/s0218126617400096.
Повний текст джерелаGreer, Bruce, John Harrison, Greg Henry, Wei Li, and Peter Tang. "Scientific Computing on the Itanium® Processor." Scientific Programming 10, no. 4 (2002): 329–37. http://dx.doi.org/10.1155/2002/193478.
Повний текст джерелаHua, Jing, Yingqiong Peng, Yilu Xu, Kun Cao, and Jing Jia. "Makespan Minimization for Multiprocessor Real-Time Systems under Thermal and Timing Constraints." Journal of Circuits, Systems and Computers 28, no. 09 (August 2019): 1950145. http://dx.doi.org/10.1142/s0218126619501457.
Повний текст джерелаDixon, Matthew, Jörg Lotze, and Mohammad Zubair. "A portable, extensible and fast stochastic volatility model calibration using multi and many-core processors." Concurrency and Computation: Practice and Experience 28, no. 3 (November 20, 2015): 866–77. http://dx.doi.org/10.1002/cpe.3727.
Повний текст джерелаKamal, Mehdi, Ali Afzali-Kusha, Saeed Safari, and Massoud Pedram. "Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions." ACM Transactions on Design Automation of Electronic Systems 21, no. 2 (January 28, 2016): 1–25. http://dx.doi.org/10.1145/2830566.
Повний текст джерелаFaraci, Giuseppe, Alfio Lombardo, and Giovanni Schembra. "A Processor-Sharing Scheduling Strategy for NFV Nodes." Journal of Electrical and Computer Engineering 2016 (2016): 1–10. http://dx.doi.org/10.1155/2016/3583962.
Повний текст джерелаGünzel, Mario, Christian Hakert, Kuan-Hsun Chen, and Jian-Jia Chen. "HEART: H ybrid Memory and E nergy- A ware R eal- T ime Scheduling for Multi-Processor Systems." ACM Transactions on Embedded Computing Systems 20, no. 5s (October 31, 2021): 1–23. http://dx.doi.org/10.1145/3477019.
Повний текст джерелаYin, G., and Y. M. Zhu. "On W.P.1 Convergence of A Parallel Stochastic Approximation Algorithm." Probability in the Engineering and Informational Sciences 3, no. 1 (January 1989): 55–75. http://dx.doi.org/10.1017/s0269964800000978.
Повний текст джерелаMahmood, Ausif. "Behavioral Simulation and Performance Evaluation of Multi-Processor Architectures." VLSI Design 4, no. 1 (January 1, 1996): 59–68. http://dx.doi.org/10.1155/1996/91035.
Повний текст джерелаAbabneh, Ismail M., Saad Bani-Mohammad, and Motasem Al Smadi. "Corner-Boundary Processor Allocation for 3D Mesh-Connected Multicomputers." International Journal of Cloud Applications and Computing 5, no. 1 (January 2015): 1–13. http://dx.doi.org/10.4018/ijcac.2015010101.
Повний текст джерелаNICOL, DAVID M., and WEIZHEN MAO. "ON BOTTLENECK PARTITIONING OF k-ARY n-CUBES." Parallel Processing Letters 06, no. 03 (September 1996): 389–99. http://dx.doi.org/10.1142/s0129626496000376.
Повний текст джерелаMikheev, Andrei, and Liubov Liubushkina. "Russian morphology: An engineering approach." Natural Language Engineering 1, no. 3 (September 1995): 235–60. http://dx.doi.org/10.1017/s135132490000019x.
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