Статті в журналах з теми "Execution thread"
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Chen, Caisen, Yangxia Xiang, Yuqin DengLiu, and Zeyun Zhou. "Research on Cache Timing Attack Against RSA with Sliding Window Exponentiation Algorithm." International Journal of Interdisciplinary Telecommunications and Networking 8, no. 2 (April 2016): 88–95. http://dx.doi.org/10.4018/ijitn.2016040108.
Повний текст джерелаHamidi, Beqir, and Lindita Hamidi. "Synchronization Possibilities and Features in Java." European Journal of Interdisciplinary Studies 1, no. 1 (April 30, 2015): 75. http://dx.doi.org/10.26417/ejis.v1i1.p75-84.
Повний текст джерелаRamanauskaite, Simona, Asta Slotkiene, Kornelija Tunaityte, Ivan Suzdalev, Andrius Stankevicius, and Saulius Valentinavicius. "Reducing WCET Overestimations in Multi-Thread Loops with Critical Section Usage." Energies 14, no. 6 (March 21, 2021): 1747. http://dx.doi.org/10.3390/en14061747.
Повний текст джерелаKarasik, O. N., and A. A. Prihozhy. "ADVANCED SCHEDULER FOR COOPERATIVE EXECUTION OF THREADS ON MULTI-CORE SYSTEM." «System analysis and applied information science», no. 1 (May 4, 2017): 4–11. http://dx.doi.org/10.21122/2309-4923-2017-1-4-11.
Повний текст джерелаMetzler, Patrick, Neeraj Suri, and Georg Weissenbacher. "Extracting safe thread schedules from incomplete model checking results." International Journal on Software Tools for Technology Transfer 22, no. 5 (June 26, 2020): 565–81. http://dx.doi.org/10.1007/s10009-020-00575-y.
Повний текст джерелаYONG, XIE, and HSU WEN-JING. "ALIGNED MULTITHREADED COMPUTATIONS AND THEIR SCHEDULING WITH PERFORMANCE GUARANTEES." Parallel Processing Letters 13, no. 03 (September 2003): 353–64. http://dx.doi.org/10.1142/s0129626403001331.
Повний текст джерелаHirata, Hiroaki, and Atsushi Nunome. "Decoupling Computation and Result Write-Back for Thread-Level Parallelization." International Journal of Software Innovation 8, no. 3 (July 2020): 19–34. http://dx.doi.org/10.4018/ijsi.2020070102.
Повний текст джерелаTatas, Konstantinos, Costas Kyriacou, Paraskevas Evripidou, Pedro Trancoso, and Stephan Wong. "Rapid Prototyping of the Data-Driven Chip-Multiprocessor (D2-CMP) using FPGAs." Parallel Processing Letters 18, no. 02 (June 2008): 291–306. http://dx.doi.org/10.1142/s0129626408003399.
Повний текст джерелаSinharoy, Balaram. "Compiler Optimization to Improve Data Locality for Processor Multithreading." Scientific Programming 7, no. 1 (1999): 21–37. http://dx.doi.org/10.1155/1999/235625.
Повний текст джерелаTian, Zhenzhou, Qing Wang, Cong Gao, Lingwei Chen, and Dinghao Wu. "Plagiarism Detection of Multi-threaded Programs Using Frequent Behavioral Pattern Mining." International Journal of Software Engineering and Knowledge Engineering 30, no. 11n12 (November 2020): 1667–88. http://dx.doi.org/10.1142/s0218194020400252.
Повний текст джерелаOotsu, Kanemitsu, Hirohito Ogawa, Takashi Yokota, and Takanobu Baba. "Program Execution Path-Based Speculative Thread Partitioning." Transactions of the Institute of Systems, Control and Information Engineers 22, no. 6 (2009): 209–19. http://dx.doi.org/10.5687/iscie.22.209.
Повний текст джерелаArandi, Samer, George Matheou, Costas Kyriacou, and Paraskevas Evripidou. "Data-Driven Thread Execution on Heterogeneous Processors." International Journal of Parallel Programming 46, no. 2 (February 8, 2017): 198–224. http://dx.doi.org/10.1007/s10766-016-0486-6.
Повний текст джерелаChen, Yuting. "Platform Independent Analysis of Probabilities on Multithreaded Programs." International Journal of Software Innovation 1, no. 3 (July 2013): 48–65. http://dx.doi.org/10.4018/ijsi.2013070104.
Повний текст джерелаBylina, Beata, and Jaroslaw Bylina. "An Experimental Evaluation of the OpenMP Thread Mapping for LU Factorisation on Xeon Phi Coprocessor and on Hybrid CPU-MIC Platform." Scalable Computing: Practice and Experience 19, no. 3 (September 14, 2018): 259–74. http://dx.doi.org/10.12694/scpe.v19i3.1373.
Повний текст джерелаBouksiaa, Mohamed Said Mosli, Francois Trahay, Alexis Lescouet, Gauthier Voron, Remi Dulong, Amina Guermouche, Elisabeth Brunet, and Gael Thomas. "Using Differential Execution Analysis to Identify Thread Interference." IEEE Transactions on Parallel and Distributed Systems 30, no. 12 (December 1, 2019): 2866–78. http://dx.doi.org/10.1109/tpds.2019.2927481.
Повний текст джерелаFujisawa, Kohei, Atsushi Nunome, Kiyoshi Shibayama, and Hiroaki Hirata. "Design Space Exploration for Implementing a Software-Based Speculative Memory System." International Journal of Software Innovation 6, no. 2 (April 2018): 37–49. http://dx.doi.org/10.4018/ijsi.2018040104.
Повний текст джерелаCavus, Mustafa, Mohammed Shatnawi, Resit Sendag, and Augustus K. Uht. "Fast Key-Value Lookups with Node Tracker." ACM Transactions on Architecture and Code Optimization 18, no. 3 (June 2021): 1–26. http://dx.doi.org/10.1145/3452099.
Повний текст джерелаHuang, Kaijie, and Jie Cao. "Parallel Differential Evolutionary Particle Filtering Algorithm Based on the CUDA Unfolding Cycle." Wireless Communications and Mobile Computing 2021 (October 15, 2021): 1–12. http://dx.doi.org/10.1155/2021/1999154.
Повний текст джерелаDU, Yan-Ning, Yin-Liang ZHAO, Bo HAN, and Yuan-Cheng LI. "Data Structure Directed Thread Partitioning Method and Execution Model." Journal of Software 24, no. 10 (January 17, 2014): 2432–59. http://dx.doi.org/10.3724/sp.j.1001.2013.04353.
Повний текст джерелаKang, Jihun, and Heonchang Yu. "GPGPU Task Scheduling Technique for Reducing the Performance Deviation of Multiple GPGPU Tasks in RPC-Based GPU Virtualization Environments." Symmetry 13, no. 3 (March 20, 2021): 508. http://dx.doi.org/10.3390/sym13030508.
Повний текст джерелаKyriacou, Costas, Paraskevas Evripidou, and Pedro Trancoso. "CacheFlow: Cache Optimizations for Data Driven Multithreading." Parallel Processing Letters 16, no. 02 (June 2006): 229–44. http://dx.doi.org/10.1142/s0129626406002599.
Повний текст джерелаGuo, JunXia, Zheng Li, CunFeng Shi, and RuiLian Zhao. "Thread Scheduling Sequence Generation Based on All Synchronization Pair Coverage Criteria." International Journal of Software Engineering and Knowledge Engineering 30, no. 01 (January 2020): 97–118. http://dx.doi.org/10.1142/s0218194020500059.
Повний текст джерелаWANG, SHENGYUE, PEN-CHUNG YEW, and ANTONIA ZHAI. "CODE TRANSFORMATIONS FOR ENHANCING THE PERFORMANCE OF SPECULATIVELY PARALLEL THREADS." Journal of Circuits, Systems and Computers 21, no. 02 (April 2012): 1240008. http://dx.doi.org/10.1142/s0218126612400087.
Повний текст джерелаKim, Seung Hun, Dohoon Kim, Changmin Lee, Won Seob Jeong, Won Woo Ro, and Jean-Luc Gaudiot. "A Performance-Energy Model to Evaluate Single Thread Execution Acceleration." IEEE Computer Architecture Letters 14, no. 2 (July 1, 2015): 99–102. http://dx.doi.org/10.1109/lca.2014.2368144.
Повний текст джерелаRivas, Mario Aldea, and Michael González Harbour. "Operating system support for execution time budgets for thread groups." ACM SIGAda Ada Letters XXVII, no. 2 (August 2007): 67–71. http://dx.doi.org/10.1145/1316002.1316017.
Повний текст джерелаChoi, Kiho, Daejin Park, and Jeonghun Cho. "SSCFM: Separate Signature-Based Control Flow Error Monitoring for Multi-Threaded and Multi-Core Environments." Electronics 8, no. 2 (February 1, 2019): 166. http://dx.doi.org/10.3390/electronics8020166.
Повний текст джерелаXue, Xiaozhen, Sima Siami-Namini, and Akbar Siami Namin. "Testing Multi-Threaded Applications Using Answer Set Programming." International Journal of Software Engineering and Knowledge Engineering 28, no. 08 (August 2018): 1151–75. http://dx.doi.org/10.1142/s021819401850033x.
Повний текст джерелаPetric, Vlad, and Amir Roth. "Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection." ACM SIGARCH Computer Architecture News 33, no. 2 (May 2005): 322–33. http://dx.doi.org/10.1145/1080695.1069997.
Повний текст джерелаKöster, M., J. Groß, and A. Krüger. "Massively Parallel Rule-Based Interpreter Execution on GPUs Using Thread Compaction." International Journal of Parallel Programming 48, no. 4 (June 24, 2020): 675–91. http://dx.doi.org/10.1007/s10766-020-00670-2.
Повний текст джерелаSoliman, Mostafa I., and Elsayed A. Elsayed. "Simultaneous Multithreaded Matrix Processor." Journal of Circuits, Systems and Computers 24, no. 08 (August 12, 2015): 1550114. http://dx.doi.org/10.1142/s0218126615501145.
Повний текст джерелаGONTMAKHER, ALEX, SERGEY POLYAKOV, and ASSAF SCHUSTER. "COMPLEXITY OF VERIFYING JAVA SHARED MEMORY EXECUTION." Parallel Processing Letters 13, no. 04 (December 2003): 721–33. http://dx.doi.org/10.1142/s0129626403001628.
Повний текст джерелаAMAMIYA, MAKOTO, HIDEO TANIGUCHI, and TAKANORI MATSUZAKI. "AN ARCHITECTURE OF FUSING COMMUNICATION AND EXECUTION FOR GLOBAL DISTRIBUTED PROCESSING." Parallel Processing Letters 11, no. 01 (March 2001): 7–24. http://dx.doi.org/10.1142/s0129626401000397.
Повний текст джерелаȘtirb, Iulia. "Extending NUMA-BTLP Algorithm with Thread Mapping Based on a Communication Tree." Computers 7, no. 4 (December 3, 2018): 66. http://dx.doi.org/10.3390/computers7040066.
Повний текст джерелаVasiliev, Ivan Aleksandrovich, Pavel Mikhailovich Dovgalyuk, and Maria Anatolyevna Klimushenkova. "Using the identification of threads of execution when solving problems of full-system analysis of binary code." Proceedings of the Institute for System Programming of the RAS 33, no. 6 (2021): 51–66. http://dx.doi.org/10.15514/ispras-2021-33(6)-4.
Повний текст джерелаDong, Jing Chuan, and Tai Yong Wang. "A Pipeline Designed Reconfigurable CNC Architecture." Materials Science Forum 697-698 (September 2011): 288–91. http://dx.doi.org/10.4028/www.scientific.net/msf.697-698.288.
Повний текст джерелаYang, Yuer, Zeguang Chen, Shaobo Chen, Zhuoyun Du, Yuxin Luo, Liangtian Zhao, Lifeng Zhou, and Yujuan Quan. "Avpd: An Anti-virus Model with Remote Thread Injection for Android Based on ResNet50." Journal of Physics: Conference Series 2203, no. 1 (March 1, 2022): 012078. http://dx.doi.org/10.1088/1742-6596/2203/1/012078.
Повний текст джерелаBerisha, Artan, Eliot Bytyçi, and Ardeshir Tershnjaku. "Parallel Genetic Algorithms for University Scheduling Problem." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 2 (April 1, 2017): 1096. http://dx.doi.org/10.11591/ijece.v7i2.pp1096-1102.
Повний текст джерелаSHCHERBAN, VOLODYMYR, JULY MAKARENKO, OKSANA KOLISKO, LUDMILA HALAVSKA, and YURYJ SHCHERBAN. "COMPUTER IMPLEMENTATION OF RECURSION ALGORITHM DETERMINATION OF THREAD TENSION DURING FORMATION OF MULTILAYER FABRICS FROM POLYETHYLENE THREADS." HERALD OF KHMELNYTSKYI NATIONAL UNIVERSITY 297, no. 3 (July 2, 2021): 204–7. http://dx.doi.org/10.31891/2307-5732-2021-297-3-204-207.
Повний текст джерелаOh, Jaegeun, Seok Joong Hwang, Huong Giang Nguyen, Areum Kim, Seon Wook Kim, Chulwoo Kim, and Jong-Kook Kim. "Exploiting Thread-Level Parallelism in Lockstep Execution by Partially Duplicating a Single Pipeline." ETRI Journal 30, no. 4 (August 8, 2008): 576–86. http://dx.doi.org/10.4218/etrij.08.0107.0343.
Повний текст джерелаKazi, I. H., and D. J. Lilja. "Coarse-grained thread pipelining: a speculative parallel execution model for shared-memory multiprocessors." IEEE Transactions on Parallel and Distributed Systems 12, no. 9 (September 2001): 952–66. http://dx.doi.org/10.1109/71.954629.
Повний текст джерелаPeternier, Achille, Danilo Ansaloni, Daniele Bonetta, Cesare Pautasso, and Walter Binder. "Improving execution unit occupancy on SMT-based processors through hardware-aware thread scheduling." Future Generation Computer Systems 30 (January 2014): 229–41. http://dx.doi.org/10.1016/j.future.2013.06.015.
Повний текст джерелаRistov, Sasko. "Special Issue on Infrastructures and Algorithms for Scalable Computing." Scalable Computing: Practice and Experience 19, no. 3 (September 17, 2018): iii—iv. http://dx.doi.org/10.12694/scpe.v19i3.1441.
Повний текст джерелаRoka, Sanjay, and Santosh Naik. "SURVEY ON SIGNATURE BASED INTRUCTION DETECTION SYSTEM USING MULTITHREADING." International Journal of Research -GRANTHAALAYAH 5, no. 4RACSIT (April 30, 2017): 58–62. http://dx.doi.org/10.29121/granthaalayah.v5.i4racsit.2017.3352.
Повний текст джерелаDOROJEVETS, MIKHAIL. "COOL MULTITHREADING IN HTMT SPELL-1 PROCESSORS." International Journal of High Speed Electronics and Systems 10, no. 01 (March 2000): 247–53. http://dx.doi.org/10.1142/s0129156400000283.
Повний текст джерелаTripathy, Devashree, Amirali Abdolrashidi, Laxmi Narayan Bhuyan, Liang Zhou, and Daniel Wong. "PAVER." ACM Transactions on Architecture and Code Optimization 18, no. 3 (June 2021): 1–26. http://dx.doi.org/10.1145/3451164.
Повний текст джерелаLuo, Yangchun, Wei-Chung Hsu, and Antonia Zhai. "The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution." ACM Transactions on Architecture and Code Optimization 10, no. 4 (December 2013): 1–29. http://dx.doi.org/10.1145/2541228.2541233.
Повний текст джерелаAdam, George K. "Co-Design of Multicore Hardware and Multithreaded Software for Thread Performance Assessment on an FPGA." Computers 11, no. 5 (May 9, 2022): 76. http://dx.doi.org/10.3390/computers11050076.
Повний текст джерелаGilman, Guin, Samuel S. Ogden, Tian Guo, and Robert J. Walls. "Demystifying the Placement Policies of the NVIDIA GPU Thread Block Scheduler for Concurrent Kernels." ACM SIGMETRICS Performance Evaluation Review 48, no. 3 (March 5, 2021): 81–88. http://dx.doi.org/10.1145/3453953.3453972.
Повний текст джерелаEgorov, Alexander, Natalya Krupenina, and Lyubov Tyndykar. "The parallel approach to issue of operational management optimization problem on transport gateway system." E3S Web of Conferences 203 (2020): 05003. http://dx.doi.org/10.1051/e3sconf/202020305003.
Повний текст джерелаSoliman, Mostafa I. "Performance Evaluation of Multi-Core Intel Xeon Processors on Basic Linear Algebra Subprograms." Parallel Processing Letters 19, no. 01 (March 2009): 159–74. http://dx.doi.org/10.1142/s0129626409000134.
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