Дисертації з теми "Digital converters"
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Andersson, Ola. "Modeling and Implementation of Current-Steering Digital-to-Analog Converters." Doctoral thesis, Linköpings universitet, Elektroniksystem, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-5062.
Повний текст джерелаTsai, Tsung-Heng. "Time-interleaved analog-to-digital converters for digital communications /." For electronic version search Digital dissertations database. Restricted to UC campuses. Access is free to UC campus dissertations, 2005. http://uclibs.org/PID/11984.
Повний текст джерелаSavla, Anup. "Digital calibration algorithms for nyquist-rate analog to digital converters." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1087588301.
Повний текст джерелаTitle from first page of PDF file. Document formatted into pages; contains xxi, 246 p.; also includes graphics. Includes bibliographical references (p. 211-214).
Luo, F. L. "Digital control of power semiconductor converters." Thesis, University of Cambridge, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.383314.
Повний текст джерелаKhilo, Anatol (Anatol M. ). "Integrated photonic analog-to-digital converters." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/68490.
Повний текст джерелаCataloged from PDF version of thesis.
Includes bibliographical references (p. 161-172).
Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits and 52 dBc spur-free dynamic range (SFDR) using a discrete-component photonic ADC. This corresponds to 15 fs jitter, a 4-5 times improvement over the jitter of the best electronic ADCs, and an order of magnitude improvement over the jitter of electronic ADCs operating above 10 GHz. The feasibility of a practical photonic ADC is demonstrated by creating an integrated ADC with a modulator, filters, and photodetectors fabricated on a single silicon chip and using it to sample a 10 GHz signal with 3.5 effective bits and 39 dBc SFDR. In both experiments, a sample rate of 2.1 GSa/s was obtained by interleaving two 1.05 GSa/s channels; higher sample rates can be achieved by increasing the channel count. A key component of a multi-channel ADC - a dual multi-channel high-performance filter bank - is successfully implemented. A concept for broadband linearization of the silicon modulator, which is another critical component of the photonic ADC, is proposed. Nonlinear phenomena in silicon microring filters and their impact on ADC performance are analyzed, and methods to reduce this impact are proposed. The results presented in the thesis suggest that a practical integrated photonic ADC, which successfully overcomes the electronic jitter bottleneck, is possible today.
by Anatol Khilo.
Ph.D.
Paul, Susanne A. (Susanne Anita). "Pipelined oversampling analog-to-digital converters." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/7981.
Повний текст джерелаIncludes bibliographical references (p. 223-226).
Oversampling and noise-shaping techniques, such as [delta sigma] modulation, are widely used in analog-to-digital conversion to achieve accuracy that exceeds that of integrated-circuit components. Such converters have an inherent tradeoff between accuracy and speed, whereby resolution in amplitude is achieved at the expense of resolution in time. Although much attention has been focused on improving the speed and power of [delta sigma] analog-to-digital converters, data rates remain limited to less than a few MHz and are not easily extended. A pipelined oversampling architecture is described that circumvents the speed-resolution tradeoff of conventional oversampling converters by performing spatial, rather than temporal, oversampling. It combines high-resolution capabilities of [delta sigma] techniques with the high speed of pipelined architectures so that both of these attributes are achievable. The architecture also differs from conventional oversampling in that it performs Nyquist-rate sampling. Power is improved as a result of a charge-domain implementation, reduced sensitivity to thermal noise, simplified decimation, and reduced circuit speed, which permits voltage scaling and use of low-power technologies. Circuit techniques for implementation of a pipelined oversampling converter are also presented. Although CCDs are not essential to the concept, such converters are most practically built using a combination of CCD and CMOS circuits. CCDs make analog pipelines with hundreds of stages feasible by providing fully-depleted operations which are highly accurate, low power, simple, and compact. Other operations are performed using nondepleted circuits.
(cont.) A circuit technique, referred to as dynamic double sampling, is presented, which provides improved linearity and speed over existing techniques and forms a core circuit element for these nondepleted operations. Two prototype converters have been demonstrated. They were built in standard CMOS processes and show that moderate to high performance is possible from CCD circuits and can be achieved without custom processing. The first prototype uses a 1.2-[mu]m process and operates at an 18-MHz data rate. It achieves 78-dB SFDR, DNL < ±0.15 LSB at 13 bits, 74-dB SNR over a 9-MHz bandwidth, and 324 mW power dissipation. The second prototype uses a 0.6-[mu]m design rule and operates at a 30-MHz data rate. It achieves 70-dB SFDR and 66-dB SNR over a 15-MHz bandwidth.
by Susanne A. Paul.
Ph.D.
Delic-Ibukic, Alma. "Digital Background Calibration Techniques for High-Resolution, Wide Bandwidth Analog-to-Digital Converters." Fogler Library, University of Maine, 2008. http://www.library.umaine.edu/theses/pdf/Delic-IbukicA2008.pdf.
Повний текст джерелаGarcia, Julian. "Digitally Enhanced Continuous-Time Sigma-Delta Analogue-to-Digital Converters." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-95447.
Повний текст джерелаQC 20120528
Majidi, Rabeeh. "DIGITALLY ASSISTED TECHNIQUES FOR NYQUIST RATE ANALOG-to-DIGITAL CONVERTERS." Digital WPI, 2015. https://digitalcommons.wpi.edu/etd-dissertations/275.
Повний текст джерелаDent, Alan Christopher. "Linearisation of analogue to digital and digital to analogue converters." Thesis, University of Edinburgh, 1990. http://hdl.handle.net/1842/13621.
Повний текст джерелаLaw, Waisiu. "Digital calibration of non-ideal pipelined analog-to-digital converters /." Thesis, Connect to this title online; UW restricted, 2003. http://hdl.handle.net/1773/5846.
Повний текст джерелаGong, Pu, and Hua Guo. "Post-Correction of Analog to Digital Converters." Thesis, University of Gävle, Department of Technology and Built Environment, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-805.
Повний текст джерелаAs the rapid development of the wireless communication system and mobile video devices, the integrated chip with low power consuming and high conversion efficiency is widely needed. ADC and DAC are playing an important role in these applications.
The aim of this thesis is to verify a post-correction method which is used for improving the performance of ADC. First of all, this report introduces the development and present status of ADC, and expatiate its important parameters from two different classes (static performance and dynamic performance). Based on the fundamental principle, the report then focuses on the dynamic integral non-linearity modeling of ADC. Refer to this model, one post-correction method is described and verified.
Upon the face of post-correction, this method is to modify the output signals which have been converted from analog to digital format by adding a correction term. Improvement made by the post-correction needs to be checked out. Thus the performance analysis mainly relay on the measures of total harmonic distortion and signal to noise and distortion ratio is also included in this thesis.
Lundin, Henrik. "Post-correction of analog-to-digital converters." Licentiate thesis, KTH, Signals, Sensors and Systems, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-1587.
Повний текст джерелаThis thesis deals with digital post-correction ofanalog-to-digital converters (ADCs). The performance ofpractical ADCs is deteriorated by nonidealities and flaws inthe converter. Methods for mitigating these errors by applyingdigital signal processing to the output of the converter havebeen proposed in the past. These methods are often referred toas postcorrection methods. This work is mainly concerned withpost-correction methods based on look-up tables.
Practical ADCs often exhibit dynamical error behavior,meaning that the error is dependent on the dynamics of theinput signal. In this thesis an extension of previouslyproposed post-correction methods is proposed. The method usesthe present sample in conjunction with a number of past samplesto form the table index. In order to reduce the number of indexbits, and thereby the size of the table, the method comprises abit mask, which selects a subset of the availablebits to be used in the index. Evaluations using experimentalADC data show that the proposed method improves the converterperformance, but also that the choice of index bits has asignificant impact on the outcome of the correction. Theincorporation of a bit mask enables an analysis of the effectof different bit masks. The analysis results in a framework forcomparing different correction tables.
The framework is then applied in an optimization problem.The goal is to find the best allocation of a fixed number ofindex bits. Two different criterions are applied: minimizationof the total harmonic distortion and maximization of thesignal-to-noise and distortion ratio. The results of theoptimization, performed with experimental data, show that theoptimal bit allocation is different depending on whichcriterion is used. Moreover, the performance of a correctionscheme deteriorates only slowly with decreasing table size, ifappropriate index bits are selected.
Wikner, J. Jacob. "Studies on CMOS digital-to-analog converters /." Linköping : Univ, 2001. http://www.bibl.liu.se/liupubl/disp/disp2001/tek667s.pdf.
Повний текст джерелаDanesh, Seyed Amir Ali. "Time interleaved counter analog to digital converters." Thesis, University of Edinburgh, 2011. http://hdl.handle.net/1842/5790.
Повний текст джерелаBee, Sarah Caroline. "Radiation effects in analogue to digital converters." Thesis, University College London (University of London), 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.298887.
Повний текст джерелаDacy, Susan (Susan Mary) 1975. "Analog to digital converters for CMOS imagers." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/46276.
Повний текст джерелаIncludes bibliographical references (leaves 80-82).
A/D converters for single chip CMOS imagers have often been designed using the column-parallel approach, employing a slow A/D converter for each column of the sensor array. This thesis investigates a serial approach utilizing a single fast A/D converter to process all of the imager pixels. If power scales linearly with frequency in a given A/D architecture, power dissipation for the two approaches should be comparable. However, the serial approach should occupy less area since only the cost of one A/D converter is incurred. A figure of merit 1/power*area is introduced to verify this theory by comparing previously reported A/D approaches after appropriate technology, speed, and supply scaling. Camera system specifications require a single serial A/D converter to have 10b resolution at a 3MHz sampling rate for a CIF (352x288) imager array running at 30 frames/second Area minimization, power minimization, and the ability to build the A/D in a standard CMOS process are extremely important for consumer product applications. A single slope A/D architecture with a subnanosecond time digitizer shows promise for optimizing figure of merit over pipelined and folding interpolating approaches. This work focuses on the design issues of the 3MHz single-slope based A/D converter. Architectures appropriate for extending this A/D converter to 12MHz for four times CIF image arrays (704x576) are discussed. The 3MHz converter was designed, simulated, and laid out in a 0.35um CMOS technology. At 3.3V supply, 25°C and nominal process conditions, the converter dissipates 29 mW while occupying 0.3 mm2 . A 12MHz trislope extension of this converter is estimated to dissipate 37 mW in 0.4 mm2.
by Susan Dacy.
M.Eng.
Zareba, Grzegorz Szczepan. "Behavioral simulation of analog to digital converters." Diss., The University of Arizona, 2005. http://hdl.handle.net/10150/290152.
Повний текст джерелаBiglarbegian, Mehrdad. "High Frequency GaN Power Converters Digital Twin." Thesis, The University of North Carolina at Charlotte, 2018. http://pqdtopen.proquest.com/#viewpdf?dispub=10979304.
Повний текст джерелаThere is a need for a foundation of a research study aimed at investigations on near real-time reliability awareness of Gallium Nitride devices in high-frequency power converters for which we need advanced hardware and algorithms. This dissertation is moving beyond traditional reliability analysis and looking to more applicable and accurate analytical tools by introducing deep learning techniques and advanced sensing solutions. The computational structures will be applied at the edge of the power converter through online sensing and data processing units as well as on a remote server. They will provide an iterative ability to predict the time until the device may fail or reach a pre-defined degradation threshold.
With the availability of the most granular information deduced from advanced devices, a new data-driven scheme is proposed for system monitoring and possible lifetime extension Gallium Nitride power converters. The approach relies on the real-time on-resistance data extraction from the power converter, and calibration of an adaptive model using multi-physics co-simulations under power cycling. More specifically, the focus is on deploying machine learning algorithms to exploit for the parameter estimation in power electronics engineering reliability. The proposed techniques in this work are quite new and have not yet been developed and analyzed for high-frequency power converters specifically with Gallium Nitride power semiconductor devices.
Cartina, Dragos. "Characterization and digital correction of multi-stage analog-to-digital converters." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0012/MQ27012.pdf.
Повний текст джерелаCartina, Dragos Carleton University Dissertation Engineering Electronics. "Characterization and digital correction of multi-stage analog-to- digital converters." Ottawa, 1997.
Знайти повний текст джерелаDelic-Ibukic, Alma. "Continuous Digital Calibration of Pipelined A/D Converters." Fogler Library, University of Maine, 2004. http://www.library.umaine.edu/theses/pdf/Delic-IbukicA2004.pdf.
Повний текст джерела張華 and Hua Zhang. "Digital vector control of forced-commutated cycloconverter drives." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1994. http://hub.hku.hk/bib/B31234574.
Повний текст джерелаZhang, Hua. "Digital vector control of forced-commutated cycloconverter drives /." [Hong Kong] : University of Hong Kong, 1994. http://sunzi.lib.hku.hk/hkuto/record.jsp?B1594847X.
Повний текст джерелаSaucier, Scott. "Multiband Analog-to-Digital Conversion." Fogler Library, University of Maine, 2002. http://www.library.umaine.edu/theses/pdf/SaucierS2002.pdf.
Повний текст джерелаCarter, Nathan R. "A 12-b 50Msample/s Pipeline Analog to Digital Converter." Digital WPI, 2000. https://digitalcommons.wpi.edu/etd-theses/749.
Повний текст джерелаDocef, Alen. "Efficient structures for oversampling A/D conversion." Thesis, Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/14975.
Повний текст джерелаBarton, Patrick Randal. "A synthesis program for CMOS successive approximation A/D and D/A converters." Thesis, Georgia Institute of Technology, 1986. http://hdl.handle.net/1853/15347.
Повний текст джерелаSadeghifar, Mohammad Reza. "On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters." Licentiate thesis, Linköpings universitet, Elektroniska Kretsar och System, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-114274.
Повний текст джерелаLundin, Henrik. "Characterization and Correction of Analog-to-Digital Converters." Doctoral thesis, KTH, School of Electrical Engineering (EES), 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-547.
Повний текст джерелаDenna avhandling behandlar analog-digitalomvandling. I synnerhet behandlas postkorrektion av analog-digitalomvandlare (A/D-omvandlare). A/D-omvandlare är i praktiken behäftade med vissa fel som i sin tur ger upphov till distorsion i omvandlarens utsignal. Om felen har ett systematiskt samband med utsignalen kan de avhjälpas genom att korrigera utsignalen i efterhand. Detta verk behandlar den form av postkorrektion som implementeras med hjälp av en tabell ur vilken korrektionsvärden hämtas.
Innan en A/D-omvandlare kan korrigeras måste felen i den mätas upp. Detta görs genom att estimera omvandlarens överföringsfunktion. I detta arbete behandlas speciellt problemet att skatta kvantiseringsintervallens mittpunkter. Det antas härvid att en referenssignal finns tillgänglig som grund för skattningen. En skattare som baseras på sorterade data visas vara bättre än den vanligtvis använda skattaren baserad på sampelmedelvärde.
Nästa huvudbidrag visar hur resultatet efter korrigering av en A/D-omvandlare kan predikteras. Omvandlaren antas här ha en viss differentiell olinjäritet och insignalen antas påverkad av ett slumpmässigt brus. Ett postkorrektionssystem, implementerat med begränsad precision, korrigerar utsignalen från A/D-omvandlaren. Ett utryck härleds som beskriver signal-brusförhållandet efter postkorrektion. Förhållandet visar sig bero på den differentiella olinjäritetens varians, det slumpmässiga brusets varians, omvandlarens upplösning samt precisionen med vilken korrektionstermerna beskrivs.
Till sist behandlas indexering av korrektionstabeller. Valet av metod för att indexera en korrektionstabell påverkar såväl tabellens storlek som förmågan att beskriva och korrigera dynamiska fel. I avhandlingen behandlas i synnerhet tillståndsmodellbaserade metoder, det vill säga metoder där tabellindex bildas som en funktion utav flera på varandra följande sampel. Allmänt gäller att ju fler sampel som används för att bilda ett tabellindex, desto större blir tabellen, samtidigt som förmågan att beskriva dynamiska fel ökar. En indexeringsmetod som endast använder en delmängd av bitarna i varje sampel föreslås här. Vidare så påvisas hur valet av indexeringsbitar kan göras optimalt, och experimentella utvärderingar åskådliggör att tabellstorleken kan reduceras avsevärt utan att fördenskull minska prestanda mer än marginellt.
De teorier och resultat som framförs här har utvärderats med experimentella A/D-omvandlardata eller genom datorsimuleringar.
Analog-to-digital conversion and quantization constitute the topic of this thesis. Post-correction of analog-to-digital converters (ADCs) is considered in particular. ADCs usually exhibit non-ideal behavior in practice. These non-idealities spawn distortions in the converters output. Whenever the errors are systematic, it is possible to mitigate them by mapping the output into a corrected value. The work herein is focused on problems associated with post-correction using look-up tables. All results presented are supported by experiments or simulations.
The first problem considered is characterization of the ADC. This is in fact an estimation problem, where the transfer function of the converter should be determined. This thesis deals with estimation of quantization region midpoints, aided by a reference signal. A novel estimator based on order statistics is proposed, and is shown to have superior performance compared with the sample mean traditionally used.
The second major area deals with predicting the performance of an ADC after post-correction. A converter with static differential nonlinearities and random input noise is considered. A post-correction is applied, but with limited (fixed-point) resolution in the corrected values. An expression for the signal-to-noise and distortion ratio after post-correction is provided. It is shown that the performance is dependent on the variance of the differential nonlinearity, the variance of the random noise, the resolution of the converter and the precision of the correction values.
Finally, the problem of addressing, or indexing, the correction look-up table is dealt with. The indexing method determines both the memory requirements of the table and the ability to describe and correct dynamically dependent error effects. The work here is devoted to state-space--type indexing schemes, which determine the index from a number of consecutive samples. There is a tradeoff between table size and dynamics: more samples used for indexing gives a higher dependence on dynamic, but also a larger table. An indexing scheme that uses only a subset of the bits in each sample is proposed. It is shown how the selection of bits can be optimized, and the exemplary results show that a substantial reduction in memory size is possible with only marginal reduction of performance.
Skjellnes, Tore. "Digital Control of Converters for Distributed Power Generations." Doctoral thesis, Norwegian University of Science and Technology, Department of Electrical Power Engineering, 2008. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-2126.
Повний текст джерелаPulse width modulated converters are becoming increasingly popular as their cost decreases and power rating increases. The new trend of smallscale power producers, often using renewable energy sources, has created new demands for delivery of energy to the grid.
A major advantage of the pulse width modulated converter is the ability to control the output voltage at any point in the voltage period. This enables rapid response to load changes and non-linear loads. In addition it can shape the voltage in response to the output current to create an outward appearance of a source impedance. This is called a virtual impedance.
This thesis presents a controller for a voltage controlled three phase pulse width modulated converter. This controller enables operation in standalone mode, in parallel with other converters in a microgrid, and in parallel with a strong main grid.
A time varying virtual impedance is presented which mainly attenuates reactive currents. A method of investigating the overall impedance including the virtual impedance is presented.
New net standards have been introduced, requiring the converter to operate even during severe dips in the grid voltage. Experiments are presented verifying the operation of the controller during voltage dips.
Björsell, Niclas. "Modeling Analog to Digital Converters at Radio Frequency." Doctoral thesis, KTH, Signalbehandling, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4523.
Повний текст джерелаThis work considers behavior modeling of analog to digital converters with applications in the radio frequency range, including the field of telecommunication as well as test and measurement instrumentation, where the conversion from analog to digital signals often is a bottleneck in performance. The models are intended to post-process output data from the converter and thereby improve the performance of the digital signal. By building a model of practical converters and the way in which they deviate from ideal, imperfections can be corrected using post-correction methods. Behavior modeling implies generation of a suitable stimulus, capturing the output data, and characterizing a model. The demands on the test setup are high for converters in the radio frequency range. The test-bed used in this thesis is composed of commercial state-of-the-art instruments and components designed for signal conditioning and signal capture. Further, in this thesis, different stimuli are evaluated, theoretically as well as experimentally. There are a large number of available model structures for dynamic nonlinear systems. In order to achieve a parameter efficient model structure, a Volterra model was used as a starting-point, which can describe any weak nonlinear system with fading memory, such as analog to digital converters. However, it requires a large number of coefficients; for this reason the Volterra model was reduced to a model structure with fewer parameters, by comparing the symmetry properties of the Volterra kernels with the symmetries from other models. An alternative method is the Kautz-Volterra model, which has the same general properties as the Volterra model, but with fewer parameters. This thesis gives experimental results of the Kautz-Volterra model, which will be interesting to apply in a post-correction algorithm in the future. To cover behavior not explained by the dynamic nonlinear model, a complementary piecewise linear model component is added. In this thesis, a closed form solution to the estimation problem for both these model components is given. By gradually correcting for each component the performance will improve step by step. In this thesis, the relation between a given component and the performance of the converter is given, as well as potential for improvement of an optimal post-correction.
QC 20100629
Peng, Hao. "Digital current mode control of DC-DC converters." Diss., Connect to online resource, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3207767.
Повний текст джерелаBjörsell, Niclas. "Modeling analog to digital converters at radio frequency /." Stockholm : Signalbehandling, Kungliga Tekniska högskolan, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4523.
Повний текст джерелаChan, Kok Lim. "High-speed, high-resolution digital-to-analog converters." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2007. http://wwwlib.umi.com/cr/ucsd/fullcit?p3294746.
Повний текст джерелаTitle from first page of PDF file (viewed March 14, 2008). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references.
Tchapmi, Petse Lyne. "Wide-bandwidth digital controller for multi-phase converters." Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/100672.
Повний текст джерелаCataloged from PDF version of thesis.
Includes bibliographical references (page 63).
DC-DC converters with high bandwidth are essential for today's high efficiency and high-speed micro-processing applications. In order to satisfy the requirements of those systems, we propose the implementation of a practical wide bandwidth digital controller for multiphase buck converters. Traditional implementations of multiphase converters have a performance comparable to single-phase implementations, with a bandwidth limited to a fraction of the per-phase switching frequency Fsw. The goal of this project is to take advantage of multiphase to achieve a higher bandwidth for any given switching frequency. Specifically, we target a bandwidth that scales with N x Fsw, rather than Fsw, with N being the number of phases in the system. This work focuses on the evaluation of a previously proposed digital modulator that is able to react to duty cycle changes at a speed equal to N x Fsw. Using this modulator, we design a few digital controllers and compare their performance to that of traditional digital controllers.
by Lyne Petse Tchapmi.
M. Eng.
Mobaraz, Hiwa. "Modelling and Design of Digital DC-DC Converters." Thesis, Linköpings universitet, Institutionen för systemteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-127713.
Повний текст джерелаPetrie, Alexander Craig. "Ultra-Low-Supply-Voltage Analog-to-Digital Converters." BYU ScholarsArchive, 2019. https://scholarsarchive.byu.edu/etd/9122.
Повний текст джерелаIroaga, Echere. "Pipelined analog-to-digital converters using incomplete settling /." May be available electronically:, 2007. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.
Повний текст джерелаWen, Yangyang. "MODELING AND DIGITAL CONTROL OF HIGH FREQUENCY DC-DC POWER CONVERTERS." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3671.
Повний текст джерелаPh.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
Karanicolas, Andrew N. (Andrew Nicholas). "Digital self-calibration techniques for high-accuracy, high speed analog-to-digital converters." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/12010.
Повний текст джерелаIncludes bibliographical references (leaves 219-224).
by Andrew Nicholas Karanicolas.
Ph.D.
Medawar, Samer. "Modeling and post-correction of pipeline analog-digital converters." Licentiate thesis, Stockholm : Skolan för elektro- och systemteknik, Kungliga Tekniska högskolan, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-12003.
Повний текст джерелаStrak, Adam. "Timing Uncertainty in Sigma-Delta Analog-to-Digital Converters." Doctoral thesis, Stockholm : Elektronik, dator- och programvarusystem Electronic, Computer, and Software Systems, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4243.
Повний текст джерелаBatarseh, Majd. "DIGITAL PULSE WIDTH MODULATOR TECHNIQUES FOR DC - DC CONVERTERS." Doctoral diss., University of Central Florida, 2010. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4358.
Повний текст джерелаPh.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
Paul, Susanne A. (Susanne Anita). "Analysis, design, and implementation of charge-to-digital converters." Thesis, Microsystems Technology Laboratories, Massachusetts Institute of Technology, 1995. http://hdl.handle.net/1721.1/10086.
Повний текст джерелаCaption title.
Includes bibliographical references (p. 209-215).
Sponsored in part by a National Science Foundation Graduate Fellowship.
Susanne A. Paul.
M.S.
Panigada, Andrea. "Harmonic distortion correction in pipelined analog to digital converters." Diss., [La Jolla] : University of California, San Diego, 2009. http://wwwlib.umi.com/cr/ucsd/fullcit?p3355107.
Повний текст джерелаTitle from first page of PDF file (viewed June 10, 2009). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references.
Zhang, Dai. "Design of Ultra-Low-Power Analog-to-Digital Converters." Licentiate thesis, Linköpings universitet, Elektroniska komponenter, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-79276.
Повний текст джерелаWong, Si Seng. "Design of analog-to-digital converters with binary search algorithm and digital calibration techniques." Thesis, University of Macau, 2011. http://umaclib3.umac.mo/record=b2493310.
Повний текст джерелаChang, Yu-Lun, and 張育綸. "Design and Application of Analog-to-Digital Converters and Digital-to-Analog Converters." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/05299852035715640542.
Повний текст джерела國立臺灣大學
電子工程學研究所
98
In Chapter 3, a 6-bit, 1MHz, low power DAC is presented. This chip is designed to be an arbitrary waveform generator for the neural stimulator. In Chapter 4, a 10-bit, 1MHz, low power DAC using the proposed “C-R hybrid architecture” is presented. With this architecture, the DAC can achieve high resolution while using lower power and smaller area comparing with other architecture. In Chapter 5, a 10-bit, 50MHz, pipelined ADC is presented. By using the “opamp current reuse technique”, the analog power consumption is reduced by half comparing with the conventional pipelined ADC. All chips in this thesis are designed and fabricated using TSMC 2P4M 0.35μm CMOS technology.
Shu, Shaofeng. "Oversampling digital-to-analog converters." Thesis, 1995. http://hdl.handle.net/1957/34610.
Повний текст джерелаGraduation date: 1996