Добірка наукової літератури з теми "DC link stress"

A new structure of Boost Cascaded DC Link H-Bridge Inverter (BCDCLHBI) is proposed for domestic UPS applications. It consists of DC-DC converter, sub-multilevel modules and H-bridge inverter circuits. The proposed sub-multilevel modules synthesize a stepped DC link voltage with reduced voltage stress across the H-bridge inverter. Compared with conventional two-level inverter the proposed stepped DC link inverter configuration has reduced Power Spectral Density (PSD) and reduced voltage stress. Compared with conventional Cascaded Multilevel Inverter (CMLI) configuration, the proposed system has reduced power switches, DC sources and gate driver requirements. To obtain better quality of AC power output, carrier-level shifted Pulse Width Modulation (PWM) schemes are developed for sub-multilevel switching. A simulation and prototype model of 7-level BCDCLHBI is developed and its performance is validated.

This paper investigates the influence of a constant carrier phase shift on the DC-link capacitor harmonic current of cascaded converters used in fuel-cell and mild-hybrid electric vehicles. In these applications, a DC-DC converter can be adopted between the battery and the motor drive inverter in a cascaded structure, where the two converters share the same DC-link. Since the DC-link capacitor of such a system represents a critical component, the optimization of the converter operation to limit the current stress and extend the lifetime of the capacitor is an primary objective. This paper proposes the use of a carrier phase shift between the modulations of the two converters in order to minimize the harmonic current of the DC-link capacitor. By harmonic analysis, an optimal carrier phase shift can be derived depending on the converter configuration. Analytical results are presented and validated by hardware-in-the-loop experiments. The findings show that the pulse width modulation carrier phase shift between the interleaved boost converter and the voltage source motor drive inverter has a significant influence on the DC-link capacitor current and thus on its lifetime. A case study with two-cell and three-cell interleaved boost converters shows a possible DC-link capacitor lifetime extension of up to 390%.

The growth of renewable energy in the last two decades has led to the development of new power electronic converters. The DC microgrid can operate in standalone mode, or it can be grid-connected. A DC microgrid consists of various distributed generation (DG) units like solar PV arrays, fuel cells, ultracapacitors, and microturbines. The DC-DC converter plays an important role in boosting the output voltage in DC microgrids. DC-DC converters are needed to boost the output voltage so that a common voltage from different sources is available at the DC link. A conventional boost converter (CBC) suffers from the problem of limited voltage gain, and the stress across the switch is usually equal to the output voltage. The output from DG sources is low and requires high-gain boost converters to enhance the output voltage. In this paper, a new high-gain DC-DC converter with quadratic voltage gain and reduced voltage stress across switching devices was proposed. The proposed converter was an improvement over the CBC and quadratic boost converter (QBC). The converter utilized only two switched inductors, two capacitors, and two switches to achieve the gain. The converter was compared with other recently developed topologies in terms of stress, the number of passive components, and voltage stress across switching devices. The loss analysis also was done using the Piecewise Linear Electrical Circuit Simulation (PLCES). The experimental and theoretical analyses closely agreed with each other.

The DC-Link capacitor plays a crucial role as far as power density and reliability are concerned: it occupies approximately 40% of the inverter, and causes approximately 30% of its failures. Asymmetrical dual three-phase (ADTP) multiphase arrangements are gaining relevance in the automotive sector for powertrain applications. This work focuses on reducing the impact that the widely used double zero sequence injection (DZSI) family of PWM techniques have on such a bulky and failure-prone component in an ADTP arrangement by means of interleaving techniques. By using the double Fourier integral formalism, the input current spectra and the overall performance of these PWM techniques have been derived, in terms of current rms value and voltage ripple in the DC-Link capacitor. Simulations have shown that choosing an adequate interleaving scheme and angle considerably relieves both current and voltage stresses on the DC-Link capacitor compared to noninterleaved operation. Reductions of 84% current rms and 86% voltage ripple have been achieved at static operating points. Finally, by averaging the rms current over WLTP standard driving cycle, reductions up to 26% have been obtained under more realistic conditions. All this would enhance the reliability and reduce the size of the onboard capacitors in future electric vehicles.

This paper presents a novel three-phase current source rectifier (CSR) for AC/DC step-down voltage conversion to reduce voltage and current stress. The proposed converter features an asymmetrical connection between upper and lower arms compared with conventional CSRs, but has the same number of devices. With the proposed asymmetrical structure and modified space vector pulse width modulation (SVPWM) scheme, half of transistors only need to withstand half of the line-to-line voltage rather than the full line-to-line voltage, and its DC link current can be shared by multiple switches in freewheeling periods. Therefore, it is able to bring about a significant reduction in voltage and current stress, allowing for an improvement in the converter without additional cost. The topological structure, operation principles, and comparative analysis are specifically presented. Finally, an experimental prototype is built up to verify the performance of the proposed converter.

This paper proposes a new method to reduce the ripple current of the DC-link capacitor in a two-level voltage source inverter (VSI), with a discontinuous pulse-width modulation (DPWM). In real applications, a capacitor block is very bulky, due to the parallel connection of several capacitors that share the value of the ripple current. Hence, it contributes significantly to the volume and weight of the whole system. Conventional DPWM is used to minimize the amount of switching for the power transistors, therefore, reducing stress and power loss. This leads to increased efficiency and reliability of the system. Nevertheless, the reduction of the DC link ripple current is still not optimal. Therefore, the proposed method introduces a PWM phase-shift technique to provide further reduction of the DC-link ripple current in a DPWM-based VSI. The efficacy of the proposed method is confirmed by simulation and experimental results.

This paper presents a small-signal analysis of different grid side controllers for full power converter wind turbines with inertia response capability. In real wind turbines, the DC link controller, the drivetrain damping controller and the inertial response might present contradictory control actions in a close bandwidth range. This situation might lead to reduced control performance, increased component stress and non-compliance of connection agreements. The paper presents an analysis of the internal wind turbine dynamics by considering different grid-side converter control topologies: standard current control used in the wind industry, standard current control with inertia emulation capabilities and virtual synchronous machines. Comments are made on the similarities between each topology and the negative effects and limits, and possible remedies are discussed. Finally, the conclusion poses that the inclusion of a DC link voltage controller reduces the ability of a converter to respond to external frequency events without energy storage. The degradation increases with the DC link voltage control speed.

This paper deals with the implementation of a single phase 15-level Sub-Multilevel Cascaded H-Bridge Inverter (SMCHBI) for variable speed industrial drive applications. It consists of sub-multilevel modules and H-bridge inverter configuration. Sub-multilevel switches synthesize stepped DC link voltage and current from the DC sources. H-bridge inverter switches renovate stepped DC link voltage and current into sinusoidal waveform. Compared with conventional Cascaded Multilevel Inverter (CMLI), the proposed system employs the reduced number of power switches, DC sources and gate driver requirements. The proposed system not only reduces the overall system cost but also reduces the voltage stress across the inverter switches. The proposed system does not required additional resonant soft switching circuits for Zero Voltage Switching (ZVS) of inverter. In the proposed method, variable frequency method is adopted for the speed control of industrial induction motor drives. A prototype model of 15-level SMCHB is developed and the performance of the systems is validated experimentally.

This paper proposes an effective management system for stand-alone solar photovoltaic (PV) using real-time data with Hybrid Energy Storage System (HESS). The abrupt movement of fleeting clouds often gives rise to PV power output fluctuations which in turn affect the power quality and system stability due to scattered solar radiation reception. These variations can limit through a ramp-limit controller and employing a DC link controller to maintain the stable DC link voltage. The battery is used in the system for continuous power application and the sudden variations in charging and discharging of battery power can create stress on the battery. These sudden changes in a battery will be removed by the super-capacitor (SC) unit and achieves a fast DC link voltage regulation. Hence, the high energy and power density devices such as battery and SC units will deliver more stable power into the system. The control scheme is tested in Matlab/Simulink and validated by Real-Time Hardware-in-Loop (HIL) simulator using periodic one-minute data for one year from the solar PV power plant from real-time.

Power electronic converters are in the heart of modern renewable energy and motor drive systems. This Thesis focuses on the converter dc-link capacitor (bank), which is a costly component and a common source of failures. The Thesis is divided into two parts. The first part examines the voltage and current stress induced on dc-link capacitors by the three most common converter topologies: The conventional two-level converter, the Neutral-Point-Clamped (NPC) three-level converter, and the Cascaded H-Bridge (CHB) three-level converter. The expressions derived for the rms capacitor current and its harmonics can be used as a tool for capacitor sizing. The harmonic analysis is then extended to systems that incorporate multiple converters connected to a common dc-link capacitor. The effect of introducing a phase shift to the converter carrier waveforms is examined, showing that reductions in the order of 30 to 50% in the common capacitor rms current can be achieved using appropriate phase shifts. The second part tackles the dc-link capacitor balancing problem, also known as Neutral Point (NP) balancing problem of the three-level NPC converter. Initially, a circuit that halves the voltage stress caused by the NP voltage oscillations (ripple) on the switching devices the NPC converter is proposed. The circuit consists of low voltage rated components which offer the advantages of lower losses, volume and cost, as compared to other balancing circuits. Subsequently, the study focuses on modulation strategies for the NPC converter. Starting with Nearest-Vector (NV) strategies, it proves that the criterion of the direction of dc-link capacitor imbalance, which is commonly adopted by NV strategies for performing the task of capacitor balancing, poses a barrier in achieving minimum NP voltage ripple. A new criterion is proposed instead, together with an algorithm that incorporates it into existing NV strategies. For the interesting case of NPC converters operating as motor drives, the resulting reduction in the amplitude of NP voltage ripple ranges from 30 to 50%. The study finishes with an extension of the previous concept to create hybrid (combinations of NV and non NV) strategies for the NPC converter. Hybrid strategies are proposed that can eliminate NP voltage ripple, introducing lower switching losses and output voltage distortion as compared to other methods used for the same purpose. The proposed strategies perform equally well when the converter operates with non linear or imbalanced loads. All results are verified by extensive simulations using MATLAB-Simulink.

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

Superati «novant’anni d’impazienza» e dopo un lungo periodo votato all’autocommento e all’esplorazione delle proprie intenzioni, Raffaele La Capria ha raccolto le sue opere in due Meridiani curati da Silvio Perrella. La Capria ne ha celebrato l’uscita nella prolusione inaugurale di Salerno Letteratura, poi confluita nel breve autoritratto narrativo "Introduzione a me stesso" (2014). In questa sede, l’autore è tornato su alcuni punti essenziali della sua riflessione sulla scrittura, come la relazione, reciproca e ineludibile, fra tradizione e contemporaneità. All’epilogo del «romanzo involontario» di una vita, La Capria guarda retrospettivamente alla propria esperienza come ad un’autentica educazione intellettuale. Perciò, muovendo da un’intervista inedita del 2015, riportata integralmente in appendice, la tesi ha l’obiettivo di ricostruire l’apprendistato letterario di La Capria dai primi anni Trenta, quando l’autore ancora frequentava il ginnasio, fino all’inizio dei Sessanta, quando ottenne il premio che ne avrebbe assicurato il successo. Il percorso, che riesamina l’intera bibliografia lacapriana nella sua varietà e nella sua stratificazione, si articola in una serie di fasi interdipendenti: la partecipazione indiretta alle iniziative dei GUF (intorno alle riviste «IX maggio» e «Pattuglia»); l’incursione nel giornalismo e l’impegno culturale nell’immediato dopoguerra (sulle pagine di «Latitudine» e di «SUD»); l’attività di traduttore dal francese e dall’inglese (da André Gide a T.S. Eliot); l’impiego alla RAI come autore e conduttore radiofonico (con trasmissioni dedicate a Orwell, Stevenson, Saroyan e Faulkner); la collaborazione con «Il Gatto Selvatico», la rivista dell’ENI voluta da Enrico Mattei e diretta da Attilio Bertolucci; e le vicende editoriali dei suoi primi due romanzi, “Un giorno d’impazienza” (1952) e “Ferito a morte” (1961), fino alla conquista dello Strega. La rilettura dell’opera di uno scrittore semi-autobiografico come La Capria, attraverso il costante riscontro di fonti giornalistiche, testimonianze epistolari e documenti d’archivio che avvalorano e occasionalmente smentiscono la sua versione dei fatti, diventa allora un’occasione per immergersi nella sua mitografia personale e avventurarsi in territori finora poco esplorati: come la ricostruzione del suo profilo culturale, a partire dal milieu in cui La Capria vive e opera, o l’incidenza delle letture e delle esperienze giovanili sulla sua prassi letteraria.