Дисертації з теми "CMOS applications"
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Carletti, Luca. "Photonique intégrée nonlinéaire sur plate-formes CMOS compatibles pour applications du proche au moyen infrarouge." Thesis, Ecully, Ecole centrale de Lyon, 2015. http://www.theses.fr/2015ECDL0013/document.
Повний текст джерелаIntegrated photonics offers a vast choice of nonlinear optical phenomena that could potentially be used for realizing chip-based and cost-effective all-optical signal processing devices that can handle, in principle, optical data signals at very high bit rates. The new components and technological solutions arising from this approach could have a considerable impact for telecom and datacom applications. Nonlinear optical effects (such as the optical Kerr effect or the Raman effect) can be potentially used for realizing active devices (e.g. optical amplifiers, modulators, lasers, signal regenerators and wavelength converters). During the last decade, the silicon on insulator (SOI) platform has known a significant development by exploiting the strong optical confinement, offered by this material platform, which is key for the miniaturization and realization of integrated optical devices (such as passive filters, splitters, junctions and multiplexers). However, the presence of strong nonlinear losses in the standard telecom band (around 1.55 µm) prevents some applications where a strong nonlinear optical response is needed and has motivated the research of more suitable material platforms. The primary goal of this thesis was the study of material alternatives to crystalline silicon (for instance hydrogenated amorphous silicon) with very low nonlinear losses and compatible with the CMOS process in order to realize integrated photonics devices based on nonlinear optical phenomena. Alternatively, the use of longer wavelengths (in the mid-IR) relaxes the constraints on the choice of the material platform, through taking advantage of lower nonlinear losses, for instance on the SiGe platform, which is also explored in this thesis. This work is organized as follows. In the first chapter we provide an overview of the nonlinear optical effects used to realize all optical signal processing functions, focusing on the key parameters that are essential (optical confinement and dispersion engineering) for integrated optical components, and presenting the main models used in this thesis. This chapter also includes a review of the main demonstrations reported on crystalline silicon, to give some benchmarks. Chapter 2 introduces the use of photonic crystals as integrated optical structures that can significantly enhance nonlinear optical phenomena. First we present photonic crystal cavities, with a demonstration of second and third harmonic generation that makes use of an original design. In the second part of the chapter, we describe the main features and challenges associated with photonic crystal waveguides in the slow light regime, which will be used later in chapter 4. In chapter 3, we report the experimental results related to the characterization of the optical nonlinear response of integrated waveguides made of two materials that are alternative to crystalline silicon : the hydrogenated amorphous silicon, probed in the near infrared, and the silicon germanium, probed in the mid-infrared. The model presented in chapter 1 is extensively used here for extracting the nonlinear parameters of these materials and it is also extended to account for higher order nonlinearities in the case of silicon germanium tested at longer wavelengths. This chapter also includes a comparison of the nonlinear properties of these two material platforms with respect to the standard SOI. In chapter 4, we combine the use of a material platform that is better suited than SOI for nonlinear applications with integrated photonics structures that are more advanced that those used in chapter 3. Here we describe the design of (slow) modes in photonic crystal waveguides made in hydrogenated amorphous silicon fully embedded in silica. [...]
ALLEGRI, DANIELE GUIDO. "CMOS-Based Impedance Analyzer for Biomedical Applications." Doctoral thesis, Università degli studi di Pavia, 2017. http://hdl.handle.net/11571/1215968.
Повний текст джерелаMuhammad, Wasim. "CMOS LNA Design for Multi-Standard Applications." Thesis, Linköping University, Department of Electrical Engineering, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7841.
Повний текст джерелаThis thesis discusses design of narrowband low noise amplifiers for multi¬standard applications. The target of this work is to design a low noise ampli¬fier(LNA) for DCS1800 and Bluetooth standard frequency bands. Various designs for narrowband multi-standard LNAs have been studied and a new design for tunable multi-standard LNA has been presented and designed using accumulation mode MOS varactors.
As this design includes on-chip spiral inductors, the design, modelling and layout of on-chip inductors have been discussed briefly. The tool used for this purpose is ASITIC.
Also ESD protection techniques for RF circuits and their effect on LNA per¬formance has been discussed.
Finally fully differential LNA has been designed in O.35um AMS thick metal CMOS process using Cadence SpectreRF. The design also includes ESD pro¬tection at the input of LNA.
Scholvin, Jörg 1976. "Deeply scaled CMOS for RF power applications." Thesis, Massachusetts Institute of Technology, 2006. http://hdl.handle.net/1721.1/37904.
Повний текст джерелаIncludes bibliographical references (p. 117-140).
The microelectronics industry is striving to reduce the cost, complexity, and form factor of wireless systems through single-chip integration of analog, RF and digital functions. Driven by the requirements of the digital system components, the 90 nm and 65 nm technology nodes are currently emerging as platforms for highly integrated systems. Achieving such integration while minimizing the cost of adding specialized RF modules places high demands on the base CMOS technology. In this regard, the integration of the power amplifier (PA) function becomes an increasing challenge as technology geometries and supply voltages scale down. Gate length (Lg) scaling yields improved frequency response, promising higher power-added efficiency (PAE), a key RF PA consideration. This benefit comes at the cost of a lower drain voltage, which demands a higher output current and thus wider devices in order to produce a given output power level (Po,,). In this work, we have investigated the potential of deeply scaled CMOS for RF power applications, from 0.25 um down to 65 nm. We demonstrate the frequency and power limitations that the different CMOS technologies face, and describe the physical mechanisms that give rise to these limitations.
(cont.) We find that layout considerations, such as splitting a single large device into many smaller parallel devices, become increasingly important as the technology scales down the roadmap, both for power and frequency. We also show that parasitic resistances associated with the back-end wiring are responsible for placing an upper limit on the RF power that can be obtained for a single bond pad. We demonstrate a power density of 31 mW/mm for the 65 nm node, with PAE in excess of 60% at 4 GHz and 1 V. Similar results are obtained in 90 nm, where a peak PAE of 66% was measured at 2.2 GHz and 1 V, with a power density of 24 mW/mm. We find that efficient integrated PA functionality for many applications can be achieved even in a deeply-scaled logic CMOS technology. For low power levels (below 50 mW), we find that the 65 nm CMOS devices offer excellent efficiency (>50%) over a broad frequency range (2-8 GHz). Their RF power performance approaches that of 90 nm devices both in peak PAE and output power density. This is possible without costly PA-specific add-ons, or the use of higher voltage input-output (I/O) device options.
(cont.) However, since I/O devices are often included as part of the process, they represent a real option for PA integration because they allow for higher power densities. The 0.25 /xm I/O device that is available in the 90 nm process, when biased at Vdd = 2.5 V showed excellent results, with a peak PAE of 60% and an output power of 75 mW (125 mW/mm) at 8 GHz.
by Jörg Scholvin.
Ph.D.
Bardyn, Jean-Paul. "Amplificateurs CMOS faible bruit pour applications sonar." Lille 1, 1990. http://www.theses.fr/1990LIL10167.
Повний текст джерелаChao, Yu-Lin. "Germanium channel devices for nanoscale CMOS applications." Diss., Restricted to subscribing institutions, 2008. http://proquest.umi.com/pqdweb?did=1581637981&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.
Повний текст джерелаCzornomaz, Lukas. "Filière technologique hybride InGaAs/SiGe pour applications CMOS." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT013/document.
Повний текст джерелаHigh-mobility channel materials such as indium-galium-arsenide (InGaAs) and silicon-germanium(SiGe) alloys are considered to be the leading candidates for replacing silicon (Si) in future lowpower complementary metal-oxide-semiconductor (CMOS) circuits. Numerous challenges haveto be tackled in order to turn the high-mobility CMOS concept into an industrial solution. Thisthesis addresses the majors challenges which are the integration of InGaAs on Si, the formationof high-quality gate stacks and self-aligned source and drain (S/D) regions, the optimizationof self-aligned transistors and the co-integration of InGaAs and SiGe into CMOS circuits. Allinvestigated possible solutions are proposed in the framework of very-large-scale integration requirements.Chapter 2 describes two different methods to integrate InGaAs on Si. Chapter 3 detailsthe developments of key process modules for the fabrication of self-aligned InGaAs metal-oxidesemiconductorfield-effect transistors (MOSFETs). Chapter 4 covers the realization of varioustypes of self-aligned MOSFETs towards the improvement of their performance. Finally, chapter5 demonstrates three different methods to make hybrid InGaAs/SiGe CMOS circuits
Dryer, Benjamin James. "Characterisation of CMOS APS technologies for space applications." Thesis, Open University, 2013. http://oro.open.ac.uk/40637/.
Повний текст джерелаKim, Hyung-Seuk 1976. "Low voltage CMOS frequency synthesizers for RF applications." Thesis, McGill University, 2005. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=82607.
Повний текст джерелаEsteves, J. "La technologie CMOS-MEMS pour des applications acoustiques." Phd thesis, Université de Grenoble, 2013. http://tel.archives-ouvertes.fr/tel-01068940.
Повний текст джерелаSidek, Roslina. "Applications of Si/SiGe heterostructures to CMOS devices." Thesis, University of Southampton, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.286957.
Повний текст джерелаWu, Tan Mau 1979. "Carbon nanotube applications for CMOS back-end processing." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/30179.
Повний текст джерелаIncludes bibliographical references (p. 73-75).
Carbon nanotubes are a recently discovered material with excellent mechanical, thermal, and electronic properties. In particular, they are potential ballistic transporters and are theorized to have thermal conductivities greater than any other material currently known. In this thesis, we will examine two possible applications of carbon nanotubes in CMOS back-end processing. The first application is as a replacement for copper interconnects. As interconnect line widths shrink, the electrical resistivity of copper will rise dramatically due to surface scattering effects. Carbon nanotube ballistic transporters may be able to overcome this obstacle, as well as being able to withstand current densities much greater than copper. The second application is an enhanced thermal conductivity dielectric for thermal management purposes. Carbon nanotube-oxide composites demonstrate improved thermal characteristics, and integration into CMOS technology may be able to alleviate some of the heat-removal and distribution problems future integrated circuits will face. We will also examine some of the processing techniques that will be necessary for carbon nanotube commercial deployment. Some of the issues we will discuss are nanotube growth, purification, and separation. In addition, we will consider some of the specific issues that need to be addressed for carbon nanotube integration into CMOS back-end technology, such as in situ growth and self-assembly.
by Tan Mau Wu.
S.M.
Kim, Hong-Sun. "2.4GHz CMOS Receivers for short-range wireless applications /." The Ohio State University, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=osu1486399451959422.
Повний текст джерелаDomingues, Suzana. "CMOS Terahertz Sensors and Circuits for Imaging Applications." Doctoral thesis, Università degli studi di Trento, 2014. https://hdl.handle.net/11572/368174.
Повний текст джерелаDomingues, Suzana. "CMOS Terahertz Sensors and Circuits for Imaging Applications." Doctoral thesis, University of Trento, 2014. http://eprints-phd.biblio.unitn.it/1233/1/PhD_thesis_Suzana_Domingues_upload.pdf.
Повний текст джерелаRathore, Pradeep Kumar. "Cmos compatible mems structures for pressure sensing applications." Thesis, IIT Delhi, 2015. http://localhost:8080/iit/handle/2074/6894.
Повний текст джерелаJose, Sajay. "Design of RF CMOS Power Amplifier for UWB Applications." Thesis, Virginia Tech, 2004. http://hdl.handle.net/10919/36391.
Повний текст джерелаMaster of Science
Barbier, R. "Du photon unique aux applications." Habilitation à diriger des recherches, Université Claude Bernard - Lyon I, 2012. http://tel.archives-ouvertes.fr/tel-00748508.
Повний текст джерелаLau, Ming Cheung. "A wide-band CMOS synthesizer for cable tuner applications /." View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202005%20LAU.
Повний текст джерелаPark, Jongmin. "CMOS analog spectrum processing techniques for cognitive radio applications." Diss., Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/37230.
Повний текст джерелаMusayev, Javid. "Cmos Integrated Sensor Readout Circuitry For Dna Detection Applications." Master's thesis, METU, 2011. http://etd.lib.metu.edu.tr/upload/12613645/index.pdf.
Повний текст джерелаm pixel pitch. Pixels have 5 µ
m X 5 µ
m detector electrodes implemented with the top metal of the CMOS process, and they are capable of detecting charge transferred or induced on those electrodes with a very high sensitivity. This study also includes development of an external electronics containing ADC for analog to digital data conversion. This external circuitry is implemented on a PCB compatible with the Opal Kelly XM3010 FPGA that provides data storage and transfer to PC. The measured noise of the overall system is 6.7 e- (electrons), which can be shrunk down to even 5.1 e- with an over sampling rate. This kind of sensitivity performance is very suitable for DNA detection, as a single nucleotide of a DNA contains 1 or 2 e- and as 10 to 20 base pair long DNA&rsquo
s are usually used in microarray applications. The measured dynamic range of the system is 71 dB, in other words, at most 24603 e- per frame (20 ms) can be detected. The measured leakage is 31 e-/frame, but this does not have a dramatic effect on the sensitivity of the system, noting that the leakage is a predictable quantity. DNA detection tests are performed with the chip in addition to electronic performance measurements. The surface of the chip is covered with a nitride passivation layer to prevent the pixel crosstalk and is modified with an APTES polymer for suitable DNA immobilization. DNA immobilization and hybridization tests are performed with 5&rsquo
-TCTCACCTTC-3&rsquo
probe and its complementary 3&rsquo
-AGAGTGGAAG-5&rsquo
target sequences. Hybridization performed in 1 pM solution is shown to have a larger steady state leakage than the immobilization in a 13 µ
M solution, implying the ability to differentiate between the full match and full mismatch sequences. To best of our knowledge, the measured pM sensitivity has not yet been reported with any label free CMOS DNA microarrays in literature, and it is comparable with the sensitivity of techniques like QCM or the fluorescence imaging. The 1 pM sensitivity is not a theoretical limit of the sensor, since theoretically the sensitivity level of 6.7 e- can offer much better results, down to the aM level, as far as the noise of electronics is considered, nevertheless the sensitivity is expected to be limited by DNA immobilization and hybridization probabilities which are determined by the surface modification technique and applied protocol. Improving those can lead to much smaller detection limits, such as aM level as stated above.
Ye, Song. "1 V, 1.9 GHz CMOS mixers for wireless applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/MQ58802.pdf.
Повний текст джерелаCappellani, Annalisa. "Metal gate integration in CMOS logic for RF applications." Thesis, University of Newcastle Upon Tyne, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.366569.
Повний текст джерелаHeymes, Julian. "Depletion of CMOS pixel sensors : studies, characterization, and applications." Thesis, Strasbourg, 2018. http://www.theses.fr/2018STRAE010/document.
Повний текст джерелаAn architecture of CMOS pixel sensor allowing the depletion of the sensitive volume through frontside biasing is studied through the characterization in laboratory of a prototype. The charge collection performances confirm the depletion of a large part of the sensitive thickness. In addition, with a modest noise level, the sensor features an excellent energy resolution for photons below 20 keV at positive temperatures. These results demonstrate that such sensors are suited for soft X-ray spectroscopy and for charged particle tracking in highly radiative environment. A simplified analytical model and finite elements calculus are used to predict the depletion depth reached. An indirect measurement method to evaluate this depth is proposed. Measurements confirm predictions for a thin highly resistive epitaxial layer, which is fully depleted, and a 40micrometers thick bulk less resistive substrate, for which depletion reached 18 micrometers but which still offers correct detection over its full depth. Two sensor designs dedicated to X-ray imaging and in-brain neuroimaging on awake and freely moving rats are presented
Neshatvar, N. "A novel wideband CMOS current driver for bioimpedance applications." Thesis, University College London (University of London), 2017. http://discovery.ucl.ac.uk/1546168/.
Повний текст джерелаWang, Ching-Chun 1969. "A study of CMOS technologies for image sensor applications." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/8214.
Повний текст джерелаIncludes bibliographical references (p. 179-183).
CMOS (Complementary Metal-Oxide-Silicon) imager technology, as compared with mature CCD (Charge-Coupled Device) imager technology, has the advantages of higher circuit integration, lower power consumption, and potentially lower price. The advantages make this technology competent for the next-generation solid-state imaging applications. However, CMOS processes are originally developed for high-performance digital circuits. Fabricating high-quality embedded image sensors with CMOS technologies is not a straightforward task. This motivates the study of CMOS technologies for imaging applications presented in this thesis. The major content of this study can be partitioned into four parts: (a) A two-stage characterization methodology is developed for sensor optimization, including the characterization of large-area photodiodes and comparative analyses on small-dimension sensor arrays with various pixel structures, junction types of the sensors, and other process-related conditions. (b) The mechanism of hot-carrier induced excess minority carriers occurred at the in-pixel transistors is identified and investigated. The influence of the excess carriers on imager performance is analyzed. Suggestions on the pixel design are provided. (c) Signal cross-talk between adjacent pixels is quantified and studied using a sensor array with a specially designed metal shield pattern, which exposes the center pixel and covers the others. The influence of cross-talk on color imager performance is analyzed. Process and layout improvements on cross-talk are also proposed. (d) The trend of pixel size reduction is investigated from the perspective of the achievable optical lens resolution. Using the modulation transfer function (MTF) as an index, optical simulations are performed to examine the relation between the lens resolution and the lens complexity.
by Ching-Chun Wang.
Ph.D.
Rushton, Joseph Edward. "Radiation damage in CMOS image sensors for space applications." Thesis, Open University, 2018. http://oro.open.ac.uk/53005/.
Повний текст джерелаCaicedo, Jhon Alexander Gomez. "CMOS low-power threshold voltage monitors circuits and applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2016. http://hdl.handle.net/10183/144080.
Повний текст джерелаA threshold voltage (VT0) monitor is a circuit that ideally delivers the estimated VT0 value as a voltage at its output, for a given temperature range, without external biases, parametric setups, curve fitting or any subsequent calculation. It can be used in temperature sensors, voltage and current references, radiation dosimeters and other applications since the MOSFET VT0 dependence on the operation conditions is a very well modeled aspect. Also, it can be used for fabrication process monitoring and process variability compensation, since VT0 is a key parameter for the transistor behavior and modeling. In this thesis, we present three novel circuit topologies, two of them being NMOS VT0 monitors and the last one being a PMOS VT0 monitor. The three structures are resistorless self-biased circuit topologies that present high power supply rejection, low line sensitivity, and allow the direct extraction of the threshold voltage for wide temperature and power supply voltage ranges, with small error. Its design methodology is based on the Unified Current Control Model (UICM), a MOSFET model that is continuous from weak to strong inversion and from triode to saturation regions. The circuits occupy small silicon area, consume just tens of nanoWatts, and can be implemented in any standard digital CMOS process, since they only use MOS transistors (does not need any resistor). The VT0 monitors are used in different applications in order to prove their functionality, and behavior as part of a system. The applications vary from a reference voltage, that presents performance comparable with state-of-the-art works, to a configuration that allows to obtain a lower process variability, in the output of a self-biased circuit that generates a complementary to the absolute temperature (CTAT) voltage. In addition, exploiting the ability to operate as an specific current (ISQ) generator, that the VT0 monitors presented here offer, we introduced a new self-biased circuit that produces a CTAT voltage and is less sensitive to process variations, and can be used in band-gap voltage references.
Martins, Mayler Gama Alvarenga. "Applications of functional composition for CMOS and emerging technologies." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/164452.
Повний текст джерелаThe advances in semiconductor industry over the last decades have been strongly based on continuous scaling down of dimensions in manufactured CMOS devices. The use of CMOS devices profoundly relies on AND/OR/Inverter logic. As the CMOS scaling is reaching its physical limits, researchers increase the effort to prolong the CMOS life. Also, it is necessary to investigate alternative devices, which in many cases implies the use of different basic logic operations. As the commercial synthesis tools are not able to handle these technologies efficiently, there is an opportunity to research alternative logic implementations better suited for these new devices. This thesis focuses on presenting efficient algorithms to design circuits in both CMOS and new technologies while integrating these algorithms into regular design flows. For this task, we apply the functional composition technique, to efficiently synthesize both CMOS and emerging technologies. The functional composition is a bottom-up synthesis approach, providing flexibility to implement algorithms with optimal or suboptimal results for different technologies. To investigate how the functional composition compares to the state-of-the-art synthesis methods, we propose to apply this synthesis paradigm into six different scenarios. Two of them focus on CMOS-based circuits, and other four are based on emerging technologies. Regarding CMOSbased circuits, we investigate functional composition to investigate multi-output factorization in a circuit resynthesis flow. Also, we manipulate approximate functions to synthesize approximate triple modular redundancy (ATMR) modules. Concerning emerging technologies, we explore functional composition over spin-diode circuits and other promising approaches based on different logic implementations: threshold logic, majority logic, and implication logic. Results present a considerable improvement over the state-of-the-art methods for both CMOS and emerging technologies applications, demonstrating the ability to handle different technologies and showing the possibility to improve technologies not explored yet.
Sanyal, Alarka. "CMOS Phase Shifter for Conformal Phased Array Beamformer Applications." Thesis, North Dakota State University, 2015. https://hdl.handle.net/10365/27697.
Повний текст джерелаND NASA EPSCoR (Agreement FAR0020852)
Reidel, Claire-Anne. "Applications for CMOS pixel sensors in ion-beam therapy." Thesis, Strasbourg, 2020. https://publication-theses.unistra.fr/public/theses_doctorat/2020/REIDEL_Claire-Anne_2020_ED182.pdf.
Повний текст джерелаIn ion-beam therapy, high precision measurements are essential for having robust basic data to deliver the prescribed treatment to the patient. In this study, MIMOSA-28 pixel sensors were used as a tracker system for different medical applications. Several hardware and software improvements were implemented leading to a spatial track resolution < 10 μm. The experiments were conducted with success in different medical and research facilities. In this work, beam profiles were measured along the beam axis and the width of the beam along the axis could be calculated with a transportation code based on multiple Coulomb scattering. Moreover, an online beam monitoring was developed in order to have fast information about the beam profile. In another study, the fluence perturbation of 12C ion beams due to small fiducial markers was investigated. After reconstruction and extrapolation of single track, a 3D fluence distribution could be performed and the maximum perturbation and its position along the beam axis could be quantified. In this work, the measured cold spot varied between less than 3% up to 9.2% for a defined marker and a defined primary energy beam
Ho, Ka Wai. "A 1-V CMOS power amplifier for Bluetooth applications /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20HO.
Повний текст джерелаCICIOTTI, FULVIO. "Oscillator-Based CMOS Readout Interfaces for Gas Sensing Applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2019. http://hdl.handle.net/10281/241089.
Повний текст джерелаDetection of toxic and dangerous gases has always been a need for safety purpose and, in recent years, portable and low-cost gas sensing systems are becoming of main interest. This thesis presents fast, high precision, low-power, versatile CMOS interface circuits for portable gas sensing applications. The target sensors are Metal Oxide Semiconductor (MOX) sensors which are widely used due to their inherent compatibility with integrated MEMS technologies. The chosen readout typologies are based on the time-domain Resistor-Controlled Oscillator. This guarantees wide dynamic range, good precision and the ability to cope with the large MOX sensor resistance variations. Four different prototypes have been successfully developed and tested. Chemical measurements with a real SnO2 MOX sensor have also been performed to validate the results, showing a minimum CO detection capability in ambient air of 5 ppm. The ASICs are able to cover 128 dB of DR at 4 Hz of digital output data rate, or 148 dB at 0.4 Hz, while providing a relative error always better than 0.4% (SNDR >48 dB). Target performances have been achieved with aggressive design strategies and system-level optimization, and using a scaled (compared to typical implementations in this field) 130nm CMOS technology provided by Infineon Technologies AG. Power consumption is about 450 μA. Moreover, this work introduces the possibility to use the same oscillator-based architecture to perform capacitive sensors readout. Measurement results with capacitive MEMS sensors have shown 116 dB of DR in CSENS mode, with an SNR of 74 dB at 10 Hz of digital output data rate. The architectures developed in this thesis are compatible with the modern standards in the portable gas sensing industry.
Chen, Jau-Horng. "Wideband Dynamic Biasing of Power Amplifiers for Wireless Handheld Applications." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11554.
Повний текст джерелаMattia, Neto Oscar Elisio. "NanoWatt resistorless CMOS voltage references for Sub-1 V applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2014. http://hdl.handle.net/10183/107131.
Повний текст джерелаIntegrated voltage references have always been a fundamental block of any electronic system, and an important research topic that has been extensively studied in the past 50 years. A voltage reference is a circuit that provides a stable voltage with low sensitivity to variations in temperature, supply, load, process characteristics and packaging stresses. They are usually implemented through the weighted sum of two independent physical phenomena with opposite temperature dependencies. Usually the thermal voltage, related to the Boltzmann’s constant and the electron charge, provides a positive temperature dependence, while the silicon bandgap voltage or a MOSFET’s threshold voltage provide the complementary term. An auxiliary biasing block is sometimes necessary to provide the necessary currents for the circuit to work, and additional blocks implement the weighted sum. The scaling of process technologies is the main driving factor for low voltage operation, while the emergence of portable battery-operated, implantable biomedical and energy harvesting devices mandate that every circuit consume as little power as possible. Therefore, sub-1 V supplies and nanoWatt power have become key characteristics for these kind of circuits, but there are several challenges when designing high accuracy voltage references in modern CMOS technologies under these conditions. The traditional topologies are not suitable because they provide a reference voltage above 1 V, and to achieve such power consumption levels would require G resistances, that occupy a huge silicon area. Recent advances have achieved these levels of power consumption but with limited accuracy, expensive calibration procedures and large silicon area.
Dušek, Petr. "Návrh převodníku DA pro nízkonapěťové aplikace v technologii CMOS." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-221287.
Повний текст джерелаArreguit, Xavier. "Compatible lateral bipolar transistors in CMOS technology : model and applications /." [S.l.] : [s.n.], 1989. http://library.epfl.ch/theses/?nr=817.
Повний текст джерелаFörster, Fabian Alexander. "Novel CMOS Devices for High Energy Physics and Medical Applications." Doctoral thesis, Universitat Autònoma de Barcelona, 2020. http://hdl.handle.net/10803/670504.
Повний текст джерелаLos experimentos de física de alta energía (HEP) en colisionadores de partículas sondean nuestra comprensión de la estructura y la dinámica de la materia. Para avanzar en el campo, los sistemas de aceleración se actualizan periódicamente a mayores energías y luminosidades. Los experimentos tienen que mantenerse al día, mejorando la instrumentación de su detector. Los detectores de píxeles de silicio desempeñan un papel fundamental en los experimentos con HEP. Gracias a su excelente resolución de posición, compacidad, velocidad y dureza de radiación, permiten la reconstrucción de pistas de partículas en entornos de alta radiación como colisionadores de hadrones. A su vez, su rendimiento permite una excelente resolución de parámetros de impacto en la pista, un ingrediente clave para la identificación secundaria de vértices y el etiquetado de chorro b. Actualmente, el detector de píxeles estándar consta de un sensor segmentado, en el que cada píxel está conectado a un canal de lectura de un circuito integrado de aplicación específica (ASIC) a través de una técnica complicada y costosa llamada unión por golpes. Un enfoque alternativo a los dispositivos de píxeles híbridos son los detectores monolíticos, que combinan la detección de partículas y las tareas de procesamiento de señales en el mismo sustrato. Estos tipos de detectores desarrollados en el proceso CMOS se han utilizado en el pasado, pero solo relativamente recientemente basados en dispositivos de radiación dura sobre esta tecnología se han propuesto. En esta tesis, se investiga un primer prototipo de tamaño completo de un detector monolítico desarrollado en la tecnología CMOS de alto voltaje (HV-CMOS) como un dispositivo de píxeles para las capas externas del rastreador ATLAS de actualización futura, que se encuentra en el Gran Colisionador de Hadrones ( LHC) en el CERN. Además de la aplicación de esta tecnología en experimentos HEP, la detección de fotones de rayos X blandos también se investiga en una matriz en uno de los detectores de píxeles HV-CMOS. Por último, se explora el uso de dispositivos CMOS para la detección de fotones de infrarrojo cercano (NIR) con Avalanche Photodiode (APD).
High Energy Physics (HEP) experiments at particle colliders probe our understanding of the structure and dynamics of matter. In order to advance the field, the accelerator systems are periodically upgraded to higher energies and luminosities. Experiments have to keep up, by improving their detector instrumentation. Silicon pixel detectors play a critical role in HEP experiments. Thanks to their excellent position resolution, compactness, speed and radiation hardness, they enable particle track reconstruction in high radiation environments like hadron colliders. In turn, their performance allows excellent track impact parameter resolution, a key ingredient for secondary vertex identification and jet b-tagging. Currently the standard pixel detector consists of a segmented sensor, in which each pixel is connected to a readout channel of an Application-Specific Integrated Circuit (ASIC) through a complicated, and expensive, technique called bump bonding. An alternative approach to hybrid pixel devices are monolithic detectors, which combine the particle sensing and the signal processing tasks in the same substrate.These kinds of detectors developed in the CMOS process have been used in the past, but only relatively recently radiation hard devices based on this technology have been proposed. In this thesis a first full size prototype of a monolithic detector developed in the High Voltage CMOS (HV-CMOS) technology is investigated as a pixel device for the outer layers of the future upgrade ATLAS tracker, which is located in the Large Hadron Collider (LHC) at CERN. Besides the application of this technology in HEP experiments, the detection of soft X-ray photons is also investigated in one matrix in one of the HV-CMOS pixel detectors. Lastly, the usage of CMOS devices for the detection of Near-Infrared (NIR) photons with Avalanche Photodiode (APD) is explored.
Barsatan, Randy. "CMOS-compatible nonvolatile memories for radio frequency identification (RFID) applications /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20BARSAT.
Повний текст джерелаMartin, Lucy Claire. "Characterisation of silicon carbide CMOS devices for high temperature applications." Thesis, University of Newcastle upon Tyne, 2015. http://hdl.handle.net/10443/3030.
Повний текст джерелаLin, Fang. "High-Q high-frequency CMOS bandpass filters for wireless applications." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/14869.
Повний текст джерелаCarvalho, Carlos Manuel Ferreira. "CMOS indoor light energy harvesting system for wireless sensing applications." Doctoral thesis, Faculdade de Ciências e Tecnologia, 2014. http://hdl.handle.net/10362/13127.
Повний текст джерелаThis research thesis presents a micro-power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched-capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT Fractional Open Circuit Voltage (VOC) technique is implemented by an asynchronous state machine (ASM) that creates and, dynamically, adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point (MPP) condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge reusing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm2 in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm2, is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m2. After starting-up, the system requires an irradiance of only 0.18 W/m2 (18 mW/cm2) to remain in operation. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mW. These values are, to the best of the authors’ knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3% for an input power of 48 mW, which is comparable with reported values from circuits operating at similar power levels.
Portuguese Foundation for Science and Technology (FCT/MCTES), under project PEst-OE/EEI/UI0066/2011, and to the CTS multiannual funding, through the PIDDAC Program funds. I am also very grateful for the grant SFRH/PROTEC/67683/2010, financially supported by the IPL – Instituto Politécnico de Lisboa.
Jiang, Yu. "CMOS n-dimensional m-level hysteresis circuits and possible applications." College Park, Md.: University of Maryland, 2007. http://hdl.handle.net/1903/7721.
Повний текст джерелаThesis research directed by: Dept. of Electrical and Computer Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
Zhang, Ning. "CMOS millimeter-wave receiver front-end circuits and their applications." [Gainesville, Fla.] : University of Florida, 2009. http://purl.fcla.edu/fcla/etd/UFE0024261.
Повний текст джерелаAktas, Adem. "Integrated RF CMOS frequency synthesizers and oscillators for wireless applications." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1078330772.
Повний текст джерелаTitle from first page of PDF file. Document formatted into pages; contains xix, 217 p.; also includes graphics (some col.). Includes bibliographical references (p. 211-217). Available online via OhioLINK's ETD Center
Tsai, Meng-Hung, and 蔡孟宏. "Applications of CMOS MEMS Process Integration." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/21382880135893151049.
Повний текст джерела國立彰化師範大學
機電工程學系
99
Abstract The most favorite advantages of Complementary Metal-Oxide- Semiconductor (CMOS) are based on its standard material and fabrication and therefore it will make semiconductor manufacturers low costs and high-rate production. Nevertheless MEMS of CMOS fabrication has some drawbacks which limit its applications in sensors and actuators. Comparisons with most of the semiconductor technology, the CMOS fabrication will meet limitations and challenges. The first is that MEMS components need more complicated materials and layers. The second is that designing MEMS structure requires special fabrication processes and these processes are not in the original COMS processes. In this thesis, we propose several advanced fabrication integrating with CMOS-compatible process. It will bring profits of standardized production and has the high performance and reliability of MEMS. We use 0.35μm 2P4M CMOS IC compatible process and propose the new post fabrication for COMS MEMS resonators, infrared absorption sensors and CO gas sensors. Besides we investigate the sacrificial layer of sensors and measure the properties of MEMS resonator, CO gas sensor and so on. Key words: MEMS resonator, CO gas sensor, sacrificial layer
Chang, Cheng Chieh, and 張正杰. "CMOS Exponential Analog Signal Processing Applications." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/40466329229676417086.
Повний текст джерела國立臺灣大學
電機工程學研究所
89
This thesis developed some square-law based technologies for exponential applications. It is helpful to take CMOS technologies rather than bipolar technologies in some analog circuits, which were traditionally designed in bipolar technologies and difficult to realize in CMOS process. In the beginning, it is tried to find ways instead of the exponential application about tripler. But exponential functions take overwhelming advantages and conveniences in some analog signal applications, such as variable gain amplifier, translinear based signal processing circuits and gamma corrector, etc. It is promoted to simulate the exponential functions by the square-law of MOSFETs in saturation. A square-law based pseudo-exponential design equation was proposed in chapter 3. Three pseudo-exponential circuits have been implemented and they can be applied to the applications of VGA. However, the circuits with pseudo-exponential characteristics don’t mean that they can implement translinear utilities like bipolar transistors. Pseudo BJTs were proposed in chapter 4 and they have been successfully applied to log-domain lowpass, highpass, bandpass filters and a current-controlled oscillator in a 0.5 um N-well CMOS process. Finally, based on the pseudo-exponential characteristics of the PBJT, a current-mode voltage-controlled root function circuit was proposed in chapter 5. It provides a new possible solution to some root applications by using CMOS technology.
Hsiao, Chun-Fang, and 蕭淳方. "CMOS Analog Multipliers and Their Applications." Thesis, 1989. http://ndltd.ncl.edu.tw/handle/39229038785783307603.
Повний текст джерела國立交通大學
電子研究所
77
Since the first paper reported on a MOS analog multiplier in 1982, there are many principles and structures estiblished for those circuits. Improving the linearity and widening the input range are the most important design objectives to build the analog multipliers. A new analog multiplier circuit without the effect of mobility factor to improve the linearity is proposed first. It is based on the square-law I-V characteristic of the MOS transistor and the operation of the linear current-to-voltage converter. The core of the next multiplier is composed of the four transistors operated in linear region. And there are two versions of buffers realized for widening the input range of these linear region multipliers. The quarter-square technique and the differential source-coupled input pairs have gained favor of large input swing in the third multiplier. At last, a current multiplier which is also without the effect of mobility factor is described. A new self-biasing input section of the current multipli r is proposed for lowering nonideal current mirror effect. All circuits are designed and fabricated in the 3.5μm CMOS double-poly single-metal p-well technology. They have a nonlinearity under one percent. Error analysis and performance evaluation have also performed for each multiplier. PSPICE simulations confirm all results.
Weihsing, Liu. "CMOS Exponential Function Circuits and Their Applications." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0107200415142700.
Повний текст джерелаWang, Min. "Reconfigurable CMOS Mixers for Radio-Frequency Applications." Thesis, 2010. http://hdl.handle.net/1974/5712.
Повний текст джерелаThesis (Master, Electrical & Computer Engineering) -- Queen's University, 2010-06-18 14:40:35.062