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Статті в журналах з теми "Active gate driver"

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Автор: Grafiati

Опубліковано: 14 березня 2023

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1

Lasek, Bartosz, Przemysław Trochimiuk, Rafał Kopacz, and Jacek Rąbkowski. "Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET." Applied Sciences 11, no. 5 (March 3, 2021): 2210. http://dx.doi.org/10.3390/app11052210.

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Анотація:

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. Moreover, an adequate manipulation of the gate voltage is necessary as the gate current should be reduced during the rise of the drain current to avoid overshoots and oscillations. The gate voltage is switched at the right moments on the basis of the feedback signal provided from a measurement of the voltage across the parasitic source inductance of the module. This approach simplifies the circuit and provides no additional power losses in the measuring circuit. The paper contains the theoretical background and detailed description of the active gate driver design. The model of the parasitic-based active gate driver was verified using the double-pulse procedure both in Saber simulations and laboratory experiments. The active gate driver decreases the turn-on energy of a 1.7 kV/325 A SiC MOSFET by 7% comparing to a conventional gate driver (VDS = 900 V, ID = 270 A, RG = 20 Ω). Furthermore, the proposed active gate driver lowered the turn-on cycle time from 478 to 390 ns without any serious oscillations in the main circuit.

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2

Liang, Mei, Jiwen Chen, Jinchao Bai, Pengyu Jia, and Yuzhe Jiao. "A New Gate Driver for Suppressing Crosstalk of SiC MOSFET." Electronics 11, no. 20 (October 11, 2022): 3268. http://dx.doi.org/10.3390/electronics11203268.

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Анотація:

High switching-speed Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor (SiC MOSFET) has serious crosstalk issues. During the turn-ON transition and turn-OFF transition of the active switch in a phase-leg configuration, the voltage drops across the common-source inductor and the displacement current of the gate-drain capacitor of the OFF-state switch induce a spurious pulse on its gate-source voltage. This paper proposes a new gate driver using two Bipolar Junction Transistors (BJTs) and one diode to connect the gate terminal of SiC MOSFET and the negative driver voltage, which provides a low impedance path to bypass the displacement current of the gate-drain capacitor when crosstalk issues occur. The simulation results prove the proposed driver is valid on suppressing the crosstalk issue. The comparisons between the prior drivers and the proposed driver show the superiority of the proposed driver. Finally, the proposed gate driver is successfully implemented and experimentally verified on a 1.1 kW synchronous buck prototype.

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3

Fahmi, M. I., M. F. Mukmin, H. F. Liew, C. L. Wai, M. A. Aazmi, and S. N. M. Arshad. "Design new voltage balancing control series connected for HV-IGBT`s." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 4 (August 1, 2021): 2899. http://dx.doi.org/10.11591/ijece.v11i4.pp2899-2906.

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<span>The insulated gate bipolar transistors (IGBTs) are widely used in various applications as they require low gate drive power and gate voltage. This paper proposes an active gain circuit to maintain voltage stability of series-connected IGBTs for high voltage applications. The novel gate driver circuit with closed-loops control amplifies the gate signal while restricting the IGBT emitter voltage below a predetermined level. With the proposed circuit, serial-connected IGBTs can replace high-voltage IGBTs (HV-IGBTs) for high-voltage applications through the active control of the gate signal time delay. Closed-loop controls function is to charged current to the gate to restrict the IGBT emitter voltage to a predetermined level. This paper also presents the experiment on the gate driver capability based on a series-connected IGBTs with three IGBTs and a snubber circuit. The experimental results show a voltage offset with active control with a wide variation in load and imbalance conditions. Lastly, the experimental results are validated with the simulation results, where the simulation results agree with the experimental results.</span>

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4

Sukhatme, Yash, Vamshi Krishna Miryala, P. Ganesan, and Kamalesh Hatua. "Digitally Controlled Gate Current Source-Based Active Gate Driver for Silicon Carbide MOSFETs." IEEE Transactions on Industrial Electronics 67, no. 12 (December 2020): 10121–33. http://dx.doi.org/10.1109/tie.2019.2958301.

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5

Gras, David, Christophe Pautrel, Amir Fanaei, Gregory Thepaut, Maxime Chabert, Fabien Laplace, and Gonzalo Picun. "Highly Integrated and Isolated Universal Half-Bridge Power Gate Driver and Associated Flyback Power Supply for High Temperature and High Reliability Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000206–13. http://dx.doi.org/10.4071/hitec-wp12.

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In this paper we present a highly integrated, high-temperature isolated, half-bridge power gate driver demo board, based on turnkey X-REL chipset: XTR26010 (High-Temperature Intelligent Gate Driver), XTR40010 (High-Temperature Isolated Two Channel Transceiver), XTR30010 (High-Temperature PWM Controller), and XTR2N0825 (High-Temperature 80V N-Channel Power MOSFET). The XTR26010 is the key circuit in this chipset for power gate drive application. The XTR26010 circuit has been designed with a high focus in offering a robust, reliable and efficient solution for driving a large variety of high-temperature, high-voltage, and high-efficiency power transistors (SiC, GaN, Si) existing in the market. Furthermore, the XTR26010 circuit implements an unprecedented functionality for high-temperature drivers allowing safe operation at system level by preventing any cross-conduction between high-side and low-side switches, through isolated communication between high-side and low-side drivers. The XTR40010 is used for isolated data communication between a microcontroller or a PWM controller with the power driver (XTR26010). For supplying the half-bridge gate driver, a compact isolated flyback power supply has been developed thanks to the versatile voltage mode PWM controller XTR30010 and the XT2N0825 N-Channel MOSFET. The full system has been successfully tested while driving different brands of SiC MOSFETs up to Ta=200°C, 600kHz of switching frequency and 600V high-voltage bus (limited by isolation transformers used). The demo board presented can be easily modified to drive other SiC and GaN transistors available in the market. The 200°C limitation of the demo board is due to passives, PCB material, and the solder paste used. However, all X-REL active circuits have been qualified within specifications well above 230°C.

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6

Ghorbani, Hamidreza, Vicent Sala, Alejandro Paredes Camacho, and Jose Romeral Martinez. "A Simple Closed-Loop Active Gate Voltage Driver for Controlling diC/dt and dvCE/dt in IGBTs." Electronics 8, no. 2 (January 30, 2019): 144. http://dx.doi.org/10.3390/electronics8020144.

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The increase of the switching speed in power semiconductors leads to converters with better efficiency and high power density. On the other hand, fast switching generates some consequences like overshoots and higher switching transient, which provoke electromagnetic interference (EMI). This paper proposes a new closed-loop gate driver to improve switching trajectory in insulated gate bipolar transistors (IGBTs) at the hard switching condition. The proposed closed-loop gate driver is based on an active gate voltage control method, which deals with emitter voltage (VEe) for controlling diC/dt and gets feedback from the output voltage (vCE) in order to control dvCE/dt. The sampled voltage signals modify the profile of the applied gate voltage (vgg). As a result, the desired gate driver (GD) improves the switching transients with minimum switching loss. The operation principle and implementation of the controller in the GD are thoroughly described. It can be observed that the new GD controls both dvCE/dt and diC/dt accurately independent of the variable parameters. The new control method is verified by experimental results. As a current issue, the known trade-off between switching losses and EMI is improved by this simple and effective control method.

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7

Bagheri, Alireza, Hossein Iman-Eini, and Shahrokh Farhangi. "A Gate Driver Circuit for Series-Connected IGBTs Based on Quasi-Active Gate Control." IEEE Journal of Emerging and Selected Topics in Power Electronics 6, no. 2 (June 2018): 791–99. http://dx.doi.org/10.1109/jestpe.2018.2791202.

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8

Coleman, Fred, and Young J. Moon. "System Simulation of Dual-Gate At-Grade Railroad-Highway Crossings: Development and Verification." Transportation Research Record: Journal of the Transportation Research Board 1605, no. 1 (January 1997): 88–95. http://dx.doi.org/10.3141/1605-11.

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A simulation model of a dual-gate railroad-highway grade crossing was developed, validated, and applied to six crossings on the Chicago–St. Louis High Speed Passenger Rail Corridor. Simulation was used to demonstrate the feasibility of modeling the interaction of active safety devices, driver behavior, and vehicular and train traffic, and the dual-gate model served as the basis for development of a four-quadrant gate simulation model. Findings from the dual-gate simulation indicate that aggressive or inattentive drivers in the nonrecovery zone frequently exceed stopping distances and more beyond gate arms, and therefore are likely to proceed at high risk of a collision between their vehicle and a train.

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9

Camacho, Alejandro Paredes, Vicent Sala, Hamidreza Ghorbani, and Jose Luis Romeral Martinez. "A Novel Active Gate Driver for Improving SiC MOSFET Switching Trajectory." IEEE Transactions on Industrial Electronics 64, no. 11 (November 2017): 9032–42. http://dx.doi.org/10.1109/tie.2017.2719603.

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10

Waradzyn, Zbigniew, Robert Stala, Aleksander Skała, Andrzej Mondzik, and Adam Penczek. "A Cost-Effective Resonant Switched-Capacitor DC-DC Boost Converter – Experimental Results and Feasibility Model." Power Electronics and Drives 3, no. 1 (December 1, 2018): 75–83. http://dx.doi.org/10.2478/pead-2018-0004.

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Abstract This paper presents the results of experimental research of a resonant switched capacitor voltage multiplier in a cost-effective topology (CESCVM) with a limited number of active switches. In the charging mode of the switched capacitors, the converter utilizes only one active switch and a required number of diodes. Therefore, the cost of the converter is decreased as compared with that of a classical SCVM converter, owing to a lower number of switches and gate driver circuits, as well as a smaller PCB area. Moreover, the CESCVM has simpler control circuits and higher reliability. This paper presents the original experimental results of the operation of the CESCVM converter. A concept of the bootstrap supply of gate drivers of the flying switches is also examined.

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11

Zhou, Yan, Lihua Chen, Shuitao Yang, Fan Xu, and Mohammed Khorshed Alam. "A Smart Gate Driver with Active Switching Speed Control for Traction Inverters." SAE International Journal of Alternative Powertrains 6, no. 2 (March 28, 2017): 298–302. http://dx.doi.org/10.4271/2017-01-1243.

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12

Shu, Lu, Junming Zhang, and Shuai Shao. "Crosstalk Analysis and Suppression for a Closed-Loop Active IGBT Gate Driver." IEEE Journal of Emerging and Selected Topics in Power Electronics 7, no. 3 (September 2019): 1931–40. http://dx.doi.org/10.1109/jestpe.2018.2869678.

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13

Yin, Shan, Yingzhe Wu, Yitao Liu, and Xuewei Pan. "Comparative Design of Gate Drivers with Short-Circuit Protection Scheme for SiC MOSFET and Si IGBT." Energies 12, no. 23 (November 29, 2019): 4546. http://dx.doi.org/10.3390/en12234546.

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Short-circuit faults are the most critical failure mechanism in power converters. Among the various short-circuit protection schemes, desaturation protection is the most mature and widely used solution. Due to the lack of gate driver integrated circuit (IC) with desaturation protection for the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), the conventional insulated gate bipolar transistor (IGBT) driver IC is normally used as these two devices have similar gate structure and driving mechanism. In this work, a gate driver with desaturation protection is designed for the 1.2-kV/30-A SiC MOSFET and silicon (Si) IGBT with the off-the-shelf driver IC. To further limit voltage-overshoot at the rapid turn-off transient, the active clamping circuit is introduced. Based on the experiments of switching characterization and short-circuit test, the SiC MOSFET shows faster switching speed, more serious electromagnetic interference (EMI) issue, lower switching loss (half), and higher short-circuit current (1.6 times) than the Si IGBT, even with a slower gate driver. Thus, a rapid response speed is required for the desaturation protection circuit of SiC MOSFET. Due to the long delay time of the existing desaturation protection scheme, it is technically difficult to design a sub- μ s protection circuit. In this work, an external current source is proposed to charge the blanking capacitor. A short-circuit time of 0.91 μ s is achieved with a reliable protection. Additionally, the peak current is reduced by 22%.

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14

Acharya, Sayan, Xu She, Fengfeng Tao, Tony Frangieh, Maja Harfman Todorovic, and Rajib Datta. "Active Gate Driver for SiC-MOSFET-Based PV Inverter With Enhanced Operating Range." IEEE Transactions on Industry Applications 55, no. 2 (March 2019): 1677–89. http://dx.doi.org/10.1109/tia.2018.2878764.

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15

Bau, Plinio, Marc Cousineau, Bernardo Cougo, Frederic Richardeau, and Nicolas Rouger. "CMOS Active Gate Driver for Closed-Loop dv/dt Control of GaN Transistors." IEEE Transactions on Power Electronics 35, no. 12 (December 2020): 13322–32. http://dx.doi.org/10.1109/tpel.2020.2995531.

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16

Cheng, Hung Liang, Chun An Cheng, Chao Shun Chen, and Kuan Lung Huang. "Design and Implementation of a Dimmable LED Driver with Low-Frequency PWM Control." Applied Mechanics and Materials 284-287 (January 2013): 2538–42. http://dx.doi.org/10.4028/www.scientific.net/amm.284-287.2538.

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This paper proposes a high-efficiency dimmable LED driver for light emitting diodes (LED). The developed LED driver consists of a full-bridge resonant converter and six buck converters. The function of the full-bridge resonant converter is to obtain a smooth dc-link voltage for the buck converters by phase-shift modulation (PSM) while that of the six buck converters is to drive six LED modules, respectively. The gate voltage of the active switch of each buck converter is a combination of high-frequency and low-frequency pulses. The duty ratio of the high-frequency pulse controls the LED voltage and thereby, controls the amplitude of LED current. LEDs are dimmed by low-frequency pulse-width modulation (PWM) to vary the average current flowing through LED. Circuit equations are derived and circuit parameters are designed. High circuit efficiency is ensured by operating the active switches at zero-voltage switching-on to reduce the switching loss. Finally, a prototype circuit was built to verify the accuracy and feasibility of the proposed LED driver.

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17

Li, Chen, Kun Tan, Bing Ji, Zhiqiang Wang, Shuai Ding, and Paul Lefley. "A four‐step control for IGBT switching improvement using an active voltage gate driver." IET Power Electronics 15, no. 6 (February 2, 2022): 548–57. http://dx.doi.org/10.1049/pel2.12248.

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18

YASUDA, Satomu, Yukihisa SUZUKI, and Keiji WADA. "Estimation of Switching Loss and Voltage Overshoot of Active Gate Driver by Neural Network." IEICE Transactions on Electronics E103.C, no. 11 (November 1, 2020): 609–12. http://dx.doi.org/10.1587/transele.2019ess0004.

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19

Zhang, Zheyu, Fred Wang, Leon M. Tolbert, and Benjamin J. Blalock. "Active Gate Driver for Crosstalk Suppression of SiC Devices in a Phase-Leg Configuration." IEEE Transactions on Power Electronics 29, no. 4 (April 2014): 1986–97. http://dx.doi.org/10.1109/tpel.2013.2268058.

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20

Zhao, Shuang, Xingchen Zhao, Audrey Dearien, Yuheng Wu, Yue Zhao, and H. Alan Mantooth. "An Intelligent Versatile Model-Based Trajectory-Optimized Active Gate Driver for Silicon Carbide Devices." IEEE Journal of Emerging and Selected Topics in Power Electronics 8, no. 1 (March 2020): 429–41. http://dx.doi.org/10.1109/jestpe.2019.2922824.

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21

Wang, Rui, Lin Liang, Yu Chen, Yan Pan, Jinyuan Li, Lubin Han, and Guoqiang Tan. "Self-Adaptive Active Gate Driver for IGBT Switching Performance Optimization Based on Status Monitoring." IEEE Transactions on Power Electronics 35, no. 6 (June 2020): 6362–72. http://dx.doi.org/10.1109/tpel.2019.2947268.

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22

Obara, Hidemine, Keiji Wada, Koutarou Miyazaki, Makoto Takamiya, and Takayasu Sakurai. "Active Gate Control in Half-Bridge Inverters Using Programmable Gate Driver ICs to Improve Both Surge Voltage and Converter Efficiency." IEEE Transactions on Industry Applications 54, no. 5 (September 2018): 4603–11. http://dx.doi.org/10.1109/tia.2018.2835812.

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23

Tian, Chao, Haiming Cao, Jiebing Feng, Mingyue Li, Yanqing Guan, and Guanghui Liu. "P‐7: In‐Cell‐Touch Display Design Using Gate Driver Circuits Integrated within Active Area and De‐Mux Source Driver." SID Symposium Digest of Technical Papers 52, no. 1 (May 2021): 1081–84. http://dx.doi.org/10.1002/sdtp.14880.

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24

Mata-Carballeira, Óscar, Jon Gutiérrez-Zaballa, Inés del Campo, and Victoria Martínez. "An FPGA-Based Neuro-Fuzzy Sensor for Personalized Driving Assistance." Sensors 19, no. 18 (September 17, 2019): 4011. http://dx.doi.org/10.3390/s19184011.

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Advanced driving-assistance systems (ADAS) are intended to automatize driver tasks, as well as improve driving and vehicle safety. This work proposes an intelligent neuro-fuzzy sensor for driving style (DS) recognition, suitable for ADAS enhancement. The development of the driving style intelligent sensor uses naturalistic driving data from the SHRP2 study, which includes data from a CAN bus, inertial measurement unit, and front radar. The system has been successfully implemented using a field-programmable gate array (FPGA) device of the Xilinx Zynq programmable system-on-chip (PSoC). It can mimic the typical timing parameters of a group of drivers as well as tune these typical parameters to model individual DSs. The neuro-fuzzy intelligent sensor provides high-speed real-time active ADAS implementation and is able to personalize its behavior into safe margins without driver intervention. In particular, the personalization procedure of the time headway (THW) parameter for an ACC in steady car following was developed, achieving a performance of 0.53 microseconds. This performance fulfilled the requirements of cutting-edge active ADAS specifications.

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25

Kim, Jong-Seok, and Byong-Deok Choi. "A new decoder-type integrated gate driver with a-Si:H TFTs for active-matrix displays." Japanese Journal of Applied Physics 53, no. 3S1 (January 1, 2014): 03CD03. http://dx.doi.org/10.7567/jjap.53.03cd03.

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26

Dymond, Harry C. P., Jianjing Wang, Dawei Liu, Jeremy J. O. Dalton, Neville McNeill, Dinesh Pamunuwa, Simon J. Hollis, and Bernard H. Stark. "A 6.7-GHz Active Gate Driver for GaN FETs to Combat Overshoot, Ringing, and EMI." IEEE Transactions on Power Electronics 33, no. 1 (January 2018): 581–94. http://dx.doi.org/10.1109/tpel.2017.2669879.

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27

Yang, Yuan, Yang Wen, and Yong Gao. "A Novel Active Gate Driver for Improving Switching Performance of High-Power SiC MOSFET Modules." IEEE Transactions on Power Electronics 34, no. 8 (August 2019): 7775–87. http://dx.doi.org/10.1109/tpel.2018.2878779.

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28

Wen, Yang, Yuan Yang, and Yong Gao. "Active Gate Driver for Improving Current Sharing Performance of Paralleled High-Power SiC MOSFET Modules." IEEE Transactions on Power Electronics 36, no. 2 (February 2021): 1491–505. http://dx.doi.org/10.1109/tpel.2020.3006071.

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29

Jiang, Wen-Zhuang, Kuo-Ing Hwu, and Jenn-Jong Shieh. "Four-Channel Buck-Type LED Driver with Automatic Current Sharing and Soft Switching." Applied Sciences 12, no. 12 (June 8, 2022): 5842. http://dx.doi.org/10.3390/app12125842.

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A buck-type LED driver together with automatic current sharing and high step-down voltage conversion ratio but without complex control is proposed. The proposed LED driver can not only achieve zero voltage switching (ZVS) turn-on by adding only one resonant coupled inductor, which resonates with parasitic capacitors of active switches, but also can obtain lower voltage gain and better conversion efficiency. In this paper, the operating principles and design considerations of the proposed converter are discussed in detail. In addition, the number of LED strings can be extended to more than four channels. Finally, the theoretical analysis and performance of the proposed LED driver are verified by simulations and experiments using a field-programmable logic gate array (FPGA) named EP3C5E144C8N as a circuit control kernel.

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30

Beye, Mamadou Lamine, Thilini Wickramasinghe, Jean François Mogniotte, Luong Viêt Phung, Nadir Idir, Hassan Maher, and Bruno Allard. "Active Gate Driver and Management of the Switching Speed of GaN Transistors during Turn-On and Turn-Off." Electronics 10, no. 2 (January 7, 2021): 106. http://dx.doi.org/10.3390/electronics10020106.

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The paper investigates the management of drain voltage and current slew rates (i.e., dv/dt and di/dt) of high-speed GaN-based power switches during the transitions. An active gate voltage control (AGVC) is considered for improving the safe operation of a switching cell. In an application of open-loop AGVC, the switching speeds vary significantly with the operating point of the GaN HEMT on either or both current and temperature. A closed-loop AGVC is proposed to operate the switches at a constant speed over different operating points. In order to evaluate the reduction in the electromagnetic disturbances, the common mode currents in the system were compared using the active and a standard gate voltage control (SGVC). The closed-loop analysis carried out in this paper has shown that discrete component-based design can introduce limitations to fully resolve the problem of high switching speeds. To ensure effective control of the switching operations, a response time fewer than 10 ns is required for this uncomplex closed-loop technique despite an increase in switching losses.

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31

Beye, Mamadou Lamine, Thilini Wickramasinghe, Jean François Mogniotte, Luong Viêt Phung, Nadir Idir, Hassan Maher, and Bruno Allard. "Active Gate Driver and Management of the Switching Speed of GaN Transistors during Turn-On and Turn-Off." Electronics 10, no. 2 (January 7, 2021): 106. http://dx.doi.org/10.3390/electronics10020106.

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Анотація:

The paper investigates the management of drain voltage and current slew rates (i.e., dv/dt and di/dt) of high-speed GaN-based power switches during the transitions. An active gate voltage control (AGVC) is considered for improving the safe operation of a switching cell. In an application of open-loop AGVC, the switching speeds vary significantly with the operating point of the GaN HEMT on either or both current and temperature. A closed-loop AGVC is proposed to operate the switches at a constant speed over different operating points. In order to evaluate the reduction in the electromagnetic disturbances, the common mode currents in the system were compared using the active and a standard gate voltage control (SGVC). The closed-loop analysis carried out in this paper has shown that discrete component-based design can introduce limitations to fully resolve the problem of high switching speeds. To ensure effective control of the switching operations, a response time fewer than 10 ns is required for this uncomplex closed-loop technique despite an increase in switching losses.

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32

Kim, Tae-Wook, Gyu-Tae Park, Byong-Deok Choi, MunPyo Hong, Jin-Nyoung Jang, Byoung-Cheol Song, Dong Hyeok Lee, and Byung Seong Bae. "Decoder-Type Gate Driver Circuits Fabricated with Amorphous Silicon Thin-Film Transistors for Active Matrix Displays." Japanese Journal of Applied Physics 50, no. 3S (March 1, 2011): 03CC03. http://dx.doi.org/10.7567/jjap.50.03cc03.

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33

Krishna Miryala, Vamshi, and Kamalesh Hatua. "Low‐cost analogue active gate driver for SiC MOSFET to enable operation in higher parasitic environment." IET Power Electronics 13, no. 3 (February 2020): 463–74. http://dx.doi.org/10.1049/iet-pel.2019.0589.

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34

Kim, Tae-Wook, Gyu-Tae Park, Byong-Deok Choi, MunPyo Hong, Jin-Nyoung Jang, Byoung-Cheol Song, Dong Hyeok Lee, and Byung Seong Bae. "Decoder-Type Gate Driver Circuits Fabricated with Amorphous Silicon Thin-Film Transistors for Active Matrix Displays." Japanese Journal of Applied Physics 50, no. 3 (March 22, 2011): 03CC03. http://dx.doi.org/10.1143/jjap.50.03cc03.

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35

Marzoughi, Alinaghi, Rolando Burgos, and Dushan Boroyevich. "Active Gate-Driver With dv/dt Controller for Dynamic Voltage Balancing in Series-Connected SiC MOSFETs." IEEE Transactions on Industrial Electronics 66, no. 4 (April 2019): 2488–98. http://dx.doi.org/10.1109/tie.2018.2842753.

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36

Zhang, Zhengda, Chunhui Liu, Mengzhi Wang, Yunpeng Si, Yifu Liu, and Qin Lei. "A Novel Current-Source-Based Gate Driver With Active Voltage Balancing Control for Series-Connected GaN HEMTs." IEEE Open Journal of Power Electronics 2 (2021): 346–67. http://dx.doi.org/10.1109/ojpel.2021.3070527.

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37

Kim, Jong-Seok, Gyu-Tae Park, Hyun-Woo Kim, and Byong-Deok Choi. "Compact Decoder-Type Gate Driver Circuits with Hydrogenated Amorphous Silicon Thin Film Transistors for Active Matrix Displays." Japanese Journal of Applied Physics 52, no. 3S (March 1, 2013): 03BC01. http://dx.doi.org/10.7567/jjap.52.03bc01.

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38

Wang, Zhiqiang, Xiaojie Shi, Leon M. Tolbert, Fei Wang, and Benjamin J. Blalock. "A di/dt Feedback-Based Active Gate Driver for Smart Switching and Fast Overcurrent Protection of IGBT Modules." IEEE Transactions on Power Electronics 29, no. 7 (July 2014): 3720–32. http://dx.doi.org/10.1109/tpel.2013.2278794.

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39

Xu, Shangjun, Mingxin Wang, Zhijun Wang, Liufei Zhou, Yang Shu, Ling Yuan, Cunjian Bian, et al. "P‐1.9: The Effect of Lateral Capacitance on Flat‐Panel Display with Gate Driver Circuits Integrated in Active Area." SID Symposium Digest of Technical Papers 52, S1 (February 2021): 436–38. http://dx.doi.org/10.1002/sdtp.14513.

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40

Ramsay, E., James Breeze, David T. Clark, A. Murphy, D. Smith, R. Thompson, Sean Wright, R. Young, and A. Horsfall. "High Temperature CMOS Circuits on Silicon Carbide." Materials Science Forum 821-823 (June 2015): 859–62. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.859.

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This paper presents the characteristics and performance of a range of Silicon Carbide (SiC) CMOS integrated circuits fabricated using a process designed to operate at temperatures of 300°C and above. The properties of Silicon carbide enable both n-channel and p-channel MOSFETS to operate at temperatures above 400°C [1] and we are developing a CMOS process to exploit this capability [4]. The operation of these transistors and other integrated circuit elements such as resistors and contacts is presented across a temperature range of room temperature to +400°C. We have designed and fabricated a wide range of test and demonstrator circuits. A set of six simple logic parts, such as a quad NAND and NOR gates, have been stressed at 300°C for extended times and performance results such as propagation delay drive levels, threshold levels and current consumption versus stress time are presented. Other circuit implementations, with increased logic complexity, such as a pulse width modulator, a configurable timer and others have also been designed, fabricated and tested. The low leakage characteristics of SiC has allowed the implementation of a very low leakage analogue multiplexer showing less than 0.5uA channel leakage at 400°C. Another circuit implemented in SiC CMOS demonstrates the ability to drive SiC power switching devices. The ability of CMOS to provide an active pull up and active pull down current can provide the charging and discharging current required to drive a power MOSFET switch in less than 100ns. Being implemented in CMOS, the gate drive buffer benefits from having no direct current path from the power rails, except during switching events. This lowers the driver power dissipation. By including multiple current paths through independently switched transistors, the gate drive buffer circuit can provide a high switching current and then a lower sustaining current as required to minimize power dissipation when driving a bipolar switch.

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41

Banaei, M. R., and E. Salary. "Solid State Transformer Interface Based on Multilevel Inverter for Fuel Cell Power Generation and Management." International Journal of Emerging Electric Power Systems 15, no. 5 (October 1, 2014): 485–500. http://dx.doi.org/10.1515/ijeeps-2013-0176.

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Abstract This paper concentrates on the solid state transformer that can be used in fuel cell systems. To distribute the power between fuel cells and load or grid, the new solid state transformer has been developed. The proposed solid state transformer uses high-frequency transformer to increase input voltage and one special multilevel inverter with five switches in basic units. In fact, this multilevel inverter synthesizes a desired output AC voltage from DC voltage sources with a high number of levels associated with a low number of switches and gate driver circuits for switches. Simulation results are given to show the overall system performance including AC voltage generation, hybrid power generation and active power control.

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42

Szilágyi, László, Guido Belfiore, Ronny Henker, and Frank Ellinger. "20–25 Gbit/s low-power inductor-less single-chip optical receiver and transmitter frontend in 28 nm digital CMOS." International Journal of Microwave and Wireless Technologies 9, no. 8 (May 2, 2017): 1667–77. http://dx.doi.org/10.1017/s1759078717000472.

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The design of an analog frontend including a receiver amplifier (RX) and laser diode driver (LDD) for optical communication system is described. The RX consists of a transimpedance amplifier, a limiting amplifier, and an output buffer (BUF). An offset compensation and common-mode control circuit is designed using switched-capacitor technique to save chip area, provides continuous reduction of the offset in the RX. Active-peaking methods are used to enhance the bandwidth and gain. The very low gate-oxide breakdown voltage of transistors in deep sub-micron technologies is overcome in the LDD by implementing a topology which has the amplifier placed in a floating well. It comprises a level shifter, a pre-amplifier, and the driver stage. The single-chip frontend, fabricated in a 28 nm bulk-digital complementary metal–oxide–semiconductor (CMOS) process has a total active area of 0.003 mm2, is among the smallest optical frontends. Without the BUF, which consumes 8 mW from a separate supply, the RX power consumption is 21 mW, while the LDD consumes 32 mW. Small-signal gain and bandwidth are measured. A photo diode and laser diode are bonded to the chip on a test-printed circuit board. Electro-optical measurements show an error-free detection with a bit error rate of 10−12at 20 Gbit/s of the RX at and a 25 Gbit/s transmission of the LDD.

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43

Hong, Kuo-Bin, Chun-Yen Peng, Wei-Cheng Lin, Kuan-Lun Chen, Shih-Chen Chen, Hao-Chung Kuo, Edward Yi Chang, and Chun-Hsiung Lin. "Thermal Analysis of Flip-Chip Bonding Designs for GaN Power HEMTs with an On-Chip Heat-Spreading Layer." Micromachines 14, no. 3 (February 23, 2023): 519. http://dx.doi.org/10.3390/mi14030519.

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In this work, we demonstrated the thermal analysis of different flip-chip bonding designs for high power GaN HEMT developed for power electronics applications, such as power converters or photonic driver applications, with large gate periphery and chip size, as well as an Au metal heat-spreading layer deposited on top of a planarized dielectric/passivation layer above the active region. The Au bump patterns can be designed with high flexibility to provide more efficient heat dissipation from the large GaN HEMT chips to an AlN package substrate heat sink with no constraint in the alignment between the HEMT cells and the thermal conduction bumps. Steady-state thermal simulations were conducted to study the channel temperatures of GaN HEMTs with various Au bump patterns at different levels of current and voltage loadings, and the results were compared with the conventional face-up GaN die bonding on an AlN package substrate. The simulations were started from a single finger isolated HEMT cell and then extended to multiple fingers HEMT cells (total gate width > 40 mm) to investigate the “thermal cross-talk” effect from neighboring devices. Thermal analysis of the GaN HEMT under pulse operation was also performed to better reflect the actual conditions in power conversion or pulsed laser driver applications. Our analysis provides a combinational assessment of power GaN HEMT dies under a working condition (e.g., 1MHz, 25% duty cycle) with different flip chip packaging schemes. The analysis indicated that the channel temperature rise (∆T) of a HEMT cell in operation can be reduced by 44~46% by changing from face-up die bonding to a flip-chip bonding scheme with an optimized bump pattern design.

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44

Majima, Hideaki, Hiroaki Ishihara, Katsuyuki Ikeuchi, Toshiyuki Ogawa, Yuichi Sawahara, Tatsuhiro Ogawa, Satoshi Takaya, Kohei Onizuka, and Osamu Watanabe. "Cascoded GaN half-bridge with 17 MHz wide-band galvanically isolated current sensor." Japanese Journal of Applied Physics 61, SC (February 21, 2022): SC1052. http://dx.doi.org/10.35848/1347-4065/ac4446.

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Abstract A cascoded GaN half-bridge with a wide-band galvanically isolated current sensor is proposed. A 650 V depletion-mode GaN field-effect transistor is switched by a low-propagation-delay gate driver in active-mode. The standby and active modes are switched by a 25 V N-ch laterally diffused MOS (LDMOS). The current sensor uses the LDMOS as a shunt resistor, gm-cell-based sense amplifier and a mixer-based isolation amplifier for wider bandwidth. PVT variations of on-resistance of the current-detecting MOSFET are compensated using a reference MOSFET. A digital calibration loop across the isolation is formed to keep the current sensor gain constant within ± 1.5 % across the whole temperature range. The wide-band current sensor can measure the power device switching current. In this study, a cascoded GaN half-bridge switching and inductor current sensing using low-side and high-side device current are demonstrated. The proposed techniques show the possibility of implementing a GaN half-bridge module with an isolated current sensor in a package.

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45

Lin, Chih-Lung, Ming-Yang Deng, Chia-En Wu, Po-Syun Chen, and Ming-Xun Wang. "Gate Driver Circuit Using Pre-Charge Structure and Time-Division Multiplexing Driving Scheme for Active-Matrix LCDs Integrated with In-Cell Touch Structures." Journal of Display Technology 12, no. 11 (November 2016): 1238–41. http://dx.doi.org/10.1109/jdt.2016.2601948.

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46

Kim, Kyung Min, Inhyo Han, Hae Jin Park, Seok Noh, Young In Jang, Kilhwan Oh, Bumsik Kim, and In-Byeong Kang. "58‐1: Distinguished Paper: Bezel Free Design of Organic Light Emitting Diode Display via a‐InGaZnO Gate Driver Circuit Integration within Active Array." SID Symposium Digest of Technical Papers 50, no. 1 (May 29, 2019): 814–17. http://dx.doi.org/10.1002/sdtp.13046.

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47

Deng, Ming-Yang, Meng-Chieh Tsai, Yung-Chih Chen, Po-Syun Chen, and Chih-Lung Lin. "49-2: Design of a-Si:H Bidirectional Gate Driver Circuit Using Time Division Driving Method for In-Cell Touch Active-Matrix Liquid Crystal Displays." SID Symposium Digest of Technical Papers 48, no. 1 (May 2017): 734–37. http://dx.doi.org/10.1002/sdtp.11751.

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48

Yamaguchi, Daiki, Yu Shan Cheng, Tomoyuki Mannen, Hidemine Obara, Keiji Wada, Toru Sai, Makoto Takamiya, and Takayasu Sakurai. "An Optimization Method of a Digital Active Gate Driver Under Continuous Switching Operation Being Capable of Suppressing Surge Voltage and Power Loss in PWM Inverters." IEEE Transactions on Industry Applications 58, no. 1 (January 2022): 481–93. http://dx.doi.org/10.1109/tia.2021.3124864.

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49

Ragonese, Egidio, Nunzio Spina, Alessandro Parisi, and Giuseppe Palmisano. "An Experimental Comparison of Galvanically Isolated DC-DC Converters: Isolation Technology and Integration Approach." Electronics 10, no. 10 (May 15, 2021): 1186. http://dx.doi.org/10.3390/electronics10101186.

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This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. Specifically, two different basic isolation technologies are compared, which exploit thick-oxide integrated and polyimide standalone transformers, respectively. To this aim, previously available results achieved on a fully integrated isolation technology (i.e., thick-oxide integrated transformer) are compared with the experimental performance of a DC-DC converter for 20-V gate driver applications, specifically designed and implemented by exploiting a stand-alone polyimide transformer. The comparison highlights that similar performance in terms of power efficiency can be achieved at lower output power levels (i.e., about 200 mW), while the fully integrated approach is more effective at higher power levels with a better power density. On the other hand, the stand-alone polyimide transformer approach allows higher technology flexibility for the active circuitry while being less expensive and suitable for reinforced isolation.

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50

Marques, Ivo, João Sousa, Bruno Sá, Diogo Costa, Pedro Sousa, Samuel Pereira, Afonso Santos, et al. "Microphone Array for Speaker Localization and Identification in Shared Autonomous Vehicles." Electronics 11, no. 5 (March 2, 2022): 766. http://dx.doi.org/10.3390/electronics11050766.

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With the current technological transformation in the automotive industry, autonomous vehicles are getting closer to the Society of Automative Engineers (SAE) automation level 5. This level corresponds to the full vehicle automation, where the driving system autonomously monitors and navigates the environment. With SAE-level 5, the concept of a Shared Autonomous Vehicle (SAV) will soon become a reality and mainstream. The main purpose of an SAV is to allow unrelated passengers to share an autonomous vehicle without a driver/moderator inside the shared space. However, to ensure their safety and well-being until they reach their final destination, active monitoring of all passengers is required. In this context, this article presents a microphone-based sensor system that is able to localize sound events inside an SAV. The solution is composed of a Micro-Electro-Mechanical System (MEMS) microphone array with a circular geometry connected to an embedded processing platform that resorts to Field-Programmable Gate Array (FPGA) technology to successfully process in the hardware the sound localization algorithms.

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