Literatura científica selecionada sobre o tema "Trench transistor"
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Artigos de revistas sobre o assunto "Trench transistor"
Shichijo, H., S. K. Banerjee, S. D. S. Malhi, G. P. Pollack, W. F. Richardson, D. M. Bordelon, R. H. Womack et al. "Trench transistor DRAM cell". IEEE Electron Device Letters 7, n.º 2 (fevereiro de 1986): 119–21. http://dx.doi.org/10.1109/edl.1986.26313.
Texto completo da fonteGupta, Aakashdeep, K. Nidhin, Suresh Balanethiram, Shon Yadav, Anjan Chakravorty, Sebastien Fregonese e Thomas Zimmer. "Static Thermal Coupling Factors in Multi-Finger Bipolar Transistors: Part I—Model Development". Electronics 9, n.º 9 (19 de agosto de 2020): 1333. http://dx.doi.org/10.3390/electronics9091333.
Texto completo da fonteBanerjee, S., e D. M. Bordelon. "A model for the trench transistor". IEEE Transactions on Electron Devices 34, n.º 12 (dezembro de 1987): 2485–92. http://dx.doi.org/10.1109/t-ed.1987.23339.
Texto completo da fonteMukherjee, Kalparupa, Carlo De Santi, Matteo Borga, Karen Geens, Shuzhen You, Benoit Bakeroot, Stefaan Decoutere et al. "Challenges and Perspectives for Vertical GaN-on-Si Trench MOS Reliability: From Leakage Current Analysis to Gate Stack Optimization". Materials 14, n.º 9 (29 de abril de 2021): 2316. http://dx.doi.org/10.3390/ma14092316.
Texto completo da fonteDai, Tian Xiang, A. B. Renz, Luyang Zhang, Oliver J. Vavasour, G. W. C. Baker, Vishal Ajit Shah, Philip A. Mawby e Peter M. Gammon. "Design and Optimisation of Schottky Contact Integration in a 4H-SiC Trench MOSFET". Materials Science Forum 1004 (julho de 2020): 808–13. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.808.
Texto completo da fonteChen, Q., B. You, A. Q. Huang e J. K. O. Sin. "A new trench base-shielded bipolar transistor". IEEE Transactions on Electron Devices 47, n.º 8 (2000): 1662–66. http://dx.doi.org/10.1109/16.853045.
Texto completo da fonteWang, Bo. "Analysis of base characteristics of trench gate field termination IGBT". E3S Web of Conferences 237 (2021): 02023. http://dx.doi.org/10.1051/e3sconf/202123702023.
Texto completo da fonteManosukritkul, Phasapon, Amonrat Kerdpardist, Montree Saenlamool, Ekalak Chaowicharat, Amporn Poyai e Wisut Titiroongruang. "An Improvement of the Breakdown Voltage Characteristics of NPT-TIGBT by Using a P-Buried Layer". Advanced Materials Research 717 (julho de 2013): 158–63. http://dx.doi.org/10.4028/www.scientific.net/amr.717.158.
Texto completo da fonteYang, Ling Ling. "A Novel Structure Trench IGBT with Full Hole-Barrier Layer". Applied Mechanics and Materials 543-547 (março de 2014): 757–61. http://dx.doi.org/10.4028/www.scientific.net/amm.543-547.757.
Texto completo da fonteHung, Chia Lung, Yi Kai Hsiao, Chang Ching Tu e Hao Chung Kuo. "Investigation of 4H-SiC UMOSFET Architectures for High Voltage and High Speed Power Switching Applications". Materials Science Forum 1088 (18 de maio de 2023): 41–49. http://dx.doi.org/10.4028/p-56sbi2.
Texto completo da fonteTeses / dissertações sobre o assunto "Trench transistor"
Gay, Roméric. "Développement de composants analogiques embarqués dans des microcontrôleurs destinés à l'Internet des Objets (loT)". Electronic Thesis or Diss., Aix-Marseille, 2022. http://www.theses.fr/2022AIXM0218.
Texto completo da fonteThe aim of this work is to improve the performance, cost and area of a microcontroller manufactured in a 40 nm CMOS embedded memory technology (eNVM), by developing new transistor architectures suitable for the IoT market. The context is first presented with a focus on the technological and economical limitations of the CMOS technology. In a second part, the eNVM manufacturing process as well as the architecture and operation mode of a new component called triple gate transistor are presented. Based on this new architecture which provides independent control gates, various multigate transistors are manufactured and their electrical behaviour is analysed. Reliability studies are then carried out, to assess the reliability of the gate’s oxides. The objective is to study the impact of an electrical stress applied to one transistor gate on the gates not subject to this same stress. Electrical characterizations and TCAD simulations are also conducted to improve the understanding. Finally, the structure of the triple gate transistor is modelled using a compact PSP transistor model. The aim is to evaluate the behaviour but also the electrical performance of this transistor at the circuit level
Forsberg, Markus. "Chemical Mechanical Polishing of Silicon and Silicon Dioxide in Front End Processing". Doctoral thesis, Uppsala : Acta Universitatis Upsaliensis : Univ.-bibl. [distributör], 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-4304.
Texto completo da fonteRamadout, Benoit. "Capteurs d’images CMOS à haute résolution à Tranchées Profondes Capacitives". Thesis, Lyon 1, 2010. http://www.theses.fr/2010LYO10068.
Texto completo da fonteCMOS image sensors showed in the last few years a dramatic reduction of pixel pitch. However pitch shrinking is increasingly facing crosstalk and reduction of pixel signal, and new architectures are now needed to overcome those limitations. Our pixel with Capacitive Deep Trench Isolation and Vertical Transfer Gate (CDTI+VTG) has been developed in this context. Innovative integration of polysilicon-filled deep trenches allows high-quality pixel isolation, vertically extended photodiode and deep vertical transfer ability. First, specific process steps have been developed. In parallel, a thorough study of pixel MOS transistors has been carried out. We showed that capacitive trenches can be also operated as extra lateral gates, which opens promising applications for a multi-gate transistor compatible with CMOS-bulk technology. Finally, a 3MPixel demonstrator integrating 1.75*1.75 μm² pixels has been realized in a CMOS 120 nm technology. Pixel performances could be measured and exploited. In particular, a low dark current level could be obtained thanks to electrostatic effect of capacitive isolation trenches
Maglie, Rodolphe de. "Modélisation de différentes technologies de transistors bipolaires à grille isolée pour la simulation d'applications en électronique de puissance". Toulouse 3, 2007. https://tel.archives-ouvertes.fr/tel-00153597.
Texto completo da fonteAnalysis and systems design in power electronics must taking into account of specific complex phenomena to each components of the system but also in agreement with its environment. Accurate description of a system needs for simulations sufficiently accurate models of all its components. In our study, the models based on the semiconductor physics make it possible to describe the behavior of the stored charge in the deep and low doped base in the bipolar devices. This fine description is essential to the good precision of our models because the evolution of the carriers in the base is indissociable of the in static and dynamic behaviors of the component. Thus, the analytical physical models of PiN diode, NPT or PT IGBT with planar or trench gate structure are presented then validated. The modeling of complex systems in power electronics is approached through two studies. The first deals with to the association of our semiconductor models and wiring model of an industrial power module (3300V /1200A). An analysis on imbalances between the different chips in parallel is given. The second study presents a innovating architecture resulting from the functional integration. This low losses improve the tradeoff between on-state drop voltage and turn-off transient energy in IGBT component. Its technological realization is presented through measurements
Ng, Chun Wai. "On the inversion and accumulation layer mobilities in N-channel trench DMOSFETS /". View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202005%20NG.
Texto completo da fonteHeinle, Ulrich. "Vertical High-Voltage Transistors on Thick Silicon-on-Insulator". Doctoral thesis, Uppsala universitet, Fasta tillståndets elektronik, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-3179.
Texto completo da fonteMelul, Franck. "Développement d'une nouvelle génération de point mémoire de type EEPROM pour les applications à forte densité d'intégration". Electronic Thesis or Diss., Aix-Marseille, 2022. http://www.theses.fr/2022AIXM0266.
Texto completo da fonteThe objective of this thesis was to develop a new generation of EEPROM memory for high reliability and high density applications. First, an innovative memory cell developed by STMicroelectronics - eSTM (Split-gate charge storage memory with buried vertical selection transistor) - was studied as a reference cell. In a second part, to improve the reliability of the eSTM cell and to allow a more aggressive miniaturization of the EEPROM cell, a new memory architecture has been proposed: the BitErasable cell. It showed an excellent reliability and allowed to bring elements of under-standing on the degradation mechanisms present in these memory devices with buried selection transistor. This new architecture also offers the possibility to individually erase cells in a memory array: bit by bit. Aware of the great interest of bit-by-bit erasing, a new erasing mechanism by hot hole injection has been proposed for the eSTM cell. It has shown performances and a level of reliability perfectly compatible with the industrial requirements of Flash-NOR applications
Grimminger, Marsha Loth. "PERIODIC TRENDS IN STRUCTURE FUNCTION RELATIONSHIP OF ORGANIC HETEROACENES". UKnowledge, 2011. http://uknowledge.uky.edu/gradschool_diss/850.
Texto completo da fonteTavernier, Aurélien. "Développement d'un procédé innovant pour le remplissage des tranchées d'isolation entre transistors des technologies CMOS avancées". Phd thesis, Université de Grenoble, 2014. http://tel.archives-ouvertes.fr/tel-00987019.
Texto completo da fonteTai, Shih-Hsiang, e 戴士翔. "Optimal Design of Trench Gate Insulted Gate Bipolar Transistor". Thesis, 2002. http://ndltd.ncl.edu.tw/handle/99755982922692722594.
Texto completo da fonte國立臺灣科技大學
電子工程系
90
In recent years, the performance and fabrication of IGBT’s have been significantly improved and the application field of IGBT have widely been expending, especially in high power electronic device. It is reported that the Trench-Gate IGBT has superior characteristics in power loss compared to conventional planar IGBT. In this thesis, the Trench-Gate IGBT has a high power gain, high input impedance, and high switching speed. Due to these advantage, the effort to improve the Trench-Gate IGBT performances operating above 600V and 100A/cm² are the goal in this thesis. We use TSUPREM-4 process simulator and MEDICI device simulator to modulate parameters for increasing operating speed and reducing on-state voltage drop. In order to reduce on-state voltage drop and turn-off time, the doping concentration and the size of each region are needed to modulate for optimization. In the aspect of device characteristic, it is necessary to spend a long time for switching in operating a high current density. Thus, the switching speed of this device will be slow. But, a high operating current density is good for device because that makes the on-state voltage reducing. Therefore, the trade-off between the on-state voltage drop and turn-off time is important to find the optimal parameters for this device.
Livros sobre o assunto "Trench transistor"
Bi, Zhenxing. Shallow Trench Isolation Recess Process Flow for Vertical Field Effect Transistor Fabrication: United States Patent 9985021. Independently Published, 2020.
Encontre o texto completo da fonteCapítulos de livros sobre o assunto "Trench transistor"
Bharti, Deepshikha, e Aminul Islam. "U-Shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor: Structures and Characteristics". In Nanoscale Devices, 69–90. Boca Raton : Taylor & Francis, a CRC title, part of the Taylor & Francis imprint, a member of the Taylor & Francis Group, the academic division of T&F Informa, plc, 2019.: CRC Press, 2018. http://dx.doi.org/10.1201/9781315163116-4.
Texto completo da fonteErlbacher, Tobias. "Lateral Power Transistors with Trench Patterns". In Power Systems, 133–51. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-00500-3_7.
Texto completo da fonteDyakonov, M. I., e M. S. Shur. "Field Effect Transistor as Electronic Flute". In Future Trends in Microelectronics, 251–61. Dordrecht: Springer Netherlands, 1996. http://dx.doi.org/10.1007/978-94-009-1746-0_22.
Texto completo da fonteHorowitz, G. "Organic Transistors — Present and Future". In Future Trends in Microelectronics, 315–26. Dordrecht: Springer Netherlands, 1996. http://dx.doi.org/10.1007/978-94-009-1746-0_28.
Texto completo da fonteGhannam, M., J. Nijs e R. Mertens. "Trends in Heterojunction Silicon Bipolar Transistors". In Ultra-Fast Silicon Bipolar Technology, 111–33. Berlin, Heidelberg: Springer Berlin Heidelberg, 1988. http://dx.doi.org/10.1007/978-3-642-74360-3_7.
Texto completo da fonteErlbacher, Tobias. "Lateral Power Transistors Combining Planar and Trench Gate Topologies". In Power Systems, 153–75. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-00500-3_8.
Texto completo da fontede Castro, Ana Cristina Honorato, Suchismita Guha e Wendel Andrade Alves. "Organic Electrochemical Transistors in Bioanalytical Chemistry". In Tools and Trends in Bioanalytical Chemistry, 305–12. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-82381-8_16.
Texto completo da fonteMastrapasqua, M., C. A. King, P. R. Smith e M. R. Pinto. "Charge Injection Transistor and Logic Elements in Si/Si1−xGex Heterostructures". In Future Trends in Microelectronics, 377–83. Dordrecht: Springer Netherlands, 1996. http://dx.doi.org/10.1007/978-94-009-1746-0_34.
Texto completo da fonteZaumseil, Jana. "Recent Trends in Light-Emitting Organic Field-Effect Transistors". In Organic Electronics, 187–213. Weinheim, Germany: Wiley-VCH Verlag GmbH & Co. KGaA, 2013. http://dx.doi.org/10.1002/9783527650965.ch08.
Texto completo da fonteManju, C. S., N. Poovizhi e R. Rajkumar. "Power Efficient Pulse Triggered Flip-Flop Design Using Pass Transistor Logic". In Emerging Trends in Computing and Expert Technology, 48–61. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-32150-5_5.
Texto completo da fonteTrabalhos de conferências sobre o assunto "Trench transistor"
Zhang, Jinping, Pengjiao Wang, Rongrong Zhu, Xiang Xiao, Zehong Li e Bo Zhang. "High Performance Carrier Stored Trench Bipolar Transistor with Shield Emitter Trench". In 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT). IEEE, 2020. http://dx.doi.org/10.1109/icsict49897.2020.9278308.
Texto completo da fonteRichardson, W. F., D. M. Bordelon, G. P. Pollack, A. H. Shah, S. D. S. Malhi, H. Shichijo, S. K. Banerjee et al. "A trench transistor cross-point DRAM cell". In 1985 International Electron Devices Meeting. IRE, 1985. http://dx.doi.org/10.1109/iedm.1985.191075.
Texto completo da fonteChen, Q., e J. K. O. Sin. "A new trench base-shielded bipolar transistor". In Proceedings of International Symposium on Power Semiconductor Devices and IC's. IEEE, 1998. http://dx.doi.org/10.1109/ispsd.1998.702661.
Texto completo da fonteRuprecht, Michael W., Shengmin Wen e Rolf-P. Vollertsen. "Sample Preparation for Vertical Transistors in DRAM". In ISTFA 2002. ASM International, 2002. http://dx.doi.org/10.31399/asm.cp.istfa2002p0307.
Texto completo da fonteSpulber, O. "The Trench Planar Insulated Gate Bipolar Transistor (TPIGBT)". In IEE Colloquium Recent Advances in Power Devices. IEE, 1999. http://dx.doi.org/10.1049/ic:19990603.
Texto completo da fonteSakao, Takaishi, Kajiyana, Akimoto, Oguro, Shishiguchi e Ohya. "A Straight-Line-Trench Isolation And Trench-Gate Transistor (SLIT) Cell For Giga-bit DRAMs". In Symposium on VLSI Technology. IEEE, 1993. http://dx.doi.org/10.1109/vlsit.1993.760224.
Texto completo da fontePronin, Nick, Stefano Larentis, Carey Wu, Eric Foote, Gary Clark, Khiem Ly, Jacob Levenson et al. "Multilayer pFIB Trenches for Multiple Tip EBAC/EBIRCH Analysis and Internal Node Transistor Characterization". In ISTFA 2023. ASM International, 2023. http://dx.doi.org/10.31399/asm.cp.istfa2023p0403.
Texto completo da fonteChang, H. R., B. J. Baliga, J. W. Kretchmer e P. A. Piacente. ""Insulated gate bipolar transistor (IGBT) with a trench gate structure "". In 1987 International Electron Devices Meeting. IRE, 1987. http://dx.doi.org/10.1109/iedm.1987.191518.
Texto completo da fonteHieda, K., F. Horigu, H. Watanabe, K. Sunouchi, I. Inoue e T. Hamamoto. "New effects of trench isolated transistor using side-wall gates". In 1987 International Electron Devices Meeting. IRE, 1987. http://dx.doi.org/10.1109/iedm.1987.191536.
Texto completo da fonteDhar, Palasri, Souman Bej, Sunipa Roy e Soumik Poddar. "Biosensing attributes of Trench Double Gate Junctionless Field Effect Transistor". In 2023 IEEE Devices for Integrated Circuit (DevIC). IEEE, 2023. http://dx.doi.org/10.1109/devic57758.2023.10134820.
Texto completo da fonte