Literatura científica selecionada sobre o tema "Splitgate"
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Artigos de revistas sobre o assunto "Splitgate"
Li Manni, Giovanni, Dongxia Ma, Francesco Aquilante, Jeppe Olsen e Laura Gagliardi. "SplitGAS Method for Strong Correlation and the Challenging Case of Cr2". Journal of Chemical Theory and Computation 9, n.º 8 (5 de julho de 2013): 3375–84. http://dx.doi.org/10.1021/ct400046n.
Texto completo da fonteVogiatzis, Konstantinos D., Giovanni Li Manni, Samuel J. Stoneburner, Dongxia Ma e Laura Gagliardi. "Systematic Expansion of Active Spaces beyond the CASSCF Limit: A GASSCF/SplitGAS Benchmark Study". Journal of Chemical Theory and Computation 11, n.º 7 (5 de junho de 2015): 3010–21. http://dx.doi.org/10.1021/acs.jctc.5b00191.
Texto completo da fonteMacdonald, Stuart J., Tomi Pastinen e Anthony D. Long. "The Effect of Polymorphisms in theEnhancer of splitGene Complex on Bristle Number Variation in a Large Wild-Caught Cohort ofDrosophila melanogaster". Genetics 171, n.º 4 (2 de setembro de 2005): 1741–56. http://dx.doi.org/10.1534/genetics.105.045344.
Texto completo da fonteWu, Fengming, Bowen Deng, Na Xiao, Tao Wang, Yining Li, Rencong Wang, Kai Shi, Dong-Gen Luo, Yi Rao e Chuan Zhou. "A neuropeptide regulates fighting behavior in Drosophila melanogaster". eLife 9 (21 de abril de 2020). http://dx.doi.org/10.7554/elife.54229.
Texto completo da fonteTeses / dissertações sobre o assunto "Splitgate"
Melul, Franck. "Développement d'une nouvelle génération de point mémoire de type EEPROM pour les applications à forte densité d'intégration". Electronic Thesis or Diss., Aix-Marseille, 2022. http://www.theses.fr/2022AIXM0266.
Texto completo da fonteThe objective of this thesis was to develop a new generation of EEPROM memory for high reliability and high density applications. First, an innovative memory cell developed by STMicroelectronics - eSTM (Split-gate charge storage memory with buried vertical selection transistor) - was studied as a reference cell. In a second part, to improve the reliability of the eSTM cell and to allow a more aggressive miniaturization of the EEPROM cell, a new memory architecture has been proposed: the BitErasable cell. It showed an excellent reliability and allowed to bring elements of under-standing on the degradation mechanisms present in these memory devices with buried selection transistor. This new architecture also offers the possibility to individually erase cells in a memory array: bit by bit. Aware of the great interest of bit-by-bit erasing, a new erasing mechanism by hot hole injection has been proposed for the eSTM cell. It has shown performances and a level of reliability perfectly compatible with the industrial requirements of Flash-NOR applications