Literatura científica selecionada sobre o tema "Non-Volatile SRAM"
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Artigos de revistas sobre o assunto "Non-Volatile SRAM"
Wang, Ming Qian, Jie Tao Diao, Nan Li, Xi Wang e Kai Bu. "A Study on Reconfiguring On-Chip Cache with Non-Volatile Memory". Applied Mechanics and Materials 644-650 (setembro de 2014): 3421–25. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3421.
Texto completo da fonteMispan, Mohd Syafiq, Aiman Zakwan Jidin, Muhammad Raihaan Kamarudin e Haslinah Mohd Nasir. "Lightweight hardware fingerprinting solution using inherent memory in off-the-shelf commodity devices". Indonesian Journal of Electrical Engineering and Computer Science 25, n.º 1 (1 de janeiro de 2022): 105. http://dx.doi.org/10.11591/ijeecs.v25.i1.pp105-112.
Texto completo da fonteAngizi, Shaahin, Navid Khoshavi, Andrew Marshall, Peter Dowben e Deliang Fan. "MeF-RAM: A New Non-Volatile Cache Memory Based on Magneto-Electric FET". ACM Transactions on Design Automation of Electronic Systems 27, n.º 2 (31 de março de 2022): 1–18. http://dx.doi.org/10.1145/3484222.
Texto completo da fonteVijay, H. M., e V. N. Ramakrishnan. "Radiation effects on memristor-based non-volatile SRAM cells". Journal of Computational Electronics 17, n.º 1 (8 de novembro de 2017): 279–87. http://dx.doi.org/10.1007/s10825-017-1080-x.
Texto completo da fonteSingh, Damyanti, Neeta Pandey e Kirti Gupta. "Process invariant Schmitt Trigger non-volatile 13T1M SRAM cell". Microelectronics Journal 135 (maio de 2023): 105773. http://dx.doi.org/10.1016/j.mejo.2023.105773.
Texto completo da fonteJanniekode, Uma Maheshwar, Rajendra Prasad Somineni, Osamah Ibrahim Khalaf, Malakeh Muhyiddeen Itani, J. Chinna Babu e Ghaida Muttashar Abdulsahib. "A Symmetric Novel 8T3R Non-Volatile SRAM Cell for Embedded Applications". Symmetry 14, n.º 4 (7 de abril de 2022): 768. http://dx.doi.org/10.3390/sym14040768.
Texto completo da fontePriya, G. Lakshmi, Namita Rawat, Abhishek Sanagavarapu, M. Venkatesh e A. Andrew Roobert. "Hybrid Silicon Substrate FinFET-Metal Insulator Metal (MIM) Memristor Based Sense Amplifier Design for the Non-Volatile SRAM Cell". Micromachines 14, n.º 2 (17 de janeiro de 2023): 232. http://dx.doi.org/10.3390/mi14020232.
Texto completo da fonteKhan, Asif. "(Invited) Ferroelectric Field-Effect Transistors as High-Density, Ultra-fast, Embedded Non-Volatile Memories". ECS Meeting Abstracts MA2022-02, n.º 15 (9 de outubro de 2022): 805. http://dx.doi.org/10.1149/ma2022-0215805mtgabs.
Texto completo da fontePan, James N. "Atomic Force High Frequency Phonons Non-volatile Dynamic Random-Access Memory Compatible with Sub-7nm ULSI CMOS Technology". MRS Advances 4, n.º 48 (2019): 2577–84. http://dx.doi.org/10.1557/adv.2019.212.
Texto completo da fonteP, Saleem Akram. "Non-Volatile 7T1R SRAM cell design for low voltage applications". International Journal of Emerging Trends in Engineering Research 7, n.º 11 (15 de novembro de 2019): 704–7. http://dx.doi.org/10.30534/ijeter/2019/487112019.
Texto completo da fonteTeses / dissertações sobre o assunto "Non-Volatile SRAM"
Kotte, Aparna Reddy. "Memristor based SRAM". OpenSIUC, 2020. https://opensiuc.lib.siu.edu/theses/2790.
Texto completo da fonteDogan, Rabia. "System Level Exploration of RRAM for SRAM Replacement". Thesis, Linköpings universitet, Elektroniksystem, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-92819.
Texto completo da fonteBazzi, Hussein. "Resistive memory co-design in CMOS technologies". Electronic Thesis or Diss., Aix-Marseille, 2020. http://www.theses.fr/2020AIXM0567.
Texto completo da fonteMany diversified applications (internet of things, embedded systems for automotive and medical applications, artificial intelligence) require an integrated circuit (SoC, System on Chip) with high-performance non-volatile memories to operate optimally. Although Flash memory is widely used today, this technology needs high voltage for programing operations and has reliability issues that are hard to handle beyond 18 nm technological node, increasing the cost of circuit design and fabrication. In this context, the semiconductor industry seeks an alternative non-volatile memory that can replace Flash memories. Among possible candidates (MRAM - Magnetic Random Access Memory, PCM - Phase Change Memory, FeRAM - Ferroelectric Random Access Memory), Resistive memories (RRAMs) offer superior performances on essential key points: compatibility with CMOS manufacturing processes, scalability, current consumption (standby and active), operational speed. Due to its relatively simple structure, RRAM technology can be easily integrated in any design flow opening the way for the development of new architectures that answer Von Neumann bottleneck. In this thesis, the main object is to show the integration abilities of RRAM devices with CMOS technology, using circuit design and electrical measurements, in order to develop different hybrid structures: non-volatile Static Random Access Memories (SRAM), True Random Number Generator (TRNG) and artificial neural networks
Yi-SungTsou e 鄒亦淞. "Design of a Saving-Write-Energy Non-Volatile SRAM". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/ym6ecc.
Texto completo da fonte國立成功大學
電機工程學系
102
With the advancement of technology scaling, the leakage current issue becomes one of the most important challenges for SRAMs. Existing approaches usually use power gating or low supply voltage well-known data retention voltage to reduce the leakage energy consumption in standby mode. With the advent of nvSRAM, leakage current can be fully eliminated. Compared with conventional approaches, it can reach further energy saving by using powering off its supply voltage when data-backup is performed. However, not all of data are needed to back up. In this thesis, we propose a novel 10T2R RRAM-based nvSRAM with redundant bit-writes-aware controller which is considering redundant bit-writes condition. If data stored in SRAM cells are the same as that in RRAM devices, backup can be skipped. Otherwise, backup is performed. As a result, backup energy for the data can be saved under redundant bit-writes conditions. Simulation shows that energy saving can reach by up to 93% when high resistive state is larger than 10MΩ. And as long as the probability of the redundant bit-writes is larger than 25% probability, the backup energy saving is achieved. The technique can be applied to normally-off computing systems, energy harvesting systems, L2/L3 Cache, and so on.
Capítulos de livros sobre o assunto "Non-Volatile SRAM"
Lacaze, Pierre Camille, e Jean-Christophe Lacroix. "State of the Art of DRAM, SRAM, Flash, HDD and MRAM Electronic Memories". In Non-Volatile Memories, 13–57. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2014. http://dx.doi.org/10.1002/9781118789988.ch2.
Texto completo da fontePal, Soumitra, e N. S. Ranjan. "Design of Non-volatile SRAM Cell Using Memristor". In Advances in Intelligent Systems and Computing, 175–83. New Delhi: Springer India, 2016. http://dx.doi.org/10.1007/978-81-322-2757-1_19.
Texto completo da fonteNikitha, L., N. S. Bhargavi e B. S. Kariyappa. "Design and Development of Non-volatile Multi-threshold Schmitt Trigger SRAM Cell". In Lecture Notes in Electrical Engineering, 877–84. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-5802-9_76.
Texto completo da fonteKanika, Nitin Chaturvedi e S. Gurunarayanan. "Design and Analysis of a Hybrid Non-volatile SRAM Cell for Energy Autonomous IoT". In Intelligent Computing Techniques for Smart Energy Systems, 57–65. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-15-0214-9_8.
Texto completo da fonteMonga, Kanika, e Nitin Chaturvedi. "A CMOS/MTJ Based Novel Non-volatile SRAM Cell with Asynchronous Write Termination for Normally OFF Applications". In Communications in Computer and Information Science, 553–64. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-32-9767-8_46.
Texto completo da fonteRaman Sundara Raman, Siddhartha. "A Review on Non-Volatile and Volatile Emerging Memory Technologies". In Computer Memory and Data Storage. IntechOpen, 2024. http://dx.doi.org/10.5772/intechopen.110617.
Texto completo da fonteTrabalhos de conferências sobre o assunto "Non-Volatile SRAM"
Ma, Yanjun. "Nonvolatile multibit SRAM, bit level caching, and multi-context computing for IoT". In 2015 15th Non-Volatile Memory Technology Symposium (NVMTS). IEEE, 2015. http://dx.doi.org/10.1109/nvmts.2015.7457480.
Texto completo da fonte"Session 6 overview SRAM and non-volatile memories". In 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. IEEE, 2002. http://dx.doi.org/10.1109/isscc.2002.992957.
Texto completo da fonteYifu Gong, Na Gong, Ligang Hou e Jinhui Wang. "MTJ based data restoration in non-volatile SRAM". In 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2016. http://dx.doi.org/10.1109/icsict.2016.7998635.
Texto completo da fonteZhao, Weisheng, Eric Belhaire, Claude Chappert e Pascale Mazoyer. "Spintronic Device Based Non-volatile Low Standby Power SRAM". In 2008 IEEE Computer Society Annual Symposium on VLSI. IEEE, 2008. http://dx.doi.org/10.1109/isvlsi.2008.11.
Texto completo da fonteBajjuri, Vishnu, N. Umapathi, G. Valarmathy e SU Suganthi. "A Novel Non-Volatile SRAM with Reduced Read Delay". In 2023 International Conference on Next Generation Electronics (NEleX). IEEE, 2023. http://dx.doi.org/10.1109/nelex59773.2023.10420862.
Texto completo da fonteMizutani, T., K. Takeuchi, T. Saraya, H. Shinohara, M. Kobayashi e T. Hiramoto. "Parallel Programmable Non-volatile Memory Using Normal SRAM Cells". In 2016 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2016. http://dx.doi.org/10.7567/ssdm.2016.a-7-04l.
Texto completo da fonteLou, Qian, Mengying Zhao, Lei Ju, Chun Jason Xue, Jingtong Hu e Zhiping Jia. "Runtime and reconfiguration dual-aware placement for SRAM-NVM hybrid FPGAs". In 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA). IEEE, 2017. http://dx.doi.org/10.1109/nvmsa.2017.8064477.
Texto completo da fonteWang, Lina, Jinhui Wang, Zezhong Yang, Ligang Hou e Na Gong. "A low power CMOS technology compatible non-volatile SRAM cell". In 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT). IEEE, 2014. http://dx.doi.org/10.1109/icsict.2014.7021248.
Texto completo da fonteKirubaraj, A. Alfred, e A. Affum Emmanuel. "Model design of non-volatile SRAM based on Magnetic Tunnel Junction". In Technology (ICAST). IEEE, 2009. http://dx.doi.org/10.1109/icastech.2009.5409743.
Texto completo da fonteMa, Yanjun. "Novel Multi-Bit Non-Volatile SRAM Cells for Runtime Reconfigurable Computing". In 2015 IEEE International Memory Workshop (IMW). IEEE, 2015. http://dx.doi.org/10.1109/imw.2015.7150297.
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