Artigos de revistas sobre o tema "Multiprocessor machine"
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Averbuch, A., E. Gabber, S. Itzikowitz e B. Shoham. "On the Parallel Elliptic Single/Multigrid Solutions about Aligned and Nonaligned Bodies Using the Virtual Machine for Multiprocessors". Scientific Programming 3, n.º 1 (1994): 13–32. http://dx.doi.org/10.1155/1994/895737.
Texto completo da fonteStaunstrup, Jørgen, Jens Ove Jespersen e Ole V. Johansen. "Physical datarepresentation in a multiprocessor database machine". Parallel Computing 2, n.º 4 (dezembro de 1985): 335–43. http://dx.doi.org/10.1016/0167-8191(85)90032-8.
Texto completo da fonteMiya, E. N. "Multiprocessor/distributed processing bibliography (in machine-readable form)". ACM SIGARCH Computer Architecture News 13, n.º 1 (março de 1985): 27–29. http://dx.doi.org/10.1145/1296930.1296933.
Texto completo da fonteSarkar, Susmit, Peter Sewell, Francesco Zappa Nardelli, Scott Owens, Tom Ridge, Thomas Braibant, Magnus O. Myreen e Jade Alglave. "The semantics of x86-CC multiprocessor machine code". ACM SIGPLAN Notices 44, n.º 1 (21 de janeiro de 2009): 379–91. http://dx.doi.org/10.1145/1594834.1480929.
Texto completo da fonteKELLERER, HANS. "Algorithms for multiprocessor scheduling with machine release times". IIE Transactions 30, n.º 11 (novembro de 1998): 991–99. http://dx.doi.org/10.1080/07408179808966555.
Texto completo da fonteShachnai e Tamir. "Multiprocessor Scheduling with Machine Allotment and Parallelism Constraints". Algorithmica 32, n.º 4 (abril de 2002): 651–78. http://dx.doi.org/10.1007/s00453-001-0098-3.
Texto completo da fonteWalter, Rico, e Alexander Lawrinenko. "A characterization of optimal multiprocessor schedules and new dominance rules". Journal of Combinatorial Optimization 40, n.º 4 (12 de agosto de 2020): 876–900. http://dx.doi.org/10.1007/s10878-020-00634-9.
Texto completo da fonteBogdanov, D. R., e O. V. Darintsev. "Multiprocessor systems based on FPGA for receiving and processing data from the position sensors of the manipulator elements with controlled bending". Proceedings of the Mavlyutov Institute of Mechanics 11, n.º 1 (2016): 100–106. http://dx.doi.org/10.21662/uim2016.1.015.
Texto completo da fonteMelikyan, V. SH, H. A. Petrosyan, S. H. Abovyan, L. H. Shakhbazyan, A. H. Stepanyan e E. O. Musayelyan. "Statistical analysis of time delays multiprocessor systems". Electronics and Communications 15, n.º 5 (29 de março de 2010): 108–12. http://dx.doi.org/10.20535/2312-1807.2010.58.5.285076.
Texto completo da fonteKuruvilla, Abey, e Giuseppe Paletta. "Minimizing Makespan on Identical Parallel Machines". International Journal of Operations Research and Information Systems 6, n.º 1 (janeiro de 2015): 19–29. http://dx.doi.org/10.4018/ijoris.2015010102.
Texto completo da fonteVairam, Senthil, e V. Selladurai. "Parallel Machine Shop Scheduling Using Memetic Algorithm". Applied Mechanics and Materials 573 (junho de 2014): 362–67. http://dx.doi.org/10.4028/www.scientific.net/amm.573.362.
Texto completo da fonteQadah, G. Z., e K. B. Irani. "The join algorithms on a shared-memory multiprocessor database machine". IEEE Transactions on Software Engineering 14, n.º 11 (1988): 1668–83. http://dx.doi.org/10.1109/32.9054.
Texto completo da fonteWang, Wencheng, e Xiaofei Liu. "A Combinatorial 2-Approximation Algorithm for the Parallel-Machine Scheduling with Release Times and Submodular Penalties". Mathematics 10, n.º 1 (25 de dezembro de 2021): 61. http://dx.doi.org/10.3390/math10010061.
Texto completo da fonteAlglave, Jade, Anthony Fox, Samin Ishtiaq, Magnus O. Myreen, Susmit Sarkar, Peter Sewell e Francesco Zappa Nardelli. "The semantics of power and ARM multiprocessor machine code (abstract only)". ACM SIGPLAN Notices 44, n.º 5 (6 de maio de 2009): 8. http://dx.doi.org/10.1145/1629635.1629638.
Texto completo da fonteRashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky e Jonathan Chew. "Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures". ACM SIGARCH Computer Architecture News 15, n.º 5 (novembro de 1987): 31–39. http://dx.doi.org/10.1145/36177.36181.
Texto completo da fonteRashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky e Jonathan Chew. "Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures". ACM SIGOPS Operating Systems Review 21, n.º 4 (outubro de 1987): 31–39. http://dx.doi.org/10.1145/36204.36181.
Texto completo da fonteRashid, Richard, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky e Jonathan Chew. "Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures". ACM SIGPLAN Notices 22, n.º 10 (outubro de 1987): 31–39. http://dx.doi.org/10.1145/36205.36181.
Texto completo da fonteRashid, R., A. Tevanian, M. Young, D. Golub, R. Baron, D. Black, W. J. Bolosky e J. Chew. "Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures". IEEE Transactions on Computers 37, n.º 8 (1988): 896–908. http://dx.doi.org/10.1109/12.2242.
Texto completo da fonteNarayan, Ranjani, e V. Rajaraman. "Performance analysis of a multiprocessor machine based on data flow principles". Microprocessing and Microprogramming 30, n.º 1-5 (agosto de 1990): 601–8. http://dx.doi.org/10.1016/0165-6074(90)90306-t.
Texto completo da fonteAerts, Joep, Jan Korst e Wim Verhaegh. "Load balancing for redundant storage strategies: Multiprocessor scheduling with machine eligibility". Journal of Scheduling 4, n.º 5 (2001): 245–57. http://dx.doi.org/10.1002/jos.81.
Texto completo da fonteBoctor, Fayez F., Jacques Renaud, Angel Ruiz e Simon Tremblay. "Optimal and heuristic solution methods for a multiprocessor machine scheduling problem". Computers & Operations Research 36, n.º 10 (outubro de 2009): 2822–28. http://dx.doi.org/10.1016/j.cor.2008.12.017.
Texto completo da fonteSagan, Jaroslaw. "Inter-thread communication efficiency". Annales Universitatis Mariae Curie-Sklodowska, sectio AI – Informatica 15, n.º 1 (1 de janeiro de 2015): 12. http://dx.doi.org/10.17951/ai.2015.15.1.12-15.
Texto completo da fonteBaba, Yao e Hevner. "Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis". IEEE Transactions on Computers C-36, n.º 6 (junho de 1987): 650–66. http://dx.doi.org/10.1109/tc.1987.1676959.
Texto completo da fonteSatpathy, Prativa, Kalyan Das e Jagamohan Padhi. "Improved Rejection Penalty Algorithm with Multiprocessor Rejection Technique". International Journal of Electrical and Computer Engineering (IJECE) 5, n.º 3 (1 de junho de 2015): 477. http://dx.doi.org/10.11591/ijece.v5i3.pp477-482.
Texto completo da fonteHuang, Rong Hwa, Tung Han Yu e Chang Lin Yang. "Multiprocessor Flow Shop Scheduling Problem with Common due Window". Applied Mechanics and Materials 284-287 (janeiro de 2013): 3712–16. http://dx.doi.org/10.4028/www.scientific.net/amm.284-287.3712.
Texto completo da fonteH, Nirmala, e Girijamma H. A. "A Novel Scheduler for Task scheduling in Multiprocessor System using Machine Learning approach". International Journal of Computer Sciences and Engineering 7, n.º 2 (28 de fevereiro de 2019): 140–43. http://dx.doi.org/10.26438/ijcse/v7i2.140143.
Texto completo da fonteVeselovska, Nataliia. "DEVELOPMENT OF ALGORITHMIC SUPPORT FOR PRACTICAL IMPLEMENTATION OF TESTING AND DIAGNOSTIC COMPLEX OF CNC MACHINES". Vibrations in engineering and technology, n.º 1(104) (29 de abril de 2022): 71–80. http://dx.doi.org/10.37128/2306-8744-2022-1-9.
Texto completo da fonteHuei-Huang, Chen, e Liu Guang-Sheen. "Response time analysis of using a parallel join algorithm on a multiprocessor backend machine". Information Systems 15, n.º 2 (janeiro de 1990): 197–206. http://dx.doi.org/10.1016/0306-4379(90)90035-n.
Texto completo da fonteAZAGURY, ALAIN, ELLIOT K. KOLODNER e EREZ PETRANK. "A NOTE ON THE IMPLEMENTATION OF REPLICATION-BASED GARBAGE COLLECTION FOR MULTITHREADED APPLICATIONS AND MULTIPROCESSOR ENVIRONMENTS". Parallel Processing Letters 09, n.º 03 (setembro de 1999): 391–99. http://dx.doi.org/10.1142/s0129626499000360.
Texto completo da fonteBourbakis, N. G., F. Barlos e J. S. Mertoguno. "Hermes Autonomous Vision System". International Journal of Pattern Recognition and Artificial Intelligence 12, n.º 03 (maio de 1998): 265–91. http://dx.doi.org/10.1142/s0218001498000191.
Texto completo da fonteVakhania, Nodari. "Dynamic Restructuring Framework for Scheduling with Release Times and Due-Dates". Mathematics 7, n.º 11 (14 de novembro de 2019): 1104. http://dx.doi.org/10.3390/math7111104.
Texto completo da fonteNiyizamwiyitira, Christine, e Lars Lundberg. "A Utilization-Based Schedulability Test of Real-Time Systems Running on a Multiprocessor Virtual Machine". Computer Journal 62, n.º 6 (14 de fevereiro de 2019): 884–904. http://dx.doi.org/10.1093/comjnl/bxz005.
Texto completo da fonteWei, Liying, Chao Shang e Xiaoqiu Chen. "The Use of Knowledge Management-Based Information Collaborative Learning Tool in English Teaching Classroom". Wireless Communications and Mobile Computing 2022 (27 de janeiro de 2022): 1–10. http://dx.doi.org/10.1155/2022/6367007.
Texto completo da fonteFORSELL, MARTTI. "ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE". International Journal of Foundations of Computer Science 21, n.º 03 (junho de 2010): 387–404. http://dx.doi.org/10.1142/s0129054110007325.
Texto completo da fonteGRIEBEL, MICHAEL. "THE COMBINATION TECHNIQUE FOR THE SPARSE GRID SOLUTION OF PDE'S ON MULTIPROCESSOR MACHINES". Parallel Processing Letters 02, n.º 01 (março de 1992): 61–70. http://dx.doi.org/10.1142/s0129626492000180.
Texto completo da fonteDackland, Krister, Erik Elmroth, Bo Kålgström e Charles Van Loan. "Parallel Block Matrix Factorizations on the Shared-Memory Multiprocessor Ibm 3090 VF/600J". International Journal of Supercomputing Applications 6, n.º 1 (abril de 1992): 69–97. http://dx.doi.org/10.1177/109434209200600105.
Texto completo da fonteHeers, J., C. Schnorr e H. S. Stiehl. "Globally convergent iterative numerical schemes for nonlinear variational image smoothing and segmentation on a multiprocessor machine". IEEE Transactions on Image Processing 10, n.º 6 (junho de 2001): 852–64. http://dx.doi.org/10.1109/83.923282.
Texto completo da fontePapazoglou, M. P., P. I. Georgiadis, D. G. Maritsas e A. A. Dickie. "Multiprocessor interrupting and synchronizing concepts in the parallel SIMULA machine and their representation by Petri-Nets". Microprocessing and Microprogramming 15, n.º 4 (abril de 1985): 179–90. http://dx.doi.org/10.1016/0165-6074(85)90078-x.
Texto completo da fonteKhazal, R. R., e M. M. Chawla. "A parallel Cholesky algorithm for the solution of symmetric linear systems". International Journal of Mathematics and Mathematical Sciences 2004, n.º 25 (2004): 1315–27. http://dx.doi.org/10.1155/s0161171204202265.
Texto completo da fonteCHONG, FREDERIC T., e ANANT AGARWAL. "SHARED MEMORY VERSUS MESSAGE PASSING FOR ITERATIVE SOLUTION OF SPARSE, IRREGULAR PROBLEMS". Parallel Processing Letters 09, n.º 01 (março de 1999): 159–70. http://dx.doi.org/10.1142/s0129626499000177.
Texto completo da fonteAkay, Mehmet Fatih, Çiğdem İnan Aci e Fatih Abut. "PREDICTING THE PERFORMANCE MEASURES OF A 2-DIMENSIONAL MESSAGE PASSING MULTIPROCESSOR ARCHITECTURE BY USING MACHINE LEARNING METHODS". Neural Network World 25, n.º 3 (2015): 241–65. http://dx.doi.org/10.14311/nnw.2015.25.013.
Texto completo da fonteBhandarkar, Suchendra M., Salem A. Machaka, Sanjay S. Shete e Raghuram N. Kota. "Parallel Computation of a Maximum-Likelihood Estimator of a Physical Map". Genetics 157, n.º 3 (1 de março de 2001): 1021–43. http://dx.doi.org/10.1093/genetics/157.3.1021.
Texto completo da fonteFrustaci, Fabio, Fanny Spagnolo, Stefania Perri, Giuseppe Cocorullo e Pasquale Corsonello. "Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes". Sensors 22, n.º 8 (7 de abril de 2022): 2839. http://dx.doi.org/10.3390/s22082839.
Texto completo da fonteNarayanan, S. Krishna, Dr S. Dhanasekaran e Dr V. Vasudevan. "Minimizing Overloads of Critical Tasks Using Machine Learning in CPS by Extending Resources". Webology 18, n.º 2 (23 de dezembro de 2021): 413–24. http://dx.doi.org/10.14704/web/v18i2/web18329.
Texto completo da fonteShahrivari, Saeed, e Saeed Jalili. "Fast Parallel All-Subgraph Enumeration Using Multicore Machines". Scientific Programming 2015 (2015): 1–11. http://dx.doi.org/10.1155/2015/901321.
Texto completo da fonteKalapothas, Stavros, Georgios Flamis e Paris Kitsos. "Efficient Edge-AI Application Deployment for FPGAs". Information 13, n.º 6 (28 de maio de 2022): 279. http://dx.doi.org/10.3390/info13060279.
Texto completo da fonteV, Yashchenko. "Neuron. Molecular supercomputer." Artificial Intelligence 27, AI.2022.27(2) (29 de dezembro de 2022): 15–20. http://dx.doi.org/10.15407/jai2022.02.015.
Texto completo da fonteAllouche, Mohamed, Tarek Frikha, Mihai Mitrea, Gérard Memmi e Faten Chaabane. "Lightweight Blockchain Processing. Case Study: Scanned Document Tracking on Tezos Blockchain". Applied Sciences 11, n.º 15 (3 de agosto de 2021): 7169. http://dx.doi.org/10.3390/app11157169.
Texto completo da fonteKim, Jeong-Min, Youngsik Kim, Shin-Dug Kim, Tack-Don Han e Sung-Bong Yang. "An Adaptive Parallel Computer Vision System". International Journal of Pattern Recognition and Artificial Intelligence 12, n.º 03 (maio de 1998): 311–34. http://dx.doi.org/10.1142/s021800149800021x.
Texto completo da fonteÁlvarez, Álvaro, Amaia Calleja, Mikel Arizmendi, Haizea González e Luis Lopez de Lacalle. "Spiral Bevel Gears Face Roughness Prediction Produced by CNC End Milling Centers". Materials 11, n.º 8 (27 de julho de 2018): 1301. http://dx.doi.org/10.3390/ma11081301.
Texto completo da fonte