Artigos de revistas sobre o tema "Memory transistor"
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Xie, Fangqing, Maryna N. Kavalenka, Moritz Röger, Daniel Albrecht, Hendrik Hölscher, Jürgen Leuthold e Thomas Schimmel. "Copper atomic-scale transistors". Beilstein Journal of Nanotechnology 8 (1 de março de 2017): 530–38. http://dx.doi.org/10.3762/bjnano.8.57.
Texto completo da fonteChoi, Young Jin, Jihyun Kim, Min Je Kim, Hwa Sook Ryu, Han Young Woo, Jeong Ho Cho e Joohoon Kang. "Hysteresis Behavior of the Donor–Acceptor-Type Ambipolar Semiconductor for Non-Volatile Memory Applications". Micromachines 12, n.º 3 (12 de março de 2021): 301. http://dx.doi.org/10.3390/mi12030301.
Texto completo da fonteKim, Woojo, Jimin Kwon e Sungjune Jung. "3D Integration of Flexible and Printed Electronics: Integrated Circuits, Memories, and Sensors". Journal of Flexible and Printed Electronics 2, n.º 2 (dezembro de 2023): 199–210. http://dx.doi.org/10.56767/jfpe.2023.2.2.199.
Texto completo da fonteKim, Ji-Hun, Hyeon-Jun Kim, Ki-Jun Kim, Tae-Hun Shim, Jin-Pyo Hong e Jea-gun Park. "3-Terminal Igzo FET Based 2T0C DRAM Combined Bit-Line Structure". ECS Meeting Abstracts MA2023-02, n.º 30 (22 de dezembro de 2023): 1561. http://dx.doi.org/10.1149/ma2023-02301561mtgabs.
Texto completo da fonteAl-shawi, Amjad, Maysoon Alias, Paul Sayers e Mohammed Fadhil Mabrook. "Improved Memory Properties of Graphene Oxide-Based Organic Memory Transistors". Micromachines 10, n.º 10 (25 de setembro de 2019): 643. http://dx.doi.org/10.3390/mi10100643.
Texto completo da fonteBrtník, Bohumil. "Assembling a Formula for Current Transferring by Using a Summary Graph and Transformation Graphs". Journal of Electrical Engineering 64, n.º 5 (1 de setembro de 2013): 334–36. http://dx.doi.org/10.2478/jee-2013-0050.
Texto completo da fonteGrudanov, Oleksandr. "Stability Parameters of Register File Bit Cell with Low Power Consumption Priority". Electronics and Control Systems 3, n.º 77 (27 de setembro de 2023): 40–46. http://dx.doi.org/10.18372/1990-5548.77.17963.
Texto completo da fonteFuller, Elliot J., Scott T. Keene, Armantas Melianas, Zhongrui Wang, Sapan Agarwal, Yiyang Li, Yaakov Tuchman et al. "Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing". Science 364, n.º 6440 (25 de abril de 2019): 570–74. http://dx.doi.org/10.1126/science.aaw5581.
Texto completo da fonteSrinivasarao, B. N., e K. Chandrabhushana Rao. "Design and Analysis of Area Efficient 128 Bytes SRAM Architecture". Journal of VLSI Design and Signal Processing 8, n.º 1 (30 de março de 2022): 19–26. http://dx.doi.org/10.46610/jovdsp.2022.v08i01.004.
Texto completo da fonteSeo, Yeongkyo, e Kon-Woo Kwon. "Ultra High-Density SOT-MRAM Design for Last-Level On-Chip Cache Application". Electronics 12, n.º 20 (12 de outubro de 2023): 4223. http://dx.doi.org/10.3390/electronics12204223.
Texto completo da fonteGul, Waqas, Maitham Shams e Dhamin Al-Khalili. "SRAM Cell Design Challenges in Modern Deep Sub-Micron Technologies: An Overview". Micromachines 13, n.º 8 (17 de agosto de 2022): 1332. http://dx.doi.org/10.3390/mi13081332.
Texto completo da fonteLi, Tingkai, Sheng Teng Hsu, Bruce D. Ulrich e David R. Evans. "Semiconductive metal oxide ferroelectric memory transistor: A long-retention nonvolatile memory transistor". Applied Physics Letters 86, n.º 12 (21 de março de 2005): 123513. http://dx.doi.org/10.1063/1.1886252.
Texto completo da fonteCheremisinov, D. I., e L. D. Cheremisinova. "Logical gates recognition in a flat transistor circuit". Informatics 18, n.º 4 (31 de dezembro de 2021): 96–107. http://dx.doi.org/10.37661/1816-0301-2021-18-4-96-107.
Texto completo da fonteQi, Hongxia, e Ying Wu. "Synaptic plasticity of TiO2 nanowire transistor". Microelectronics International 37, n.º 3 (16 de janeiro de 2020): 125–30. http://dx.doi.org/10.1108/mi-08-2019-0053.
Texto completo da fonteXie, Dongyu, Xiaoci Liang, Di Geng, Qian Wu e Chuan Liu. "An Enhanced Synaptic Plasticity of Electrolyte-Gated Transistors through the Tungsten Doping of an Oxide Semiconductor". Electronics 13, n.º 8 (13 de abril de 2024): 1485. http://dx.doi.org/10.3390/electronics13081485.
Texto completo da fonteFazio, Al. "Flash Memory Scaling". MRS Bulletin 29, n.º 11 (novembro de 2004): 814–17. http://dx.doi.org/10.1557/mrs2004.233.
Texto completo da fonteHellkamp, Daniel, e Kundan Nepal. "True Three-Valued Ternary Content Addressable Memory Cell Based On Ambipolar Carbon Nanotube Transistors". Journal of Circuits, Systems and Computers 28, n.º 05 (maio de 2019): 1950085. http://dx.doi.org/10.1142/s0218126619500853.
Texto completo da fonteLee, Dain, Yongsuk Choi, Euyheon Hwang, Moon Sung Kang, Seungwoo Lee e Jeong Ho Cho. "Black phosphorus nonvolatile transistor memory". Nanoscale 8, n.º 17 (2016): 9107–12. http://dx.doi.org/10.1039/c6nr02078j.
Texto completo da fonteFuhrer, M. S., B. M. Kim, T. Dürkop e T. Brintlinger. "High-Mobility Nanotube Transistor Memory". Nano Letters 2, n.º 7 (julho de 2002): 755–59. http://dx.doi.org/10.1021/nl025577o.
Texto completo da fonteKim, Soo-Jin, e Jang-Sik Lee. "Flexible Organic Transistor Memory Devices". Nano Letters 10, n.º 8 (11 de agosto de 2010): 2884–90. http://dx.doi.org/10.1021/nl1009662.
Texto completo da fonteNi, Yao, Yongfei Wang e Wentao Xu. "Flexible Transistor‐Structured Memory: Recent Process of Flexible Transistor‐Structured Memory (Small 9/2021)". Small 17, n.º 9 (março de 2021): 2170037. http://dx.doi.org/10.1002/smll.202170037.
Texto completo da fonteBoampong, Amos Amoako, Jae-Hyeok Cho, Yoonseuk Choi e Min-Hoi Kim. "Enhancement of the Retention Characteristics in Solution-Processed Ferroelectric Memory Transistor with Dual-Gate Structure". Journal of Nanoscience and Nanotechnology 21, n.º 3 (1 de março de 2021): 1766–71. http://dx.doi.org/10.1166/jnn.2021.18923.
Texto completo da fonteJin, Risheng, Keli Shi, Beibei Qiu e Shihua Huang. "Photoinduced-reset and multilevel storage transistor memories based on antimony-doped tin oxide nanoparticles floating gate". Nanotechnology 33, n.º 2 (22 de outubro de 2021): 025201. http://dx.doi.org/10.1088/1361-6528/ac2dc5.
Texto completo da fonteSedaghat, Mahsa, e Mahdi Salimi. "Evaluation and Comparison of CMOS logic circuits with CNTFET". Journal of Research in Science, Engineering and Technology 3, n.º 04 (13 de setembro de 2019): 1–9. http://dx.doi.org/10.24200/jrset.vol3iss04pp1-9.
Texto completo da fonteShim, Hyunseok, Kyoseung Sim, Faheem Ershad, Pinyi Yang, Anish Thukral, Zhoulyu Rao, Hae-Jin Kim et al. "Stretchable elastic synaptic transistors for neurologically integrated soft engineering systems". Science Advances 5, n.º 10 (outubro de 2019): eaax4961. http://dx.doi.org/10.1126/sciadv.aax4961.
Texto completo da fonteShrivastava, Anurag, e Mohan Gupta. "Evaluation of the Core Processor Cache Memory Architecture's Performance". Journal of Futuristic Sciences and Applications 2, n.º 1 (2019): 11–18. http://dx.doi.org/10.51976/jfsa.211903.
Texto completo da fonteGudlavalleti, R. H., B. Saman, R. Mays, H. Salama, Evan Heller, J. Chandy e F. Jain. "A Novel Addressing Circuit for SWS-FET Based Multivalued Dynamic Random-Access Memory Array". International Journal of High Speed Electronics and Systems 29, n.º 01n04 (março de 2020): 2040009. http://dx.doi.org/10.1142/s0129156420400091.
Texto completo da fonteArimoto, Yoshihiro, e Hiroshi Ishiwara. "Current Status of Ferroelectric Random-Access Memory". MRS Bulletin 29, n.º 11 (novembro de 2004): 823–28. http://dx.doi.org/10.1557/mrs2004.235.
Texto completo da fonteMATSUMOTO, KAZUHIKO. "ROOM-TEMPERATURE SINGLE ELECTRON DEVICES BY SCANNING PROBE PROCESS". International Journal of High Speed Electronics and Systems 10, n.º 01 (março de 2000): 83–91. http://dx.doi.org/10.1142/s0129156400000118.
Texto completo da fonteSeon, Kim, Kim e Jeon. "Analytical Current-Voltage Model for Gate-All-Around Transistor with Poly-Crystalline Silicon Channel". Electronics 8, n.º 9 (4 de setembro de 2019): 988. http://dx.doi.org/10.3390/electronics8090988.
Texto completo da fonteKumari, Nibha, e Prof Vandana Niranjan. "Low-Power 6T SRAM Cell using 22nm CMOS Technology". Indian Journal of VLSI Design 2, n.º 2 (30 de setembro de 2022): 5–10. http://dx.doi.org/10.54105/ijvlsid.b1210.092222.
Texto completo da fonteHuang, Jing, Pengfei Tan, Fang Wang e Bo Li. "Ferroelectric Memory Based on Topological Domain Structures: A Phase Field Simulation". Crystals 12, n.º 6 (29 de maio de 2022): 786. http://dx.doi.org/10.3390/cryst12060786.
Texto completo da fonteYin, Wan-Jun, Tao Wen e Wei Zhang. "Design of Dynamic Random Access Memory Based on One Transistor One Diode Memory Cell". Journal of Nanoelectronics and Optoelectronics 16, n.º 1 (1 de janeiro de 2021): 114–18. http://dx.doi.org/10.1166/jno.2021.2924.
Texto completo da fonteSaman, Bander, P. Gogna, El-Sayed Hasaneen, J. Chandy, E. Heller e F. C. Jain. "Spatial Wavefunction Switched (SWS) FET SRAM Circuits and Simulation". International Journal of High Speed Electronics and Systems 26, n.º 03 (27 de junho de 2017): 1740009. http://dx.doi.org/10.1142/s0129156417400092.
Texto completo da fonteNatarajamoorthy, Mathan, Jayashri Subbiah, Nurul Ezaila Alias e Michael Loong Peng Tan. "Stability Improvement of an Efficient Graphene Nanoribbon Field-Effect Transistor-Based SRAM Design". Journal of Nanotechnology 2020 (30 de abril de 2020): 1–7. http://dx.doi.org/10.1155/2020/7608279.
Texto completo da fonteJang, Won Douk, Young Jun Yoon, Min Su Cho, Jun Hyeok Jung, Sang Ho Lee, Jaewon Jang, Jin-Hyuk Bae e In Man Kang. "Design and Analysis of Metal-Oxide-Semiconductor Field-Effect Transistor-Based Capacitorless One-Transistor Embedded Dynamic Random-Access Memory with Double-Polysilicon Layer Using Grain Boundary for Hole Storage". Journal of Nanoscience and Nanotechnology 20, n.º 11 (1 de novembro de 2020): 6596–602. http://dx.doi.org/10.1166/jnn.2020.18767.
Texto completo da fonteRumberg, Brandon, Spencer Clites, Haifa Abulaiha, Alexander DiLello e David Graham. "Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays". Journal of Low Power Electronics and Applications 11, n.º 1 (13 de janeiro de 2021): 4. http://dx.doi.org/10.3390/jlpea11010004.
Texto completo da fonteWang, Peng-Fei, Xi Lin, Lei Liu, Qing-Qing Sun, Peng Zhou, Xiao-Yong Liu, Wei Liu, Yi Gong e David Wei Zhang. "A Semi-Floating Gate Transistor for Low-Voltage Ultrafast Memory and Sensing Operation". Science 341, n.º 6146 (8 de agosto de 2013): 640–43. http://dx.doi.org/10.1126/science.1240961.
Texto completo da fonteQiu, Haiyang, Dandan Hao, Hui Li, Yepeng Shi, Yao Dong, Guoxia Liu e Fukai Shan. "Transparent and biocompatible In2O3 artificial synapses with lactose–citric acid electrolyte for neuromorphic computing". Applied Physics Letters 121, n.º 18 (31 de outubro de 2022): 183301. http://dx.doi.org/10.1063/5.0124219.
Texto completo da fonteChiquet, Philippe, Jérémy Postel-Pellerin, Célia Tuninetti, Sarra Souiki-Figuigui e Pascal Masson. "Enhancement of flash memory endurance using short pulsed program/erase signals". ACTA IMEKO 5, n.º 4 (30 de dezembro de 2016): 29. http://dx.doi.org/10.21014/acta_imeko.v5i4.422.
Texto completo da fonteDuraivel, A. N., B. Paulchamy e K. Mahendrakan. "Proficient Technique for High Performance Very Large-Scale Integration System to Amend Clock Gated Dual Edge Triggered Sense Amplifier Flip-Flop with Less Dissipation of Power Leakage". Journal of Nanoelectronics and Optoelectronics 16, n.º 4 (1 de abril de 2021): 602–11. http://dx.doi.org/10.1166/jno.2021.2984.
Texto completo da fontePérez-Tomás, Amador, Anderson Lima, Quentin Billon, Ian Shirley, Gustau Catalan e Mónica Lira-Cantú. "A Solar Transistor and Photoferroelectric Memory". Advanced Functional Materials 28, n.º 17 (28 de fevereiro de 2018): 1707099. http://dx.doi.org/10.1002/adfm.201707099.
Texto completo da fonteLiang, Lijuan, Wenjuan He, Rong Cao, Xianfu Wei, Sei Uemura, Toshihide Kamata, Kazuki Nakamura, Changshuai Ding, Xuying Liu e Norihisa Kobayashi. "Non-Volatile Transistor Memory with a Polypeptide Dielectric". Molecules 25, n.º 3 (23 de janeiro de 2020): 499. http://dx.doi.org/10.3390/molecules25030499.
Texto completo da fonteSong, Chong-Myeong, e Hyuk-Jun Kwon. "Ferroelectrics Based on HfO2 Film". Electronics 10, n.º 22 (11 de novembro de 2021): 2759. http://dx.doi.org/10.3390/electronics10222759.
Texto completo da fonteXie, Hui, Hao Wu e Chang Liu. "Non-Volatile Memory Based on ZnO Thin-Film Transistor with Self-Assembled Au Nanocrystals". Nanomaterials 14, n.º 8 (14 de abril de 2024): 678. http://dx.doi.org/10.3390/nano14080678.
Texto completo da fonteGherendi, Florin, Daniela Dobrin e Magdalena Nistor. "Transparent Structures for ZnO Thin Film Paper Transistors Fabricated by Pulsed Electron Beam Deposition". Micromachines 15, n.º 2 (12 de fevereiro de 2024): 265. http://dx.doi.org/10.3390/mi15020265.
Texto completo da fonteABDEL-HAFEEZ, SALEH M., e ANAS S. MATALKAH. "CMOS EIGHT-TRANSISTOR MEMORY CELL FOR LOW-DYNAMIC-POWER HIGH-SPEED EMBEDDED SRAM". Journal of Circuits, Systems and Computers 17, n.º 05 (outubro de 2008): 845–63. http://dx.doi.org/10.1142/s0218126608004599.
Texto completo da fonteYil Suk, Yang, You In-kyu, Lee Won Jae, Yu Byoung Gon e Cho Kyong-Ik. "Design of a Single-Transistor-Type Ferroelectric Field Effect Transistor Memory". Journal of the Korean Physical Society 40, n.º 4 (1 de abril de 2002): 701. http://dx.doi.org/10.3938/jkps.40.701.
Texto completo da fonteSun, Shuo, Hyochul Kim, Zhouchen Luo, Glenn S. Solomon e Edo Waks. "A single-photon switch and transistor enabled by a solid-state quantum memory". Science 361, n.º 6397 (5 de julho de 2018): 57–60. http://dx.doi.org/10.1126/science.aat3581.
Texto completo da fonteZhao, Yuhang, e Jie Jiang. "Recent Progress on Neuromorphic Synapse Electronics: From Emerging Materials, Devices, to Neural Networks". Journal of Nanoscience and Nanotechnology 18, n.º 12 (1 de dezembro de 2018): 8003–15. http://dx.doi.org/10.1166/jnn.2018.16428.
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