Teses / dissertações sobre o tema "Impulse circuits"

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES
This work presents the project and the implementation of a device that is capable of measuring the electrical effects, especially the impedance, in grounding meshes when subjected to atmospherical discharges. An analysis on the influence of the atmospheric discharges in electrical protection systems is performed and also a comparison between current and voltage impulsive circuits. The device is built of electronic circuits controlled by a microcontroller, with the possibility of parameter adjusting for shaping the generated impulse wave. The device was conceived such that it can be used for tests of soil impedance measurement and for verification of the behavior of electrical grounding systems under high frequencies. The results are presented for tests in different types of systems and there was satisfactory performance for the developed equipment when compared with a commercial device
Este trabalho apresenta o projeto e a implementação do dispositivo capaz de medir os efeitos elétricos, em especial, as impedâncias, em malha de aterramento, sujeito a descargas atmosféricas. Analisa-se as influências das descargas atmosféricas nos sistemas de proteção elétricos e desenvolve-se análise comparativa dos circuitos impulsivos de corrente e de tensão. Constrói-se o dispositivo que consiste de circuitos eletrônicos controlados por microcontrolador, com possibilidade de ajuste de parâmetros da onda gerada. O dispositivo produzido é utilizado para medição da impedância do solo e verificação do comportamento de sistemas de aterramento elétrico em baixas e altas frequências. São apresentados os resultados dos testes em diferentes tipos de sistemas, demonstrando o satisfatório desempenho quando comparado com instrumento comercial.

Esse trabalho está baseado na investigação dos detectores de falhas aplicando classificadores de classe única. As falhas a serem detectadas são relativas ao estado de funcionamento de cada componente do circuito, especificamente de suas tolerâncias (falha paramétrica). Usando a função de transferência de cada um dos circuitos são gerados e analisados os sinais de saída com os componentes dentro e fora da tolerância. Uma função degrau é aplicada à entrada do circuito, o sinal de saída desse circuito passa por uma função diferenciadora e um filtro. O sinal de saída do filtro passa por um processo de redução de atributos e finalmente, o sinal segue simultaneamente para os classificadores multiclasse e classe única. Na análise são empregados ferramentas de reconhecimento de padrões e de classificação de classe única. Os classficadores multiclasse são capazes de classificar o sinal de saída do circuito em uma das classes de falha para o qual foram treinados. Eles apresentam um bom desempenho quando as classes de falha não possuem superposição e quando eles não são apresentados a classes de falhas para os quais não foram treinados. Comitê de classificadores de classe única podem classificar o sinal de saída em uma ou mais classes de falha e também podem classificá-lo em nenhuma classe. Eles apresentam desempenho comparável ao classificador multiclasse, mas também são capazes detectar casos de sobreposição de classes de falhas e indicar situações de falhas para os quais não foram treinados (falhas desconhecidas). Os resultados obtidos nesse trabalho mostraram que os classificadores de classe única, além de ser compatível com o desempenho do classificador multiclasse quando não há sobreposição, também detectou todas as sobreposições existentes sugerindo as possíveis falhas.
This work deals with the application of one class classifiers in fault detection. The faults to be detected are related parametric faults. The transfer function of each circuit was generated and the outputs signals with the components in and out of tolerance were analyzed. Pattern recognition and one class classifications tools are employed to perform the analysis. The multiclass classifiers are able to classify the circuit output signal in one of the trained classes. They present a good performance when the fault classes do not overlap or when they are not presented to fault classes that were not presented in the training. The one class classifier committee may classify the output signal in one or more fault classes and may also classify them in none of the trained class faults. They present comparable performance to multiclass classifiers, but also are able to detect overlapping fault classes and show fault situations that were no present in the training (unknown faults).

Ce travail presente deux circuits bases sur les memoires de courant. Les applications developpees sont capables de travailler avec des alimentations en tension de 3v et moins. Pour ces realisations, il a ete necessaire de developper a la fois de nouvelles memoires de courants ainsi que des architectures originales pour repondre a tous les criteres des cahiers des charges. La premiere realisation est un fir pour une application video dont la fonction est, en sortie d'un filtre continu, d'y transferer une partie des contraintes de rejection. La phase lineaire que presente ce type de filtre se prete parfaitement bien a cette application tres sensible au delai de groupe. L'architecture developpee utilise un adressage cyclique qui permet de fortement reduire les degradations engendrees par les memoires de courant tout en conservant la dynamique. Le deuxieme circuit est un modulateur sigma-delta d'ordre 2 dont les performances requises sont une resolution superieure a 12 bits dans la bande 300-3400 hz, une surface d'integration reduite et une faible consommation. Pour arriver a obtenir la precision necessaire avec la faible tension d'alimentation, une nouvelle memoire a ete developpee. Sa particularite est d'utiliser un transistor de memorisation en zone triode qui lui confere une grande linearite. Elle laisse esperer des resultats en terme de linearite et de resolution proche de 14 bits.

Depuis 2002, différentes bandes de fréquences de plusieurs GHz dites « Ultra-Large Bande » (ULB), généralement comprises entre 3,1GHz et 10,6GHz, ont été libérées de par le monde pour la transmission d’informations sans fil. La largeur de ces bandes est telle qu’il devient envisageable d’utiliser des impulsions comme support de l’information en lieu et place d’une porteuse modulée comme cela est le cas habituellement. En effet, le spectre d’une impulsion étant inversement proportionnel à sa durée, une large plage de fréquences est requise pour la transmission d’informations via des impulsions. Cependant, il devient possible d’accroitre les débits en rapprochant les impulsions émises lorsque ceci est nécessaire, tout en offrant la possibilité d’éteindre les circuits et donc réduire la consommation lorsque deux impulsions sont suffisamment éloignées dans le temps.Le travail de recherche de cette thèse est dans ce contexte de proposer une structure d’émetteur impulsionnel reconfigurable disposant d’un contrôle suffisamment fin pour s’adapter aux différents canaux des standards IEEE 802.15.4 et 802.15.6 et ce, en n’utilisant que des circuits numériques pour les besoins des applications faibles coût. Pour cela, une étude théorique sur la mise en forme des impulsions requises est faite. Puis, il est question de la conception des différentes fonctions nécessaires à la mise en œuvre d’un émetteur impulsionnel reconfigurable, telles qu’un oscillateur contrôlé en tension pour la bande 3,1GHz-10,6GHz à démarrage rapide et que le circuit de mise en forme des oscillations associé
Since 2002, various frequency bands of several GHz called "Ultra-WideBand" (UWB), generally between 3,1GHz and 10,6GHz, were liberalized in the world for wireless data transmission. The width of these bands is that it becomes possible to use pulses instead of a modulated carrier to transmit data. Indeed, as the spectrum of a pulse is inversely proportional to its duration, a wide range of frequencies is required for the transmission of information via pulses. However, it becomes possible to increase the rates by moving closer the emitted pulses when this is necessary, while providing the ability to switch off the circuits and thus reduce power consumption when two pulses are sufficiently far in time.To standardize the use of UWB frequency bands, standards such as IEEE 802.15.4 and 802.15.6 standards have emerged and have chosen to cut these frequency bands in channels of 500MHz and more. The aim of this thesis is also to propose a reconfigurable pulse transmitter structure with a fine enough control to address the different channels of IEEE 802.15.4 and 802.15.6 standard and, using only digital circuits to target low cost applications. For this, a theoretical study on the shaping of pulses required is made. Then it comes to the design of the various functions necessary for the implementation of a reconfigurable pulse transmitter, such as the implementation of a voltage controlled oscillator for 3,1GHz band-10,6GHz with quick start ability and the required oscillations shaping circuit

Depuis 2002, différentes bandes de fréquences de plusieurs GHz dites « Ultra-Large Bande » (ULB), généralement comprises entre 3,1GHz et 10,6GHz, ont été libérées de par le monde pour la transmission d’informations sans fil. La largeur de ces bandes est telle qu’il devient envisageable d’utiliser des impulsions comme support de l’information en lieu et place d’une porteuse modulée comme cela est le cas habituellement. En effet, le spectre d’une impulsion étant inversement proportionnel à sa durée, une large plage de fréquences est requise pour la transmission d’informations via des impulsions. Cependant, il devient possible d’accroitre les débits en rapprochant les impulsions émises lorsque ceci est nécessaire, tout en offrant la possibilité d’éteindre les circuits et donc réduire la consommation lorsque deux impulsions sont suffisamment éloignées dans le temps.Le travail de recherche de cette thèse est dans ce contexte de proposer une structure d’émetteur impulsionnel reconfigurable disposant d’un contrôle suffisamment fin pour s’adapter aux différents canaux des standards IEEE 802.15.4 et 802.15.6 et ce, en n’utilisant que des circuits numériques pour les besoins des applications faibles coût. Pour cela, une étude théorique sur la mise en forme des impulsions requises est faite. Puis, il est question de la conception des différentes fonctions nécessaires à la mise en œuvre d’un émetteur impulsionnel reconfigurable, telles qu’un oscillateur contrôlé en tension pour la bande 3,1GHz-10,6GHz à démarrage rapide et que le circuit de mise en forme des oscillations associé
Since 2002, various frequency bands of several GHz called "Ultra-WideBand" (UWB), generally between 3,1GHz and 10,6GHz, were liberalized in the world for wireless data transmission. The width of these bands is that it becomes possible to use pulses instead of a modulated carrier to transmit data. Indeed, as the spectrum of a pulse is inversely proportional to its duration, a wide range of frequencies is required for the transmission of information via pulses. However, it becomes possible to increase the rates by moving closer the emitted pulses when this is necessary, while providing the ability to switch off the circuits and thus reduce power consumption when two pulses are sufficiently far in time.To standardize the use of UWB frequency bands, standards such as IEEE 802.15.4 and 802.15.6 standards have emerged and have chosen to cut these frequency bands in channels of 500MHz and more. The aim of this thesis is also to propose a reconfigurable pulse transmitter structure with a fine enough control to address the different channels of IEEE 802.15.4 and 802.15.6 standard and, using only digital circuits to target low cost applications. For this, a theoretical study on the shaping of pulses required is made. Then it comes to the design of the various functions necessary for the implementation of a reconfigurable pulse transmitter, such as the implementation of a voltage controlled oscillator for 3,1GHz band-10,6GHz with quick start ability and the required oscillations shaping circuit

Les circuits de récupération d'horloge et de données sont nécessaires au bon fonctionnement de plusieurs systèmes de communication sans fil. Les travaux effectués dans le cadre de cette thèse concernent le développement de ces circuits avec d'une part la réalisation, en technologie HCMOS9 0,13 μm de STMICROELECTRONICS, de circuits CDR analogiques à 1 et 54 Mbit/s, et d'autre part, la mise en œuvre de fonctions CDR numériques programmables à bas débit. Un circuit CDR fonctionnant à plus bas débit (1 Mbit/s) a été conçu dans le cadre de la gestion d'énergie d'un récepteur ULB impulsionnel non cohérent. Ces deux structures ont été réalisées à l'aide de PLL analogiques du 3ème ordre. Un comparateur de phase adapté aux impulsions issues du détecteur d'énergie a été proposé dans cette étude. Les circuits ont ensuite été dimensionnés dans le but d'obtenir de très bonnes performances en termes de jitter et de consommation. En particulier, les performances mesurées (sous pointes) du circuit CDR à 1 Mbit/s permettent d'envisager une gestion d'énergie efficace (réduction de plus de 97% de la consommation du récepteur). Dans le cadre d'une chaîne de télémesure avion vers sol, deux circuits CDR numériques ont également été réalisés durant cette thèse. Une PLL numérique du second degré a été implémentée en vue de fournir des données et une horloge synchrone de celles-ci afin de piloter une chaîne SOQPSK entièrement numérique. Un circuit ELGS a également mis au point pour fonctionner au sein d'un récepteur PCM/FM
Clock and data recovery circuits are required in many wireless communication systems. This thesis is about development of such circuits with: firstly, the realization, in HCMOS9 0.13 μm of STMICROELECTRONICS technology, of 1 and 54 Mb/s analog CDR circuits, and secondly, the implementation of programmable digital circuits at low rates. In the aim of an impulse UWB transceiver dealing with video transmission, a CDR circuit at 54 Mb/s rate has been realized to provide clock signal synchronously with narrow pulses (their duration is about a few nanoseconds) from the energy detector. Another CDR circuit has been built at 1 Mb/s rate in a non-coherent IR- UWB receiver power management context. Both circuits have been implemented as 3rd order analog PLL. In this work, a phase comparator suitable for “RZ low duty cycle” data from the energy detector has been proposed. Circuits have been sized to obtain very good performances in terms of jitter and power consumption. Particularly, measured performances of the 1 Mb/s CDR circuit allow to plan an efficient power management (a decrease of more than 97% of the receiver total power consumption). In the context of a telemetry system from aircraft to ground, two digital CDR circuits have also been implemented. A second order digital PLL has been adopted in order to provide synchronous clock and data to an SOQPSK digital transmitter. Also, a digital ELGS circuit has been proposed to work in a PCM/FM receiver. For both CDR structures, the input signal rate is programmable and varies globally from 1 to 30 Mb/s

Les travaux présentés lors de cette thèse s’inscrivent dans le cadre des réseaux de microsystèmes communicants dont les réseaux de capteurs sont l’exemple le plus connu. La problématique adressée est la conception d’une interface radio communicante répondant aux besoins spécifiques des microsystèmes communicants : simplicité, faible coût, faible consommation, faible encombrement, haut débit et reconfigurabilité. Les technologies actuelles sans fil comme le WiFi, le Bluetooth, et Zigbee ne sont pas en mesure de répondre à ces contraintes spécifiques. L’étude se focalise sur la technologie IR-UWB (Impulse Radio Ultra-WideBand). Dans un premier temps, une étude conjointe sur la capacité du canal et l’implémentation matérielle est menée pour déterminer l’architecture optimale des émetteurs-récepteurs en IR-UWB. Cette étude propose l’utilisation d’une architecture multi bandes IR-UWB (MB-IR-UWB) à implémentation mixte à 60 GHz avec des antennes directives. Cette solution est optimisée sur les critères de débit et puissance consommée. Afin de supporter l’ensemble des besoins des applications des réseaux de microsystèmes communicants et l’évolution de l’environnement d’opération, la reconfigurabilité doit être implémentée dans les émetteur-récepteurs proposés. Ces travaux présentent une proposition de reconfigurabilité par paramètres, qui permet de supporter la plus grande gamme de reconfigurabilités multi propriétés (débit, taux d’erreur, portée, puissance consommée, …) de l’état de l’art. Enfin, pour valider par la mesure les travaux sur la reconfigurabilité et sur les architectures d’émetteur-récepteurs IR-UWB, des implémentations FPGA et ASIC sont réalisées. Un nouveau procédé de synchronisation et démodulation conjointe reconfigurable est proposé dans le récepteur IR-UWB BPSK S-Rake. Les mesures montrent que le circuit de traitement proposé améliore les performances en synchronisation, démodulation, efficacité, débit du réseau, consommation et complexité du circuit. L’émetteur-récepteur IR-UWB reconfigurable proposé atteint un débit et une gamme de reconfigurabilité supérieure à l’état de l’art
The research work presented in this thesis is situated in the framework of wireless sensor networks (WSNs). The issue addressed is the design of a radio interface answering the specific needs of WSNs: simplicity, low cost, low power, small size, high data rate and reconfigurability. Current wireless technologies like WiFi, Bluetooth, and Zigbee are not able to respond to these requirements. Thus this study focuses on Impulse Radio Ultra-WideBand (IR-UWB) technology. At first, a joint study of the channel capacity and the hardware implementation is carried out to determine the optimal architecture of IR-UWB transceivers. This study proposes an architecture using multi-band IR-UWB (MB-UWB-IR) with a mixed implementation at 60 GHz with directional antennas. This solution is optimized according to the criteria of data rate and power consumption. To support the all the needs of WSN applications and to adapt to the evolution of the WSN’s environment, reconfigurability must be implemented in the proposed IR-UWB transceiver. This thesis presents a new solution: the reconfigurability by parameters. It supports the widest range of multi-property reconfigurability (with respect to data rate, bit error rate, radio range, power consumption, ...) of the state of the art. Finally, to validate these techniques by measurements, FPGA and ASIC implementations are realized by using the reconfigurability and the IR-UWB transceiver architecture proposed. A new method for joint synchronization and demodulation is proposed for a reconfigurable IR-UWB BPSK S-Rake receiver. The measurements show that the proposed technique improves the circuit performance: synchronization, demodulation, efficiency, network throughput, power consumption and complexity of the circuit. The proposed IR-UWB reconfigurable transceiver achieves a data rate and a wider range of reconfigurability compared to the state of the art

Switched systems belong to a special class of hybrid systems, which consist of a collection of subsystems described by continuous dynamics together with a switching rule that specifies the switching between the subsystems. Such systems can be used to describe a wide range of practical applications, such as orbital transfer of satellites, auto-driving design, communication security, financial investment, neural networks and chaotic systems, just to name a few. For these switched systems, the occurrence of impulses and delay phenomena cannot be avoided. For example, in some circuit systems, switching speeds of amplifiers within the units’ individual circuits are finite, and hence causing delays in the transmission of signals. The abrupt changes in the voltages produced by faulty circuit elements are exemplary of impulsive phenomena. On the other hand, it is well known that stability is one of the most important issues in real applications for any dynamical system, and there is no exception for switched systems, switched systems with impulses, or delayed switched systems.With the motivations mentioned above, we present, in this thesis, new developments resulting from our work on fundamental stability theory and design methodologies for stabilizing controllers of several types of switched systems with impulses and delays. These systems and their practical motivations are first discussed in Chapter 1. Brief reviews on existing results which are directly relevant to the subject matters of the thesis are also given in the same chapter.In Chapter 2, we consider a class of impulsive switched systems with time- invariant delays and parameter uncertainties. New sufficient stability conditions are obtained for these impulsive delayed switched systems. For illustration, a numerical example is solved using the proposed approach.In Chapter 3, new asymptotic stability criteria, expressed in the form of linear matrix inequalities, are derived using the Lyapunov-Krasovskii technique for a class of impulsive switched systems with time-invariant delays. These asymptotic stability criteria are independent of time delays and impulsive switching intervals. A design methodology is then developed for the construction of a feedback controller which asymptotically stabilizes the closed-loop system. A numerical example is solved using the proposed method.In Chapter 4, new asymptotic stability criteria, expressed in the form of linear matrix inequalities, and a design procedure for the construction of a delayed stabilizing feedback controller are obtained using the receding horizon method for a class of uncertain impulsive switched systems with input delay. For illustration, a numerical example is solved using the proposed method.In Chapter 5, we consider the stabilization problem for cellular neural networks with time delays. Based on the Lyapunov stability theory, we obtain new sufficient conditions for asymptotical stability of the delayed cellular neural networks and devise a computational procedure for constructing impulsive feedback controllers which stabilize the delayed cellular neural networks. A numerical example is given, demonstrating the effectiveness of the proposed method.In Chapter 6, we consider a class of H∞ optimal control problems with systems described by uncertain impulsive differential equations. A new design method for the construction of feedback control laws which asymptotically stabilize the uncertain closed-loop systems is obtained. Furthermore, it is shown that the H∞ norm-bounded constraints on disturbance attenuation for all admissible uncertainties are satisfied. New sufficient conditions, expressed as linear matrix inequalities, for ensuring the existence of such a control law are presented. A numerical example is solved, illustrating the effectiveness of the proposed method.In Chapter 7, we conclude the thesis by making some concluding remarks and giving brief discussions on topics for further research.

Ce travail de thèse s’articule autour de la problématique du respect des gabarits spectraux d’émission imposés par les règlementations et les normes dans le domaine des émetteurs radio impulsionnels ultra-large bande. Le choix a été fait de réaliser un capteur in-situ venant extraire les informations nécessaires à une estimation sur puce de la densité spectrale de puissance. Un algorithme d’estimation embarqué peut alors permettre de détecter les gabarits violés et pouvoir rétroagir sur le dispositif. La grande diversité constatée parmi les règlementations et les normes en vigueur ainsi que dans les différentes architectures de générateurs d'impulsions a alors motivé la réalisation d'un système de calibration universel à tous les émetteurs par prise d'informations en sortie. Le manuscrit s'est alors employé à représenter une impulsion à partir de son enveloppe instantanée et de sa fréquence instantanée, ces deux grandeurs temporelles pouvant être extraites pour tout type d'impulsions. Il a été également proposé dans le chapitre une première technique de calibration basée sur la modification de l'enveloppe à des instants précis qui permet de faire rentrer le spectre dans le gabarit tout en maximisant l'occupation de celui-ci. Enfin, l'extraction de l'enveloppe instantanée et de la fréquence instantanée a été abordée en proposant une technique d'extraction par transposition de l'information en bande de base. La conception des dispositifs électroniques nécessaires a été présentée et ceux-ci ont été implémentés sur la même puce qu'un générateur d'impulsions dans le but de réaliser un démonstrateur qui a validé l'utilisation du système étudié
This thesis focusses on the power emission constraints defined by regulations and standards for every kinds of ultra-wide band impulse radio transmitters. In fact, these power emission constraints have to be respected all along the device life. Also, an integrated sensor able to extract the essential information for an on-chip estimation of the power spectral density has been realized. Then, an embedded algorithm is added to the system and detects if a power limit is broken. If necessary, it acts on the transmitter to solve the problem. In the first chapter, a large variety of power constraints shapes and several architectures of impulse generators have been observed and studied. Therefore, the aim of this thesis is to realise a calibration system which would be universal to all impulse radio transmitters. After its extraction at the output of the transmitter, information have to be downconverted in order to reduce the constraints on conversion stage but without using a local oscillator and a mixer. A model for the impulse signal based on the instantaneous envelop and on the instantaneous frequency has been proposed in the second chapter. A new calibration method based on these two signals is also presented. The last chapter concentrates on detailing the extraction of the instantaneous envelop and the instantaneous frequency. The design of the electronic devices essential to this extraction is presented and a chip has been realised and the viability of the solution shown

Ce travail de thèse s’articule autour de la problématique du respect des gabarits spectraux d’émission imposés par les règlementations et les normes dans le domaine des émetteurs radio impulsionnels ultra-large bande. Le choix a été fait de réaliser un capteur in-situ venant extraire les informations nécessaires à une estimation sur puce de la densité spectrale de puissance. Un algorithme d’estimation embarqué peut alors permettre de détecter les gabarits violés et pouvoir rétroagir sur le dispositif. La grande diversité constatée parmi les règlementations et les normes en vigueur ainsi que dans les différentes architectures de générateurs d'impulsions a alors motivé la réalisation d'un système de calibration universel à tous les émetteurs par prise d'informations en sortie. Le manuscrit s'est alors employé à représenter une impulsion à partir de son enveloppe instantanée et de sa fréquence instantanée, ces deux grandeurs temporelles pouvant être extraites pour tout type d'impulsions. Il a été également proposé dans le chapitre une première technique de calibration basée sur la modification de l'enveloppe à des instants précis qui permet de faire rentrer le spectre dans le gabarit tout en maximisant l'occupation de celui-ci. Enfin, l'extraction de l'enveloppe instantanée et de la fréquence instantanée a été abordée en proposant une technique d'extraction par transposition de l'information en bande de base. La conception des dispositifs électroniques nécessaires a été présentée et ceux-ci ont été implémentés sur la même puce qu'un générateur d'impulsions dans le but de réaliser un démonstrateur qui a validé l'utilisation du système étudié
This thesis focusses on the power emission constraints defined by regulations and standards for every kinds of ultra-wide band impulse radio transmitters. In fact, these power emission constraints have to be respected all along the device life. Also, an integrated sensor able to extract the essential information for an on-chip estimation of the power spectral density has been realized. Then, an embedded algorithm is added to the system and detects if a power limit is broken. If necessary, it acts on the transmitter to solve the problem. In the first chapter, a large variety of power constraints shapes and several architectures of impulse generators have been observed and studied. Therefore, the aim of this thesis is to realise a calibration system which would be universal to all impulse radio transmitters. After its extraction at the output of the transmitter, information have to be downconverted in order to reduce the constraints on conversion stage but without using a local oscillator and a mixer. A model for the impulse signal based on the instantaneous envelop and on the instantaneous frequency has been proposed in the second chapter. A new calibration method based on these two signals is also presented. The last chapter concentrates on detailing the extraction of the instantaneous envelop and the instantaneous frequency. The design of the electronic devices essential to this extraction is presented and a chip has been realised and the viability of the solution shown

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Uma das maiores dificuldades observadas em laboratórios de alta tensão é o ajuste da forma de onda do impulso de tensão a ser utilizado nos ensaios. Esta dificuldade deve-se ao fato de que, na maioria das vezes, não se conhece a capacitância do objeto sob ensaio, não sendo possível realizar um cálculo exato dos parâmetros a serem utilizados no gerador de impulsos. Nos casos de ensaios em transformadores, estas dificuldades aumentam visto que, além da capacitância inerente da sua isolação, há também uma contribuição de indutância ao circuito de ensaio, proveniente de seus enrolamentos. Isto dificulta ainda mais a obtenção de uma forma de onda normalizada, de acordo com a norma NBR IEC 60060-1. Nesta Dissertação de Mestrado apresenta-se e avalia-se metodologias que permitem a realização de ensaios normatizados de impulso de tensão em transformadores com baixas indutâncias, comuns nos sistemas de distribuição de energia elétrica. Serão destacados os resultados obtidos com a inserção de um circuito Glaninger, comparado com a metodologia baseada no aumento da resistência paralela total do circuito em teste. As simulações computacionais são realizadas com o auxílio do programa ATP (Alternative Trasient Program), utilizando valores nominais de parâmetros físicos dos equipamentos de alta tensão do Laboratório de Extra Alta tensão da Universidade Federal do Pará (LEAT). Através de uma modelagem inicial do gerador de impulsos de tensão do LEAT no programa ATP, valida-se os resultados simulados com a realização de um ensaio real no LEAT. Após validação, uma simulação de ensaio em um transformador de distribuição de baixa indutância é realizada no intuito de apresentar as deformações na forma de onda do impulso que ocorrem, provenientes das baixas indutâncias dos enrolamentos do transformador. Através da introdução de um circuito Glaninger devidamente adaptado, apresenta-se a solução para o problema citado, portando, permitindo que ensaios em transformadores com baixa indutâncias sejam realizados de acordo com critérios estabelecidos pelas normas vigentes.
One of the major difficulties observed in high voltage laboratories is the adjustment of the atmospheric (voltage) impulse waveform during the tests. This difficulty is due to the fact that, most of the time, the capacitance of the object under test is not known, and it is not possible to make an exact calculation of the parameters to be used in the impulse generator. In the case of transformer tests, these difficulties increase because, in addition to the inherent capacitance of their insulation, there is also an inductance contribution to the test circuit from their windings. This fact makes it even more difficult to obtain a normalized waveform according to the NBR IEC 60060-1 standard. The present Master's Dissertation presents and evaluates methodologies that allow the performance of standardized voltage impulse tests in transformers with low inductances, common in electric power distribution systems. It will be highlighted in the results obtained with the insertion of a Glaninger circuit, compared to the methodology based on the increase of the total parallel resistance of the circuit under test. The computational simulations are performed in the ATP (Alternative Trasient Program) program, using rated values of physical parameters of the high voltage equipment of the Extra High Voltage Laboratory of the Federal University of Pará (LEAT). Through an initial modeling of the voltage impulse generator of the LEAT in the ATP program, the simulated results are validated by performing a real test in the LEAT. After validation, a test simulation in a low inductance distribution transformer is performed in order to present the deformations in the waveform of the impulse that occur, due to the low inductances of the transformer windings. Through the introduction of a suitably adapted Glaninger circuit, the solution to the above problem is presented, permitting tests on transformers with low inductances to be performed according to criteria established by current standards.

Wireless operation, near-field or far-field, is a core functionality of any mobile or autonomous system. These systems are battery operated or most often utilize energy scavenging as a means of power generation. Limited access to power, expected long and uninterrupted operation, and constrained physical parameters (e.g. weight and size), which limit overall power harvesting capabilities, are factors that outline the importance for innovative low-power approaches and designs in advanced low-power wireless applications. Low-power approaches become especially important for the wireless transceiver, the block in charge of wireless/remote functionality of the system, as this block is usually the most power hungry component in an integrated system-on-chip (SoC). Three such advanced applications with stringent power requirements are examined including space-based exploratory remote sensing probes and their associated radiation effects, millimeter-wave phased-array radar for high-altitude tactical and geological imaging, and implantable biomedical devices (IMDs), leading to the proposal and implementation of low-power wireless solutions for these applications in SiGe BiCMOS and CMOS and platforms.

Dans cette thèse on s'intéresse à deux aspects différents : conceptuel et réalisationel, sur lesquels portent les quatre innovations présentées. Si celles-ci sont illustrées par une application au détecteur de contours de Deriche, elles sont facilement généralisables à d'autres détecteurs qu'ils soient basés sur le calcul de maxima locaux de la dérivée première, ou le calcul des passages par zéro du laplacien. Les filtres à réponse impulsionnelle infinie symétriques ou anti-symétriques peuvent être réalisés sous forme cascade. Le filtre de lissage peut être défini par intégration numérique du filtre dérivateur optimal. Tout filtre détecteur de contours à noyau large peut être considéré comme un filtre de lissage bidimensionnel à noyau large suivi d'un simple filtre Sobel. L’utilisation d'opérateurs blocs série offre le meilleur compromis surface rapidité pour l'intégration en ASICS ou FPGAS. Nous proposons une architecture câblée temps réel optimale en compacité et simplicité de la version récursive du filtre détecteur de contours de Deriche. Nous exposons la méthode qui conduit à notre solution. A travers cette expérience, nous souhaitons transmettre aux concepteurs d'outils de CAO un certain nombre d'idées qui doivent à notre avis être exploitées afin que des outils tels que les graphes flots de données ou les langages synchrones assistent efficacement l'architecte dans les problèmes d'ordonnancement, d'allocation et de repliement temporel du graphe vers l'architecture.

The thesis describes the procedure during the proposal of the driver circuits for the GaN MOSFET transistors, which are known for their fast switching especially. In the first instance of this thesis the issue of GaN MOSFET transistors is described and also the thesis describes the different types of MOSFET transistors in the way of their electrical and mechanical attributes. The specific type driver circuit is stated in the thesis, which was selected in the semestral thesis. For this circuit the boost converter with an output power 600W and high switching frequency 800kHz was proposed as an attempt measurement circuit. This boost converter was measured after its construction was done. The waveforms captured by the oscilloscope are commented also. In the conclusion the assessment is done about this new technology of power switching transistors.

Master´s thesis deals with design of oxy-hydrogen generator power supply for gas welder. Main topic of this thesis is a design of switching mode power supply, which leads to smaller dimensions and weight. Thesis includes design PCB and final measured parameters of this power supply.

The first part of this thesis deals with the basic division of magnetic circuits and materials which are used for their construction. The next section focuses on the description of losses in the magnetic circuit. There is a description of hysteresis losses and eddy losses. The chapter contains the theoretical basis for the mathematical description of hysteresis and eddy losses. There is an analysis of the losses caused by the first harmonious and additional losses caused by harmonics. The third part describes the measurement of losses in ferromagnetic materials. There are all methods that are used. The fourth and fifth chapter is devoted to practical measurement hysteresis losses 1. phase transformer and measuring eddy losses in the inductor using the pulse method.

Дисертація на здобуття наукового ступеня кандидата технічних наук (доктора філософії) зі спеціальності 05.14.02 – Електричні станції, мережі і системи. – Національний технічний університет "Харківський політехнічний інститут", Харків, 2018. Дисертація присвячена розв'язанню актуальної науково-прикладної задачі у галузі релейного захисту елементів електроенергетичних систем, що полягає у підвищенні ефективності дії релейного захисту збірних шин розподільчих установок. У роботі вдосконалено метод диференційно-фазного захисту шин, згідно з яким алгоритм порівняння фаз струмів застосовано у якості єдиного засобу забезпечення абсолютно селективної дії захисту в аварійних режимах, та запроваджено групу неконфігурованих параметричних уставок захисту, що сприяє зниженню ймовірності його неселективної дії через допущені персоналом помилки, а також, за рахунок оптимізації умов пуску та спрацювання захисту, підвищується їх успішність за внутрішніх коротких замикань, що дозволяє відмовитись від застосування окремого високочутливого органу захисту. Для поліпшення експлуатаційних характеристик та усунення режимних обмежень застосування пристроїв релейного захисту шин вдосконалено метод компенсації кутових похибок насичених трансформаторів струму у диференційно-фазному захисті шин в частині забезпечення подовження логічних імпульсів напруги, сформованих із напівхвиль спотворених струмів. Обрано робочі уставки параметрів налаштування диференційно-фазного захисту шин, а саме кута блокування ±φбл=900 та рівня формування імпульсів ±ір=(40-50)%·Іамп, за яких забезпечуватиметься його надійна та селективна дія в аварійних режимах. Проведено математичне і імітаційне моделювання поведінки диференційно-фазного захисту шин та лабораторні досліди його макетного зразку, що дозволило підтвердити адекватність розробленої моделі захисту, ефективність її алгоритмів та правильність обраних робочих уставок. Виконано аналіз техніко-економічних показників застосування диференційно-фазного захисту шин, на підставі якого визначені його переваги у порівнянні з пристроями диференційного струмового захисту шин та оцінені показники економічної ефективності його впровадження та експлуатації.
Dissertation for a candidate degree (PhD) in Engineering Sciences of the speciality 05.14.02 – Electric power stations, networks and systems. – National technical university "Kharkiv polytechnic institute", Kharkiv, 2018. The dissertation is devoted to the solution of the actual scientific and practical problem in the field of relay protection of electric power systems elements, which is to increase the efficiency of relay busbar protection of switchgears. In this work, the method of phasedifferential busbar protection has been improved, according to which the currents phases comparison algorithm is applied as the sole means of providing absolutely selective protection in emergency conditions, and a group of non-configured parametric settings is introduced that reduces the probability of its non-selective operation through mistakes made by the personnel, as well as due to optimization start and trip conditions of protection operation, its performance increases at internal faults, which allows to refuse the application a high-sensitive protection relay. In order to improve the performance and eliminate the regime limitation of the use of relay protection devices, the method of compensating angular errors of saturated current transformers in the phase-differential busbar protection in the part of ensuring the extension of logic voltage impulses formed from half-waves of distorted currents is improved. The working parameters of the phase-differential busbar protection have been selected, namely the blocking angle is 900 and the impulse formation level is (40-50)%·Іamp, which will ensure its reliable and selective operation in emergency conditions. The mathematical and simulation modeling of the phasedifferential protection behavior and laboratory experiments of its model was carried out, which allowed to confirm the adequacy of the developed model of protection, the efficiency of its algorithms and the correctness of the selected working settings. There were completed analysis of technical and economic indicators of the phase-differential busbar protection using, on the basis of which were determined its advantages compared with the devices of differential busbar protection and approximate estimates of the economic efficiency of its implementation and operation.

Дисертація на здобуття наукового ступеня кандидата технічних наук (доктора філософії) зі спеціальності 05.14.02 – Електричні станції, мережі і системи. – Національний технічний університет "Харківський політехнічний інститут", Харків, 2018. Дисертація присвячена розв'язанню актуальної науково-прикладної задачі у галузі релейного захисту елементів електроенергетичних систем, що полягає у підвищенні ефективності дії релейного захисту збірних шин розподільчих установок. У роботі вдосконалено метод диференційно-фазного захисту шин, згідно з яким алгоритм порівняння фаз струмів застосовано у якості єдиного засобу забезпечення абсолютно селективної дії захисту в аварійних режимах, та запроваджено групу неконфігурованих параметричних уставок захисту, що сприяє зниженню ймовірності його неселективної дії через допущені персоналом помилки, а також, за рахунок оптимізації умов пуску та спрацювання захисту, підвищується їх успішність за внутрішніх коротких замикань, що дозволяє відмовитись від застосування окремого високочутливого органу захисту. Для поліпшення експлуатаційних характеристик та усунення режимних обмежень застосування пристроїв релейного захисту шин вдосконалено метод компенсації кутових похибок насичених трансформаторів струму у диференційно-фазному захисті шин в частині забезпечення подовження логічних імпульсів напруги, сформованих із напівхвиль спотворених струмів. Обрано робочі уставки параметрів налаштування диференційно-фазного захисту шин, а саме кута блокування ±φбл=900 та рівня формування імпульсів ±ір=(40-50)%·Іамп, за яких забезпечуватиметься його надійна та селективна дія в аварійних режимах. Проведено математичне і імітаційне моделювання поведінки диференційно-фазного захисту шин та лабораторні досліди його макетного зразку, що дозволило підтвердити адекватність розробленої моделі захисту, ефективність її алгоритмів та правильність обраних робочих уставок. Виконано аналіз техніко-економічних показників застосування диференційно-фазного захисту шин, на підставі якого визначені його переваги у порівнянні з пристроями диференційного струмового захисту шин та оцінені показники економічної ефективності його впровадження та експлуатації.
Dissertation for a candidate degree (PhD) in Engineering Sciences of the speciality 05.14.02 – Electric power stations, networks and systems. – National technical university "Kharkiv polytechnic institute", Kharkiv, 2018. The dissertation is devoted to the solution of the actual scientific and practical problem in the field of relay protection of electric power systems elements, which is to increase the efficiency of relay busbar protection of switchgears. In this work, the method of phasedifferential busbar protection has been improved, according to which the currents phases comparison algorithm is applied as the sole means of providing absolutely selective protection in emergency conditions, and a group of non-configured parametric settings is introduced that reduces the probability of its non-selective operation through mistakes made by the personnel, as well as due to optimization start and trip conditions of protection operation, its performance increases at internal faults, which allows to refuse the application a high-sensitive protection relay. In order to improve the performance and eliminate the regime limitation of the use of relay protection devices, the method of compensating angular errors of saturated current transformers in the phase-differential busbar protection in the part of ensuring the extension of logic voltage impulses formed from half-waves of distorted currents is improved. The working parameters of the phase-differential busbar protection have been selected, namely the blocking angle is 900 and the impulse formation level is (40-50)%·Іamp, which will ensure its reliable and selective operation in emergency conditions. The mathematical and simulation modeling of the phasedifferential protection behavior and laboratory experiments of its model was carried out, which allowed to confirm the adequacy of the developed model of protection, the efficiency of its algorithms and the correctness of the selected working settings. There were completed analysis of technical and economic indicators of the phase-differential busbar protection using, on the basis of which were determined its advantages compared with the devices of differential busbar protection and approximate estimates of the economic efficiency of its implementation and operation.

The aim of this master´s thesis is to analyze core losses of a small induction motor. Analyzed values are obtained from laboratory measurements, software analysis and 2D finite element method simulation. The theoretical part of this thesis consists of two parts. The analysis of the higher spatial harmonics presents in the induction motor and the analysis of core losses of the motor. Practical part consists of laboratory measurements according to ČSN. Measured values are used to calculate individual losses. The next part consists of creating a model for software analysis (Maxwell RMxprt). The generated model is converted into a 2D simulation environment (Maxwell 2D), where it is adapted to obtain values from the examined parts (rotor and stator teeth and rotor cage). Results of simulations at different loads are compared and analyzed from the point of view of higher harmonics.

With the increased demand for complex digital signal processing systems, real-time signal processing requires higher throughput systems. In the past, the throughput has been increased by increasing the clock rates, but synchronization can become increasingly more difficult. Recently there has been renewed interest in designing asynchronous digital systems. In an asynchronous system, there is no global clock, and all modules communicate through handshaking. In this thesis we demonstrate an implementation of an FIR filter using asynchronous digital circuit techniques. These asynchronous design techniques are used to test whether a practical signal processing filter can be implemented with asynchronous logic. A third-order four-bit filter is developed and simulated with SPICE, comparing favorably with other available technologies in speed and power consumption. Although in practice 8-16 bits are needed, this work is sufficient to demonstrate the feasibility of asynchronous circuits for filtering applications. A chip is laid out in 2 micron CMOS, and testing shows that it has a speed-power product comparable with asynchronous designs fabricated by others.
Graduation date: 1994

碩士
國立臺灣科技大學
電機工程系
95
This thesis investigates the integrations of RF front-end circuits of an ultrawidebsystem. Two applications, the time-domain reflectometry(TDR) and the ultrawideband impulse-radio-based communication system, are implemented in Chapters 3 and 4, respectively. Firstly, we discuss operation principle and circuits configuration of time domain reflectometry system level measuring system. The microwave sampler, a core building block in the receiving module, is briefly discussed as well. In Chapter 3, we investigate the integration of the RF module in a time domain reflectometry system. The experimental results at the receiving front-end are studied to improve the circuit performance. According to the experimental results using various lengths of transmission lines and loading conditions, we demonstrate that the resolution of the proposed TDR system can be as small as 1cm. In Chapter 4, we propse aprototype front-end circuit for impulse-ratio-based ultrawideband communication system. This system aims at hight speed short range application. By utilizing an external source excition, pulse generator and an ultrawideband antenna, the ultrawideband system is capable to of transmitting modulated bit strams. At the receiving front-end, the modulated bit strams are demodulated by the microwave sampler along with a low pass filter. The prototype RF front-end module demonstrates the transmission capability of impulse-radio-based ultrawideband system.

Electronic dispersion compensation (EDC) of intermodal dispersion on short multimode fiber (MMF) links operating at 40 Gb/s is investigated through system level simulations and the design of two analog integrated circuit (IC) equalizers. System simulations using worst-case MMF link models show the effectiveness of a 2-tap baud spaced finite impulse response (FIR) equalizer for 40-m links, and a second-order Tbaud/2 infinite impulse response (IIR) equalizer for 50-m links. An IIR filter topology suitable for IC implementation with double loops and multiple delay sections was developed. The 2-tap FIR and the IIR equalizer are implemented in UMC 0.13-um and STM 90-nm CMOS processes respectively. Measurements demonstrate the FIR and IIR equalizing 38-Gb/s and 30-Gb/s cable channels respectively. To the author's knowledge, the double-loop multi-delay IIR equalizer is the first integrated traveling-wave equalizer utilizing poles as a means of frequency boosting, contrasting the conventional FIR technique of utilizing zeros.

Protection of power system is an important aspect for the continued service of the electrical power system. Mostly the protection of electrical power depends on the performance of insulation systems under transient over voltage conditions arises due to lightening and switching applications. Transient over voltages in addition to the abrupt changes in the state of power systems, e.g. switching operations or faults are known as switching impulse voltages and that due to lightening are known as lightening impulse voltages. Very short pulse high-voltage or high-current surges can be produced by an electrical apparatus known as impulse generator. High impulse voltages are used to test the durability of electric power equipment against lightning and switching surges. The Marx Impulse generator is used to generate such high impulse voltages. A total of eight stages of both Standard as well as Improved Marx Impulse generator were designed and the impulse waves were recorded. These recorded impulse waves were compared with the standard impulse wave with front time of 1.2µ seconds and fall time of 50µ seconds. The energy and efficiency of all the stages were calculated and the percentage of error in the rise time and fall time was also found out. The simulation was done with the help of NI Multisim Software Package. A small practical prototype of second stage of Standard Marx Impulse Generator circuit was also designed for a voltage source of 12 V and its output impulse wave was compared with that of the standard impulse wave.

Standard impulse waveform have similar characteristics as that of lightning strike and can be used for testing the strength of electrical equipment. For producing high voltage pulses Marx generator is the most popular and is most widely used method. This thesis describes the creation of a simulation circuit to match the output of a Marx Impulse Generator. In this project eight stages of standard Marx Impulse Voltage Generator were simulated and resulted impulse waves were recorded. The objective was to calculate the stray capacitance using standard formulas and embed that capacitance into the simulation circuit to adequately deliver a yield like that of the impulse generator. A genuine multi-staged impulse generator was utilized as the base. Eight distinctive levels of impulse voltage were tried, and the output waveforms were recorded. The simulation circuit was then subjected to a few cycles, conforming the capacitance qualities to achieve a yield as close as could be expected under the circumstances to that of the real generator. Finishes of the examination demonstrate that a successful simulation circuit could be made to give a yield that is near, yet not precisely that of, the genuine generator. In the exploration, a few zones of error were distinguished in the simulation that were not introduce in the simulation circuit. The entire simulations have been examined in the NI Multisim software. The simulation circuit could be utilized to figure out the front time, tail time, and peak voltage.

碩士
國立清華大學
電機工程學系
102
Abstract Department：Electrical Engineering Title：A Timing Circuitry of UWB Impulse Radar Achieving 1.5ps Time Resolution over 100ns Advisor：Prof. Ta-shun Chu Graduate student：101061594 Li-Wei Jheng In today's wireless technology as we know, whether Bluetooth or Wi-Fi, and so on, the main subjects of the developing application are limited to the bandwidth, making many large capacity and high-quality information and files cannot be fast transferred. The ultra-wideband technology is the key to solve the current application of short-range transmission of information. Ultra-wideband technology has developed not short of time in the past, especially in the military field. Such as radar can be used to detect UFO or unknown object underground, such as mines, in order to protect the safety of personnel and so on. The advantage of ultra-wideband technology is small size, low power consumption, and low cost, so if imported ultra wideband technology into livelihood purposes is very suitable presumably, it will bring more convenience to people's lives. In this thesis, to make ultra-wideband impulse radar can have a better time resolution, we proposed and implemented a timing circuitry combines phase-locked loops and shift registers, making the ultra-wideband impulse radar can achieve 1.5ps time resolution over 100ns. It contains three phase-locked loops, one to ensure the synchronization of the transmitter and receiver radar signal, the other two are used to implement the timing circuitry. Timing circuitry is mainly constituted by shift registers, it divided into two parts, one part for the coarse-tune circuit, the other for the fine-tune circuit. We do it is to prevent to use too much shift registers which will led to the circuit does not work. Transmitter and receiver signal after the shift register will generate multiple signals of different phases, and finally we need to use the MUX select transmitter and receiver signal compared to calculate the distance from both ends. This Thesis is divided into five chapters, the first chapter is the motivation and Introduction, the second chapter is phase-locked loop architecture, and internal sub-circuit architectures and principles of operation, the third chapter is the timing circuitry structure and principle of operation that we have proposed, chapter IV is the simulation results, and we’ll make some discussions, and the fifth chapter is summary.

碩士
國立中山大學
電機工程學系研究所
100
In recent years, the requirement of application such as wireless sensor networks and short-range wireless controllers caused the growing of ZigBee technology. ZigBee is a communication technology developed specifically for short-range, low rate, low-cost wireless transmission.There are some characteristic such as short-range, low rate, low cost, and low power. The ZigBee Aliance group developed the specifications of software, and IEEE 802.15.4 group developed the specifications of hardware. IEEE 802.15.4a impulse radio UWB physical layer is one of the ZigBee physical layers. In our study, we designed a baseband signal processing algorithm meeting the specifications of IEEE 802.15.4a. The data processing flow in transmitter followed the specifications. In receiver, we designed baseband algorithms based-on the non-coherent energy detection scheme. Our algorithm including packet detection, synchronization and demodulation, and considering the implementation of algorithm, reducing the complexity of hardware as possible and improving the efficiency. Finally, the system performance is 3.9dB better than the receiver sensitivity.

Το αριθμητικό σύστημα υπολοίπων (RNS) έχει προταθεί ως ένας τρόπος για επιτάχυνση των αριθμητικών πράξεων του πολλαπλασιασμού και της πρόσθεσης. Ένα από τα σημαντικά πλεονεκτήματα της χρήσης του RNS είναι ότι οδηγεί σε κυκλώματα που έχουν το χαρακτηριστικό της χαμηλής κατανάλωσης. Πιο συγκεκριμένα στην παρούσα διατριβή γίνεται μια αναλυτική μελέτη πάνω στην ταχύτητα διεξαγωγής της πράξης του πολλαπλασιασμού και της άθροισης. Ο λόγος που γίνεται αυτό είναι διότι οι εφαρμογές επεξεργασίας σήματος χρησιμοποιούν ιδιαιτέρως τις προαναφερθείσες πράξεις. Επίσης γίνεται μελέτη της ισχύος που καταναλώνεται κατά την επεξεργασία ενός σήματος με τη χρήση των προτεινόμενων αριθμητικών κυκλωμάτων. Ιδιαίτερη έμφαση δίνεται στη χρήση απλών αρχιτεκτονικών τις οποίες μπορούν τα εργαλεία σύνθεσης να διαχειριστούν καλύτερα παράγοντας βέλτιστα κυκλώματα. Τέλος η διατριβή μελετά τα προβλήματα διακύμανσης των παραμέτρων του υλικού που αντιμετωπίζει η σύγχρονη τεχνολογία κατασκευής ολοκληρωμένων κυκλωμάτων. Συγκεκριμένα σε τεχνολογία μικρότερη των 90nm παρατηρείται το φαινόμενο ίδια στοιχεία κυκλώματος να συμπεριφέρονται με διαφορετικό τρόπο. Το φαινόμενο αυτό γίνεται σημαντικά πιο έντονο σε τεχνολογίες κάτω των 45nm. Η παρούσα διατριβή προτείνει λύσεις βασισμένες στην παραλληλία και την ανεξαρτησία των επεξεργαστικών πυρήνων που παρέχει το RNS, για να αντιμετωπίσει το συγκεκριμένο φαινόμενο.
The Residue Number System (RNS) has been proposed as a means to speed up the implementation of multiplication-addition intensive applications, commonly found in DSP. The main benefit of RNS is the inherent parallelism, which has been exploited to build efficient multiply-add structures, and more recently, to design low-power systems. In particular, this dissertation deals with the delay complexity of the multiply-add operation (MAC). The reason for this is that DSP applications are MAC intensive and hence this dissertation proposes solutions to increase the speed of processing. Furthermore, the study of the multiply-add operations is extended to power consumption matters. The dissertation focus on simple architectures such that EDA tools produce efficient in both power and delay, synthesized circuits. Finally the dissertation deals with variability matters that came up as the vlsi technology shrinks below 90nm. Variability becomes unaffordable especially for the 45nm technology node. This dissertation proposes solutions based on parallelism and the independence of the RNS cores to derive variation-tolerant architectures.

Η πληθώρα των εφαρμογών που μπορεί να εξυπηρετήσει η τεχνολογία Υπερευρείας Ζώνης (UWB), από τα ασύρματα προσωπικά δίκτυα υψηλών ταχυτήτων, μέχρι τα ασύρματα δίκτυα αισθητήρων με δυνατότητες ακριβούς εντοπισμού θέσης, και τα ασύρματα δίκτυα ιατρικών αισθητήρων, έχει προκαλέσει έντονο ερευνητικό ενδιαφέρον γύρω από τις υλοποιήσεις UWB συστημάτων. Η ασυνήθιστα μεγάλη περιοχή συχνοτήτων που έχει ανατεθεί στο UWB, από τα 3.1-10.6 GHz, επιτρέπει την επίτευξη υψηλών ταχυτήτων με απλά σχήματα διαμόρφωσης, ωστόσο, λόγω της διαμοίρασης του φάσματος με τις υφιστάμενες τεχνολογίες ασύρματης δικτύωσης, οι UWB εκπομπές πρέπει να περιορίζονται σε ισχύ κάτω από το κατώφλι των -41.3 dBm/MHz, ικανοποιώντας πολύ αυστηρές μάσκες εκπομπής που εισάγουν έντονες προκλήσεις στη σχεδίαση των πομπών. Η υλοποίηση αναδιατάξιμων UWB πομπών σε σύγχρονες CMOS τεχνολογίες, με υψηλή φασματική ευελιξία, ταχύτητα και ποιότητα διαμόρφωσης, καθώς και με χαμηλή κατανάλωση, αποτέλεσε το αντικείμενο της συγκεκριμένης διατριβής. Υιοθετώντας την αρχιτεκτονική Multi-Band Impulse-Radio (MB-IR) σε συνδυασμό με την τεχνική Direct Sequence BPSK, η έρευνα προσανατολίστηκε προς την ανάπτυξη καινοτόμων μονάδων βασικής ζώνης, με στόχο την ενεργειακά αποδοτική αντιστροφή Γκαουσιανών μορφοποιημένων παλμών υψηλής ποιότητας φάσματος και διάρκειας μικρότερης ακόμα και από 1 nsec. Προς αυτή την κατεύθυνση, αναπτύχθηκε μια καινοτόμα γεννήτρια Γκαουσιανών παλμών με πολύ χαμηλούς πλευρικούς λοβούς στο φάσμα, τυπικά κάτω από -40 dB, ώστε να υποστηρίζονται οι αυστηρότερες μάσκες εκπομπής ή και μελλοντικές. Η σχεδίασης της προτεινόμενης γεννήτριας είχε ως κριτήριο την ευέλικτη ρύθμιση της διάρκειας των παραγόμενων παλμών, και αξιοποίησε τη χαρακτηριστική μεταφοράς τάσης ενός ωμικά φορτωμένου, ασύμμετρου CMOS αντιστροφέα. Η γεννήτρια βασίζεται κυρίως σε ψηφιακά κυκλώματα πολύ χαμηλής τάσης και, σε σύγκριση με τις υφιστάμενες υλοποιήσεις, παρουσιάζει σημαντικό προβάδισμα στον τομέα της ταχύτητας, καθώς και στο πλάτος εξόδου, η μεγάλη τιμή του οποίου χαλαρώνει σημαντικά τη σχεδίαση του RF front end. Η γεννήτρια μελετήθηκε διεξοδικά, διεξήχθη ανάλυση κλιμάκωσης, έγινε εξαγωγή σχεδιαστικών εξισώσεων και αναπτύχθηκαν εργαλεία λογισμικού για την αυτοματοποιημένη σχεδίασή της. Για περαιτέρω αύξηση της ταχύτητας των παλμικών σημάτων εφαρμόσθηκε ειδική σχεδίαση, η οποία αντιπραγματεύεται την ταχύτητα με το επίπεδο των λοβών του φάσματος. Για την αποδοτική BSPK διαμόρφωση των Γκαουσιανών παλμών αναπτύχθηκε ειδική τοπολογία “Μεταγωγής Σήματος Πυροδότησης Πλήρους Ισορροπίας με Up-Conversion”. Η τοπολογία αυτή, σε αντίθεση με τις ανταγωνιστικές τοπολογίες, αποφεύγει την αντιστροφή του παλμού με αναλογικά κυκλώματα υψηλής κατανάλωσης, αλλά και την αναλογική μεταγωγή, καθώς η διαμόρφωση λαμβάνει χώρα πριν από την παραγωγή των παλμών. Παράλληλα, επιτυγχάνονται υψηλοί ρυθμοί, καθώς και υψηλή ποιότητα διαμόρφωσης λόγω των ισορροπημένων μονοπατιών της τοπολογίας. Η γεννήτρια μαζί με το διαμορφωτή αποτελούν τις καινοτόμες παρεμβάσεις στη μονάδα Βασικής Ζώνης του προτεινόμενου πομπού. Για την ολοκλήρωση της λειτουργικότητας του πομπού, αναπτύχθηκε ένα RF front end, το οποίο αποτελείται από έναν διπλά ισορροπημένο μίκτη, έναν LO buffer, ένα μετατροπέα διαφορικού σήματος σε απλό, και έναν ενισχυτή ισχύος, ο οποίος είναι προσαρμοσμένος στα 50 Ohms, χωρίς να απαιτεί κανένα εξωτερικό στοιχείο. Το RF front end ολοκληρώθηκε μαζί με τη μονάδα βασικής ζώνης, και ο ολοκληρωμένος πομπός κατασκευάστηκε σε τεχνολογία CMOS 130 nm. Το ολοκληρωμένο προσαρτήθηκε στην RF πλακέτα συστήματος με την τεχνική Chip on Board. Για την επιτυχία του συστήματος με την πρώτη προσπάθεια έγινε συσχεδίαση σε επίπεδο IC-Package-PCB, δίνοντας ιδιαίτερη έμφαση στα ζητήματα Signal/Power Integrity. Ο πομπός παρουσίασε την υψηλότερη ταχύτητα από τις ανταγωνιστικές MB-IR UWB υλοποιήσεις, ίση με 1.5 Gbps, με αντίστοιχη ενεργειακή αποδοτικότητα 21 pJoule/bit και μέτρο διανυσματικού σφάλματος 5.5%. Ο πομπός βελτίωσε τους πλευρικούς λοβούς στο φάσμα περισσότερο από 10 dB, ενώ η διατριβή, εκμεταλλευόμενη την αναδιαταξιμότητα του πομπού, παρουσιάζει, επιπλέον, τις πρώτες μετρήσεις σε ταχύτητες εκατοντάδων Mbps για ικανοποίηση της χαμηλής ζώνης της πρόσφατα θεσμοθετημένης, και εξαιρετικά αυστηρής, ευρωπαϊκής μάσκας εκπομπής.
The multitude of applications that Ultra-Wideband (UWB) technology can serve, from high-speed Wireless Personal Area Networks, to Wireless Sensor Networks with precision Geolocation abilities, and Wireless Medical Networks, has attracted intense research interest in the implementation of UWB systems. The unusually wide range of frequencies assigned to UWB, from 3.1-10.6 GHz, allows UWB systems employing low order modulation schemes to enjoy high throughput at low power consumption. However, since UWB shares the spectrum with existing wireless networking technologies, UWB emissions must be limited to a power spectral density below the threshold of -41.3 dBm/MHz, satisfying very stringent emission masks and introducing great challenges in the design of UWB transmitters. The subject of this thesis is the design of low power, fully integrated, reconfigurable CMOS UWB transmitters, with high spectral flexibility, high speed and high modulation quality. Adopting the Multi-Band Impulse-Radio architecture, in conjunction with the Direct Sequence BPSK modulation, the research focused on the development of a baseband unit, able to precisely invert Gaussian shaped, subnanosecond pulses. The key contributions of this thesis are a CMOS Gaussian Pulse Generator and a BSPK modulation topology, which jointly constitute the proposed baseband unit. The Pulse Generator (PG) is based on non-linear shaping, so as to facilitate the configurability of the output pulse duration, and exploits the voltage transfer characteristic of a Resistive Loaded Asymmetrical CMOS Inverter, which results in spectral sidelobes typically better than -40 dB. The PG incorporates mostly-digital low voltage circuits, while the MOSFET devices that undertake the pulse shaping avoid exclusive operation in weak inversion, in contrast to previous implementations. Consequently, the proposed CMOS PG is able to support higher throughput, as well as higher output amplitude, which relaxes considerably the design of the RF front end. This thesis presents a systematic design procedure and a scaling analysis of the non-linear pulse shaper. Moreover, in order to further increase the speed, a special PRF boost technique is proposed, which trades off speed and spectral efficiency for the spectral sidelobes level. Regarding the BPSK modulator, this work introduces the “Trigger Switching Fully Balanced Up-Conversion” topology, which avoids the use of power-hungry and distortion-prone analog circuits for the accurate inversion of the subnanosecond shaped pulses, as well as avoids the application of analog waveform switching to the baseband pulses, since the baseband modulation takes place before the generation of the pulses. The digital nature of the switching lends itself to high data rates, while the balanced paths of the topology ensure high modulation quality with minimal design effort. Wafer probing measurements confirmed the high performance of the baseband unit. The functionality of the transmitter was completed by the development of an RF front end which consists of a double balanced mixer, an LO buffer, a differential to single-ended (DtoSE) converter, and a power amplifier which is ready to drive a 50 Ohms load without requiring any off-chip components. The integrated transmitter, which incorporates the proposed baseband unit and the RF front end, was fabricated in 130 nm CMOS technology. The transmitter RFIC was directly attached to the system RF PCB using the Chip-on-Board packaging option. The First-Pass success of the system was ensured by paying particular attention to Signal/Power Integrity issues and following an IC-Package-PCB co-design procedure. The transmitter was measured up to 1.5 Gbps, which, to the author’s knowledge, was the highest speed amongst the competitive Multi-Band Impulse-Radio UWB implementations in the literature. The corresponding energy efficiency was 21 pJoule/bit and the Error Vector Magnitude (EVM) 5.5%, while the proposed transmitter improved the spectral sidelobes by over 10 dB. Exploiting the reconfigurability of the transmitter, this thesis presents the first measurements at multi-Mbps speeds that completely meet the final version of the European spectrum emission mask.