Teses / dissertações sobre o tema "High temperature semiconductors"
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Skelland, Neil David. "High temperature ion implantation into insulators". Thesis, University of Sussex, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.359076.
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Vanpeteghem, Carine B. "High-pressure high-temperature structural studies of binary semiconductors". Thesis, University of Edinburgh, 2000. http://hdl.handle.net/1842/11496.
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The last decade has seen a tremendous improvement in high-pressure diffraction techniques. Among other things, this has led to a completely new understanding of the structural systematics of the group IV, III-V and II-VI semiconductors. Many phases have been shown to have more complex, lower-symmetry, high-pressure structures than previously thought. One of the most surprising discoveries has been the non-existence of the diatomic b-tin structure, long believed to be one of the principal high-pressure phases of the III-V and II-VI systems. However, most of the work to date has been performed at room temperature and in fact, very little is yet known about the high-pressure phases of these systems above room temperature. The work presented in this thesis centres on the use of high temperature under pressure to investigate further the absence of the diatomic, site-ordered, b-tin or b-tin-like phases have been found but appear to be site-disordered. Additionally, the P-T phase diagrams of these systems are explored above room temperature. This work has required the development the existing high-pressure facilities on the SRS synchrotron source of Daresbury Laboratory to allow routine high-pressure high-temperature (hp/ht) experiments. These technical developments are described. High-temperature studies of GaSb under pressure reveal a new, previously unknown phase. A detailed study of the structural ordering in the hp/ht phases of GaSb is performed by combining two different experimental techniques. It is shown, by x-ray powder-diffraction, that all the hp and hp/ht phases of GaSb are site-disordered over about two unit cells or less. A complementary high-pressure EXAFS study demonstrates the absence of complete order over nearest-neighbour distances.
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Bloom, Scott Harris. "Superconducting and normal compounds : some high field/high pressure effects /". Thesis, Connect to Dissertations & Theses @ Tufts University, 1989.
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Thesis (Ph.D.)--Tufts University, 1989.Submitted to the Dept. of Physics. Includes bibliographical references (leaves 192-204). Access restricted to members of the Tufts University community. Also available via the World Wide Web;
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Nilsson, Joakim. "Wireless, Single Chip, High Temperature Monitoring of Power Semiconductors". Licentiate thesis, Luleå tekniska universitet, EISLAB, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-18113.
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Because failures in power electronics can cause production stops and unnecessary damage to interconnected equipment, monitoring schemes that are able to predict such failures provide various economic and safety benefits. The primary motivation for this thesis is that such monitoring schemes can increase the reliability of energy production plants. Power semiconductors are crucial components in power electronics, and monitoring their temperatures yields information that can be used to predict incipient failures.This thesis presents a system concept for wireless, single-chip, high-temperature monitoring of power semiconductors. A wireless single-chip solution is both cost effective and easy to integrate with existing power semiconductor modules. However, the concept presents two major challenges: the implementation of wireless power and communication, and the low-power design of the temperature sensors. Thus, the feasibility of using on-chip coils to provide communication with and obtain power from an external reader coil is assessed, and a low-power, high-temperature bandgap temperature sensor is developed. The sensor is capable of operating in the high-temperature range, allowing it to be useful for detecting incipient faults, particularly solder faults, at up to 230 °C. This is achieved by compensating for leakage currents that arise in hot reverse-biased p-n junctions, which become significant at these high temperatures.A single-chip, on-chip coil solution provides the combined advantages of galvanic isolation from the power device and simplicity of integration in existing modules. However, as the use of a wireless design with a small on-chip coil will limit the amount of available power, it incurs the disadvantage of requiring a low-power design for the sensor. Initial experiments have been performed on a prototype on-chip coil to assess the feasibility of this concept and provide insight into the challenges of on-chip coil design.In this thesis, focus is placed on the challenge of how to handle large leakage currents in low-power integrated silicon circuits. At high temperatures, these leakage currents can approach or even surpass the level of the circuit's quiescent current. Earlier work on leakage current compensation techniques is examined, compared to and combined with a compensation technique designed to compensate for collector-base leakage in the main bipolar pair of a Brokaw bandgap reference. Experiments show that fully analogue sensors operating at up to 228 °C with an accuracy of 10 °C that consume only 8.2 µW are feasible. If a higher accuracy, such as 3 °C, is required, then a temperature range of up to 200 °C can be achieved with a power consumption of 2.3 µW.It is likely that the high temperature range and low power consumption of the sensors presented in this thesis, in combination with on-chip coils, will make them suitable for use in solder fault prediction in power semiconductor modules.Godkänd; 2016; 20160304 (joanil); Nedanstående person kommer att hålla licentiatseminarium för avläggande av teknologie licentiatexamen. Namn: Joakim Nilsson Ämne: Industriell Elektronik/Industrial Electronics Uppsats: Wireless, Single Chip, High Temperature Monitoring of Power Semiconductors Examinator: Docent Jonny Johansson, Institutionen för system- och rymdteknik, Avdelning: EISLAB, Luleå tekniska universitet. Diskutant: Docent Johan Sidén, Avdelningen för Elektronikkonstruktion, Mittuniversitetet, Sundsvall. Tid: Tisdag 3 maj, 2016 kl 8.30 Plats: A1547, Luleå tekniska universitet
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Puchkov, Anton V. "The doping dependence of the optical properties of high-temperature superconductors /". *McMaster only, 1996.
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Jansson, Rasmus. "Completion of the software required for a high-temperature DLTS setup". Thesis, Uppsala universitet, Institutionen för teknikvetenskaper, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-205076.
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The main purpose of this thesis was to examine the communication problems with the DLTS set up in the Division for Electricity at Ångström Laboratory in Uppsala, Sweden, and to make the DLTS software complete. The set up consisted of a C/V meter, a pulse generator, a temperature controller and a PC with a control program written in LabVIEW. It was found that the software had been constructed to fit another set of instruments than the set up currently used at Ångström Laboratory. The task was therefore to properly integrate the correct control commands of those instruments into the software.DLTS investigation of wide bandgap materials
Diamond electronics
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Barclay, Joshua David. "High Temperature Water as an Etch and Clean for SiO2 and Si3N4". Thesis, University of North Texas, 2018. https://digital.library.unt.edu/ark:/67531/metadc1404614/.
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An environmentally friendly, and contamination free process for etching and cleaning semiconductors is critical to future of the IC industry. Under the right conditions, water has the ability to meet these requirements. Water becomes more reactive as a function of temperature in part because the number of hydronium and hydroxyl ions increase. As water approaches its boiling point, the concentration of these species increases over seven times their concentrations at room temperature. At 150 °C, when the liquid state is maintained, these concentrations increase 15 times over room temperature. Due to its enhanced reactivity, high temperature water (HTW) has been studied as an etch and clean of thermally grown SiO2, Si3N4, and low-k films. High temperature deuterium oxide (HT-D2O) behaves similarly to HTW; however, it dissociates an order of magnitude less than HTW resulting in an equivalent reduction in reactive species. This allowed for the effects of reactive specie concentration on etch rate to be studied, providing valuable insight into how HTW compares to other high temperature wet etching processes such as hot phosphoric acid (HPA). Characterization was conducted using Fourier transform infrared spectroscopy (FTIR) to determine chemical changes due to etching, spectroscopic ellipsometry to determine film thickness, profilometry to measure thickness change across the samples, scanning electron microscopy (SEM), contact angle to measure changes in wetting behavior, and UV-Vis spectroscopy to measure dissolved silica in post etch water. HTW has demonstrated the ability to effective etch both SiO2 and Si3N4, HT-D2O also showed similar etch rates of Si3N4 indicating that a threshold reactive specie concentration is needed to maximize etch rate at a given temperature and additional reactive species do not further increase the etch rate. Because HTW has no hazardous byproducts, high temperature water could become a more environmentally friendly etchant of SiO2 and Si3N4 thin films.
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Khan-Cheema, Umar Manzoor. "Vertical transport through an InAs/GaSb heterojunction at high pressures and magnetic fields". Thesis, University of Oxford, 1996. http://ora.ox.ac.uk/objects/uuid:fc7eef99-19d3-4d38-81c7-a84657282e8b.
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The conduction band of InAs lies lower in energy than the GaSb valence band. In order to preserve continuity of the Fermi level across the interface, charge transfer takes place resulting in a confined quasi two dimensional electron gas (2DEG) in the In As and a confined quasi two dimensional hole gas (2DHG) in the GaSb. This is the first detailed study into vertical transport in an n-InAs/p-GaSb single heterojunction (SHET). Application of a forward bias (InAs negative with respect to GaSb) increases the 2DEG and 2DHG concentrations and, therefore, their confinement energies. Eventually a critical bias is reached where the electron confinement energy moves above the hole confinement energy (the theoretical voltage induced semimetallsemiconductor transition Vc). Any subsequent increase in voltage is expected to result in a current decrease, and a region of negative differential resistance (NDR) should occur. The SHET can be grown with two distinct interface types, 'InSb-like' and 'GaAslike'. This study shows for the first time that the SHET vertical transport characteristic is very dependent upon this interface monolayer. For example, the temperature dependence of the I/V trace in a SHET with a 'GaAs-like' interface is found to be weak, with similar current peak to valley ratios (PVR) at 300 and 77K. The 'InSblike' SHET, however has a PVR that is very close to 1 at 300K, rising above 2 at 77K. Hydrostatic pressure is used to alter reversibly the InAs conduction/GaSb valence band overlap Δ. Vertical transport measurements taken at pressure confirm that Δ reduces at the same rate for both interface types and that it is larger for the 'InSb-like' interface. Experimental I/V traces at various pressures are compared with the corresponding results from self-consistent band profile calculations. The subsequent discoveries are that NDR occurs after Vc for both interfaces, and that each interface supports a different conduction mechanism - with the 'GaAs-like' interface exhibiting NDR when the band overlap is calculated to be ~ -100 meV. Magnetic fields have been applied both perpendicular and parallel to the SHET interface. The perpendicular field results provide additional evidence that the conduction process must be different at both interfaces and that NDR occurs after Vc. Parallel field I/V traces reveal an entirely different response for the two interface types.
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Colmenares, Juan. "Extreme Implementations of Wide-Bandgap Semiconductors in Power Electronics". Doctoral thesis, KTH, Elkraftteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-192626.
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Wide-bandgap (WBG) semiconductor materials such as silicon carbide (SiC) and gallium-nitride (GaN) allow higher voltage ratings, lower on-state voltage drops, higher switching frequencies, and higher maximum temperatures. All these advantages make them an attractive choice when high-power density and high-efficiency converters are targeted. Two different gate-driver designs for SiC power devices are presented. First, a dual-function gate-driver for a power module populated with SiC junction field-effect transistors that finds a trade-off between fast switching speeds and a low oscillative performance has been presented and experimentally verified. Second, a gate-driver for SiC metal-oxide semiconductor field-effect transistors with a short-circuit protection scheme that is able to protect the converter against short-circuit conditions without compromising the switching performance during normal operation is presented and experimentally validated. The benefits and issues of using parallel-connection as the design strategy for high-efficiency and high-power converters have been presented. In order to evaluate parallel connection, a 312 kVA three-phase SiC inverter with an efficiency of 99.3 % has been designed, built, and experimentally verified. If parallel connection is chosen as design direction, an undesired trade-off between reliability and efficiency is introduced. A reliability analysis has been performed, which has shown that the gate-source voltage stress determines the reliability of the entire system. Decreasing the positive gate-source voltage could increase the reliability without significantly affecting the efficiency. If high-temperature applications are considered, relatively little attention has been paid to passive components for harsh environments. This thesis also addresses high-temperature operation. The high-temperature performance of two different designs of inductors have been tested up to 600_C. Finally, a GaN power field-effect transistor was characterized down to cryogenic temperatures. An 85 % reduction of the on-state resistance was measured at −195_C. Finally, an experimental evaluation of a 1 kW singlephase inverter at low temperatures was performed. A 33 % reduction in losses compared to room temperature was achieved at rated power.QC 20160922
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Haskel, Daniel. "Local structural studies of oriented high temperature superconducting cuprates by polarized XAFS spectroscopy /". Thesis, Connect to this title online; UW restricted, 1998. http://hdl.handle.net/1773/9712.
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Thomas, Dylan Buxton. "Silicon-germanium devices and circuits for high temperature applications". Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/33949.
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Using bandgap engineering, silicon-germanium (SiGe) BiCMOS technology effectively combines III-V transistor performance with the cost and integration advantages associated with CMOS manufacturing. The suitability of SiGe technology for cryogenic and radiation-intense environments is well known, yet SiGe has been generally overlooked for applications involving extreme high temperature operation. This work is an investigation into the potential capabilities of SiGe technology for operation up to 300°C, including the development of packaging and testing procedures to enable the necessary measurements. At the device level, SiGe heterojunction bipolar transistors (HBTs), field-effect transistors (FETs), and resistors are verified to maintain acceptable functionality across the temperature range, laying the foundation for high temperature circuit design. This work also includes the characterization of existing bandgap references circuits, redesign for high temperature operation, validation, and further optimization recommendations. In addition, the performance of temperature sensor, operational amplifier, and output buffer circuits under extreme high temperature conditions is presented. To the author's knowledge, this work represents the first demonstration of functional circuits from a SiGe technology platform in ambient temperatures up to 300°C; furthermore, the optimized bandgap reference presented in this work is believed to show the best performance recorded across a 500°C range in a bulk-silicon technology platform.
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Бондаренко, И. Н., В. А. Николаенко e А. В. Полищук. "The cavity with the Tunnel Diodes and Corbino-Electrodes for Analyze Dielectrics and Semiconductors". Thesis, Sumy State University, 2019. http://openarchive.nure.ua/handle/document/10409.
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. Study of nano structures is importance as bind the nanotechnology and applying. Many methods and tools use here (EPA); (NMR); AFM, X-ray so on. The high frequency (HF) resonance method at low temperature is sensitive and exact method because high quality of resonance and neglecting both the device noise and losses in matter. The “gaga – nano” conception take a place here too. The using little tunnel diodes as the generator and the detector in cavity is ideal for that aim. In this project cavity bottom is system of coaxial insulated rings (Corbino geometry) which applied as the low frequency (LF) analyzer as well as the modulator of HF field. So, we proposed HF - LF mini- analyzer for study of matter, the composition of device is given.
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Yang, Chang, Max Kneiß, Friedrich-Leonhard Schein, Michael Lorenz e Marius Grundmann. "Room-temperature domain-epitaxy of copper iodide thin films for transparent CuI/ZnO heterojunctions with high rectification ratios larger than 109". Universitätsbibliothek Leipzig, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:15-qucosa-205875.
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CuI is a p-type transparent conductive semiconductor with unique optoelectronic properties, including wide band gap (3.1 eV), high hole mobility (>40 cm2 V−1 s−1 in bulk), and large room-temperature exciton binding energy (62 meV). The difficulty in epitaxy of CuI is the main obstacle for its application in advanced solid-state electronic devices. Herein, room-temperature heteroepitaxial growth of CuI on various substrates with well-defined in-plane epitaxial relations is realized by reactive sputtering technique. In such heteroepitaxial growth the formation of rotation domains is observed and hereby systematically investigated in accordance with existing theoretical study of domain-epitaxy. The controllable epitaxy of CuI thin films allows for the combination of p-type CuI with suitable n-type semiconductors with the purpose to fabricate epitaxial thin film heterojunctions. Such heterostructures have superior properties to structures without or with weakly ordered in-plane orientation. The obtained epitaxial thin film heterojunction of p-CuI(111)/n-ZnO(00.1) exhibits a high rectification up
to 2 × 109 (±2 V), a 100-fold improvement compared to diodes with disordered interfaces. Also a low saturation current density down to 5 × 10−9 Acm−2 is formed. These results prove the great potential of
epitaxial CuI as a promising p-type optoelectronic material.
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Fourreau, Yohan. "Study of the structural properties and defects in CdxHg1-xTe / Cd1-yZnyTe system and investigation of technological improvements for Infrared detection at high temperature". Electronic Thesis or Diss., Paris 6, 2016. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2016PA066761.pdf.
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La problématique de qualité des images des composants matriciels IR refroidis, à base de matériaux II-VI, fait partie des enjeux critiques pour SOFRADIR. Positionnées dans un contexte très concurrentiel, cette problématique est exacerbée à hautes températures (HOT). Elle concerne en particulier les filières CdHgTe, confrontées à des instabilités en bruit de certains pixels, dits "clignotants", difficilement corrigibles. Des études internes à SOFRADIR montrent un fort degré de corrélation entre ce bruit spécifique et la défectivité (densité de dislocations) de la couche d’absorption CdHgTe. L’amélioration des performances en bruit des imageurs IR à base de matériaux II-VI passe donc par l’amélioration de la défectivité de l’alliage CdHgTe. C’est l’objet de ces travaux de thèse. Plus spécifiquement, ces travaux ont eu pour principal objectif la réduction de la densité de dislocations des couches CdHgTe(111)B élaborées par Epitaxie en Phase Liquide (EPL) sur substrats CdZnTe, dits à "accord de maille". Précisément, ces études ciblent la réduction de la défectivité inhérente au désaccord paramétrique. Ces travaux montrent que la qualité cristalline des épitaxies CdHgTe se situe à l’état de l’art mondial lorsque les croissances s’effectuent à accord paramétrique. La dégradation de la qualité cristalline des croissances est corrélée avec l’augmentation du désaccord paramétrique, au demeurant très faible dans ce système (0,1% maximum). Plusieurs solutions ont été mises en œuvre dans ces travaux pour limiter la formation de dislocations dans l’épitaxie CdHgTe. Notamment, une méthode originale d’épitaxie du CdHgTe a été développée pour permettre la croissance de couches buffers épaisses entre le substrat et l’épitaxie. L’efficacité de cette méthode a été évaluée par des caractérisations physico-chimiques approfondies des couches buffers et des épitaxies HgCdTe EPL reprises sur ces mêmes buffers. Les performances électro-optiques de composants intégrant ces empilements ont également été évaluées. D’autres stratégies technologiques ont été étudiées afin d’améliorer la défectivité des alliages CdHgTe. L’étude de substrats quaternaires CdZnTeSe à paramètre de maille constant a ainsi été adressée. La qualité cristalline de ces substrats et des épitaxies CdHgTe réalisées est proche de l’état de l’art. Ces conclusions préliminaires ouvrent des perspectives de grand intérêt technologiqueQuality and stability issues of the images of the matrix components IR cooled with materials II-VI, in particular at high temperature with functioning is critical stakes for Sofradir in a very competitive context. In particular, CdHgTe FPAs are confronted with instabilities in noises of certain pixels, said "blinkers", dominated by a noise type RTS's low frequency (Random Telegraph Signal) difficult to correct. Works show that this specific noise is partially connected to the density of dislocations of the absorption layer, CdHgTe. The improvement of the performances in noise of imagers thus passes by the reduction of the density of dislocations of the alloy CdHgTe.More specifically, these works had for objectives the reduction of the density of dislocations stemming from the plastic relaxation of all or part of the constraints related to the lattice mismatch between the liquid-phase epitaxy (EPL) CdHgTe ( 111 ) B and its CdZnTe substrate.It is shown in these works that the crystalline quality of CdHgTe is situated in the world state of the art when the growths are made in lattice-match conditions (EPD from 9.103 to 5.104 cm-2). The degradation of the crystalline quality of epitaxy is then correlated to the increase of the lattice mismatch substrate-epitaxy, which remains very low (0,1 %). From then on, several solutions, partially stemming from the literature of the systems CdHgTe on If, GaAs or Ge, in strong lattice mismatch (> 13 %), were implemented in these works to limit the formation of misfit dislocations within the CdHgTe layer. In particular, A specific method based on CdHgTe epitaxy was developed to reduce lattice mismatch between the CdZnTe substrate and the CdHgTe epitaxy. The efficiency of this method is estimated since the structural characterization CdHgTe layers, up to the analysis of the electro-optical performances of FPA components.Finally, the problem of the lattice mismatch is approached on a wider frame, in particular via the study of other II-VI-based alloys allowing the realization of lattice-match substrates for CdHgTe. The crystalline quality of these substrates and the realized CdHgTe layers is close to the state of the art. These preliminary conclusions open perspectives of big interest
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Mallavarpu, Navin. "Large signal model development and high efficiency power amplifier design in cmos technology for millimeter-wave applications". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44711.
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This dissertation presents a novel large signal modeling approach which can be used to accurately model CMOS transistors used in millimeter-wave CMOS power amplifiers. The large signal model presented in this work is classified as an empirical compact device model which incorporates temperature-dependency and device periphery scaling. These added features allow for efficient design of multi-stage CMOS power amplifiers by virtue of the process-scalability. Prior to the presentation of the details of the model development, background is given regarding the 90nm CMOS process, device test structures, de-embedding methods and device measurements, all of which are necessary preliminary steps for any device modeling methodology. Following discussion of model development, the design of multi-stage 60GHz Class AB CMOS power amplifiers using the developed model is shown, providing further model validation. The body of research concludes with an investigation into designing a CMOS power amplifier operating at frequencies close to the millimeter-wave range with a potentially higher-efficiency class of power amplifier operation. Specifically, a 24GHz 130nm CMOS Inverse Class F power amplifier is simulated using a modified version of the device model, fabricated and compared with simulations. This further demonstrates the robustness of this device modeling method.
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Dorji, Chencho. "Etude des propriétés des isolants liquides pour l’encapsulation des substrats d’électronique de puissance". Electronic Thesis or Diss., Université Grenoble Alpes, 2024. http://www.theses.fr/2024GRALT022.
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Les modules de puissance basés sur un semi-conducteur à large bande interdite ont le potentiel de résister à des températures élevées (température de jonction >> 200°C) et à des tensions élevées (tension de blocage de 10 kV) contrairement aux modules de puissance à base de silicium. Cependant, le gel de silicone, le matériau d'encapsulation le plus couramment utilisé dans les modules d'alimentation, ne peut pas fonctionner au-dessus de 200°C. De plus, les pannes électriques et les décharges partielles entraînent des dommages permanents au module d'alimentation. Dans ce travail, nous proposons un diélectrique liquide comme agent d'encapsulation potentiel qui pourrait avoir de meilleures performances électriques et thermiques que le gel de silicone. Nous avons effectué la caractérisation diélectrique de plusieurs liquides potentiels et développé un modèle de simulation de champ pour étudier le champ électrique au point triple dans les modules de puissance. Des mesures de décharges partielles ont été effectuées sous courant alternatif et à montée rapide avec différents substrats électroniques de puissance intégrés dans des diélectriques liquides. Nous avons également étudié la possibilité de refroidir des dispositifs de puissance avec une amélioration du transfert de chaleur EHD et réalisé des expériences supplémentaires sur le vieillissement thermique des liquides. Les résultats ont indiqué que les liquides peuvent potentiellement être utilisés comme encapsulants dans les modules de puissancePower modules based on wide band gap semiconductor has the potential to withstand high temperature (junction temperature >>200°C) and high voltage (blocking voltage of 10kV) contary to silicone based power module. However, silicone gel, the most commonly used encapsulant material in power modules cannot operatrate above 200°C. Moreover, electrical breakdown and partial discharge events results in permanent damage of the power module. In this work, we propose liquid dielectric as a potential encapsulant that may have better electrical and thermal performance than silicone gel. We did dielectric characterization of several potential liquids and developed field simulation model to study the electric field at triple point in power modules. Partial discharge measurements were made under AC and fast rise with different power electronic substrates embedded in liquid dielectrics. We also investigated the possibility of cooling power devices with EHD heat transfer enhancement and performed some supplementary experiments on thermal againg of liquids. The results indicated that liquids have potential to be used as encapsulant in power modules
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Grummel, Brian. "HIGH TEMPERATURE PACKAGING FOR WIDE BANDGAP SEMICONDUCTOR DEVICES". Master's thesis, University of Central Florida, 2008. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3200.
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Currently, wide bandgap semiconductor devices feature increased efficiency, higher current handling capabilities, and higher reverse blocking voltages than silicon devices while recent fabrication advances have them drawing near to the marketplace. However these new semiconductors are in need of new packaging that will allow for their application in several important uses including hybrid electrical vehicles, new and existing energy sources, and increased efficiency in multiple new and existing technologies. Also, current power module designs for silicon devices are rife with problems that must be enhanced to improve reliability. This thesis introduces new packaging that is thermally resilient and has reduced mechanical stress from temperature rise that also provides increased circuit lifetime and greater reliability for continued use to 300°C which is within operation ratings of these new semiconductors. The new module is also without problematic wirebonds that lead to a majority of traditional module failures which also introduce parasitic inductance and increase thermal resistance. Resultantly, the module also features a severely reduced form factor in mass and volume.M.S.E.E.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
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Sordes, Delphine. "Imagerie, manipulation et contact électronique atome par atome sur la surface Si(100) : H avec le microscope à effet tunnel basse température à 4 pointes". Thesis, Toulouse 3, 2017. http://www.theses.fr/2017TOU30048/document.
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La construction de circuits électroniques de section atomique est l'un des grands défis de la nanoélectronique ultime. Pour construire un circuit électronique atomique, il faut d'abord mettre au point l'instrument de construction puis choisir la surface-support stabilisant ce circuit. Sur la surface d'Au(111) préparée en ultra vide, nous avons mis en œuvre et stabilisé le tout premier LT-UHV-4 STM. Ce microscope à 4 pointes STM balayant en même temps et indépendamment une même surface a été construit pour le CEMES par la société ScientaOmicron. Sur l'Au(111), nous avons reproduit tous les résultats expérimentaux obtenus sur les meilleurs LT-UHV-STM à une pointe comme la précision en rugosité de 2 pm, les caractéristiques I-V sans moyenne sur un seul atome pendant plusieurs dizaines de minutes et la manipulation atomique suivant les modes de tiré, glissé et poussé d'un seul atome d'or sur la surface. Une fois cette optimisation réalisée, nous avons appliqué notre LT-UHV-4 STM à la surface de Si(100):H, support probable des futurs circuits atomiques électroniques. Le choix de ce support est discuté en détail avant l'enregistrement et l'analyse des images STM. Les échantillons utilisés proviennent, soit du procédé semi-industriel pleine-plaque de silicium mis au point au CEA-LETI, soit de leur préparation in situ se déroulant directement dans la chambre de préparation du LT-UHV-4 STM. Nous avons pris soin de bien interpréter les images STM de la surface Si(100):H afin par exemple de déterminer la position de chaque atome d'hydrogène. La lithographie atomique par STM a été exploitée, par pointe, sur le LT-UHV-4 STM, en mode manipulation verticale atome-par-atome et mode balayage plus rapide mais rendant l'écriture atomique moins précise. Nous avons construit nos propres fils atomiques puis des plots de contact atomiques, petits carrés de Si(100)H dépassivés de quelques nm de côté. Les courants de fuite à 2 pointes et à l'échelle atomique ont ainsi pu être mesurés sur la surface de Si(100):H entre deux de ces plots. Pour préparer les contacts atomiques à au moins 2 pointes sur un fil atomique ou sur des plots de contact nanométrique, nous avons étudié en détail les différents types de contact pointe STM-liaison pendante unique montrant la difficulté d'atteindre un quantum de conductance au contact, de par un effet de courbure de bandes. Il est donc difficile sans une mesure de force complémentaire de déterminer en partant du contact tunnel les différentes étapes du contact mécanique, électronique au contact chimique. Nos résultats ouvrent la voie à la caractérisation des circuits électroniques construits atome par atome et à l'échelle atomique à la surface d'un semi-conducteurThe construction of electronic circuits of atomic section is one of the great challenges of the ultimate nanoelectronics. To build an atomic electronic circuit, it is necessary first to develop the dedicated instrument to build up and then to choose the support surface stabilizing this circuit. On the Au(111) surface prepared in ultra-vacuum, we implemented and stabilized the very first LT-UHV-4 STM. This STM 4-probes microscopes scanning at the same time and independently the same surface was built for the CEMES by the ScientaOmicron company. On Au(111), we reproduced all the experimental results obtained on the best LT-UHV-STM with one probe such as the precision in roughness of 2 pm, the IV characteristics recording without any average on a single atom for several tens of minutes and the atomic manipulation following the pulling, sliding and pushing modes of a single gold atom on the surface. Once this optimization was carried out, we applied our LT-UHV-4 STM to the surface of Si(100):H, probable support of the future electronic atomic circuits. The choice of this medium is discussed in detail before recording and analysis of the STM images. The samples used come either from the semi-industrial full-wafer silicon process developed at CEA-LETI or from their in-situ preparation, which takes place directly in the preparation chamber of the LT-UHV-4 STM. We have taken care to interpret the STM images of the surface Si(100):H in order to locate the position of each hydrogen atom. The atomic lithography by STM has been exploited, by using one tip from our LT-UHV-4 STM, by atom-per-atom vertical mode and faster scanning mode. The last makes atomic writing less accurate. We have constructed our own atomic wires and then atomic contact pads, small squares of Si(100)H defeated by a few nm sides. The leakage currents with 2 probes at the atomic scale have thus been able to be measured on the surface of Si(100):H between two of these pads. To prepare the atomic contacts at least 2 probes on an atomic wire or on nanometric contact pads, we studied in detail the different types of contact points STM-single dangling bond showing the difficulty of reaching a quantum of conductance at contact, due to a possible bands bending. It is therefore difficult without a complementary force measurement to determine, starting from the tunnel contact, the different steps of the mechanical, electronic contact at the chemical contact. Our results open the way to the characterization of electronic circuits constructed atom-by-atom and at atomic scale on the surface of a semiconductor
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Wang, Cai Johnson R. Wayne. "High temperature high power SiC devices packaging processes and materials development". Auburn, Ala., 2006. http://repo.lib.auburn.edu/2006%20Spring/doctoral/WANG_CAI_24.pdf.
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Tan, Wei Kiong. "High operating temperature of passively mode-locked InGaAsP/InP semiconductor lasers". Thesis, University of Glasgow, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.417710.
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Liu, Yi. "Light scattering study of semiconductor heterostructures and high temperature superconductor films /". The Ohio State University, 1991. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487688507505736.
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Marklund, Daniel. "Control of a high temperature DLTS setup". Thesis, Uppsala universitet, Institutionen för teknikvetenskaper, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-328710.
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This thesis deals with a DLTS-setup and how this can be controlled. The controlling program is constructed in LABVIEW, where a previous built program measuring transients at varying pulses been handled and tried to be implemented for this setup. Parts of the program was implemented successfully, other part needs more work. The heater in the setup has further been connected directly to the sample. This one has been tested to see that the setup can handle the heat and that the difference between the temperature at the sample and the setup did not differ too much. The result showed that the difference was not so big. Finally, DLTS tests was performed at samples of silicon carbide as well as on diamond, where transients could be measured up to 723 °C on the silicon carbide sample, while the tests of diamond only gave noise.
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Zhang, Zhiye. "Sintering of Micro-scale and Nanscale Silver Paste for Power Semiconductor Devices Attachment". Diss., Virginia Tech, 2005. http://hdl.handle.net/10919/28902.
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Die attachment is one of the most important processes in the packaging of power semiconductor devices. The current die-attach materials/techniques, including conductive adhesives and reflowed solders, can not meet the advance of power conversation application. Silver paste sintering has been widely used in microelectronics and been demonstrated the superior properties. The high processing temperature, however, prevents its application of interconnecting power semiconductor devices. This research focuses processing and characterization of micron-scale and nanoscale silver paste for power semiconductor devices attachment.
Lowering the processing temperature is the essential to implement sintering silver paste for power semiconductor devices attachment. Two low-temperature sintering techniques - pressure-assisted sintering micro-scale silver paste and sintering nanoscale silver paste without external pressure - were developed. With the large external pressure, the sintering temperature of micro-scale silver paste can be significantly lowered. The experimental results show that by using external pressure (>40MPa), the commercial micro-scale silver paste can be sintered to have eighty percent relative density at 240oC, which is compatible with the temperature of solder reflowing. The measured properties including electrical conductivity, thermal conductivity, interfacial thermal resistance, and the shear strength of sintered silver joints, are significantly better than those of the reflowed solder layer. Given only twenty percent of small pores in the submicron range, the reliability of the silver joints is also better than that of the solder joints under the thermal cycled environment. The large external pressure, however, makes this technique difficult to automatically implement and also has a potential to damage the brittle power semiconductor devices.
Reducing silver particles in the paste from micro-size to nanoscale can increases the sintering driving force and thus lowers the sintering temperature. Several approaches were developed to address sintering challenges of nanoscale silver particles, such as particles aggregation and/or agglomeration, and non-densification diffusion at low temperature. These approaches are : nanoscale silver slurry, instead of dry silver powder, is used to keep silver particles stable and prevent their aggregation. Ultrasonic vibration, instead of conventional ball milling, is applied to disperse nanoscale silver particles in the paste from to avoid from agglomerating. Selected organics in the paste are applied to delay the onset of mass-diffusion and prevent non-densification diffusion at low temperature. The measured results show that with heat-treatment at 300oC within one hour, the sintered nanoscale silver has significantly improved electrical and thermal properties than reflowed solders. The shear strength of sintered silver interconnection is compatible with that of solder.
The low-temperature sinterable nanoscale silver paste was applied to attach the bare Silicon carbide (SiC) schottky barrier diode (SBD) for high temperature application. Limited burn-out path for organics in the silver layer challenges the sintering die-attach. This difficulty was lessened by reducing organics ratio in the silver paste. The effects of die-size and heating rate on sintering die-attach were also investigated. The single chip packaging of SiC SBD was fabricated by sintering die-attach and wire-bonding. The tested results demonstrate that the sintering nanoscale silver paste can be applied as a viable die-attach solution for high-temperature application.Ph. D.
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Grummel, Brian. "Design and Characterization of High Temperature Packaging for Wide-Bandgap Semiconductor Devices". Doctoral diss., University of Central Florida, 2012. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/5231.
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Advances in wide-bandgap semiconductor devices have increased the allowable operating temperature of power electronic systems. High-temperature devices can benefit applications such as renewable energy, electric vehicles, and space-based power electronics that currently require bulky cooling systems for silicon power devices. Cooling systems can typically be reduced in size or removed by adopting wide-bandgap semiconductor devices, such as silicon carbide. However, to do this, semiconductor device packaging with high reliability at high temperatures is necessary. Transient liquid phase (TLP) die-attach has shown in literature to be a promising bonding technique for this packaging need. In this work TLP has been comprehensively investigated and characterized to assess its viability for high-temperature power electronics applications. The reliability and durability of TLP die-attach was extensively investigated utilizing electrical resistivity measurement as an indicator of material diffusion in gold-indium TLP samples. Criteria of ensuring diffusive stability were also developed. Samples were fabricated by material deposition on glass substrates with variant Au–In compositions but identical barrier layers. They were stressed with thermal cycling to simulate their operating conditions then characterized and compared. Excess indium content in the die-attach was shown to have poor reliability due to material diffusion through barrier layers while samples containing suitable indium content proved reliable throughout the thermal cycling process. This was confirmed by electrical resistivity measurement, EDS, FIB, and SEM characterization. Thermal and mechanical characterization of TLP die-attached samples was also performed to gain a newfound understanding of the relationship between TLP design parameters and die-attach properties. Samples with a SiC diode chip TLP bonded to a copper metalized silicon nitride substrate were made using several different values of fabrication parameters such as gold and indium thickness, Au–In ratio, and bonding pressure. The TLP bonds were then characterized for die-attach voiding, shear strength, and thermal impedance. It was found that TLP die-attach offers high average shear force strength of 22.0 kgf and a low average thermal impedance of 0.35 K/W from the device junction to the substrate. The influence of various fabrication parameters on the bond characteristics were also compared, providing information necessary for implementing TLP die-attach into power electronic modules for high-temperature applications. The outcome of the investigation on TLP bonding techniques was incorporated into a new power module design utilizing TLP bonding. A full half-bridge inverter power module for low-power space applications has been designed and analyzed with extensive finite element thermo-mechanical modeling. In summary, TLP die-attach has investigated to confirm its reliability and to understand how to design effective TLP bonds, this information has been used to design a new high-temperature power electronic module.Ph.D.
Doctorate
Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering
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DiMarino, Christina Marie. "High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors". Thesis, Virginia Tech, 2014. http://hdl.handle.net/10919/78116.
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This thesis provides insight into state-of-the-art 1.2 kV silicon carbide (SiC) power semiconductor transistors, including the MOSFET, BJT, SJT, and normally-on and normally-off JFETs. Both commercial and sample devices from the semiconductor industry's well-known manufacturers were evaluated in this study. These manufacturers include: Cree Inc., ROHM Semiconductor, General Electric, Fairchild Semiconductor, GeneSiC Semiconductor, Infineon Technologies, and SemiSouth Laboratories. To carry out this work, static characterization of each device was performed from 25 ºC to 200 ºC. Dynamic characterization was also conducted through double-pulse tests. Accordingly, this thesis describes the experimental setup used and the different measurements conducted, which comprise: threshold voltage, transconductance, current gain, specific on-resistance, parasitic capacitances, internal gate resistance, and the turn on and turn off switching times and energies. For the latter, the driving method used for each device is described in detail. Furthermore, for the devices that require on-state dc currents, driving losses are taken into consideration. While all of the SiC transistors characterized in this thesis demonstrated low specific on-resistances, the SiC BJT showed the lowest, with Fairchild's FSICBH057A120 SiC BJT having 3.6 mΩ•cm2 (using die area) at 25 ºC. However, the on-resistance of GE's SiC MOSFET proved to have the smallest temperature dependency, increasing by only 59 % from 25 ºC to 200 ºC. From the dynamic characterization, it was shown that Cree's C2M0080120D second generation SiC MOSFET achieved dv/dt rates of 57 V/ns. The SiC MOSFETs also featured low turn off switching energy losses, which were typically less than 70 µJ at 600 V bus voltage and 20 A load current.Master of Science
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Barlow, Mark Donald. "Metal-Semiconductor Contacts for Schottky Diode Fabrication". Youngstown State University / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ysu1198114671.
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Wang, Hongfang. "Investigation of Power Semiconductor Devices for High Frequency High Density Power Converters". Diss., Virginia Tech, 2007. http://hdl.handle.net/10919/27517.
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The next generation of power converters not only must meet the characteristics demanded by the load, but also has to meet some specific requirements like limited space and high ambient temperature etc. This needs the power converter to achieve high power density and high temperature operation. It is usually required that the active power devices operate at higher switching frequencies to shrink the passive components volume.
The power semiconductor devices for high frequency high density power converter applications have been investigated. Firstly, the methodology is developed to evaluate the power semiconductor devices for high power density applications. The power density figure of merit (PDFOM) for power MOSFET and IGBT are derived from the junction temperature rise, power loss and package points of view. The device matrices are generated for device comparison and selection to show how to use the PDFOM. A calculation example is given to validate the PDFOM. Several semiconductor material figures of merit are also proposed. The wide bandgap materials based power devices benefits for power density are explored compared to the silicon material power devices.
Secondly, the high temperature operation characteristics of power semiconductor devices have been presented that benefit the power density. The electrical characteristics and thermal stabilities are tested and analyzed, which include the avalanche breakdown voltage, leakage current variation with junction temperature rise. To study the thermal stability of power device, the closed loop thermal system and stability criteria are developed and analyzed. From the developed thermal stability criterion, the maximum switching frequency can be derived for the converter system design. The developed thermal system analysis approach can be extended to other Si devices or wide bandgap devices. To fully and safely utilize the power devices the junction temperature prediction approach is developed and implemented in the system test, which considers the parasitic components inside the power MOSFET module when the power MOSFET module switches at hundreds of kHz. Also the thermal stability for pulse power application characteristics is studied further to predict how the high junction temperature operation affects the power density improvement.
Thirdly, to develop high frequency high power devices for high power high density converter design, the basic approaches are paralleling low current rating power MOSFETs or series low voltage rating IGBTs to achieve high frequency high power output, because power MOSFETs and low voltage IGBTs can operate at high switching frequency and have better thermal handling capability. However the current sharing issues caused by transconductance, threshold voltage and miller capacitance mismatch during conduction and switching transient states may generate higher power losses, which need to be analyzed further. A current sharing control approach from the gate side is developed. The experimental results indicate that the power MOSFETs can be paralleled with proper gate driver design and accordingly the switching losses are reduced to some extent, which is very useful for the switching loss dominated high power density converter design.
The gate driving design is also important for the power MOSFET module with parallel dice inside thus increased input capacitance. This results in the higher gate driver power loss when the traditional resistive gate driver is implemented. Therefore the advanced self-power resonant gate driver is investigated and implemented. The low gate driver loss results in the development of the self-power unit that takes the power from the power bus. The overall volume of the gate driver can be minimized thus the power density is improved.
Next, power semiconductor device series-connection operation is often used in the high power density converter to meet the high voltage output such as high power density boost converter. The static and dynamic voltage balancing between series-connected IGBTs is achieved using a hybrid approach of an active clamp circuit and an active gate control. A Scalable Power Semiconductor Switch (SPSS) based on series-IGBTs is developed with built-in power supply and a single optical control terminal. An integrated package with a common baseplate is used to achieve a better thermal characteristic. These design features allow the SPSS unit to function as a single optically controlled three-terminal switching device for users. Experimental evaluation of the prototype SPSS shows it fully achieved the design objectives. The SPSS is a useful power switch concept for building high power density, high switching frequency and high voltage functions that are beyond the capability of individual power devices.
As conclusions, in this dissertation, the above-mentioned issues and approaches to develop high density power converter from power semiconductor devices standpoint are explored, particularly with regards to high frequency high temperature operation. To realize such power switches the related current sharing, voltage balance and gate driving techniques are developed. The power density potential improvements are investigated based on the real high density power converter design. The power semiconductor devices effects on power density are investigated from the power device figure of merit, high frequency high temperature operation and device parallel operation points of view.Ph. D.
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Neuenschwander, Jürg. "A high pressure low temperature study on rare earth compounds : semiconductor to metal transition /". [S.l.] : [s.n.], 1988. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=8668.
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PLACHA, KATARZYNA. "Modelling and Constructing Devices Including Innovative Joining of High Temperature Thermoelectric Modules". Doctoral thesis, Politecnico di Torino, 2019. http://hdl.handle.net/11583/2737678.
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Clavijo, William Paul. "Low-temperature Fabrication Process for Integrated High-Aspect Ratio Metal Oxide Nanostructure Semiconductor Gas Sensors". VCU Scholars Compass, 2017. http://scholarscompass.vcu.edu/etd/4781.
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This work presents a new low-temperature fabrication process of metal oxide nanostructures that allows high-aspect ratio zinc oxide (ZnO) and titanium dioxide (TiO2) nanowires and nanotubes to be readily integrated with microelectronic devices for sensor applications. This process relies on a new method of forming a close-packed array of self-assembled high-aspect-ratio nanopores in an anodized aluminum oxide (AAO) template in a thin (2.5 µm) aluminum film deposited on a silicon and lithium niobate substrate (LiNbO3). This technique is in sharp contrast to traditional free-standing thick film methods and the use of an integrated thin aluminum film greatly enhances the utility of such methods. We have demonstrated the method by integrating ZnO nanowires, TiO2 nanowires, and multiwall TiO2 nanotubes onto the metal gate of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and the delay line of a surface acoustic wave (SAW) device to form an integrated ChemFET (Chemical Field-Effect Transistor) and a orthogonal frequency coded (OFC) SAW gas sensor. The resulting metal oxide nanostructures of 1-1.7 µm in height and 40-100 nm in diameter offer an increase of up to 220X the surface area over a standard flat metal oxide film for sensing applications.
The metal oxide nanostructures were characterized by SEM, EDX, TEM and Hall measurements to verify stoichiometry, crystal structure and electrical properties. Additionally, the electrical response of ChemFETs and OFC SAW gas sensors with ZnO nanowires, TiO2 nanowires, and multiwall TiO2 nanotubes were measured using 5-200 ppm ammonia as a target gas at room temperature (24ºC) showing high sensitivity and reproducible testing results.
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Watanabe, Naoki. "Fundamental Study on Wide-Bandgap-Semiconductor MEMS and Photodetectors for Integrated Smart Sensors". 京都大学 (Kyoto University), 2013. http://hdl.handle.net/2433/174944.
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Shcherbakova, Olga V. "Development of MgB₂-xCx superconductors and understanding their electromagnetic behaviour". Institute for Superconducting and Electronic Materials - Faculty of Engineering, 2008. http://ro.uow.edu.au/theses/11.
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Discovered in 2001, magnesium diboride (MgB2) is the latest superconductor suitable for large scale applications (magnetic resonance imaging systems (MRI), fault current limiters (FCL), high-field magnets). Compared to other metallic superconductors like NbTi (Tc = 9 K) and Nb3Sn (Tc = 18 K), it has the advantage of a higher critical temperature (Tc = 39 K), which enables its application at the temperature of 20 K and, hence, significantly reduces the cost of the cooling system. This, together with the abundance of the magnesium and boron raw materials, as well as the relatively simple fabrication of MgB2 wires and tapes, has motivated the active investigation and study of this superconductor by many research groups all over the world. As a result, a significant breakthrough for application of MgB2 conductors at high fields has been made with introduction of carbon into the crystal lattice of MgB2 via chemical doping. The main focus of this work was on the study of the microstructural and superconducting properties of MgB2-xCx superconductors and establishing correlations between them. To obtain MgB2-x Cx compounds with different characteristics, various C-based doping materials and processing parameters were employed. The systematic study of the microstructural and superconducting properties of MgB2-x Cx samples conducted in this work allowed us: (i) to predict suitable dopants for MgB2; (ii) to improve chemical doping by carbon; (iii) to identify the relevant negative microstructural factors and estimate their effects on limitation of the current-carrying ability in MgB2-xCx samples. The results described in this work can be used as a guide for the achievement of the characteristics required for practical applications of MgB2 superconductors. Investigation of the properties of MgB2-xCx superconductors as a function of the processing parameters showed that the doping level, sintering temperature, and cooling time control the density of pinning centers in MgB2-xCx, and affect the connectivity of grains and transparency of grain boundaries to current flow. Analysis of the pinning mechanism in the samples studied has led to establishing that the dominant pinning is on grain boundaries in the pure MgB2 samples, and on grain boundaries and crystal lattice defects in the MgB2-xCx samples. To demonstrate the effect of the pinning environment on the current-carrying ability in MgB2-xCx superconductors, a comparative study of the microstructural and superconducting properties for pure, nano SiC-, and C-doped MgB2 wires was carried out. In both SiC- and C-doped samples carbon substitution into the MgB2 crystal lattice results in the enhancement of the upper critical field, Bc2. However, it was revealed that the presence of SiC dopant allowed carbon substitution and MgB2 formation to take place simultaneously at low temperatures. Therefore, the microstructure of this SiC-doped sample assures maximal density of pinning centers (large number of grain boundaries, i.e. small grain sizes, and crystal lattice defects) and enhances pinning. These factors (higher Bc2 value and stronger pinning) are responsible for the superior enhancement in critical current density at relatively high fields in the SiC-doped sample. In contrast, for C-doping, higher processing temperatures are required for generation of a dense network of crystal lattice defects. In this case, the microstructure consists of larger grains, and the pinning on smaller number of grain boundaries becomes weaker, reducing the total pinning force and critical current density. An important outcome of this study was the establishment of the dual reaction model (simultaneous formation of MgB2 compound and C substitution into the lattice), which enables us to predict desirable dopants for enhancing the properties of MgB2. These should be C-based compounds which decompose, producing highly reactive C at temperatures below the temperature of MgB2 formation. Ideally, dopants should be homogeneously distributed within host the Mg and B powders and not contaminate grain boundaries in formed MgB2. The liquid mixing approach, a new advanced and at the same time simplified approach to chemical doping of MgB2 superconductor with carbon, was found to partially fulfill these requirements. Carbohydrates (sugar and malic acid) and polycarbosilane (a polymer analog to nano SiC-doping) were employed as doping materials. Liquid mixing has been shown to coat each individual nano sized boron powder particle with a nano-layer of amorphous carbon. Fresh unpassivated carbon extracted from carbohydrates or polycarbosilane easily incorporates itself into the MgB2 crystal lattice. This enhanced incorporation promoted by the maximal reaction surface assured by coating generates microstructure with a dense network of pinning sites and results in significant improvement of the superconducting properties in MgB2-xCx material. The results observed suggest that sugar as a dopant exhibits a stronger potential for practical application of MgB2 superconductor in the high field region than nano carbon doping. Similarly, stronger enhancement of superconducting properties was observed in polycarbosilane-doped MgB2 compared to nano SiC doping. The latter was ascribed to the formation of a microstructure with Mg2Si impurity phases mainly distributed within superconducting MgB2 grains. In this case, transparency of grain boundaries was likely improved, which resulted in the observed enhancement of critical current density over the entire field range. Systematic analysis of the microstructures and superconducting properties of sugar-, malic acid-, and polycarbosilane-doped MgB2 samples demonstrated that the critical current density was also significantly affected by the microstructural properties in the low field region. The results observed led to the development of a model, which allowed us to estimate the level of critical current density (Jc) limitation due to the microstructural features of pure and C-doped MgB2 samples. This model is based on the identification of individual contributions by various defects to critical current density limitation. These defects in the MgB2 microstructure include porosity and non-superconducting phase inclusions (so-called “geometrical” defects), as well as the connectivity and transparency of grain boundaries. The results observed showed that a higher level of “geometrical” defects results in stronger limitation of critical current flow through the sample and lower measured Jc values. The elimination of the “geometrical” defects would result in critical current densities that are a factor of 1.5 - 2 higher than currently measured values. The role of grain boundaries connectivity was found to be even more dramatic. For samples with fully connected grains, the estimated critical current densities were about one order of magnitude higher than the measured values. Moreover, the results of analysis showed that the low field Jc values are mainly determined by the connectivity and transparency of grain boundaries, while in field Jc(Ba) performance is affected by these defects in the microstructure to a lesser extent, and its behaviour is mainly determined by the pinning environment in the samples. It also was observed that while a denser pinning network favors in field Jc(Ba) behaviour, this results in reduction of grain boundary transparency and more pronounced critical current density limitation in the low field region.
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JAYASEELAN, VIDHYA SAGAR. "STUDY OF POLYCRYSTALLINE DIAMOND THIN FILMS GROWN IN A CUSTOM BUILT ECR PE-CVD SYSTEM". University of Cincinnati / OhioLINK, 2000. http://rave.ohiolink.edu/etdc/view?acc_num=ucin975513169.
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Muslim, Joko. "Study of dielectric liquids as alternative encapsulant for high temperature electronics power modules applications". Thesis, Université Grenoble Alpes (ComUE), 2019. http://www.theses.fr/2019GREAT109.
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La recherche et le développement sur les matériaux semi-conducteurs ont permis de transformer la technologie des dispositifs électroniques de puissance, avec une densité de puissance, des performances thermiques et un dimensionnement plus compacts. Ils permettent aux appareils de fonctionner à des tensions, températures et fréquences de commutation plus élevées dans les modules de puissance. Pourtant, ces développements ne sont pas suivis de la même manière par d’autres éléments, tels que les encapsulants.Avec un matériau d'encapsulation récent, à savoir un gel de silicone, la température maximale de fonctionnement ne peut pas dépasser 200 ° C alors que les dispositifs à semi-conducteurs WBG sont très supérieurs (par exemple, du SiC à 500 ° C). Il s’agit là d’un obstacle majeur car il joue un rôle important dans la protection mécanique et électrique d’un module de puissance. Dans ce travail, nous proposons des liquides diélectriques comme agent d’encapsulation alternatif pouvant avoir une performance thermique supérieure au gel de silicone. Les caractérisations diélectriques de plusieurs candidats ont été effectuées dans le cadre d’une cellule d’essai spécialement conçue, capable de chauffer à haute température dans un environnement contenant de l’azote afin d’éviter les risques d’incendie et d’oxydation. Nous avons mesuré la conductivité de liquides soumis à une variation de température en appliquant une spectroscopie de champ alternatif dans une large plage de mobilité fréquentielle et ionique sous une variation de polarité inverse en courant continu. Nous étudions l'influence de la température et de la pression sur les pannes avec des champs quasi uniformes et divergents, ainsi que des décharges partielles, aussi bien dans les liquides que dans les substrats céramiques noyés dans des liquides, afin de démontrer leurs applications dans les modules de puissance. Des modèles numériques ont également été développés par simplification à partir des résultats de spectroscopie diélectrique afin d'estimer et d'observer la distribution de champ à un point triple critique.Enfin, nous présentons une comparaison de candidats liquides et de gel de silicone pour montrer leurs avantages et leurs inconvénients pour les applications d’électronique de puissance à haute température. Néanmoins, ces travaux ne couvrent pas tous les aspects fondamentaux et d’applications tels que le vieillissement thermique, la capacité de refroidissement des liquides, etc., ces résultats ont établi une bonne base pour les liquides diélectriques dans les applications à haute températureTodays, power electronics cover wide range of applications in our daily life, starting from household appliances, communications, transportation systems up to harsh and extreme environment as in oil and gas exploration and the deep space missions. The main deliveries of power electronics are energy efficiency, compact size, reliability, long durability. Improving power electronics will surely mean to deal with materials, the packaging system, switching technologies, heat dissipation, dielectric properties, thermal stability etc. It was since the first arc-mercury rectifying in traction system, and then reshaped by the discovery of classical semiconductor (Si based) and ultimately the wide bandgap semiconductor materials, such as SiC, GaN and carbon based (diamond). They have superior thermal and dielectric properties compared to previous classical semiconductor technologies (Ge, Si and GaAs), and allow devices to operate at higher voltage, temperature and switching frequency in power modules. Unfortunately, these developments are not equally followed by other parts within, such as encapsulant.Despite their key roles to provide mechanical and electrical protection inside a power module, silicone gel as major encapsulant is limited to 200°C, which is far below devices (e.g. SiC at 500°C). Encapsulant came from polymerization and curing process of silicone liquids mixture and transforms into gel. They worked very well when assembly with classical SC devices, but not with WBG SC. Thus, it is necessary to solve this thermal related issue by improving silicone gel or start looking for other type of encapsulant with better thermal performance such as dielectric liquid or gas.Dielectric liquids have been used as insulating medium for high voltage (HV) applications for decades. Their excellent self-healing and arc quenching properties were used in the HV circuit breaker applications even though nowadays replaced by gas. Their low viscosity allow the fluid flow to exchange heat from internal source yielding effective cooling system as in power transformers. Other industries use dielectric liquids as heat transfer liquid at much higher temperature range compare to those in HV applications. Of course as heat transfer liquids, their dielectric properties are out of considerations. Nevertheless, having this wide range of applications spectrum, dielectric liquids seem rather promising and potential as alternative encapsulant. Some questions then aroused such as how are their electrical properties at high temperature (HT) approx. 400°C, are their dielectric properties stable at HT and can they contribute to cooling of devices inside power module.This work presents the initial study of dielectric liquids for HT power electronics module applications. We demonstrated the electrical characterization of several dielectric liquids under influence of temperature such as dielectric spectroscopy and ion mobility measurement, partial discharge, streamers and breakdown. Interesting physical phenomena such as liquid motions due to EHD and natural thermal convection were observed during experiments. Comparison among liquids are showed to indicate the most convenient. In term of application, conditions were adapted and simplified to replicate as those in power module when we performed characterizations to actual ceramic substrates under quasi-uniform to highly divergent electric field with AC, DC and impulse voltage. Many fundamental behaviours of liquids have been confirmed and evidenced at HT range. Governing parameters for electrical properties such as breakdown, charge injection etc. were affirmed.While not all aspects of encapsulant requirement in term of HT are covered, this work has established essential basis for electrical properties of dielectric liquids. Further works are required to fully assess their compatibility as alternative encapsulant, such as thermal ageing process, cooling contribution, complete modelling, etc
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Little, Matthew Michael. "Feasibility of manipulating correlated color temperatures with a phosphor converted high-powered light emitting diode white light source". DigitalCommons@CalPoly, 2010. https://digitalcommons.calpoly.edu/theses/332.
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In this thesis we examine the feasibility of developing a white light source capable of producing colors between 2500 and 7500 Kelvin on the black-body radiator spectrum by simply adjusting amperage to a blue and ultraviolet (UV) light emitting diode (LED). The purpose of a lighting source of this nature is to better replicate daylight inside a building at a given time of day. This study analyzes the proposed light source using a 385 nm UV LED, a 457 nm blue LED, a 479 nm blue LED, a 562 nm peak cerium doped yttrium aluminum garnet (YAG:Ce) phosphor, and a 647 nm peak selenium doped zinc sulfide (ZnS:Se) phosphor.
Our approach to this study initially examined optical performance of yellow-emitting phosphor (YAG:Ce) positioned at specific distances above a blue LED using polydimethylsiloxane (PDMS) as a substrate. An understanding of how phosphor concentration within the PDMS, the thickness of the PDMS, and how substrate distance from the LED die affected light intensity and color values (determined quantitatively by utilizing the 1931 CIE 2° Standard Observer) enabled equations to be developed for various lens designs to efficiently produce white light using a 457 nm peak wavelength LED. The combination of two luminescent sources (457 nm LED and YAG:Ce) provided a linear trend on the 1931 CIE diagram which required a red illumination source to obtain Kelvin values from 2500 to 7500. Red-emitting phosphor (ZnS:Se), selected to compliment the system, was dispersed with YAG:Ce throughout PDMS where they were stimulated with a blue LED thereby enabling all desired Kelvin values with differing concentration lenses. Stimulating ZnS:Se with the addition of a UV LED did not provide the ability to change the color value of the set up to the degree required. Many other factors resulted in the decision to remove the UV LED contribution from the multi-Kelvin light source design. The final design incorporated a combination of ZnS:Se and YAG:Ce stimulated with a blue LED to obtain a 2500 Kelvin value. A separate blue LED provides the means to obtain 7500 Kelvin light and the other color values in between, with a linear approximation, by adjusting the amperages of both LEDs.
In addition to investigating the feasibility of obtaining the Kelvin values from 2500 to 7500, this thesis also examined the problem of ZnS:Se’s inability to cure in PDMS and a method to create a lens shape to provide equal color values at all points above a phosphor converted LED source. ZnS:Se was found to be curable in PDMS if first coated with a low viscosity silicon oil prior to dispersion within PDMS. The lens configuration consists of phosphors equally distributed in PDMS and cured in the shape of a Gaussian distribution unique to multiple factors in LED-based white light design.
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Labrune, Martin. "Silicon surface passivation and epitaxial growth on c-Si by low temperature plasma processes for high efficiency solar cells". Phd thesis, Palaiseau, Ecole polytechnique, 2011. https://pastel.hal.science/docs/00/61/16/52/PDF/thesis_Martin_LABRUNE.pdf.
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This thesis presents a work which has been devoted to the growth of silicon thin films on crystalline silicon for photovoltaic applications by means of RF PECVD. The primary goal of this work was to obtain an amorphous growth on any c-Si surface in order to provide an efficient passivation, as required in heterojunction solar cells. Indeed, we demonstrated that epitaxial or mixed phase growths, easy to obtain on (100) Si, would lead to poor surface passivation. We proved that growing a few nm thin a-Si1-xCx:H alloy film was an efficient, stable and reproducible way to hinder epitaxy while keeping an excellent surface passivation by the subsequent deposition of a-Si:H films. Process optimization mainly based on Spectroscopic Ellipsometry, Effective lifetime measurements (Sinton lifetime tester) and current-voltage characterization led us to demonstrate that it was possible to obtain a-Si:H/c-Si heterojunction solar cells with stable VOC of 710 mV and FF of 76 % on flat (n) c-Si wafers, with solar cells of 25 cm2 whose metallization was realized by screen-printing technology. This work has also demonstrated the viability of a completely dry process where the native oxide is removed by SiF4 plasma etching instead of the wet HF removal. Last but not least, the epitaxial growth of silicon thin films, undoped and n or p-type doped, on (100)-oriented surfaces has been studied by Spectroscopic Ellipsometry and Hall effect measurements. We have been able to fabricate homojunction solar cells with a p-type emitter as well as p-i-n structures with an undoped epitaxial absorber on a heavily-doped (p) c-Si wafersCette thèse est le résultat d'un travail dédié à la croissance par PECVD de couches minces de silicium sur des substrats de silicium cristallin pour des applications photovoltaïques. L'objectif premier était d'obtenir une croissance amorphe sur toutes les orientations cristallines possibles afin de passiver efficacement les surfaces de silicium, prérequis indispensable à l'obtention de cellules solaires à hétérojonction efficaces. Nous avons en effet montré qu'une croissance épitaxiale, ou microcristalline, très faciles à obtenir sur (100) conduisait à une piètre passivation. Nous avons aussi montré que faire croître une couche de quelques nanomètres seulement d'alliage a-Si1-xCx:H permettait d'éviter, de manière robuste et reproductible la croissance épitaxiale, tout en permettant d'obtenir des passivations excellentes en déposant ensuite des couches minces d'a-Si:H. Une optimisation principalement basée sur des mesures d'ellipsométrie spectroscopique, de durée de vie effective (Sinton) et de charactéristiques courant-tension, nous ont permis d'obtenir des cellules à hétérojonctions a-Si:H/c-Si de 25 cm2 avec des VCO et des FF stables de 710 mV et 76 % respectivement sur des substrats lisses de (n) c-Si, dont les contacts étaient réalisés par sérigraphie de pâtes d'aluminium à basse température. Ce travail a aussi permis d'apporter la preuve du concept de cellules entièrement réalisées par voie sèche, i. E. Dont l'oxyde natif est gravé par un plasma de SiF4 au lieu d'une trempe HF. Enfin, la croissance épitaxiale de couches de silicium, non-dopé et dopé n et p, sur des surfaces orientées (100) a été étudiée par ellipsométrie et mesures par effet Hall. Nous avons été en mesure de produire des cellules cristallines dont l'émetteur de type P était épitaxié ainsi que des cellules de type p-i-n dont l'absorbeur était constitué par une couche non-dopée épitaxiée de silicium, déposé sur un substrat (100) très dopé au bore
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Labrune, Martin. "Silicon surface passivation and epitaxial growth on c-Si by low temperature plasma processes for high efficiency solar cells". Phd thesis, Ecole Polytechnique X, 2011. http://pastel.archives-ouvertes.fr/pastel-00611652.
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This thesis presents a work which has been devoted to the growth of silicon thin films on crystalline silicon for photovoltaic applications by means of RF PECVD. The primary goal of this work was to obtain an amorphous growth on any c-Si surface in order to provide an efficient passivation, as required in heterojunction solar cells. Indeed, we demonstrated that epitaxial or mixed phase growths, easy to obtain on (100) Si, would lead to poor surface passivation. We proved that growing a few nm thin a-Si1-xCx:H alloy film was an efficient, stable and reproducible way to hinder epitaxy while keeping an excellent surface passivation by the subsequent deposition of a-Si:H films. Process optimization mainly based on Spectroscopic Ellipsometry, Effective lifetime measurements (Sinton lifetime tester) and current-voltage characterization led us to demonstrate that it was possible to obtain a-Si:H/c-Si heterojunction solar cells with stable VOC of 710 mV and FF of 76 % on flat (n) c-Si wafers, with solar cells of 25 cm2 whose metallization was realized by screen-printing technology. This work has also demonstrated the viability of a completely dry process where the native oxide is removed by SiF4 plasma etching instead of the wet HF removal. Last but not least, the epitaxial growth of silicon thin films, undoped and n or p-type doped, on (100)-oriented surfaces has been studied by Spectroscopic Ellipsometry and Hall effect measurements. We have been able to fabricate homojunction solar cells with a p-type emitter as well as p-i-n structures with an undoped epitaxial absorber on a heavily-doped (p) c-Si wafers.
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Allain, Laurent. "Etude des effets de la temperature sur la diffraction des rayons x par des composes semiconducteurs iii-v". Paris 6, 1988. http://www.theses.fr/1988PA066016.
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Determination par diffraction rx haute resolution des parametres cristallins de couches epitaxiques de gaalas ou gainas deposees sur les supports si, ge, ga, as, gap, inp et inas, en fonction de la temperature. Les coefficients de dilatation sont determines sur des materiaux relaxes et une extrapolation a d'autres systemes est possible. L'accord parametrique pour gaalas est realise a une temperature superieure a la temperature de depot et pour gainas, cet accord est realise a une temperature de depot dependant du taux de substitution ga/in
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Månsson, Martin. "Adatoms, Quasiparticles & Photons : The Multifaceted World of Photoelectron Spectroscopy". Doctoral thesis, KTH, Mikroelektronik och tillämpad fysik, MAP, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4659.
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The experimental work presented in this thesis is based on a wide assortment of very advanced and highly sophisticated photoelectron spectroscopy (PES) techniques. The objective of the present study has been to reveal and understand the electronic structure and electron dynamics in a broad spectrum of materials, ranging from wide band gap oxides, via semiconductors along with metals, and finally high-temperature superconductors. The first part of the thesis concerns laser-based pump-and-probe PES. This unique experimental technique has permitted a study of the excited electronic structure and the electron dynamics of several semiconductor surfaces. An insight into details of the adatom to restatom charge-transfer of the Ge(111)c(2x8) surface is presented, as well as an estimate for the timescale in which the dynamic adatoms of the Ge(111):Sn(sqrt3xsqrt3)R30deg surface operate. Further results comprise a novel unoccupied surface state at the GaSb(001) surface as well as a time-resolved study of the charge accumulation layer at the InAs(111)A/B surfaces. In the second part, high-resolution synchrotron based angle-resolved PES (ARPES) data from the cuprate high-temperature superconductor La(2-x)Sr(x)CuO(4) (LSCO) is presented. This extensive study, reveals detailed information about how the Fermi surface and electronic excitations evolve with doping in the superconducting state. The results comprise support for a connection between high- and low-energy electronic responses, the characteristics of the superconducting gap, and indication of a quantum phase transition between two different superconducting phases. In the third group of experiments we move away from the two-dimensional systems and concentrate on fully three-dimensional compounds. By the use of soft x-ray ARPES it is possible to extract the three-dimensional electronic structure in a straightforward manner with increased k(perpendicular)-resolution. As a result the first high-quality ARPES data from Cu2O is presented, as well as a novel method for extracting the (real space) electron density by ARPES. These experiments clearly display the advantages of using soft x-ray ARPES. If the material and type of experiment is chosen wisely, the benefit of the increased k||-window and the free electron final state, surpass the drawbacks of decreased count-rate and inferior energy resolution. Finally we return to the high-temperature superconductors (NCCO & Nd-LSCO) and make use of the increased bulk-sensitivity. From an evident change in the shape of the Fermi surface when moving from low to high photon energies, the durface to bulk difference in electronic structure is highlighted.QC 20100810
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Ferreyra, Romualdo A. "Electron – phonon interaction in multiple channel GaN based HFETs: Heat management optimization". VCU Scholars Compass, 2014. http://scholarscompass.vcu.edu/etd/3636.
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New power applications for managing increasingly higher power levels require that more heat be removed from the power transistor channel. Conventional treatments for heat dissipation do not take into account the conversion of excess electron energy into longitudinal optical (LO) phonons, whose associated heat is stored in the channel unless such LO phonons decay into longitudinal acoustic (LA) phonons via a Ridley path. A two dimensional electron gas (2DEG) density of ~5×1012cm-2 in the channel results in a strong plasmon–LO phonon coupling (resonance) and a minimum LO phonon lifetime is experimentally observed, implying fast heat removal from the channel. Therefore, it is desirable to shift the resonance condition to higher 2DEG densities, and thereby higher power levels. The more convenient way to attain the latter is by widening the 2DEG density profile via heterostructure engineering, i.e. by using multiple channel heterostructures. A single channel heterostructure (GaN/AlN/AlGaN), a basic heterostructure used to obtain a 2DEG, exhibits a resonance condition at low 2DEG densities (~0.65×1012 cm-2). Successful widening of the 2DEG density xv profile was predicted by simulation results for two types of multiple (Al)GaN channel heterostructures, i.e. coupled channel GaN/AlN/GaN/AlN/AlGaN and dual channel GaN/AlGaN/AlN/AlGaN. Because of a reduction of carrier confinement, it is experimentally observed that control of the channel is moderate in the case of dual channel heterostructures. On the other hand, carrier confinement provides a better control of the channel in coupled channel heterostructures. Furthermore, unlike in a dual channel heterostructure, alloy scattering does not affect carrier transport properties, which results in a higher cut-off frequency. It was found experimentally that the coupled channel heterostructure successfully reaches resonance condition at a 2DEG density that is 23% higher than in a single channel heterostructure. Multiple channel heterostructures therefore provide a convenient way to shift the plasmon-LO phonon resonance to higher 2DEG densities. However, in our grown heterostructures, high power levels under optimal channel working conditions and minimum heat accumulation, all desirable benefits for the development of high power transistors, were only observed in coupled channel heterostructures.
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Wilcox, Edward. "Silicon-germanium devices and circuits for cryogenic and high-radiation space environments". Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/33850.
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This work represents several years' research into the field of radiation hardening by design. The unique characteristics of a SiGe HBT, described in Chapter 1, make it ideally suitable for use in extreme environment applications.
Chapter 2 describes the total ionizing dose effects experienced by a SiGe HBT, particularly those experienced on an Earth-orbital or lunar-surface mission. In addition, the effects of total dose are evaluated on passive devices.
As opposed to the TID-hardness of SiGe transistors, a clear vulnerability to single-event effects does exist. This field is divided into three chapters. First, the very nature of single-event transients present in SiGe HBTs is explored in Chapter 3 using a heavy-ion microbeam with both bulk and SOI platforms [31]. Then, in Chapter 4, a new device-level SEU-hardening technique is presented along with circuit-design techniques necessarily for its implementation. In Chapter 5, the circuit-level radiation-hardening techniques necessarily to mitigate the effects shown in Chapter 3 are developed and tested [32].
Finally, in Chapter 6, the performance of the SiGe HBT in a cryogenic testing environment is characterized to understand how the widely-varying temperatures of outer space may affect device performance.
Ultimately, the built-in performance, TID-tolerance, and now-developing SEU-hardness of the SiGe HBT make a compelling case for extreme environment electronics. The low-cost, high-yield, and maturity of Si manufacturing combine with modern bandgap engineering and modern CMOS to produce a high-quality, high-performance BiCMOS platform suitable for space-borne systems.
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Berthou, Maxime. "Implementation of high voltage Silicon Carbide rectifiers and switches". Phd thesis, INSA de Lyon, 2012. http://tel.archives-ouvertes.fr/tel-00770661.
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In this document, we present ou study about the conception and realization of VMOS and Schottky and JBS Diodes on Silicon Carbide. This work allowed us optimize and fabricate diodes using Tungsten as Schottky barrier on both Schottky and JBS diodes of different blocking capability between 1.2kV and 9kV. Moreover, our study of the VMOS, by considering the overall fabrication process, has permitted to identify the totality of the problems we are facing. Thusly we could ameliorate the devices and try new designs as the VIEMOS or the monolithic integration of temperature and current sensors.
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Newby, Pascal. "Fabrication de semiconducteurs poreux pour améliorer l'isolation thermique des MEMS". Thesis, Lyon, INSA, 2013. http://www.theses.fr/2013ISAL0154/document.
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L'isolation thermique est essentielle dans de nombreux types de MEMS (micro-systèmes électro-mécaniques). Selon le type de dispositif, l'isolation permet de réduire la consommation d'énergie, diminuer le temps de réponse, ou augmenter sa sensibilité. Les matériaux d'isolation thermique actuellement disponibles sont difficiles à intégrer en couche épaisse dans des dispositifs en silicium. À cause de cela, l'approche la plus utilisée pour l'isolation est d'intégrer les zones à isoler sur des membranes minces (~ 1 µm). Cela assure une bonne isolation, mais est restrictif pour la conception du dispositif et la fragilité des membranes complique la fabrication et l'utilisation de celui-ci. Le silicium poreux est facile à intégrer puisqu'il est fabriqué par gravure électrochimique de substrats de Si cristallin. On peut aisément fabriquer des couches épaisses (100 µm) et sa conductivité thermique est 2-3 ordres de grandeur plus faible que celle du Si massif. Par contre sa porosité cause des problèmes : mauvaise résistance chimique, structure instable au-delà de 400°C, et tenue mécanique réduite. La facilité d'intégration des semiconducteurs poreux est un atout majeur, et nous visons donc de réduire les désavantages de ces matériaux afin de favoriser leur intégration dans des dispositifs en silicium. La première approche qui a été développée consiste à amorphiser le Si poreux en l'irradiant avec des ions à haute énergie (uranium, 110 MeV). Nous avons montré que l'amorphisation, même partielle, du Si poreux entraîne une diminution de sa conductivité thermique, sans endommager sa structure poreuse. On peut atteindre ainsi une réduction de conductivité thermique jusqu’à un facteur de trois. La seconde approche est de développer un nouveau matériau. Le SiC poreux a été choisi, puisque le SiC massif a des propriétés physiques exceptionnelles et supérieures à celles du silicium. Nous avons mené une étude systématique de la porosification du SiC en fonction de la concentration en HF et le courant, ce qui nous a permis de fabriquer des couches poreuses uniformes d’une épaisseur d’environ 100 µm. Nous avons implémenté un banc de mesure de la conductivité thermique par la méthode « 3 oméga » et l'avons utilisé pour mesurer la conductivité thermique du SiC poreux. Nos résultats montrent que la conductivité thermique du SiC poreux est environ deux ordres de grandeur plus faible que celle du SiC massif. Nous avons aussi montré que le SiC poreux est résistant à tous les produits chimiques typiquement utilisés en microfabrication et est stable jusqu'à au moins 1000°CThermal insulation is essential in several types of MEMS (Micro electro mechanical systems). Depending on the device, insulation can reduce the device’s power consumption, decrease its response time, or increase its sensitivity. Existing thermal insulation materials are difficult to integrate as thick layers in silicon-based devices. Because of this, the most commonly used approach is to integrate the areas requiring insulation on thin membranes. This provides effective insulation, but restricts the design of the device and the membrane’s fragility makes the device’s fabrication and use more complicated. Poreux silicon is easy to integrate as it is made by electrochemical etching of crystalline silicon substrates. 100 µm thick layers can easily be fabricated and its thermal conductivity is 2-3 orders of magnitude lower than that of bulk silicon. However, its porosity causes other problems : low chemical resistance, its structure is unstable above 400°C, and reduced mechanical stability. The ease of integration of porous semiconductors remains a major advantage, so we aim to reduce the disadvantages of these materials in order to help their integration in microfabricated devices. The first approach we developed was to amorphise porous Si by irradiating it with heavy ions. We have shown that amorphisation of porous Si, even partial, causes a reduction of its thermal conductivity without damaging its porous structure. In this way a reduction in thermal conductivity by up to a factor of three can be achieved. The second approach was to develop a new material. Porous SiC was chosen, as bulk SiC has exceptional physical properties which are superior to those of silicon. We carried out a systematic study of the porosification process of SiC versus HF concentration and current, which enabled us to make thick (100 µm) and uniform layers. We have implemented a system for measuring thermal conductivity using the “3 omega” technique and used it to measure the thermal conductivity of porous SiC. Our results show that the thermal conductivity of porous SiC is about two orders of magnitude lower than that of bulk SiC. We have also shown that porous SiC is resistant to all chemical commonly used in microfabrication, and is stable up to at least 1000°C
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Valloggia, Sylvie. "SPECTROSCOPIE DE PHOTOLUMINESCENCE LOCALE DANS LES SEMICONDUCTEURS MASSIFS (Si, InP) ET LES PUITS QUANTIQUES (GaAs/GaAlAs)". Grenoble 2 : ANRT, 1988. http://catalogue.bnf.fr/ark:/12148/cb37619041b.
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Hascoët, Stanislas. "Mise en oeuvre de nouveaux matériaux d’assemblage dans les modules multipuces de puissance (MCM)". Thesis, Lyon, INSA, 2013. http://www.theses.fr/2013ISAL0123/document.
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L’introduction des composants grand gap dans le domaine de l’électronique de puissance requiert une optimisation de son environnement (packaging). En effet, les températures auxquelles peuvent être utilisés ce type de composants sont bien souvent plus grandes que celles supportables par le reste du module. De nouvelles techniques d’assemblage sont à l’étude et notamment certaines à base de frittage d’argent. Ces procédés présentent l’avantage de réaliser l’assemblage à une température modérée (similaire à celle d’une brasure), mais toutefois inférieure à celle de fusion de l’argent. La température de fusion du joint d’attache reste celle du matériau massif (plus de 900°C pour l’argent). Cette technique permet donc de réaliser des attaches pouvant fonctionner à très haute température. Ce travail de thèse a porté sur la mise en oeuvre d’une attache de puce par frittage d’argent. Après une étude des paramètres du procédé permettant d’obtenir la meilleure tenue mécanique (cisaillement), nous avons mis en évidence l’effet prépondérant de la finition des pièces à joindre. Lorsque la finition du substrat est de l’argent, aucun problème d’interface n’est observé et les assemblages sont fiables à t0 et en vieillissement. Généralement, la finition standard pour l’électronique de puissance est constituée d’une couche de nickel et d’or. Pour cette finition, le mécanisme semble différent selon l’épaisseur d’or présente sur le substrat ainsi que l’atmosphère utilisée pour le traitement thermique ou encore la charge appliquée. Globalement, plus l’épaisseur d’or est importante, moindre est l’accroche. Ce comportement semble fortement lié à la diffusion extrêmement rapide de l’argent en surface de l’or (et dans l’or). Cette diffusion a pour conséquence la formation d’une couche de solution solide or-argent. Cette couche a pour source de matière les grains d’argent qui permettent l’adhérence du joint d’argent fritté sur le substrat. Lorsque le volume d’or disponible pour la formation de cette couche est grand, la croissance de celle-ci est favorisée (en termes de surface et d’épaisseur). Cette croissance engendre une consommation des « piliers » d’argent et donc un affaiblissement de l’attache. L’application de pression semble augmenter fortement la concentration de piliers et améliore les résultats, tandis que sous azote, la diffusion de l’argent en surface de l’or semble inhibée, permettant l’obtention de bons résultats (à t0 et après cyclage). Ces résultats ont été mis en pratique pour la réalisation de plusieurs prototypes, dont l’un a été testé électriquement et ce de façon fonctionnelle à plus de 300°CUse of wide band gap chip in the power electronic industry requires an optimization of the close environment (packaging). Indeed, the can often sustain lower temperature than the die, especially the solder that are used to bond the parts of the module. Consequently, new bonding methods are investigated to enhance the performance of the packages. Silver sintering bonding technique is one the most promising. This method allow to bond parts at moderate temperature and the formed joint to operate at very high temperature (until the melting point of silver). This work is focused on the development of this bonding technique in the case of bonding a dies on a substrate. A study of the influence of the different parameters on the strength of the formed bond has been done. It revealed a major influence of the finishes of the bonded parts. Bonding on silver finished substrate results in good mechanical strength of the bond even after ageing. Furthermore, no interface issues are observed. However, the most used finish for power electronic is not silver but nickel-gold. Regarding this type of finish, the bond quality depends on the gold thickness, sintering profile and also sintering atmosphere. A solid solution of silver and gold seems to develop on the surface of the substrate, decreasing the section of the silver grains in contact with the substrate. Thus the mechanical strength of the assembly is decreased. This effect should be limited by the gold available for the Au-Ag solid solution growth. When sintering under nitrogen, the diffusion of silver on the gold surface is much lower than under air. Good results have been obtained with these configurations and even after ageing. Adding pressure during the thermal treatment seems also to minimize the phenomenon, probably by increasing the number of silver grains in contact with the substrate surface and so reducing the free surface for Au-Ag layer formation. Those results have been used to build prototypes, one of whom has been electrically tested with success at temperatures up to 300°C
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Bouschet, Maxime. "Détecteur quantique à superréseaux 'Ga-free' fonctionnant à haute température dans la totalité de la gamme spectrale du moyen infrarouge". Electronic Thesis or Diss., Université de Montpellier (2022-....), 2023. http://www.theses.fr/2023UMONS006.
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Une augmentation de la température de fonctionnement des matrices de détecteurs infrarouges (IR-FPA) refroidis haute performance conduirait à une réduction de la taille, du poids et de la consommation énergétique de la machine à froid ce qui permettrait d'accéder à de nouvelles applications où les besoins des caméras IR en termes de portabilité, de compacité et d'autonomie énergétique sont essentielles. Actuellement, les technologies de photodétecteurs fonctionnant à haute température (T = 150K), en particulier le détecteur InAsSb, ne couvrent qu'une partie du domaine spectral du moyen infrarouge (MWIR), pour des longueurs d'ondes en deçà de 4,2 μm. Etendre la longueur d'onde de coupure à la totalité du domaine MWIR, jusqu'à 5 μm pour une température de fonctionnement au moins égale à 150K, sans dégradation de performance, présenterait des avantages radiométriques indéniables. En associant les avantages des superréseaux (SR) de matériaux semiconducteurs, en particulier en ce qui concerne la flexibilité en longueur d'onde de coupure de ces nanostructures périodiques, avec ceux des nouvelles architectures de structures à barrière, appelées XBn, la thèse a pour objectif de fabriquer et d'étudier les premiers photodétecteurs 'Ga-free' (sans Gallium) à base de superréseau de type II InAs/InAsSb (T2SL). Le photodétecteur à SR 'Ga-free' sur substrat GaSb est réalisé dans une configuration XBn avec une longueur d'onde de coupure à 5 μm et montre des performances en courant d’obscurité et en rendement quantique à l’état de l’art mondialAn Increase of the operating temperature of the high performance cooled infrared (IR) detector focal plane arrays (FPAs) would induce a reduction in size, weight and power consumption of the cryocooler and allow a new class of applications where the needs in portability, compactness and energy autonomy of the IR cameras are essential. Currently, the photodetector technologies operating at high temperature (T= 150K), in particular the detector based on InAsSb, only cover a part of the midwave infrared (MWIR) domain, below 4.2µm. The extension of the cutoff wavelength to the full MWIR spectrum until 5µm for an operating temperature equal to 150K or higher, with no tradeoffs in performance, would present evident radiometric advantages. Combining the advantages of superlattice (SL) nanostructures in term of tuning of cut-off wavelength and the ones of XBn barrier structure device, the main objective of the thesis is to fabricate and study the first Ga-free InAs/InAsSb type-II superlattice (T2SL) photodetector. The Ga-free T2SL photodetector on GaSb substrate is used in a XBn configuration with a 5 µm cutoff wavelength and showing state of the art performance in terms of dark current and quantum efficiency
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Parsa, Yohan. "Oxydation thermique du chrome pur en atmosphère contrôlée : propriétés semiconductrices et structurales de la chromine". Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAI081/document.
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La durabilité chimique des alliages métalliques résulte notamment de la nature des défauts ponctuels assurant le transport au travers du film d’oxydation formé en surface. L'élaboration de couches d'oxyde modèles par oxydation thermique en pression contrôlée et ALD (Atomic Layer Deposition) et l'étude de leurs propriétés semi conductrices (conditionnées par la nature des défauts ponctuels) devrait permettre une meilleure compréhension des mécanismes de formation de ces couches d'oxydeThe chemical durability of the metal alloy results in particular from the nature of point defects providing transport through the oxidation film formed on the surface. Models oxide layers, grown by thermal oxidation and Alomic Layer Deposition, will be studied by photoelectrochemistry. This will provide us information about the semiconductive properties of the oxide, determined by the point defect in the oxide layer, and should allow us a better understanding of the formation mechanism of these oxide
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Barilero, Gilles. "Etude de quelques proprietes magnetooptiques et magnetiques des semiconducteurs semimagnetiques zn : :(1-x)mn::(x)te et hg::(1-x)mn::(x)te". Paris 6, 1987. http://www.theses.fr/1987PA066084.
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L'effet d'echange entre les electrons de bande et les electrons d des ions manganese modifie les produits electroniques des alliages de zn dans un champ magnetique. L'effet zeeman de l'exciton permet de determiner la valeur des integrales d'echange de la bande de valence et de la bande de conduction dans ces composes. La presence d'interactions magnetiques entre les ions manganese est responsable des proprietes magnetiques. Les courbes d'aimantation des alliages dilues pour x5% en champ intense, a basse temperature, permettent de determiner la constante d'echange entre ions mn 1er voisins. Les alliages concentres presentent une phase de verre spin a basse temperature
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Madhavi, S. "Carrier Mobility And High Field Transport in Modulation Doped p-Type Ge/Si1-xGex And n-Type Si/Si1-xGex Heterostructures". Thesis, Indian Institute of Science, 2000. https://etd.iisc.ac.in/handle/2005/294.
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Modulation doped heterostructures have revolutionized the operation of field effect devices by increasing the speed of operation. One of the factors that affects the speed of operation of these devices is the mobility of the carriers, which is intrinsic to the material used. Mobility of electrons in silicon based devices has improved drastically over the years, reaching as high as 50.000cm2/Vs at 4.2K and 2600cm2/Vs at room temperature. However, the mobility of holes in p-type silicon devices still remains comparatively lesser than the electron mobility because of large effective masses and complicated valence band structure involved. Germanium is known to have the largest hole mobility of all the known semiconductors and is considered most suitable to fabricate high speed p-type devices. Moreover, it is also possible to integrate germanium and its alloy (Si1_zGex ) into the existing silicon technology.
With the use of sophisticated growth techniques it has been possible to grow epitaxial layers of silicon and germanium on Si1_zGex alloy layers grown on silicon substrates. In tills thesis we investigate in detail the electrical properties of p-type germanium and n-type silicon thin films grown by these techniques. It is important to do a comparative study of transport in these two systems not only to understand the physics involved but also to study their compatibility in complementary field effect devices (cMODFET).
The studies reported in this thesis lay emphasis both on the low and high field transport properties of these systems. We report experimental data for the maximum room temperature mobility of holes achieved m germanium thin films grown on Si1_zGex layers that is comparable to the mobility of electrons in silicon films. We also report experiments performed to study the high field degradation of carrier mobility due to
"carrier heating" in these systems. We also report studies on the effect of lattice heating on mobility of carriers as a function of applied electric field.
To understand the physics behind the observed phenomenon, we model our data based on the existing theories for low and high field transport. We report complete numerical calculations based on these theories to explain the observed qualitative difference in the transport properties of p-type germanium and ii-type silicon systems. The consistency between the experimental data and theoretical modeling reported in this work is very satisfactory.
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Madhavi, S. "Carrier Mobility And High Field Transport in Modulation Doped p-Type Ge/Si1-xGex And n-Type Si/Si1-xGex Heterostructures". Thesis, Indian Institute of Science, 2000. http://hdl.handle.net/2005/294.
Texto completo da fonteResumo:
Modulation doped heterostructures have revolutionized the operation of field effect devices by increasing the speed of operation. One of the factors that affects the speed of operation of these devices is the mobility of the carriers, which is intrinsic to the material used. Mobility of electrons in silicon based devices has improved drastically over the years, reaching as high as 50.000cm2/Vs at 4.2K and 2600cm2/Vs at room temperature. However, the mobility of holes in p-type silicon devices still remains comparatively lesser than the electron mobility because of large effective masses and complicated valence band structure involved. Germanium is known to have the largest hole mobility of all the known semiconductors and is considered most suitable to fabricate high speed p-type devices. Moreover, it is also possible to integrate germanium and its alloy (Si1_zGex ) into the existing silicon technology.
With the use of sophisticated growth techniques it has been possible to grow epitaxial layers of silicon and germanium on Si1_zGex alloy layers grown on silicon substrates. In tills thesis we investigate in detail the electrical properties of p-type germanium and n-type silicon thin films grown by these techniques. It is important to do a comparative study of transport in these two systems not only to understand the physics involved but also to study their compatibility in complementary field effect devices (cMODFET).
The studies reported in this thesis lay emphasis both on the low and high field transport properties of these systems. We report experimental data for the maximum room temperature mobility of holes achieved m germanium thin films grown on Si1_zGex layers that is comparable to the mobility of electrons in silicon films. We also report experiments performed to study the high field degradation of carrier mobility due to
"carrier heating" in these systems. We also report studies on the effect of lattice heating on mobility of carriers as a function of applied electric field.
To understand the physics behind the observed phenomenon, we model our data based on the existing theories for low and high field transport. We report complete numerical calculations based on these theories to explain the observed qualitative difference in the transport properties of p-type germanium and ii-type silicon systems. The consistency between the experimental data and theoretical modeling reported in this work is very satisfactory.