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1
Xu, Zhongjie, e 徐忠杰. "Molecular beam epitaxial growth of GaN on Si(111) substrate". Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2010. http://hub.hku.hk/bib/B45866338.
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Tanaka, Shigeyasu, Yoshio Honda e Nobuhiko Sawaki. "Structural characterization of GaN laterally overgrown on a (111)Si substrate". American Institute of Physics, 2001. http://hdl.handle.net/2237/6985.
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Weiß, Beatrix [Verfasser], e Oliver [Akademischer Betreuer] Ambacher. "Fast-switching monolithically integrated high-voltage GaN-on-Si power converters". Freiburg : Universität, 2017. http://d-nb.info/1156851726/34.
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Eblabla, Abdalla. "MM-wave frequencies GaN-on-Si HEMTs and MMIC technology development". Thesis, University of Glasgow, 2018. http://theses.gla.ac.uk/8861/.
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Gallium Nitride (GaN)-based High Electron Mobility Transistors (HEMTs) grown on Silicon (Si) substrates technology is emerging as one of the most promising candidates for cost effective, high-power, high-frequency Integrated Circuit (IC) applications; operating at Microwave and Millimetre (mm)-wave frequencies. To capitalise on the advantages of RF GaN technology grown on Low resistivity (LR) Si substrates; RF losses due to the Si substrate must be eliminated at the active devices, passive devices and interconnect. Low resistivity Si substrates are intrinsic prone to RF losses and high resistivity (HR) Si substrates shown to exhibit RF losses as a result of operating substrate temperature at the system level. Therefore, obtaining a viable high-performance RF GaN-on both LR and HR Si device remains a challenge for this technology. In an attempt to overcome these issues, Microwave Monolithic Integrated Circuit (MMIC)-compatible technology was developed for the first time aiming to eliminate the substrate coupling effect for the realisation of high performance passive and active devices on GaN-on-Si substrates for mm-wave MMIC applications.
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Tanaka, Shigeyasu, Yasutoshi Kawaguchi, Nobuhiko Sawaki, Michio Hibino e Kazumasa Hiramatsu. "Defect structure in selective area growth GaN pyramid on (111)Si substrate". American Institute of Physics, 2000. http://hdl.handle.net/2237/6983.
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Meyer, Walter Ernst. "Digital DLTS studies on radiation induced defects in Si, GaAs and GaN". Pretoria : [s.n.], 2006. http://upetd.up.ac.za/thesis/available/etd-06182007-143820.
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El, Zammar Georgio. "Process of high power Schottky diodes on the AlGaN/GaN heterostructure epitaxied on Si". Thesis, Tours, 2017. http://www.theses.fr/2017TOUR4030/document.
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Les convertisseurs à base de Si atteignent leurs limites. Face à ces besoins, le GaN, avec sa vitesse de saturation des électrons et le champ électrique de claquage élevés est candidat idéal pour réaliser des redresseurs, surtout s’il est épitaxié sur substrat à bas cout. Ce travail est dédié au développement des diodes Schottky sur AlGaN/GaN. Une couche de SiNx en faible traction a été obtenue. Un contact ohmique de Ti/Al avec une gravure partiel a donné une Rc de 2.8 Ω.mm avec une résistance Rsh de 480 Ω/□. Des diodes Schottky avec les étapes issues de ces études ont été fabriqué. La diode recuite à 400 °C avec 30 nm de profondeur de gravure a montré une hauteur de barrière de 0,82 eV et un facteur d'idéalité de 1,49. La diode a présenté une très faible densité de courant de fuite de 8.45x10-8 A.mm-1 à -400 V avec une tension de claquage entre 480 V et 750 VSi-based devices for power conversion applications are reaching their limits. Wide band gap GaN is particularly interesting due to the high electron saturation velocity and high breakdown electric field, especially when epitaxied on low cost substrates such as Si. This work was dedicated to the development and fabrication of the Schottky diode on AlGaN/GaN on Si. SiNx passivation in very low tensile strain is used. Ti (70 nm)/Al (180 nm) partially recessed ohmic contacts annealed at 800 ºC exhibited a 2.8 Ω.mm Rc with a sheet resistance of 480 Ω/sq. Schottky diodes with the previously cited passivation and ohmic contact were fabricated with a fully recessed Schottky contact annealed at 400 ºC. A Schottky barrier height of 0.82 eV and an ideality factor of 1.49 were obtained. These diodes also exhibited a very low leakage current density (up to -400 V) of 8.45x10-8 A.mm-1. The breakdown voltage varied between 480 V and 750 V
8
Kemper, Ricarda Maria [Verfasser]. "Cubic GaN on Pre-Patterned 3C-SiC/Si (001) Substrates / Ricarda Maria Kemper". Paderborn : Universitätsbibliothek, 2014. http://d-nb.info/1058180649/34.
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Wang, Yong. "Research on improvement of breakdown voltage of AlGaN/GaN HEMTs grown on Si(111) substrates by MOCVD /". View abstract or full-text, 2009. http://library.ust.hk/cgi/db/thesis.pl?ECED%202009%20WANGY.
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Liang, Hu. "Fabrication of high power InGaN/GaN multiple quantum well blue LEDs grown on patterned Si substrates /". View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20LIANG.
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Honda, Y., Y. Kuroiwa, M. Yamaguchi e N. Sawaki. "Growth of GaN free from cracks on a (111)Si substrate by selective metalorganic vapor-phase epitaxy". American Institute of Physics, 2002. http://hdl.handle.net/2237/7003.
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Hikosaka, T., T. Narita, Y. Honda, M. Yamaguchi e N. Sawaki. "Optical and Electrical Properties of (1-101)GaN Grown on a 7°Off-Axis (001)Si Substrate". American Institute of Physics, 2004. http://hdl.handle.net/2237/7007.
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Kaltsounis, Thomas. "Épitaxie localisée de GaN sur silicium pour une nouvelle génération de transistors de puissance". Electronic Thesis or Diss., Université Côte d'Azur, 2024. http://www.theses.fr/2024COAZ5072.
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Les composants à haute puissance et en particulier haute tension sont essentiels pour la conversion et le stockage de l'énergie électrique pour des applications comme les systèmes photovoltaïques et les voitures électriques. Actuellement, les composants à base de silicium (Si) dominent le secteur de l'électronique de puissance. Les semiconducteurs à large bande interdite comme le nitrure de gallium (GaN) sont d'excellents candidats pour remplacer le silicium. Les propriétés électriques du GaN permettent d'obtenir des composants plus efficaces que ceux à base de Si et de dissiper moins d'énergie est durant leur fonctionnement. Cependant, les substrats natifs de GaN sont de taille et de disponibilité limitées. L'épitaxie de GaN sur des plaques de Si de diamètre 200 mm est une alternative intéressante à cause de leur faible cout et de leur compatibilité avec les lignes de fabrication CMOS. Cependant, les désaccords de paramètre de maille et de coefficient de dilatation thermique entre GaN et Si génèrent une grande contrainte en tension dans la couche de GaN et limitent l'épaisseur des couches qui peuvent être obtenue sur des plaques de Si sans fissures. Enfin, la configuration verticale améliore la fiabilité des composants, comme le maximum de champ électrique est loin de la surface et il est localisé dans la masse des composants. Alors, les effets de piégeage sont réduits et la résistance dynamique diminue. En plus, la gestion thermique des composants verticaux est plus facile que celle des composants latéraux. Cette thèse explore l'épitaxie localisée de GaN par EPVOM comme une solution pour gérer la relaxation de cette contrainte dans la couche de GaN et pour déposer des couches de grande épaisseur avec une faible concentration de dopage afin de fabriquer de composants de haute puissance. Quatre points principaux sont explorés avec des résultats cruciaux pour la poursuite de la recherche dans ce domaine : - Pour commencer, le matériau approprié pour servir de masque pour l'épitaxie localisée a été identifié en étudiant la concentration de dopage involontaire dans la couche de GaN, issu de la réaction des atomes de Ga avec le masque et de l'incorporation des atomes de dopant du masque - De plus, les techniques de caractérisation usuelles atteignent leurs limites pour mesurer de faibles concentrations de dopage. La microscopie de résistance et la microscopie de capacité réalisées au moyen d'un microscope à force atomique sur des sections transversales obtenues par gravure par faisceaux d'ions sont validées et pour la première fois une telle faible concentration de dopage est mesurée.- Un masque créé spécifiquement pour l'épitaxie localisée a permis l'investigation de la taille des structures qui peuvent être générées sans fissures, sous des conditions de croissance déjà validées.- Des diodes Schottky et des diodes p-n quasi-verticales ont été fabriquées et leur comportement a été étudié au moyen de mesures I-V. Les diodes p-n ont une résistance relativement faible, vu que le masque n'est pas optimisé et la résistance d'accès est grand. Pour la première fois, une tension de claquage de 700 V a été mesurée sur une diode p-n sans protection périphérique. Cette thèse présente des résultats qui n'ont jamais rapportés dans la littérature et elle montre le grand potentiel de l'épitaxie localisée de GaN sur des plaques de Si pour des composants verticaux de haute puissanceHigh-power devices and especially high-voltage ones are essential for the conversion and storage of electrical energy in applications such as photovoltaic systems and electric cars. Nowadays, silicon (Si)-based devices dominate the field of power electronics. Wide-bandgap semiconductors, such as Gallium Nitride (GaN), are excellent candidates to replace Si. Due to the excellent electrical properties of GaN, devices based on this semiconductor are more efficient than their Si-based counterparts and the energy lost occurring during conversion operation is much less. However, native GaN substrates have limited size and availability. The growth of GaN on 200 mm-diameter Si wafers is an attractive alternative because of their low cost and compatibility with a CMOS fabrication line. However, the lattice and coefficient thermal mismatch between GaN and Si generate a large tensile stress and limit the thickness of full-wafer GaN layers grown on Si wafers without cracking. Finally, the vertical configuration enhances the reliability of the devices by moving the maximum of the electric field away from the surface into the bulk of the devices. Thus, the trapping effects are reduced and the dynamic on-resistance decreases. The thermal management of the vertical devices is easier than that for the lateral ones.This dissertation explores the localized epitaxy of GaN as a solution to relax this stress in the regrown GaN layer and to grow thick layers with low net doping concentration required for the fabrication of high-power devices. There are four main points that are explored and crucial results are provided for the continuation of the research on the project: - First, a suitable mask material for the localized epitaxy with MOVPE is identified by investigating the unintentional doping concentration in the regrown layer, induced by the reaction of Ga atoms with the mask and the incorporation of dopant atoms from the mask.- Second, characterization techniques are pushed to the limits of measuring low doping concentrations. Scanning spreading resistance microscopy and scanning capacitance microscopy, combined with the ion-beam cross-section preparation technique are validated and for the first time are able to examine such low doping concentrations.- Third, through a mask designed specifically for the localized epitaxy, the scaling of crack-free structures that can be regrown is investigated, under growth conditions that have been already validated.- Fourth, quasi-vertical Schottky and p-n diodes are fabricated and their forward and reverse bias I-V behavior is investigated. The p-n diodes show relatively low on-resistance (Ron), considering that the mask is not optimized and the access resistance is large, and for the first time a 700 V breakdown voltage is measured on a p-n diode with no periphery protection.The current thesis shows remarkable results that have not been reported before in the literature and demonstrates the great potential that the localized epitaxy of GaN on Si wafers offers for high-power vertical devices
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Bloom, Matthew Anthony. "DC, RF, and Thermal Characterization of High Electric Field Induced Degradation Mechanisms in GaN-on-Si High Electron Mobility Transistors". DigitalCommons@CalPoly, 2013. https://digitalcommons.calpoly.edu/theses/966.
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Gallium Nitride (GaN) high electron mobility transistors (HEMTs) are becoming increasingly popular in power amplifier systems as an alternative to bulkier vacuum tube technologies. GaN offers advantages over other III-V semiconductor heterostructures such as a large bandgap energy, a low dielectric constant, and a high critical breakdown field. The aforementioned qualities make GaN a prime candidate for high-power and radiation-hardened applications using a smaller form-factor. Several different types of semiconductor substrates have been considered for their thermal properties and cost-effectiveness, and Silicon (Si) has been of increasing interest due to a balance between both factors.
In this thesis, the DC, RF, and thermal characteristics of GaN HEMTs grown on Si-substrates will be investigated through a series of accelerated lifetime experiments. A figure of merit known as the critical voltage is explored and used as the primary means by which the GaN-on-Si devices are electrically strained. The critical voltage is defined as the specific voltage bias by which a sudden change in device performance is experienced due to a deformation of the target GaN HEMT’s epitaxial structure. Literature on the topic details the inevitable formation of pits and cracks localized under the drain-side of the gate contact that promote electrical degradation of the devices via the inverse piezoelectric effect. Characteristic changes in device performance due to high field strain are recorded and physical mechanisms behind observed degraded performance are investigated.
The study assesses the performance of roughly 60 GaN-on-Si HEMTs in four experimental settings. The first experiment investigates the critical voltage of the device in the off-state mode of operation and explores device recovery post-stress. The second experiment analyzes alterations in DC and RF performance under varying thermal loads and tracks the dependence of the critical voltage on temperature. The third experiment examines electron trapping within the HEMTs as well as detrapping methodologies. The final experiment links the changes in RF performance induced by high field strain to the small-signal parameters of the HEMT. Findings from the research conclude the existence of process-dependent defects that originate during the growth process and lead to inherent electron traps in unstressed devices. Electron detrapping due to high electric field stress applied to the HEMTs was observed, potentially localized within the AlGaN layer or GaN buffer of the HEMT. The electron detrapping in turn contributed to drain current recovery and increased unilateral performance of the transistor in the RF regime. Thermal experiments resulted in a positive shift in critical voltage, which enhanced gate leakage current at lower gate voltage drives.
15
Lakhdhar, Hadhemi. "Reliability assessment of GaN HEMTs on Si substrate with ultra-short gate dedicated to power applications at frequency above 40 GHz". Thesis, Bordeaux, 2017. http://www.theses.fr/2017BORD0941/document.
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Ce travail de thèse se concentre sur l'évaluation de la fiabilité des transistors à haute mobilité électronique (HEMT) AlGaN / GaN à grille ultra-courte sur substrat silicium dédiés aux applications de puissance à une fréquence supérieure à 40GHz. Il a été réalisé au sein des laboratoires IMS Bordeaux et IEMN Lille.Ce travail compare initialement les HEMT AlGaN / GaN réalisés par croissance MOCVD avec ceux obtenus par croissance MBE. En particulier, l'analyse électrique statique a permis d'étudier l'influence de la géométrie des dispositifs sur les performances des composants.Des tests de vieillissement accéléré ont été effectués pour évaluer la robustesse des transistors HEMTs en AlGaN/GaN à grille ultra-courte sur Si. Une méthodologie basée sur une séquence d'essais de vieillissement a été définie pour établir le diagnostic in-situ d’une dégradation statique et permanente et d’une dégradation qui se traduit par un transitoire de courant de drain au cours du chaque palier de la séquence de vieillissement. La valeur de la tension critique de dégradation à partir de laquelle le courant de drain commence à diminuer de façon significative dépend des conditions de polarisation du vieillissement, de la distance grille-drain et de la longueur de grille. De plus, l’aire de sécurité de fonctionnement de cette technologie a été déterminéeThis Ph.D. work focuses on the reliability assessment of ultra-short gate AlGaN/GaN high electron mobility transistor (HEMT) on silicon substrate dedicated to power applications at frequency above 40GHz. It was carried out within IMS Bordeaux and IEMN Lille laboratories.This work initially compares AlGaN/GaN HEMTs grown by MOCVD with those grown using MBE, through electrical characterization.In particular, the device geometry impact on the device performances has been studies by static electrical characterization.Step-stress experiments are performed to investigate reliability assessment of ultra-short gate AlGaN/GaN high electron mobility transistor (HEMT) on Si substrate. A methodology based on a sequence of step stress tests has been defined for in-situ diagnosis of a permanent degradation and of a degradation which is identified by a drain current transient occurring during each step of the ageing sequence . The same stress conditions were applied on HEMTs with different geometries. It is found no evolution of the drain current during non stressful steps. The value of the critical degradation voltage beyond which the stress drain current starts to decrease significantly is also found dependent on the stress bias conditions, the gate-drain distance and the gate length. Moreover, the safe operating area of this technology has been determined
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Tarnawska, Lidia [Verfasser], e Thomas [Akademischer Betreuer] Schröder. "Novel oxide buffer approach for GaN integration on Si(111) platform through Sc2O3/Y2O3 bi-layer / Lidia Tarnawska. Betreuer: Thomas Schröder". Cottbus : Universitätsbibliothek der BTU Cottbus, 2013. http://d-nb.info/1034822764/34.
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White, Ryan W. "RF Reliability Comparison between DC Stressed and Non-DC-Stressed GaN-on-Si HEMTs in a 1GHz Class F Power Amplifier". DigitalCommons@CalPoly, 2012. https://digitalcommons.calpoly.edu/theses/876.
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Gallium Nitride (GaN) is a wide band gap semiconductor with an energy gap of 3.4eV. The large energy gap of this III-V semiconductor gives it the ability to withstand high electric fields, high operating temperatures, and allows for high power density. These properties of GaN maintain their advantage at high frequencies and are ideal for use in power amplifiers. This thesis discusses the reliability of a GaN high electron mobility transistor (HEMT) used in a class F power amplifier configuration. GaN HEMTs have only been commercially available since 2006 and as a result their long term reliability is still under investigation. The mechanisms that cause device failures and reduced performance are not fully understood and current work continues to produce new theories as to why they occur and how they affect device performance. The mechanisms that cause changes in device performance have been heavily explored in DC studies. These are useful in understanding the mechanisms that may lead to a change in device performance. However, there is less literature investigating how these mechanisms affect the radio frequency (RF) performance of devices. Using the information gathered from literature about DC studies this thesis launches an investigation to observe the RF behavior of GaN HEMT amplifiers that have been subjected to DC stressing. The DC stressing consists of applying a large negative voltage to the gate terminal while connecting the drain and source terminals to ground. The applied voltage is large enough to cause permanent damage to the device. To perform the investigation four GaN class F power amplifiers are subjected to DC stressing while another four GaN class F power amplifiers receive no DC stressing. The performance of the two groups of amplifiers is compared and evaluated. The eight power amplifiers are constructed to output 4 watts of power. The output power and DC bias are continuously monitored for each test. After a DC stress test, consisting of -70V applied between the gate and drain/source terminals, four observations are noted. One, the drain current, and two, the output powers are initially reduced and recover after roughly a 3 hour period of time. Three, when operated for periods of time greatly exceeding the recovery period there are no differences seen in behavior between stressed and non-stressed amplifiers. These three observations happened in all the test runs. Four, a permanent gate leakage current is observed in all stressed amplifiers.
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Masuda, Michael Curtis Meyer. "Investigation of Degradation Effects Due to Gate Stress in GaN-on-Si High Electron Mobility Transistors Through Analysis of Low Frequency Noise". DigitalCommons@CalPoly, 2014. https://digitalcommons.calpoly.edu/theses/1169.
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Gallium Nitride (GaN) high electron mobility transistors (HEMT) have superior performance characteristics compared to Silicon (Si) and Gallium Arsenide (GaAs) based transistors. GaN is a wide bandgap semiconductor which allows it to operate at higher breakdown voltages and power. Unlike traditional semiconductor devices, the GaN HEMT channel region is undoped and relies on the piezoelectric effect created at the GaN and Aluminum Gallium Nitride (AlGaN) heterojunction to create a conduction channel in the form of a quantum well known as the two dimensional electron gas (2DEG). Because the GaN HEMTs are undoped, these devices have higher electron mobility crucial for high frequency operation. However, over time and use these devices degrade in a manner that is not well understood. This research utilizes low frequency noise (LFN) as a method for analyzing changes and degradation mechanisms in GaN-on-Si devices due to gate stress.
LFN is a useful tool for probing different regions of the device that cannot be measured through direct means. LFN generation in GaN HEMTs is based on the carrier fluctuation theory of 1/f noise generation which states fluctuations in the number of charge carriers results in conductance fluctuations that produce a Lorentzian noise spectrum. The summing Lorentzian noise spectra from multiple traps leads to 1/f and random telegraph signal (RTS) noise. The primary cause of carrier fluctuations are electron traps near the 2DEG and in the AlGaN bulk. These traps occur naturally due to dislocations and impurities in the manufacturing process, but new traps can be generated by the inverse-piezoelectric effect during gate stress.
This thesis introduces noise and presents a circuit to bias the devices and measure gate and drain LFN simultaneously. Three measurements are performed before and after gate DC stress at three different temperatures: DC characterization, capacitance-voltage (C-V) measurements, and LFN measurements. The DC characteristics show an increase in gate leakage after stress caused by an increase in traps after degradation consistent with trap assisted tunneling. However, the leakage current on the drain and source side differ before and after stress leading to the conclusion that the source side of the gate is more sensitive to gate stress. Gate leakage current on the drain side is also sensitive to temperature due to thermionic trap assisted tunneling. Hooge parameter calculations agree with previous research. The LFN results show an increase in gate and drain noise power, SIg(f) and SId(f), in accordance with increased gate leakage current under cutoff bias. RTS noise is also observed to increase in frequency with increased temperature. Activation energies for RTS noise are extracted and qualitatively linked to trap depth based on the McWhorter trap model.
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Chen, chang hong, e 沈昌宏. "GaN growm on Si substrate by MBE". Thesis, 2002. http://ndltd.ncl.edu.tw/handle/54567759832201506150.
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Chen, Chien-Chia, e 陳建嘉. "Nanoheteroepitaxial growth of GaN on Si substrates". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/35704033667964859574.
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碩士國立中央大學
光電科學與工程學系
101
GaN was grown on Si with the buffer layer of ZnO nanorods arrays (ZnO NRAs) by metalorganic chemical vapor deposition (MOCVD). The lattice mismatch between GaN and ZnO is only 1.85% and the ZnO NRAs buffer is employed to reduce strain energy in the epilayer. We aim to achieve the next-generation GaN crystal with advantages of low cost, large scale, and high qualities. Nevertheless, many challenges remain to be overcome, such as H2 back-etching of ZnO NRAs, thermal decomposition of ZnO, the difficult coalesce of GaN, etc. The major fabrication procedure of ZnO NRAs consists of two steps: (1) ZnO seed layer deposition (2) hydrothermal process (HTP). The textured ZnO film was deposited on Silicon (100) substrates by radio-frequency sputter (RF-Sputter). Post-annealing of the sputtered ZnO layer is found be vitally important to the morphology of ZnO NRAs, such as diameters, densities, shapes, and tilting angles. In the growth of GaN, low-temperature (< 600 °C) GaN (LT-GaN) in N2 ambiance is adopted to form the ZnO-GaN core-shell structure in order to prevent the back etching of NRAs at high temperatures. The growth temperature of GaN is then raised to 950 °C to horizontally connect every nanorod and to provide further protection of ZnO. Finally, high-quality GaN is grown at 1120 °C in H2. Before the growth of high-temperature GaN (HT-GaN), a thin layer of high-temperature (also at 1120 °C) AlN (HT-AlN) is used to assist the coalescence of GaN. Although the HT-GaN epilayer reaches the thickness of 2 μm without showing peeling-off and cracks, the crystal still remains uncoalescent. In the Future, optimization of the growth parameters for each layer, including duration, V/III ratios and reactor pressure, should be performed in order to improve the surface morphology of GaN grown with this novel technology.
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Lin, F. C., e 林峰慶. "Field Effect Transistor of AlGaN/GaN on Si Substrate". Thesis, 2006. http://ndltd.ncl.edu.tw/handle/57866122184032156279.
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碩士長庚大學
電子工程研究所
94
AlGaN/GaN HFETs have advantages in high-frequency (100GHz)、high-temperature (RT)、high-power、 low- noise applications of hetero-junction filed-effect transistors (HFETs) because of their high breakdown field, high peak velocity, high band-gap and thermal conductivity. Lots of theoretical and experimental efforts have been made more recently. In this work, in order to investigate the effect of Si-doped GaN layers on the performance of AlGaN/GaN HFET, two groups of AlGaN/GaN HFETs (field effect transistor) grown by metal-organic vapor phase epitaxy (MOVPE) were studied. One group was grown on Si substrates while the other on sapphire. The performances of the devices are governed by the electronic properties the two-dimensional electron gas (2DEG) formed in the AlGaN/GaN hetero-junctions, which can be characterized by mobility. Specific contact resistance was measured by TLM. The current-voltage and trans-conductance properties of HFET were analyzed. Comparison of mobility and I-V results between doped and un-doped devices in two groups were made. Details will be discussed in the thesis.
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Lee, Po-ting, e 李柏霆. "Growth of GaN on Si with Ga2O3 buffer layer". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/p25zk4.
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碩士國立中央大學
光電科學與工程學系
102
The growth of GaN on Si can reduce manufacturing cost of nitride-based optoelectronic devices. However, due to the significant mismatch in lattice constant and thermal expansion coefficient mismatch between GaN and Si, we need to use buffer layer to mitigate the strain in GaN epi-layers. This study investigates the possibility of employing monocline β-Ga2O3 as the buffer layer for the growth of GaN on Si. The lattice mismatch between β-Ga2O3 and GaN is only 2.6%. In this project, we deposited ZnO/ β-Ga2O3 on Si <111> substrate, and nitridized the oxide layer in high-temperature NH3 ambience in order to attain a thin GaN layer for subsequent epitaxial growth. It is found that inserting a ZnO layer between β-Ga2O3 and Si can improve the crystal quality of GaN. The result is attributed to the fact that ZnO thin film can change the surface energy of β-Ga2O3 to facilitate the bonding between Ga and N. The effect of ZnO thickness, annealing time, and NH3 flow rate on GaN epitaxy is analyzed. We also grow GaN on ZnO/β-Ga2O3/Si with metal organic chemical vapor deposition. The GaN epi-layer is found be polycrystalline. Methods to enhance the epitaxial qualities are proposed.
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Weng, Wei-Syuan, e 翁唯軒. "Fabrication of GaN-based LED on Patterned-Si Substrates". Thesis, 2015. http://ndltd.ncl.edu.tw/handle/u2th5q.
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碩士國立虎尾科技大學
材料科學與綠色能源工程研究所
103
The large lattice mismatch between Si and GaN results in a high dislocation density in epitaxial GaN, which limits the performance of LED structures. Moreover, a tensile stress is introduced into the film upon cooling from growth temperature because of the large thermal expansion coefficient difference between Si and GaN. The tensile stress will cause wafer bowing and/or epitaxial layer cracks. Growth of InGaN/GaN on pattern Si substrate use selective area growth therefore needs further evaluating to enhance the performance of the devices. This project demonstrates the growth of a flat, crack-free GaN-based LED structures on a patterned-Si substrate by metalorganic vapour phase epitaxy (MOVPE). By optimizing the AlN/AlGaN buffer layer and the pattern of the Si substrate, a high performance GaN-based LED can be successfully performed. The LED structures were characteried using X-ray diffraction, scanning electron microscopy, transmission electron microscopy, and photoluminescence. Results of GaN growth on a pattern Si (100) wafer have been well characterized.
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Yang, Min-Hao, e 楊閔皓. "Fabrication of thin-film LEDs using GaN-on-Si epilayers". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/fpu39z.
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碩士國立中興大學
材料科學與工程學系所
101
In this thesis, thin-film blue light-emitting diodes (LEDs) using GaN-on-Si(111) epilayers were fabricated via wafer bonding and substrate removal processes. As compared to the common sapphire substrate, the Si substrate has better properties in electrical conductivity, thermal conductivity, and thermal stability. The substrate-free LEDs were expected to show a higher efficiency and better heat dissipation due to the improvement of current crowding issue. Moreover, the Ag/In bonding layer was also used to enhance the thermal dissipation, and hence reduce the degree of droop in LED efficiency. To understand the influence on LED performances, three kinds of LEDs were prepared in this study. They are named as the lateral LEDs (L-LEDs), secondary-transferred LEDs (S-LEDs), and vertical-structured LEDs (V-LEDs). At an injection current of 700 mA, the light output power of L-LEDs, S-LEDs and V-LEDs were 90.88, 155.87 and 261.07 mW, respectively. Obviously, the light output power of S-LEDs and V-LEDs were enhanced by 71.5 and 187.3 % compared to that of L-LEDs. The surface temperatures of L-LEDs, S-LEDs and V-LEDs were measured to be 90.72, 76.7, and 58.1 °C, respectively. The results clearly indicate that the good performance of LED devices can be achieved by using a thin-film device configuration.
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Lin, Hsin-Fu, e 林信甫. "Growth of GaN on Si substrates with ZnO buffer layer". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/06165208102277961836.
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碩士國立中央大學
光電科學與工程學系
102
In this research, a thin (60-100 nm) ZnO layer deposited by sputtering is employed as the buffer layer for the epitaxial growth of GaN on (100) Si substrates. The ZnO buffer mitigates the huge lattice mismatch between GaN and Si, and therefore is expected to improve the crystal qualities of GaN. The orientation of the sputtered ZnO thin film is along the c-axis according to X-ray diffraction (XRD) ω-2θ measurements. During the growth of GaN in the metal organic chemical vapor deposition (MOCVD) system, the important parameters include substrate temperature, growth duration, reactor pressure and V/III ratio. The morphology of GaN epilayers are analyzed by scanning electron microscope (SEM) and atomic force microscopy (AFM). It is found that polycrystalline GaN micro-trapezoids are formed on the ZnO buffer, which is believed to stem from the unique rod-like ZnO nanostructure produced by the sputtering process. In addition to the c-plane ZnO buffer, m-plane ZnO layer is also prepared in this project. The goal of m-plane ZnO buffer is to build nonpolar InGaN multiple quantum wells, in which the radiative recombination efficiency can be enhanced by eliminating the undesired quantum-confined Stark effect (QCSE). The m-plane ZnO layer is realized by a post-annealing at 850 °C after the sputtering process, followed by the hydrothermal regrowth of ZnO at 90 °C for 2 hours. Preliminary results show that the orientation of the ZnO layer is strongly dependent on layer thickness, post-annealing temperature, annealing environment, and the conditions of the hydrothermal regrowth.
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Liu, Cheng_Han, e 劉承翰. "Structural Study of GaN Grown on Si with Different Buffer Layers". Thesis, 2005. http://ndltd.ncl.edu.tw/handle/55293031840908469933.
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碩士長庚大學
光電工程研究所
93
The purpose of this study is to explore the effects of different buffer layers on the crystal structure, quality, electrical and optical properties of GaN grown on Si. The experimental design included four kinds of buffer layers, (A)singal LT-AlN/AlxGa1-xN composite buffer layers (B)double LT-AlN/AlxGa1-xN composite buffer layers (C)double LT-AlN/HT-AlN composite buffer layers , and (D)an additional SixNy layer between the double LT-AlN/HT-AlN composite buffer layers , These four structures were compared with our another, compared with similar HEMT structures grown on Sapphire. All of the samples were grown by MOCVD. The microstructural, electrical and optical properties of GaN films were investigated by photoluminescence (PL) spectroscopy, Hall measurement, and transmission electron microscopy (TEM). Atomic Force Microscope (AFM) and scanning electron Microscope (SEM) were used to observe the surface morphological and roughness. The experimental results indicated that different buffer layers help different extents to reduce the threading dislocation (TD) density in the GaN films. Based on the TEM observations, the lowest TD density was achieved with the insertion of insert a SixNy layer between the double LT-AlN/HT-AlN composite buffer layers.
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Chang, Chun-Pu, e 張鈞普. "The growth of GaN nanodots on Si(111) by droplet epitaxy". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/71993414726785287993.
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碩士國立交通大學
影像與生醫光電研究所
103
GaN nanodots（NDs）were fabricated on Si（111）substrates by droplet epitaxy using Plasma-Assisted Molecular Beam Epitaxy (PA-MBE) system. In ultra-high vacuum condition, Ga metallic droplets formed, and then became GaN NDs by nitridation process. The density of GaN NDs can be controlled by the growth temperatures between 475 and 550°C, the nitridation time within the range 5-10 minutes, and the Si（111）substrates with and without pre-nitridation 60 minutes. Field emission scanning electron microscopy（FESEM）was used for the investigation of density and surface morphology of GaN NDs on Si （111）. We can find the density of GaN NDs increases as the growth temperature decreases. By increasing the nitridation time, we observed GaN NDs density increase. The pre-nitridation treatment for 60 minutes of Si（111）substrates can also increase GaN NDs density. The results of X-ray photoelectron spectroscopy（XPS）confirm that Ga droplets that transformed into GaN NDs and self-assembled over the sample surface during nitridation. Transmission Electron Microscopy（TEM）was used for the investigation of surface distribution, crystalline quality and shape of GaN NDs. From the results of experiments, we demonstrated that density of GaN NDs grown by droplet epitaxy strongly affected by growth temperature, nitridation time and pre-nitridation treatment of the Si（111）substrates. Meanwhile, the growth mechanism of GaN NDs was proposed in this study.
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Chen, C. L., e 陳佳林. "Investigation of AlGaN/GaN High Electron Mobility Transistor on Si Substrate". Thesis, 2007. http://ndltd.ncl.edu.tw/handle/13794608856334793374.
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碩士長庚大學
電子工程研究所
95
Si benefits high quality, being widely available as a large-diameter, low-cost substrate and extensive utilization in the semiconductor industry. In this thesis, High-electron-mobility transistors (HEMTs) based on the GaN two-dimensional electron systems (2DES) on Si substrates have been studied. In order to reduce the stress between the GaN and Si resulting from their lattice mismatch, AlN are used as an intermediate layer. The current density of GaN HEMT devices is coutributed by the 2DES formed by the GaN/AlGaN hetero-structures, originating from their spontaneous polarization and piezoelectric polarization. In this work, we inserted thin SiN layer to enhance the quality of the 2DES and improve a HEMT properties. In order to improve the HEMTs isolation characteristics, we utilize nitrogen ion-implantation for isolation. It can restrict the current flowing to the desired path (under the gate in HEMT) and electrically isolate separate device from each order. Characteristics of the epi-layers and devices were studied experimentally by XRD, transport properties, multifunctional mask, TLM (transfer length method), I-V, C-V and high frequency measurements. Comparisons of the saturated drain current density, trans- conductance, mobility, current gain cut off frequency (fT), power gain cut off frequency of operation (fMAX) between HEMTs on Si substrates with and without SiN treatment were made in this work. A same structure HEMT on sapphire substrate was also fabricated for reference. For AlGaN/GaN HEMT (with 5 um gate length and 65 um gate width).on Si substrate with SiN treatment, the mobility can be increased by more than 10 times, the maximum transconductance increased by 2~2.5 times, and the current gain cut off frequency (fT) increased more than 4 times at room temperature than the HEMTs on Si without SiN treatment. Details were discussed in this thesis.
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Chen, Cheng-hsin, e 陳政欣. "The study of layout design in GaN HEMTs on Si substrate". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/82021232176054510884.
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碩士國立中央大學
電機工程學系
102
Two kinds of AlGaN/GaN HEMTs with different device layouts were fabricated and compared. A new matrix layout is proposed to reduce device active area while keeping drain current capability. Compared to device with single finger layout and similar drain current (IDSS = 140 mA), device with matrix layout saves 45% active area. When both of them have the same active area, device with new matrix layout can achieve 1.87 times higher IDSS than device with single finger layout. Finally, the gate capacitances and the thermal resistance of devices with new matrix layout and single finger layout are discussed.
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Hsiao, Chih Hao, e 蕭至皓. "GaN on Si Schottky diode fabricated with polymer SU8 passivation layer". Thesis, 2016. http://ndltd.ncl.edu.tw/handle/waeg2n.
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碩士長庚大學
電子工程學系
105
The gallium nitride Schottky diodes we studied were based on the SU8 polymer as a cladding overlying the element in order to protect the element and planarize the element. In comparison to planar elements with planar SU8 cladding elements, with similar bias conditions, we successfully reduced the leakage current by two to three order of magnitude, but also increased the Schottky barrier height. Then we put SU8 polymer as a cladding overlying the element on the high temperature and humidity environment, we found that elements can still operate, compared to the planar elements have been damaged.
31
Pu, Jun-Liang, e 蒲俊良. "Investigation of GaN layer grown on Si(111) substrate using an LT GaN/ultrathin AlN wetting layer". Thesis, 2003. http://ndltd.ncl.edu.tw/handle/e394c2.
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碩士崑山科技大學
電機工程研究所
91
In this thesis, GaN and its relative materials are the key issue for developing the blue-green devices. In this paper, we study the material characteristic of GaN by X-ray diffraction (XRD) measurement and Photoluminescence (PL). Firstly, we introduce the source of developing GaN, metal organic chemical vapor phase deposition (MOCVD), X-ray diffraction (XRD), photoluminescence and AFM measurement. Then we do the systematic research on GaN under different growth condition. We analyze the GaN crystal quality affected by the growth flow of buffer layer. Finally, we can observe GaN crystal layer of surface level and smooth by AFM and high multiple optics microscope measurement. We study the film GaN crystal quality by X-ray diffraction (XRD) measurement and the shift of the PL spectra under different excitation light intensity.
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Su, Wei-shiang, e 蘇暐翔. "Studies of GaN thin films and InGaN/GaN quantum wells on Si substrates with AlN buffer layers". Thesis, 2012. http://ndltd.ncl.edu.tw/handle/80232853635099693506.
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碩士國立臺南大學
材料科學系碩士班
100
We use micro-Raman spectra, scanning electron microscope, atomic force microscope, and photoluminescence spectra to study the properties of III-V nitride semiconductor materials grown on (111) Si substrates with different growth conditions of AlN buffer layers. The studies are divided into two parts. The first part is the growth of multiple AlN buffer layers with the decrease of growth temperature from 1000 to 700 oC. For the increase of the numbers of AlN buffer layer, it shows the blue shift of near band edge light emission energy and intensity, high energy shift of E2high and A1(LO) scattering modes of GaN from micro-Raman spectra, pronounced decrease of cracks density in scanning electron microscope images, and the reduced surface roughness in atomic force microscope images. These results indicate that such growth conditions of AlN buffer layers can help in decreasing tensile stress in GaN on (111) Si substrates. The second part of the researches follow the first part. We also prepared the samples with AlN buffer layers on (111) Si substrates to improve the quality of GaN thin film. Furthermore, the InGaN/GaN multiple quantum wells were deposited on high quality GaN thin films. The near-band edge emission energies and intensities of samples show blue shift and increase respectively with the increase of the numbers of AlN buffer layer. This is due to the reduction of piezoelectric fields as well as the quantum confined Stark effect in InGaN/GaN multiple quantum wells. Also, the shift of E2high and A1(LO) modes of GaN from micro-Raman spectra were observed. The tensile stress in GaN on (111) Si substrates was decreased effectively .
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Wang, Yi-Jie, e 王奕傑. "Effects of LT-AlGaN Interlayers on Properties of Thick GaN Growth on Si". Thesis, 2012. http://ndltd.ncl.edu.tw/handle/k86u66.
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碩士國立交通大學
光電系統研究所
101
GaN material with high breakdown field, high energy bandgap, high electron mobility and good thermal conductivity is the most attractive alternative over Si, due to developments of Si semiconductor technology are close in the limit of the Moore’s Law. The most advantage is that GaN could be grown on large-sized Si substrate. In order to achieve high breakdown voltage for high power electronic device, it’s equipped wih thick epilayer of GaN for epitaxial growth. In this study, firstly, we establish a series of criterions of epitaxy quality by in-situ measurement system. Based on criterions, we could identify epitaxy quality during experimental process. All samples in experiment followed the criterions. Besides, when 2DEG channel was formed at AlGaN / GaN interface, we could do the hall measurement. Topics of experiment are optimizations of growth parameters of LT-AlGaN interlayers. The 2.87 μm crack-free epilayer was grown with optimization of LT-AlGaN for 90 seconds at set temperature of 950°C. From rocking curve scan of XRD analysis, FWHM of GaN (002) is 450 arcsec and GaN (102) is 661 arsec. For hall measurement, the electron mobility of 1300 cm2/V-s, carrier concentration of 0.81x1013 cm-2 were measured. Furthermore, find the criticalthickness of the second GaN. After the second GaN was deposited for 1500 seconds, the second LT-AlGaN interlayer was inserted. Then, 4.4 μm crack-free epilayer was grown. Despite of the substrate is plastic deformation, the crystal quality is good. From rocking curve scan of XRD analysis, FWHM of GaN (002) is 493 arcsec and GaN (102) is 836 arsec. Based on criterions, we could indentify epitaxy quality during experimental process; it could save time of ex-situ material analysis. Moreover, when LT-AlGaN interlayer was inserted, thick and high quality of epilayer could be grown.
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Li, Ko-Chen, e 李克辰. "The effect of ZnO thermal decomposition on the nanoheteroepitaxy of GaN on Si". Thesis, 2017. http://ndltd.ncl.edu.tw/handle/fa3xtu.
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碩士國立中央大學
光電科學與工程學系
105
In this study, we investigated the stability of ZnO nanorods at high temperature and hydrogen environments. ZnO nanorods are employed as the buffer structure for the growth of GaN on silicon substrates via metal-organic chemical vapor deposition (MOCVD). The nanorods can be attained with a hydrothermal synthesis, which is a low-temperature and wafer-scale process. GaN grown on ZnO is inherently p-type, which is due to the diffusion of Zn ions. For LEDs, the inherent p-type GaN can benefit the internal quantum efficiency by forming the p-side-down structure, which reverses the polarization-induced field and increases carrier injection efficiency. However, during MOCVD growth, the substrate temperature usually exceeds 1000 ºC, and a hydrogen-containing atmosphere is required, and these conditions can lead to thermal decomposition and H2 back-etching of ZnO nanorods, sacrificing the crystal qualities of GaN-on-Si. To understand the etching and decomposition process, rapid thermal annealing (RTA) with different hydrogen contents (air, vacuum, and nitrogen) was used to treat ZnO nanorods. According to the observations with scanning electron microscopy and X-ray diffraction, it is found that the ZnO nanorods in air start to deform and decompose at 900 ºC, and completely collapse at 1000 º C. In the vacuum environment, the nanorods slightly deform at 900 ºC, but the original “rod” shape can be maintained. The ZnO nanorods are most durable in nitrogen, and the geometry is well maintained until the temperature reaches 1000 ºC. These results confirm that, in addition to thermal decomposition, ZnO nanorods suffer H2 back-etching in the presence of high-temperature hydrogen, which should be closely cared during the growth of GaN-on-Si.
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Wei, Kai Pin, e 魏凱斌. "Fabrication and Analysis of GaN-Schottky Barrier Diode On The Si Substrate". Thesis, 2015. http://ndltd.ncl.edu.tw/handle/vb3y5h.
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碩士國立清華大學
電子工程研究所
103
The material characteristics of Gallium Nitride used in the power device applications are superior than silicon owing to the wide bandgap (~3.4 eV), high critical electric field (3.4 MV/cm), high electron saturation velocity (2*107 cm/s), and high thermal conductivity (2.3 W/cm．K). Recently, many publications related to the AlGaN/GaN-on-Silicon Schottky Barrier Diodes (SBDs) have been discussed. One of the most critical issues is lowering the turn-on voltage owing to the wide bandgap nature of the material, which can increase the conduction loss and seriously degrade the efficiency of circuits and systems. This thesis presents the simulation and measurement results. In the simulation, the Silvaco TCAD software is used to simulate the turn-on voltage and e-field distribution for that with/without anode recess. Also, by considering two different contacts (Schottky and ohmic) with different silicon substrate doping and with/without AlN layer (between GaN and Silicon), the vertical distribution of e-field and carrier concentration is simulated to discuss the breakdown location and the e-field distribution. In the measurement, the anode recess technology is employed to reduce the turn-on voltage, which forms a Γ-shaped electrode and acts similar to a field plate to alleviate the high electric field. The SBDs with anode-recessed structure is presented to simultaneously improve the turn-on voltage from 1.1 V to 0.7 V and the breakdown voltage (VBK) from 1600 to 2200 V. The turn-on voltage reduction can be attributed to the increased tunneling probability by directly contacting the 2DEG with Schottky metal. Also, the high VBK can be attributed to the smooth contact interface and the 2-μm Schottky extension to alleviate the peak e-field intensity.
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Meyer, W. E. (Walter Ernst). "Digital DLTS studies on radiation induced defects in Si, GaAs and GaN". Thesis, 2007. http://hdl.handle.net/2263/25602.
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Since the development of deep level transient spectroscopy (DLTS) in the 1970’s by Lang and others, the technique has become a powerful analytical tool to characterise the electrical properties of defects in semiconductors. With the development of more powerful computers and improved data acquisition systems, it has become possible to replace the original analogue boxcar analysers and lock-in amplifiers that were commonly used in early DLTS systems with digitisers and digital signal processing equipment. The use of a computer for signal processing allows for much more flexibility in the DLTS system. For instance, a digital DLTS system is capable of measuring a much wider range of emission rates than an analogue system. Furthermore, since the digital DLTS system does not rely on a repetitive signal, such a system can observe phenomena such as defect metastability that cannot be observed in an analogue system. In this thesis, the design and characterisation of a digital DLTS system is described. The results of a number of experiments that illustrated the capabilities of the system are reported. The extended range of emission rates that could be measured by the system were illustrated by the measuring of the EL2 defect in GaAs over the temperature range 270 – 380 K (corresponding to emission rates ranging from less than 10–3 s–1 to more than 103 s–1). The results compared well with previous results obtained by means of an analogue DLTS system. Further low temperature measurements on the E2 defect in GaAs showed that in the low temperature region, thermal radiation from the cryostat shroud influenced carrier emission. The field dependence of the emission rate of a number of defects, including defects in as-grown n-GaN, He-ion irradiated n-GaN and Si, was investigated as well. The ability of the digital DLTS system to measure single transients was used to investigate configurationally bistable defects in He-ion irradiated p-Si and a sputter-induced defect with negative-U properties in n-GaN. In both of these cases, the results proved far superior to those obtained by means of an analogue system.Thesis (PhD (Physics))--University of Pretoria, 2007.
Physics
unrestricted
37
Cheng, C. Y., e 鄭智宇. "Study of GaN-Based Power-Chip Light Emitting Diode on Si substrate". Thesis, 2007. http://ndltd.ncl.edu.tw/handle/79619935125810907477.
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碩士長庚大學
光電工程研究所
95
GaN-Based Power-Chip Light Emitter Diodes (LEDs) have revealed important potential for the application of solid lighting and flat–panel- display back light. However, the junction temperature is a critical parameter and affects internal efficiency, device reliability and maximum output power. In this thesis, High-Power and Large-Area GaN-Based LEDs on Si substrates have been studied. Si substrate benefits of better thermal conductivity than sapphire, being widely available as a high quality, large-diameter, low-cost substrate and extensive utilization in the semiconductor industry. In order to reduce the stress between the GaN and Si resulting from their lattice mismatch, two LT-AlN/HT-AlN(LT and HT, low temperature and High temperature) insertion layers are used as an intermediate layers. In the thesis, the diode forward voltage, Vf, is employed to measure the junction temperature of GaN power chips on Si substrate. A same structure power chip on sapphire substrate was also fabricated for reference. We use three different designing structures of electrode , 3P3N, 4P3N and 4P4N, to improve the phenomenon of current crowding and to enhance the reliability and efficiency of LED devices. Characteristics of power chips were studied experimentally by pulse and DC modes current-voltage (I-V) and electron-luminance (EL) measurements at different temperatures. Comparisons of the junction temperatures and light intensity caused by three different geometric structures of electrodes of power chips on Si and sapphire substrates were made in this work. Our experimental results show that the High-Power and Large-Area GaN-Based LEDs on Si substrates (with 40mil *40mil area) has lower junction temperature than sapphire substrate when applying current lower than 350 mA. For power chip on sapphire substrate with 3P3N electrodes patter has the lowest junction temperature and largest light output intensity. Further more, for power chip on Si substrate with 3P3N electrodes patter has the lowest junction temperature at 400 mA and largest light output intensity.
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Chen, Bo-Chih, e 陳博治. "Electronic characteristics of defects of GaN films grown on Si(111) substrate". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/8enb46.
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碩士國立中山大學
物理學系研究所
97
The electronic properties of the defects of the GaN/Si(111) system has been successfully measured by STM in the work. Different types of the dislocations in GaN films, such as edge dislocations and screw dislocations, have been observed. Defects induce the change of the band gap from 3.4 eV to 2.2 eV. The characteristic scattering length of the edge dislocation is around 25 nm.
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Liu, Yen-Hung, e 劉彥宏. "Study on InGaN/GaN Quantum Well Structures on Si Substrate with Transmission Electron Microscopy". Thesis, 2012. http://ndltd.ncl.edu.tw/handle/25988065222972125041.
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碩士國立臺灣大學
光電工程學研究所
100
The difference of thermal expansion coefficient between GaN and Si results in a strong tensile stress on the GaN epitaxial layer during the cooling process. In our study, we create a compressive thermal stress by using an AlN buffer layer grown with graded temperatures to compensate the tensile thermal stress. The InGaN/Gan quantum well (QW) sample with the largest number of graded-temperature growth stages has the weakest residual tensile stress, shortest emission wavelength, and highest emission internal quantum efficiency. In this study, the variation trend of indium composition of the QW samples grown on Si and the control sample grown on sapphire based on strain state analysis is shown to be the same as that based on the X-ray diffraction measurement and fitting. However, the variation range becomes larger. Also, from the cross-sectional transmission electron microscopy study, it is found that the threading dislocation (TD) density decreases with decreasing residual stress. The TD density above the GaN/AlN superlattice inter-layer is lower than that below the inter-layer, indicating that the inter-layer can block the TDs.
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Kuan-Fu, Pan, e 潘冠甫. "Investigation and Fabrication of GaN Light -Emitting Diodes on Si by Wafer Bonding". Thesis, 2005. http://ndltd.ncl.edu.tw/handle/76622390002197909774.
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碩士國立中興大學
精密工程研究所
93
For blue LEDs, due to the lack of native substrates, the GaN crystal structures are commonly grown on sapphire substrates. When blue LEDs driven on high current, the huge joule heating could inhibit LED performance because of the poor thermal conductivity of sapphire. In this work, a vertical type structure for GaN/mirror/Si LED is developed by a combination of wafer bonding and laser lift-off (LLO) techniques. In the electricity characteristic, the I-V curves of the GaN/mirror/Si and original GaN/sapphire LED samples are nearly the same. This suggests that the LLO and Wafer bonding processes do not adversely affect the LED performance. In the optical characteristic, the luminance intensity of GaN/mirror/Si LED (1456 mcd at 350 mA) is 2.6 times than that of original planar GaN/Sapphire LED (570 mcd at 350 mA). In the heat sink characteristic, as the forward current increase from 20 to 350mA, the junction temperature of Si substrates increases from 23 to 151 C. This junction temperature is lower than sapphire substrate (37C to 246 C at 350mA). Therefore, the heat can be valid transfer from LED junction to heat sink across the Si substrate. It is evident that the device performance of the GaN/mirror/Si LED is better than that of the conventional GaN/sapphire LED. These results indicate that the GaN/mirror/Si LED presents the better performance due to the Si heat sink.
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Young, Chang-Jay, e 楊昌杰. "Study on the Characterization of MOCVD Grown Si-doped GaN Multi-layer Structure". Thesis, 2000. http://ndltd.ncl.edu.tw/handle/41730624630017078632.
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碩士中原大學
電子工程學系
88
This study aims essentially at recognizing whether the Si-doped multi-layers can improve the quality of GaN epitaxial films effectively. It is widely reported that slight Si-doping improves the electrical quality of GaN films effectively; i.e., it enhances the mobility and reduces the background electron concentration. However, Si-doping will enhance the yellow band intensity, which represents deep level defects. To obtain high-quality epitaxial layer simultaneously with good electrical and optical quality, a practical solution is to grow slightly Si-doped GaN layer first and then to grow an undoped GaN layer. Each layer of our multi-layer structure involves two sub-layers. First, a 100Ǻ undoped GaN sub-layer is grown. Then a 100Ǻ Si-doped GaN layer is grown as another sub-layer. These two sub-layers form fundamental period with the thickness of 200Ǻ for our multi-layer structure. The use of the multi-layer structure given above is possible to have the same effect as a multi-buffer-layer structure, which can continuously improve the quality of GaN film. Each slightly Si-doped sub-layer plays the role of a buffer, which can improve the quality of the overgrowth GaN sub-layer. This defect reduction process occurs repeatedly through the whole multi-layer structure. Consequently, the final top layer of undoped GaN will exhibit the best film quality. During our experiments, we have grown by MOCVD, a series of samples with the multi-layer structure of different numbers of period ( the numbers used are 1, 7, 10, 20, 30, 40 ). In the C-V measurement, we have found that donor concentration decreases from 2.82 x 1016 cm-3 to 3.8 x 1015 cm-3. Through the Atomic Force Microscopy (AFM) observations, we have found that the density of dark spots, which are corresponding to dislocations, decreases from 1.26 x 109 cm2 to 2.5 x 108 cm2. In the photoluminescence spectra, the intensity ratio ( INBE / IYL ) of near band-edge emission to yellow luminescence raises from 20 to 120. Further from PL transient measurement performed at the wavelength of near band-edge emission, we found that the lifetime raises from 42ps to 55ps. All the results demonstrated that Si-doped GaN multi-layer structure can be used to reduce the densities of dislocations and other defects effectively, and obviously improve the electrical and optical qualities of the top undoped GaN epitaxial films.
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林劭昱. "Leakage Current Suppression of GaN-on-Si SBDs and HEMTs with Substrate Trenches". Thesis, 2013. http://ndltd.ncl.edu.tw/handle/agj2xy.
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余子強. "Useing anodic aluminum oxide on Si and GaN substrates to fabricate the nanomask". Thesis, 2006. http://ndltd.ncl.edu.tw/handle/01873288586000061095.
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"GaN-on-Si RF Switched Mode Power Amplifiers for Non-Constant Envelope Signals". Master's thesis, 2015. http://hdl.handle.net/2286/R.I.36513.
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abstract: This work implements three switched mode power amplifier topologies namely inverse class-D (CMCD), push-pull class-E and inverse push-pull class-E, in a GaN-on-Si process for medium power level (5-10W) femto/pico-cells base-station applications. The presented power amplifiers address practical implementation design constraints and explore the fundamental performance limitations of switched-mode power amplifiers for cellular band. The designs are analyzed and compared with respect to non-idealities like finite on-resistance, finite-Q of inductors, bond-wire effects, input signal duty cycle, and supply and component variations. These architectures are designed for non-constant envelope inputs in the form of digitally modulated signals such as RFPWM, which undergo duty cycle variation. After comparing the three topologies, this work concludes that the inverse push-pull class-E power amplifier shows lower efficiency degradation at reduced duty cycles. For GaN based discrete power amplifiers which have less drain capacitance compared to GaAs or CMOS and where the switch loss is dominated by wire-bonds, an inverse push-pull class-E gives highest output power at highest efficiency. Push-pull class-E can give efficiencies comparable to inverse push-pull class-E in presence of bondwires on tuning the Zero-Voltage Switching (ZVS) network components but at a lower output power. Current-Mode Class-D (CMCD) is affected most by the presence of bondwires and gives least output power and efficiency compared to other two topologies. For systems dominated by drain capacitance loss or which has no bondwires, the CMCD and push-pull class-E gives better output power than inverse push-pull class-E. However, CMCD is more suitable for high breakdown voltage process.Dissertation/Thesis
Masters Thesis Electrical Engineering 2015
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Chen, Ji-Xian, e 陳季賢. "Growth and Characterization of AlInN/AlN/GaN Heterostructures on 6-inch Si Substrates". Thesis, 2016. http://ndltd.ncl.edu.tw/handle/75689759994782567860.
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碩士國立中央大學
電機工程學系
104
This study aims at growing high electron mobility and low channel resistance AlInN/GaN heterostructures on Si substrates by metal-organic chemical vapor deposition, and the investigation of carrier scattering mechanisms in these heterostructures. In order to reduce alloy scattering in AlInN/GaN high electron mobility transistors (HEMTs), a binary spacer layer, i.e. AlN, is inserted between AlInN and GaN so as to prevent electrons in GaN channel from spilling to AlInN barrier layer. By optimizing the growth conditions of AlInN HEMTs, surface roughness of 0.738 nm, electron mobility of 1,360 cm2/V-s with two dimensional electron gas (2DEG) concentration of 2.13×1013 cm-2, leading to a very low sheet resistance of 215 ohm/sq, have been achieved. A series of AlInN HEMTs with GaN cap layer thickness and Al content in AlInN barrier layer ranging from 0 to 13 nm and 82% to 89%, respectively, have also been prepared and characterized. Hall-effect measurements show that 2DEG concentration increases with decreasing GaN cap thickness and increasing Al content in AlInN barrier layer, while electron mobility decreases with increasing 2DEG density. It is also observed that the degradation of electron mobility is more significant for the samples with a rough interface than those with a smooth one. From temperature-dependent Hall-effect measurements, it is concluded that the electron mobility of AlInN HEMTs with high 2DEG density is dominated by interface roughness scattering at low temperature. Reducing interface roughness is an essential task to achieve high 2DEG concentration AlInN HEMTs.
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Lin, Hsien-yu, e 林憲佑. "Characterization of GaN and InGaN Grown on Patterned 7o-off (001) Si Substrate". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/76531257618176604728.
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碩士國立中央大學
電機工程研究所
99
This dissertation describes an innovative method for selective epitaxial growth of semi-polar (1-101) GaN on V-grooved Si substrates. In addition to the SiO2 mask along the V grooves, SiO2 stripes perpendicular to the V grooves are introduced to overcome the issue of cracking caused by the large mismatch in the thermal expansion coefficients between GaN and Si. The structural and optical properties of the GaN films thus grown, particularly the reduction in dislocation density and the enhancement of their luminescence properties by the selective area epitaxial process, are investigated and elucidated. The growth of semi-polar (1-101) GaN films as thick as 1µm without cracks and InGaN/GaN multiple quantum wells (MQWs) on the resultant GaN have been successfully achieved on V-grooved (001) Si substrate in a dimension of 1x1 cm2. The transmission electron microscopy (TEM) measurements reveal that the dislocations bend toward the [1-100] and [11-20] directions as a consequence of the (1-101) and (11-22) facets that form during the initial stage of the lateral overgrowth upon the SiO2 stripes. This reduction in the dislocation density leads to an increase in the luminescence intensity as observed by photoluminescence (PL) and cathodoluminescence (CL) measurements at room temperature. Finally, the crack-free film was successfully fabricated to devices and showed low leakage current under the bias of -12 V while the turn-on voltage is about 4 V due to the inefficient ionization of Mg in p-GaN layer. Judging from the optical and electrical properties observed, the selective growth method holds promise for high quality free-standing semi-polar GaN substrates and III-nitride semiconductor devices once we further improve Magnesium (Mg) ionization in GaN layer. Secondly, the performance of semi-polar (1-101) light emitting diodes (LEDs) are simulated with variations in the thickness of the MQWs, the barrier doping concentration, and the Aluminum (Al) composition of the AlGaN Electron Blocking Layer (EBL). The highest efficiency is obtained when the thickness of the (1-101) semi-polar quantum wells (QWs) and quantum barriers (QBs) are 3 nm and 9 nm, respectively. It is also found that inserting an AlGaN EBL does not help much for blocking electrons possibly due to the inherently weak polarization, which suppresses the escape of the electrons out of the QW active region. Finally, an opposite IQE tendency was found when different doping concentrations in QBs were applied in (1-101) and (0001) LED structures. The lower polarization field in the semi-polar structure enables the QWs to accommodate more electrons and facilitates radiative recombination before spilling over to p-GaN region, thus light efficiency rises with increasing doping concentration to a specific degree; whereas the polarized (0001) LEDs exhibit an initial monotonic drop in efficiency due to the easy overflow of electrons from the MQWs. The higher the doping concentration in the barriers, the higher the spillover current is, suggesting that the Quantum Confined Stark Effect (QCSE) caused by the strong polarization field is the major factor in the observed efficiency degradation with barrier doping.
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Yang, Shih Hsien, e 楊士賢. "Novel GaN on Si Substrate MIS-HEMTs using Diamond-like Carbon Gate Process". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/20779742453049890091.
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Chen, Yueh-Ting, e 陳約廷. "Characterizations of RF Properties of GaN-on-Si HEMTs with Substrate Removal Technology". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/8v6a48.
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碩士國立臺灣大學
光電工程學研究所
107
With the upsurge of wireless communication market like autonomous vehicle (self-driving car) and fifth-generation wireless systems (5G). Gallium nitride high electron mobility transistors (GaN HEMTs) have gained more focus in recent years. Due to the outstanding material properties including wide-band-gap and high electron mobility, GaN HEMTs are suitable for high power and microwave system. The two dimensional electron gas (2DEG) formed in heterojunction ensures the large operating output current and low ON-resistance of the device. In absence of low-cost GaN bulk substrate, GaN is grown on various kinds of substrates. LR Si is the most attractive one due to low cost and large size availability, which is crucial in terms of commercialization. However, devices fabricated on LR Si have many drawbacks, such as lattice mismatch, low breakdown voltage and high absorption of RF signal. To overcome the obstacles, local Si removal is considered as a promising approach. In this thesis, we aim to investigate electrical properties of conventional AlGaN/GaN/Si HEMTs after local Si removal. With Hall measurement and Raman spectroscopy analysis, material properties of epi structure are confirmed to remain unchanged after Si removal. However, device with Si removal incur severe self-heating effect since air possesses lower thermal conductivity compared to Si. We also investigate trapping effect and conclude that current collapse can be suppressed effectively after Si removal due to decrease of buffer tapping. Furthermore, impact of substrate removal on microwave performance is studied. Our results show that lower transconductance (gm) caused by self-heating effect may degrades forward voltage gain S21 at low frequency. However, input signal couples with conductive substrate at high frequency has larger impact on S21 than self-heating effect, which results in larger S21 at high frequency after Si removal. Current gain cut-off frequency and power gain cut-off frequency are also improved since higher power efficiency can be attained. Moreover, substrate leakage current has longer response time compared to channel current due lower carrier mobility, which means it is not in phase with output signal and acts as a noise source. The measurement results indicate that noise figure can be greatly reduced after Si removal. From earlier discussion, we conclude that Si removal is an effective method to increase microwave performance of HEMT on LR-Si, which provides a cost-effective solution to maintain RF performance.
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Zang, Keyan, Soo-Jin Chua e Carl V. Thompson. "The Effect of Periodic Silane Burst on the Properties of GaN on Si (111) Substrates". 2004. http://hdl.handle.net/1721.1/7362.
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The periodic silane burst technique was employed during metalorganic chemical vapor deposition of epitaxial GaN on AlN buffer layers grown on Si (111). Periodic silicon delta doping during growth of both the AlN and GaN layers led to growth of GaN films with decreased tensile stresses and decreased threading dislocation densities, as well as films with improved quality as indicated by x-ray diffraction, micro-Raman spectroscopy, atomic force microscopy, and transmission electron microscopy. The possible mechanism of the reduction of tensile stress and the dislocation density is discussed in the paper.Singapore-MIT Alliance (SMA)
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Huang, Ying-Kai, e 黃英凱. "Study of GaN Layer Grown on Si(111) by Plasma Assisted Molecular Beam Epitaxy". Thesis, 2008. http://ndltd.ncl.edu.tw/handle/33827701237418119898.
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碩士國立彰化師範大學
電子工程學系
96
GaN layers has been grown on Si(111) by plasma-assisted molecular beam epitaxy. The effect of thickness, growth rate and III/V ratio of high temperature AlN buffer layer on the GaN samples was investigated. Surface morphology is characterized by scanning electron microscopy and atomic force microscopy. Crystal quality is assessed by high resolution x-ray diffraction (HRXRD) and transmission electron microscopy (TEM). Optical properties are measured by photoluminescence. From the analysis of plan-view TEM, the total dislocation density reduces from 5.28×1010 cm-2 to 3.20×1010 cm-2 when buffer layer growth rate is reduced from 250 nm/hr to 100 nm/hr. HRXRD analysis shows the same trend. The major low temperature (10K) feature locating at 3.478eV is assigned as free exciton.