Teses / dissertações sobre o tema "Contremesure"
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Damiot, Anthony. "Effet d'une contremesure nutritionnelle sur l'inflexibilité métabolique induite par simulation d'impesanteur chez l'homme". Thesis, Strasbourg, 2018. http://www.theses.fr/2018STRAJ124/document.
Texto completo da fonteSpace missions and bedrest simulation studies have shown that physical inactivity affects all physiological systems in humans. In prolonged bed rest conditions, our laboratory (UMR7178, IPHC, DEPE, Strasbourg) showed that metabolic adaptations were close to that found in the metabolic syndrome associated with metabolic chronic diseases in the general population. Based on these results, we proposed a hypothesis to describe the cascade of events leading to metabolic alterations in simulated microgravity, leading to the development of metabolic inflexibility. Metabolic inflexibility is defined as the inability of the body to adjust fuel use to changes in fuel availability. The first objective of this Thesis was to test this hypothesis and understand the mechanisms underlying the simulated microgravity induced metabolic alterations. Specifically, we focused on characterizing the metabolic inflexibility syndrome in humans through clinical investigation of muscle condition, inflammation and oxidative stress, insulin sensitivity and oxidation of energy substrates in a proof of concept study and a 60-day microgravity simulation study in healthy male adults. Based on recent studies demonstrating the impact of nutritional supplements on metabolic adaptations associated with many chronic metabolic diseases, a proof-of-concept study tested the efficacy of a nutritional cocktail composed of polyphenols, omega-3, vitamin E and selenium. In the feasibility study, we showed that supplementation reduced muscle atrophy, oxidative stress and the development of metabolic inflexibility via an improvement in lipid oxidation and a reduction in de novo lipogenesis following a 20-day period of physical inactivity induced by daily step reduction. Based on these first results, a 60-day bed rest study was conducted in health men to test the effects of the dietary cocktail in simulated microgravity conditions. In this second human clinical research study, nutritional supplementation prevented at least partially acute and chronic adaptations caused by physical inactivity induced by bed rest. In particular, supplementation increased antioxidant blood defenses, prevented increased lipid levels, reduced lipid oxidation and mitigated the development of acute and chronic metabolic inflexibility in absence of metabolic challenge. However, the countermeasure did not have a protective effect following a metabolic challenge in the form of carbohydrate overnutrition. All the results indicate that the development of metabolic inflexibility appears to be an early event, which, if detected in time, could prove to be a useful biomarker to use to prevent chronic diseases in the 21st century. Moreover, this study demonstrated the advantage of an antioxidant and anti-inflammatory cocktail by limiting metabolic alterations without having harmful effects on other systems, while being easy to implement and cost-effective. Even if the nutritional countermeasure used in this study is not sufficient to keep all physiological systems intact, further studies will have to be carried out to find the ideal combination of countermeasures to limit microgravity-induced degradation and thus allow new advances in space exploration (Moon, Mars) over the next decades. In this line, an adapted protocol of physical activity combined with a nutritional countermeasure in the form of a cocktail could be a promising approach
Rudwill, Floriane. "Conséquences d’une simulation d’impesanteur de 21 jours chez l’homme sur le métabolisme des lipides et effets d’une supplémentation en protéines testée comme contremesure". Thesis, Strasbourg, 2015. http://www.theses.fr/2015STRAJ009/document.
Texto completo da fonteDuring 21 days of simulated microgravity, the development of several metabolic alterations has been studied: a low-grade inflammation and an alteration of insulin sensitivity and lipid metabolism. Known for their positive effect on metabolism, whey proteins supplementation combined with alkaline salts have also been tested. At the opposite of previous studies, no inflammation, nor lipid metabolism alterations have clearly been described. Nevertheless, a decrease in carbohydrates oxidation in favor of lipids is observed, suggesting the development of insulin insensitivity. Our data suggest that it may be possible to prevent the metabolic disorders associated with severe physical inactivity by anisocaloric replacement of lipids by proteins in the diet, along with a protein intake of 1.2g/kg/day and tight control of energy balance by adjusting energy intake
Séré, Ahmadou Al Khary. "Tissage de contremesures pour machines virtuelles embarquées". Limoges, 2010. http://aurore.unilim.fr/theses/nxfile/default/ec9d960e-5234-4fd7-a38f-bd8107443f05/blobholder:0/2010LIMO4017.pdf.
Texto completo da fonteOur goal, is to propose some way to guaranty that we can detect that a fault attack occurs tampering the smart card ship. And we want to do this in an automatic way that is affordable in resources (memory and CPU averhead) for the card. To achieve this goal, we use a functionality introduced by Java Card 3, the security annotations that allow a programmer to choose sensitive methods or classes of his application. Allowing the virtual machine to execute them in a secured mode. The developed approach is to use security information introduce in application code and to modify the java virtual machine to make good use of them to detect the attack. These researches focus on proposing different mechanisms that can help to fight against fault attacks in verifying during runtime the code integrity or the control flow integrity
Ducousso, Rieul. "Sécurisation des accès aux périphériques et depuis les périphériques dans une architecture multicœur RISC-V utilisée pour la virtualisation". Electronic Thesis or Diss., Sorbonne université, 2023. http://www.theses.fr/2023SORUS040.
Texto completo da fonteToday, computer security is a major topic in various fields such as healthcare, transport, industry or defense. Systems integrated an ever increasing number of components developed by untrusted sources. Covert channel attacks subvert system mechanism to create a communication channel between entities that otherwise shouldn't be able to communicate thus breaching data confidentiality. These attacks circumvent classical isolation mechanisms by allowing processes or virtual machines to exchange and exfiltrate data. Most attacks target the processor and its neighbouring components. We propose a new side-channel attack exploiting the temporal variations due to the memory hierarchy to implement a communication channel. This attack breaks the isolation between peripherals of a virtualized system opening a communication channel between two malicious devices. This attack relies on the adaptation of principles exploited by covert channels on processors with specificities of peripherals. We show that it is possible to exchange data between two devices isolated by an IOMMU. Secondly, we modify the microarchitecture of the IOMMU to reduce the impact of such attacks. The defense strategy is to decorrelate the operations performed by the peripherals and the internal state of its components. We show in simulation and on a system incorporating a processor running Linux implemented on a board FPGA the effects of this countermeasure on the isolation as well as on the device performance. This countermeasure reduces the throughput covert channel without however negating it fully. The impact on performance of peripheral memory accesses is limited
Joaquim, da Rolt Jean. "Testabilité versus Sécurité : Nouvelles attaques par chaîne de scan & contremesures". Thesis, Montpellier 2, 2012. http://www.theses.fr/2012MON20168.
Texto completo da fonteIn this thesis, we firstly analyze the vulnerabilities induced by test infrastructures onto embedded secrecy in digital integrated circuits dedicated to cryptography. Then we propose new scan-based attacks and effective countermeasures. Scan chains insertion is the most used technique to ensure the testability of digital cores, providing high-fault coverage. However, for ICs dealing with secret information, scan chains can be used as back doors for accessing secret data, thus becominga threat to device's security. We start by describing a series of new attacks that exploit information leakage out of advanced Design-for-Testability structures such as response compaction, X-Masking and partial scan. Conversely to some previous works that proposed that these structures are immune to scan-based attacks, we show that our new attacks can reveal secret information that is embedded inside the chip boundaries. Regarding the countermeasures, we propose three new solutions. The first one moves the comparison between test responses and expected responses from the AutomaticTest Equipment to the chip. This solution has a negligible area overhead, no effect on fault coverage. The second countermeasure aims to protect the circuit against unauthorized access, for instance to the test mode, and also ensure the authentication of the circuit. For thatpurpose, mutual-authentication using Schnorr protocol on Elliptic Curves is implemented. As the last countermeasure, we propose that Differential Analysis Attacks algorithm-level countermeasures, suchas point-blinding and scalar-blinding can be reused to protect the circuit against scan-based attacks
Bhasin, Shivam. "Contremesures au niveau logique pour sécuriser les architectures de crypto-processeurs dans un FPGA". Phd thesis, Télécom ParisTech, 2011. http://pastel.archives-ouvertes.fr/pastel-00683079.
Texto completo da fonteSelmane, Nidhal. "Attaques en fautes globales et locales sur les cryptoprocesseurs : mise en oeuvre et contremesures". Phd thesis, Paris, Télécom ParisTech, 2010. https://pastel.hal.science/pastel-00565881.
Texto completo da fonteNowadays, embedded systems and smart cards are part of everyday life. With the proliferation of these devices the need for security increases. In order to meet this demand, cryptographic algorithms are applied. However, even if the algorithms on mobile devices are secure from a cryptanalytical point of view, the secret they use can be revealed by attacking the cryptographic implementation. Indeed an adversary with physical access to the device can benefit from its characteristics or influence its behavior. Methods that observe the activity of a device are considered as passive attacks. In contrast, active attacks try to manipulate the computation and benefit from the erroneous results. These last methods are also called fault injection attacks. This thesis deals with fault attacks. It focuses on practical validations of theoretical attack on symmetric cryptographic algorithm using non-invasive attack. First a new global method to inject fault called setup time violation attack on both ASICs and FPGAs has been studied and carried out on different AES implementations. Then local and semi-invasive optical fault attacks by means of laser beam have been performed on a software implementation. Beside this analysis work, some countermeasures have been investigated. It has been notably shown that Differential with Precharge Logics, already good countermeasure against passive attacks, provide excellent resilience properties against fault attacks. We have demonstrated theoretically and shown practically that information hiding (such as WDDL) makes it difficult to mount fault attacks, since faulty outputs reveal no information about the keys
Selmane, Nidhal. "Attaques en fautes globales et locales sur les cryptoprocesseurs AES : mise en œuvre et contremesures". Phd thesis, Télécom ParisTech, 2010. http://pastel.archives-ouvertes.fr/pastel-00565881.
Texto completo da fonteGomes, Mesquita Daniel. "Architectures Reconfigurables et Cryptographie: Une Analyse de Robustesse et Contremesures Face aux Attaques par Canaux Cachés". Phd thesis, Université Montpellier II - Sciences et Techniques du Languedoc, 2006. http://tel.archives-ouvertes.fr/tel-00115736.
Texto completo da fontecryptographie. Divers aspects sont étudiés, tels que les principes de base de la cryptographie,
l'arithmétique modulaire, les attaques matériaux et les architectures reconfigurables. Des méthodes
originales pour contrecarrer les attaques par canaux cachés, notamment la DPA, sont proposés.
L'architecture proposée est efficace du point de vue de la performance et surtout est robuste contre
la DPA.
Provost, Romain. "Adaptation cardiovasculaire de l'astronaute : en confinement et en microgravité réelle et simulée". Thesis, Tours, 2015. http://www.theses.fr/2015TOUR3307/document.
Texto completo da fonteThis PhD work focuses on astronaut cardiovascular adaptation and deconditioning in real prolonged microgravity, short simulated microgravity (with and without countermeasures) and long-term confinement. To answer to this topic 3 humans experimental studies have been performed, and thus the present PhD work is divided into 3 distinct parts . The first one is the mission « Mars 500 » which consists in 520-days confinement with 6 subjects-volunteers mission. The second is the project « Vessel Imaging » whitch consit in a 6-months spaceflight aboard the « International Space Station » with 10 subjects-astronauts. The third is the « Short Time Bed -Rest (STBR) » study (12 subjects) which consist in a short period of bedrest (-6°, 5 days) with and without the use of two cardiovascular countermeasures by hypergravity (continuous or intermittent)
Thuillet, Céline. "Implantations cryptographiques sécurisées et outils d’aide à la validation des contremesures contre les attaques par canaux cachés". Thesis, Bordeaux 1, 2012. http://www.theses.fr/2012BOR14508/document.
Texto completo da fonteFor several years, the security components such as smart cards are subject to side channel attacks. These attacks allow to exhibit secrets by analyzing the physical characteristics such as power consumption or execution time. As part of this thesis, two countermeasures were carried out and applied to the AES (symmetric cipher). In addition, to help future development of countermeasures and their validation, a simulator was developed. It realizes attacks using a power consumption model defined in the early phases of development. Finally, I participated in working groups that have proposed Shabal to SHA-3 competition, which aims to define a new standard for hash functions. Hardware implementations have been made thereafter
Papadimitriou, Athanasios. "Modélisation au niveau RTL des attaques laser pour l'évaluation des circuits intégrés sécurisés et la conception de contremesures". Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT041/document.
Texto completo da fonteMany aspects of our current life rely on the exchange of data through electronic media. Powerful encryption algorithms guarantee the security, privacy and authentication of these exchanges. Nevertheless, those algorithms are implemented in electronic devices that may be the target of attacks despite their proven robustness. Several means of attacking integrated circuits are reported in the literature (for instance analysis of the correlation between the processed data and power consumption). Among them, laser illumination of the device has been reported to be one important and effective mean to perform attacks. The principle is to illuminate the circuit by mean of a laser and then to induce an erroneous behavior.For instance, in so-called Differential Fault Analysis (DFA), an attacker can deduce the secret key used in the crypto-algorithms by comparing the faulty result and the correct one. Other types of attacks exist, also based on fault injection but not requiring a differential analysis; the safe error attacks or clocks attacks are such examples.The main goal of the PhD thesis was to provide efficient CAD tools to secure circuit designers in order to evaluate counter-measures against such laser attacks early in the design process. This thesis has been driven by two Grenoble INP laboratories: LCIS and TIMA. The work has been carried out in the frame of the collaborative ANR project LIESSE involving several other partners, including STMicroelectronics.A RT level model of laser effects has been developed, capable of emulating laser attacks. The fault model was used in order to evaluate several different secure cryptographic implementations through FPGA emulated fault injection campaigns. The injection campaigns were performed in collaboration with TIMA laboratory and they allowed to compare the results with other state of the art fault models. Furthermore, the approach was validated versus the layout of several circuits. The layout based validation allowed to quantify the effectiveness of the fault model to predict localized faults. Additionally, in collaboration with CMP (Centre Microélectronique de Provence) experimental laser fault injections has been performed on a state of the art STMicroelectronics IC and the results have been used for further validation of the fault model. Finally the validated fault model led to the development of an RTL (Register Transfer Level) countermeasure against laser attacks. The countermeasure was implemented and evaluated by fault injection campaigns according to the developed fault model, other state of the art fault models and versus layout information
Dubeuf, Jérémy. "Etude et implémentation de contre-mesures matérielles pour la protection de dispositifs de cryptographie ECDSA". Thesis, Université Grenoble Alpes (ComUE), 2018. http://www.theses.fr/2018GREAT048.
Texto completo da fonteInformation security heavily relies on integrated circuits (ICs). Unfortunately, ICs face a lot of threats such as side channel or fault attacks. This work focuses on small vulnerabilities and countermeasures for the Elliptic Curve Digital Signature Algorithm (ECDSA). The motivation is that leakage sources may be used in different attack scenarios. By fixing the leakage, existing attacks are prevented but also undiscovered or non-disclosed attacks based on the leakage. Moreover, while the elliptic curve scalar algorithm is at the heart of the security of all elliptic curve related cryptographic schemes, all the ECDSA system needs security. A small leakage of few secret bits may conduct to fully disclose the private key and thus should be avoided.The ECDSA can be implemented in different flavors such as in a software that runs on a microcontroller or as a hardware self-contained block or also as a mix between software and hardware accelerator. Thus, a wide range of architectures is possible to implement an ECDSA system. For this reason, this work mainly focuses on algorithmic countermeasures as they allow being compliant with different kinds of implementations
Baronti, Cécile. "Etude de Flavivirus : epidémiologie moléculaire en Bolivie et Analyse de leur interaction sur la réponse interféron dépendante du TLR3". Thesis, Aix-Marseille 2, 2010. http://www.theses.fr/2010AIX20664/document.
Texto completo da fonteThe Flavivirus genus consists of sevevral human pathogens responsible for hemorragic syndrome or encephalitis. The absence of specific antiviral treatment and an increase in Flavivirus incidence has led to a greater research effort in fighting these diseases. The study takes an epidemiological and a fundamental approach in its analysis of the innate immune response to flavivirus infection as well as flaviviral adaptation to evade this response. The analysis of circulating strains in Bolivia has led to a better understanding of dengue and yellow fever and also an awareness of their genetic variability. Given the limited information available in Bolivia, our studies could be used as a reference to understand future epidemics, improve diagnostic methods and allow the development of prevention strategies to fight against yellow fever in south Africa. The relationship between virus and host results from a subtle balance between viral replication and immunity clearance allowing the survival of both species. Each one as developed defence mechanisms against the other. We also examined the role of the non structural protein NS1 in the interferon respons to Flaviviral infection. Knowledge on viral escape strategies from host immunity could help to develop antiviral treatment for these arbovirus diseases
Ordas, Thomas. "Analyse des émissions électromagnétiques des circuits intégrés". Thesis, Montpellier 2, 2010. http://www.theses.fr/2010MON20001.
Texto completo da fonteIn the area of secure integrated circuits, such as smart cards, circuit designers are always looking to innovate to find new countermeasures against attacks by the various side channels that exist today. Indeed, side channels attacks such as the analysis of electromagnetic emissions permit to extract secret information contained in circuits. Based on this observation, in this thesis, we focused on the study of electromagnetic analysis to observe the analysis possibilities. This manuscript is organized as follows. Initially, we presented a measurement system for electromagnetic emissions in time domain, and the results obtained on different circuits. From these results, a summary of opportunities, relating to the security threat, posed by electromagnetic analysis, is proposed as well as solutions proposals to reduce electromagnetic radiations of integrated circuits. In a second step, we are interested in the simulation of electromagnetic emissions. A state of the art of simulation tools which exist today, has allowed us to demonstrate that none of them allowed to have a fine enough resolution in terms of electromagnetic emissions. To fill this gap, a simulation tool has been developed and to validate this flow, a comparison between measurement results and simulation results was performed
Goudarzi, Dahmun. "Secure implementation of block ciphers against physical attacks". Electronic Thesis or Diss., Paris Sciences et Lettres (ComUE), 2018. http://www.theses.fr/2018PSLEE082.
Texto completo da fonteSince their introduction at the end of the 1990s, side-channel attacks are considered to be a major threat against cryptographic implementations. Higher-order masking is considered to be one the most popular existing protection strategies. It consists in separating each internal variable in the cryptographic computation into several random variables. However, the use of this type of protection entails a considerable efficiency loss, making it unusable for industrial solutions. The goal of this thesis is to reduce the gap between theoretical solutions, proven secure, and efficient implementations that can be deployed on embedded systems. More precisely, I am analysing the protection of block ciphers such as the AES encryption scheme, where the main issue is to protect the s-boxes with minimal overhead in costs. I have tried, first, to find optimal mathematical representations in order to evaluate the s-boxes while minimizing the number of multiplications (a decisive parameter for masking schemes, but also for homomorphic encryption). For this purpose, I have defined a generic method to decompose any function on any finite field with a low multiplicative complexity. These representations can, then, be efficiently evaluated with higher-order masking. The flexibility of the decomposition technique allows also easy adjusting to the developer’s needs. Secondly, I have proposed a formal method for measuring the security of circuits evaluating masking schemes. This technique allows to define with exact precision whether an attack on a protected circuit is feasible or not. Unlike other tools, its response time is not exponential in the circuit size, making it possible to obtain a security proof regardless of the masking order used. Furthermore, this method can strictly reduce the use of costly tools in randomness required for reinforcing the security of masking operations. Finally, we present the implementation results with optimizations both on algorithmic and programming fronts. We particularly employ a bitslice implementation strategy for evaluating the s-boxes in parallel. This strategy leads to speed record for implementations protected at high order. The different codes are developed and optimized under ARM assembly, one of the most popular programming language in embedded systems such as smart cards and mobile phones. These implementations are also available online for public use
Korkikian, Roman. "Side-channel and fault analysis in the presence of countermeasures : tools, theory, and practice". Thesis, Paris Sciences et Lettres (ComUE), 2016. http://www.theses.fr/2016PSLEE052/document.
Texto completo da fonteThe goal of the thesis is to develop and improve methods for defeating protected cryptosystems. A new signal decompositionalgorithm, called Hilbert Huang Transform, was adapted to increase the efficiency of side-channel attacks. This technique attempts to overcome hiding countermeasures, such as operation shuffling or the adding of noise to the power consumption. The second contribution of this work is the application of specific Hamming weight distributions of block cipher algorithms, including AES, DES, and LED. These distributions are distinct for each subkey value, thus they serve as intrinsic templates. Hamming weight data can be revealed by side-channel and fault attacks without plaintext and ciphertext. Therefore these distributions can be applied against implementations where plaintext and ciphertext are inaccessible. This thesis shows that some countermeasures serve for attacks. Certain infective RSA countermeasures should protect against single fault injection. However, additional computations facilitate key discovery. Finally, several lightweight countermeasures are proposed. The proposed countermeasures are based on the antagonist masking, which is an operation occurring when targeting data processing, to intelligently mask the overall power consumption
Vaquié, Bruno. "Contributions à la sécurité des circuits intégrés face aux attaques par canaux auxiliaires". Thesis, Montpellier 2, 2012. http://www.theses.fr/2012MON20133/document.
Texto completo da fonteSide channel attacks such as power analysis attacks are a threat to the security of integrated circuits.They exploit the physical leakage of circuits during the cryptographic computations to retrieve the secret informations they contain. Many countermeasures, including hardware, have been proposed by the community in order to protect cryptosystems against such attacks. Despite their effectiveness, their major drawback is their significant additional cost in area, speed and consumption. This thesis aims at proposing low cost countermeasures able to reduce the leaks and offering a good compromise between security and costs. First we identify the main sources of leakage of a cryptographic system that integrates an iterative hardware architecture of a symetric algorithm. Then we propose several low cost countermeasures, which aim at reducing this leakage. Finally, we evaluate the robustness of our solutions against side channel attacks
Gomina, Kamil. "Méthodologie et développement de solutions pour la sécurisation des circuits numériques face aux attaques en tensions". Thesis, Saint-Etienne, EMSE, 2014. http://www.theses.fr/2014EMSE0751.
Texto completo da fonteGeneral use products as mobile phones or smartcards manipulate confidential data. As such, the circuits composing them are more and more prone to physical attacks, which involve a threat for their security. As a result, SoC designers have to develop efficient countermeasures without increasing overall cost and complexity of the final application. The analysis of existing attacks on digital circuits leads to consider power attacks, in advanced technology nodes.First of all, the power signature of a circuit was determined at design time. To do so, an electrical model was suggested based on the current consumption and the overall power grid capacitance. The methodology to extract these parameters, as well as the evaluation of the model are presented. This model allows designers to anticipate information leakage at design time and to quantify the protection of countermeasures, as the use of integrated decoupling capacitors. Then, the study was dedicated to power glitch attacks. The different fault injection mechanisms were analyzed in details. From then on, a set of detection circuits were suggested and evaluated at design time and on silicon by electrical tests. Both the theoretical analysis and the given methodology were confirmed by the test campaigns.This work demonstrated that the design of low-cost solutions against passive and active power attacks can be achieved, and used in a large scale product development
Da, Silva Mathieu. "Securing a trusted hardware environment (Trusted Execution Environment)". Thesis, Montpellier, 2018. http://www.theses.fr/2018MONTS053/document.
Texto completo da fonteThis work is part of the Trusted Environment Execution eVAluation (TEEVA) project (French project FUI n°20 from January 2016 to December 2018) that aims to evaluate two alternative solutions for secure mobile platforms: a purely software one, the Whitebox Crypto, and a TEE solution, which integrates software and hardware components. The TEE relies on the ARM TrustZone technology available on many of the chipsets for the Android smartphones and tablets market. This thesis focuses on the TEE architecture. The goal is to analyze potential threats linked to the test/debug infrastructures classically embedded in hardware systems for functional conformity checking after manufacturing.Testing is a mandatory step in the integrated circuit production because it ensures the required quality and reliability of the devices. Because of the extreme complexity of nowadays integrated circuits, test procedures cannot rely on a simple control of primary inputs with test patterns, then observation of produced test responses on primary outputs. Test facilities must be embedded in the hardware at design time, implementing the so-called Design-for-Testability (DfT) techniques. The most popular DfT technique is the scan design. Thanks to this test-driven synthesis, registers are connected in one or several chain(s), the so-called scan chain(s). A tester can then control and observe the internal states of the circuit through dedicated scan pins and components. Unfortunately, this test infrastructure can also be used to extract sensitive information stored or processed in the chip, data strongly correlated to a secret key for instance. A scan attack consists in retrieving the secret key of a crypto-processor thanks to the observation of partially encrypted results.Experiments have been conducted during the project on the demonstrator board with the target TEE in order to analyze its security against a scan-based attack. In the demonstrator board, a countermeasure is implemented to ensure the security of the assets processed and saved in the TEE. The test accesses are disconnected preventing attacks exploiting test infrastructures but disabling the test interfaces for testing, diagnosis and debug purposes. The experimental results have shown that chips based on TrustZone technology need to implement a countermeasure to protect the data extracted from the scan chains. Besides the simple countermeasure consisting to avoid scan accesses, further countermeasures have been developed in the literature to ensure security while preserving test and debug facilities. State-of-the-art countermeasures against scan-based attacks have been analyzed. From this study, we investigate a new proposal in order to preserve the scan chain access while preventing attacks, and to provide a plug-and-play countermeasure that does not require any redesign of the scanned circuit while maintaining its testability. Our solution is based on the encryption of the test communication, it provides confidentiality of the communication between the circuit and the tester and prevents usage from unauthorized users. Several architectures have been investigated, this document also reports pros and cons of envisaged solutions in terms of security and performance