Literatura científica selecionada sobre o tema "Complexité de circuits"
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Artigos de revistas sobre o assunto "Complexité de circuits"
Poizat, Bruno. "A la recherche de la definition de la complexite d'espace pour le calcul des polynomes a la maniere de Valiant". Journal of Symbolic Logic 73, n.º 4 (dezembro de 2008): 1179–201. http://dx.doi.org/10.2178/jsl/1230396913.
Texto completo da fonteRaton, Gwenaëlle. "Les circuits courts alimentaires". Multitudes 92, n.º 3 (21 de setembro de 2023): 79–85. http://dx.doi.org/10.3917/mult.092.0079.
Texto completo da fonteBerthoz, Alain, Jean-Pierre Benoit e Alexandrine Saint-Cast. "Penser son corps : quand le cerveau simplifie la complexité". Enfances & Psy N° 97, n.º 3 (30 de outubro de 2023): 15–28. http://dx.doi.org/10.3917/ep.097.0015.
Texto completo da fonteBasso Fossali, Pierluigi. "La complexité régulatrice des discours programmateurs. Circuits sociaux de la modalisation et instances critiques". Langue française N°206, n.º 2 (2020): 45. http://dx.doi.org/10.3917/lf.206.0045.
Texto completo da fonteClément, Camille. "Le lieu agricole périurbain : un analyseur de la complexité des constructions territoriales entre actions politiques, débats publics et pratiques spatiales". Nouvelles perspectives en sciences sociales 10, n.º 1 (4 de fevereiro de 2015): 27–57. http://dx.doi.org/10.7202/1028436ar.
Texto completo da fontePoizat, Bruno. "Une dualité entre fonctions booléennes". Journal of the Institute of Mathematics of Jussieu 9, n.º 3 (26 de abril de 2010): 633–52. http://dx.doi.org/10.1017/s1474748010000083.
Texto completo da fonteCoureau, Didier. "The Brain’s Cinematic Metaphors (Images of Thought, Thinking Forms)". IRIS, n.º 36 (30 de junho de 2015): 85–101. http://dx.doi.org/10.35562/iris.1574.
Texto completo da fonteCoureau, Didier. "The Brain’s Cinematic Metaphors (Images of Thought, Thinking Forms)". IRIS, n.º 36 (30 de junho de 2015): 85–101. http://dx.doi.org/10.35562/iris.1574.
Texto completo da fonteHirata, Yuichi, Masaki Nakanishi, Shigeru Yamashita e Yasuhiko Nakashima. "An efficient conversion of quantum circuits to a linear nearest neighbor architecture". Quantum Information and Computation 11, n.º 1&2 (janeiro de 2011): 142–66. http://dx.doi.org/10.26421/qic11.1-2-10.
Texto completo da fonteUchizawa, Kei, Rodney Douglas e Wolfgang Maass. "On the Computational Power of Threshold Circuits with Sparse Activity". Neural Computation 18, n.º 12 (dezembro de 2006): 2994–3008. http://dx.doi.org/10.1162/neco.2006.18.12.2994.
Texto completo da fonteTeses / dissertações sobre o assunto "Complexité de circuits"
Revol, Nathalie. "Complexité de l'évaluation parallèle de circuits arithmétiques". Grenoble INPG, 1994. http://tel.archives-ouvertes.fr/tel-00005109.
Texto completo da fonteTavenas, Sébastien. "Bornes inférieures et supérieures dans les circuits arithmétiques". Phd thesis, Ecole normale supérieure de lyon - ENS LYON, 2014. http://tel.archives-ouvertes.fr/tel-01066752.
Texto completo da fonteAubert, Clément. "Logique linéaire et classes de complexité sous-polynominales". Paris 13, 2013. https://theses.hal.science/tel-00957653.
Texto completo da fonteCette recherche en informatique théorique construit de nouveaux ponts entre logique linéaire et théorie de la complexité. Elle propose deux modèles de machines abstraites qui permettent de capturer de nouvelles classes de complexité avec la logique linéaire, les classes des problèmes efficacement parallélisables (NC et AC) et celle des problèmes solutionnables avec peu d’espace, dans ses versions déterministes et non-déterministes (L et NL). La représentation des preuves de la logique linéaire comme réseaux de preuves est employée pour représenter efficacement le calcul parallèle des circuits booléens, y compris à profondeur constante. La seconde étude s’inspire de la géométrie de l’interaction, une délicate reconstruction de la logique linéaire à l’aide d’opérateurs d’une algèbre de von Neumann. Nous détaillons comment l’interaction d’opérateurs représentant des entiers et d’opérateurs représentant des programmes peut être reconnue nilpotente en espace logarithmique. Nous montrons ensuite comment leur itération représente un calcul effectué par des machines à pointeurs que nous définissons et que nous rattachons à d’autres modèles plus classiques. Ces deux études permettent de capturer de façon implicite de nouvelles classes de complexité, en dessous du temps polynomial
Duvillié, Guillerme. "Approximation, complexité paramétrée et stratégies de résolution de problèmes d'affectation multidimensionnelle". Thesis, Montpellier, 2016. http://www.theses.fr/2016MONTT321/document.
Texto completo da fonteIn this thesis, we focused in the Wafer-to-Wafer integration problems. These problems come from IC manufacturing. During the production of three-dimensional processors, dies have to be superimposed. Until recent, the dies were engraved on a silicon disk called wafer, then were cut, tested and sorted to suppress faulty dies and lastly superimposed one to each other.However superimposing wafers instead of dies presents several technical and financial advantages. Since faulty dies can only be dismissed when cutting the wafer, superimpose two wafers can lead to superimpose a faulty die with a viable one. In this case, the resulting stack of dies is considered as faulty. It follows that a bad assignment between the wafers can lead to a disastrous yield.In order to minimize the number of faulty dies stacks, a "failure map" of each wafer is generated during a test phase. This map gives location of the faulty dies on the wafers. The objective is then to take advantage of this map to define an assignment of the wafers to each other in order to match as many failures as possible.This problem can be modelized with Multidimensional Assignment problems. Each wafer can be seen as a vector with as many dimensions as the number of dies engraved on it. A coordinate set to zero marks a faulty die while a coordinate set to one indicates a viable one. Each seat of wafers is represented by a set of vector. Formally, an instance of a Wafer-to-Wafer integration problem is represented by m sets of n p-dimensional vectors. The objective is then to partition the vectors into n disjoint m-tuples, each tuple containing exactly one vector per set. An m-tuple represents a stack of wafers. Every m-tuple can be represented by a p-dimensional vector. Each coordinate is computed by performing the bitwise AND between the corresponding coordinates of the vectors that compose the m-tuple. In other words, a coordinate of the representative vector is equal to one if and only if this coordinate is equal to one in every vector composing the tuple. It follows that a dies stack is viable if and only if all the dies composing the stack are viable. The objective is then to maximize the overall number of ones of to minimize the overall number of zeros.The first part of the thesis is a theoretical one. We study the complexity of the considered versions of the problem with regards to natural parameters such as m, n, p or the number of zeros per vector. We show that these problems can encode more classical problems such as Maximum Clique, Minimum Vertex Cover or k-Dimensional Matching. This leads to several negative results from computational complexity, approximability or even parameterized complexity point of view. We also provide several positive results for some specific cases of the problem.In a second part, we focus on the practical solving of the problem. We provide and compare several Integer Linear Programming formulations. We also focus on performances of some approximation algorithms that we detailed in the theoretical part
Diguet, Jean-Philippe. "Estimation de complexité et transformations d'algorithmes de traitement du signal pour la conception de circuits VLSI". Rennes 1, 1996. http://www.theses.fr/1996REN10118.
Texto completo da fonteLagarde, Guillaume. "Contributions to arithmetic complexity and compression". Thesis, Sorbonne Paris Cité, 2018. http://www.theses.fr/2018USPCC192/document.
Texto completo da fonteThis thesis explores two territories of computer science: complexity and compression. More precisely, in a first part, we investigate the power of non-commutative arithmetic circuits, which compute multivariate non-commutative polynomials. For that, we introduce various models of computation that are restricted in the way they are allowed to compute monomials. These models generalize previous ones that have been widely studied, such as algebraic branching programs. The results are of three different types. First, we give strong lower bounds on the number of arithmetic operations needed to compute some polynomials such as the determinant or the permanent. Second, we design some deterministic polynomial-time algorithm to solve the white-box polynomial identity problem. Third, we exhibit a link between automata theory and non-commutative arithmetic circuits that allows us to derive some old and new tight lower bounds for some classes of non-commutative circuits, using a measure based on the rank of a so-called Hankel matrix. A second part is concerned with the analysis of the data compression algorithm called Lempel-Ziv. Although this algorithm is widely used in practice, we know little about its stability. Our main result is to show that an infinite word compressible by LZ’78 can become incompressible by adding a single bit in front of it, thus closing a question proposed by Jack Lutz in the late 90s under the name “one-bit catastrophe”. We also give tight bounds on the maximal possible variation between the compression ratio of a finite word and its perturbation—when one bit is added in front of it
Paperman, Charles. "Circuits booléens, prédicats modulaires et langages réguliers". Paris 7, 2014. http://www.theses.fr/2014PA077258.
Texto completo da fonteThe Straubing conjecture, stated in his book published in 1994, suggest that a regular language definable by a fragment of logic and equipped with an arbitrary numerical signature is definable using the same fragment of logic using only regular predicates. The considered fragments of logic are classed of formulas of monadic second order logic over finite words. This thesis is a contribution to the study of the Straubing conjecture. To prove such a conjecture, it seems necessary to obtain two results of two distinct types: 1. Algebraic characterizations of classes of regular languages defined by fragments of logics equipped with regular predicates, 2. Undefinability results of regular languages in fragments of logics equipped with arbitrary numerical predicates. The first part of this thesis is dedicated to the operation of adding regular predicates to a given fragment of logic, with a particular focus on modular predicates in the case where logical fragments have some algebraic structure. The second par of this thesis is dedicated to undefinability results with a particular focus on two-variable first order logic
Boumedine, Marc. "Contribution à l'étude et au développement de techniques d'analyse de testabilité de descriptions comportementales de circuits". Montpellier 2, 1991. http://www.theses.fr/1991MON20240.
Texto completo da fonteMeunier, Pierre-etienne. "Les automates cellulaires en tant que modèle de complexités parallèles". Phd thesis, Université de Grenoble, 2012. http://tel.archives-ouvertes.fr/tel-00770175.
Texto completo da fonteAubert, Clément. "Logique linéaire et classes de complexité sous-polynomiales". Phd thesis, Université Paris-Nord - Paris XIII, 2013. http://tel.archives-ouvertes.fr/tel-00957653.
Texto completo da fonteLivros sobre o assunto "Complexité de circuits"
Jukna, Stasys. Tropical Circuit Complexity. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-42354-3.
Texto completo da fonteVollmer, Heribert. Introduction to Circuit Complexity. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/978-3-662-03927-4.
Texto completo da fonteHåstad, Johan. Computational limitations of small-depth circuits. Cambridge, Mass: MIT Press, 1987.
Encontre o texto completo da fonteVollmer, Heribert. Introduction to Circuit Complexity: A Uniform Approach. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999.
Encontre o texto completo da fonteStraubing, Howard. Finite Automata, Formal Logic, and Circuit Complexity. Boston, MA: Birkhäuser Boston, 1994. http://dx.doi.org/10.1007/978-1-4612-0289-9.
Texto completo da fonteStraubing, Howard. Finite automata, formal logic, and circuit complexity. Boston: Birkhäuser, 1994.
Encontre o texto completo da fonteSubramanian, Ashok. The computational complexity of the circuit value and network stability problems. Stanford, Calif: Dept. of Computer Science, Stanford University, 1990.
Encontre o texto completo da fonteSridharan, K., B. Srinivasu e Vikramkumar Pudi. Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-50699-5.
Texto completo da fonteIEEE, Conference on Computational Complexity (11th 1996 Philadelphia Penn ). Proceedings, Eleventh Annual IEEE Conference on Computational Complexity: May 24-27, 1996, Philadelphia, Pennsylvania. Los Alamitos, Calif: IEEE Computer Society Press, 1996.
Encontre o texto completo da fonteMyasnikov, Alexei G. Non-commutative cryptography and complexity of group-theoretic problems. Providence, R.I: American Mathematical Society, 2011.
Encontre o texto completo da fonteCapítulos de livros sobre o assunto "Complexité de circuits"
Straubing, Howard. "Circuit Complexity". In Finite Automata, Formal Logic, and Circuit Complexity, 127–53. Boston, MA: Birkhäuser Boston, 1994. http://dx.doi.org/10.1007/978-1-4612-0289-9_8.
Texto completo da fonteChen, Yu-Fang, Philipp Rümmer e Wei-Lun Tsai. "A Theory of Cartesian Arrays (with Applications in Quantum Circuit Verification)". In Automated Deduction – CADE 29, 170–89. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-38499-8_10.
Texto completo da fonteBrzozowski, Janusz A., e Carl-Johan H. Seger. "Complexity of Race Analysis". In Asynchronous Circuits, 167–85. New York, NY: Springer New York, 1995. http://dx.doi.org/10.1007/978-1-4612-4210-9_9.
Texto completo da fonteChen, Yanbin, e Yannick Stade. "Quantum Constant Propagation". In Static Analysis, 164–89. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-44245-2_9.
Texto completo da fontePaterson, Mike. "Boolean circuit complexity". In Algorithms and Computation, 187. Berlin, Heidelberg: Springer Berlin Heidelberg, 1992. http://dx.doi.org/10.1007/3-540-56279-6_71.
Texto completo da fontePudlák, P. "AC0 circuit complexity". In Fundamentals of Computation Theory, 106–20. Berlin, Heidelberg: Springer Berlin Heidelberg, 1993. http://dx.doi.org/10.1007/3-540-57163-9_7.
Texto completo da fonteBalcázar, José Luis, Josep Díaz e Joaquim Gabarró. "Uniform Circuit Complexity". In Structural Complexity II, 97–118. Berlin, Heidelberg: Springer Berlin Heidelberg, 1990. http://dx.doi.org/10.1007/978-3-642-75357-2_5.
Texto completo da fonteVourkas, Ioannis, e Georgios Ch Sirakoulis. "Memristor-Based Logic Circuits". In Emergence, Complexity and Computation, 61–100. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-22647-7_4.
Texto completo da fonteRaz, Ran. "Circuit and Communication Complexity". In Computational Complexity Theory, 159–55. Providence, Rhode Island: American Mathematical Society, 2004. http://dx.doi.org/10.1090/pcms/010/06.
Texto completo da fonteRoberts, Nic, e Andrew Adamatzky. "Mining Logical Circuits in Fungi". In Emergence, Complexity and Computation, 311–21. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-38336-6_21.
Texto completo da fonteTrabalhos de conferências sobre o assunto "Complexité de circuits"
Concas, Roberto, Riccardo Meucci, Alessio Montori, Alessio Perinelli e Leonardo Ricci. "Electronic circuits for chaos and synchronization in laser physics". In 2024 IEEE Workshop on Complexity in Engineering (COMPENG), 1–5. IEEE, 2024. http://dx.doi.org/10.1109/compeng60905.2024.10741481.
Texto completo da fonteValdmanis, J. A. "Progress in electrooptic sampling of highspeed devices and integrated circuits". In OSA Annual Meeting. Washington, D.C.: Optica Publishing Group, 1988. http://dx.doi.org/10.1364/oam.1988.tue2.
Texto completo da fonteHe, Qing, Duo Chen e Dan Jiao. "A First-Principle Guided Circuit Simulator of Linear Complexity and its Linear Speedup for Die-Package Co-Design". In ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems. ASMEDC, 2011. http://dx.doi.org/10.1115/ipack2011-52276.
Texto completo da fonteBrown, J. J., J. T. Gardner e S. R. Forrest. "Optically powered monolithically integrated logic circuits". In Integrated Photonics Research. Washington, D.C.: Optica Publishing Group, 1991. http://dx.doi.org/10.1364/ipr.1991.tuc5.
Texto completo da fonteGaber, Lamya, Aziza I. Hussein e Mohammed Moness. "Incremental Automatic Correction for Digital VLSI Circuits". In 10th International Conference on Advances in Computing and Information Technology (ACITY 2020). AIRCC Publishing Corporation, 2020. http://dx.doi.org/10.5121/csit.2020.101508.
Texto completo da fonteWilliams, Ryan. "Algorithms for Circuits and Circuits for Algorithms". In 2014 IEEE Conference on Computational Complexity (CCC). IEEE, 2014. http://dx.doi.org/10.1109/ccc.2014.33.
Texto completo da fonteDaems, Walter, Georges Gielen e Willy Sansen. "Circuit complexity reduction for symbolic analysis of analog integrated circuits". In the 36th ACM/IEEE conference. New York, New York, USA: ACM Press, 1999. http://dx.doi.org/10.1145/309847.310106.
Texto completo da fonteSeo, Kuhn, Brent Wahl, Myrna Mayonte e Young Gon Kim. "Methodologies for Isolating Faults in Multi Chip Fiber Optic Transceivers That Use GHz Mixed Signal ICs". In ISTFA 2002. ASM International, 2002. http://dx.doi.org/10.31399/asm.cp.istfa2002p0251.
Texto completo da fonteKombarov, Yury Anatolievich. "Improvement of circuit complexity lower bound for parity function in one infinite basis". In Academician O.B. Lupanov 14th International Scientific Seminar "Discrete Mathematics and Its Applications". Keldysh Institute of Applied Mathematics, 2022. http://dx.doi.org/10.20948/dms-2022-14.
Texto completo da fonteLall, Pradeep, Jinesh Narangaparambil e Scott Miller. "Development of Multi-Layer Circuitry Using Electrically Conductive Adhesive and Low-Temperature Solder Material for Surface-Mount Component Attachment". In ASME 2021 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2021. http://dx.doi.org/10.1115/ipack2021-74086.
Texto completo da fonteRelatórios de organizações sobre o assunto "Complexité de circuits"
Schueller, Kriss A., e Jon T. Butler. Complexity Analysis of the Cost-Table Approach to the Design of Multiple-Valued Logic Circuits. Fort Belvoir, VA: Defense Technical Information Center, outubro de 1995. http://dx.doi.org/10.21236/ada605390.
Texto completo da fonteCao, Zhengjun, Lihua Liu e Andreas Christoforides. A Note on One Realization of a Scalable Shor Algorithm. Web of Open Science, dezembro de 2020. http://dx.doi.org/10.37686/qrl.v1i2.81.
Texto completo da fonte