Artigos de revistas sobre o tema "Circuit booléen"
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Mokhtarnia, Hossein, Shahram Etemadi Borujeni e Mohammad Saeed Ehsani. "Automatic Test Pattern Generation Through Boolean Satisfiability for Testing Bridging Faults". Journal of Circuits, Systems and Computers 28, n.º 14 (20 de fevereiro de 2019): 1950240. http://dx.doi.org/10.1142/s0218126619502402.
Texto completo da fonteMatrosova, Angela Yu, Victor A. Provkin e Valentina V. Andreeva. "Masking of Internal Nodes Faults Based on Applying of Incompletely Specified Boolean Functions". Izvestiya of Saratov University. New Series. Series: Mathematics. Mechanics. Informatics 20, n.º 4 (2020): 517–26. http://dx.doi.org/10.18500/1816-9791-2020-20-4-517-526.
Texto completo da fonteLimaye, Nutan, Srikanth Srinivasan e Sébastien Tavenas. "Superpolynomial Lower Bounds Against Low-Depth Algebraic Circuits". Communications of the ACM 67, n.º 2 (25 de janeiro de 2024): 101–8. http://dx.doi.org/10.1145/3611094.
Texto completo da fonteBorodina, Yulia V. "Easily testable circuits in Zhegalkin basis in the case of constant faults of type “1” at gate outputs". Discrete Mathematics and Applications 30, n.º 5 (27 de outubro de 2020): 303–6. http://dx.doi.org/10.1515/dma-2020-0026.
Texto completo da fonteAgrawal, Nishant. "Automatic Test Pattern Generation using Grover’s Algorithm". International Journal for Research in Applied Science and Engineering Technology 9, n.º VI (14 de junho de 2021): 2373–79. http://dx.doi.org/10.22214/ijraset.2021.34837.
Texto completo da fonteLi, Hongtao, Chunbiao Li, Zeshi Yuan, Wen Hu e Xiaochen Zhen. "A New Class of Chaotic Circuit with Logic Elements". Journal of Circuits, Systems and Computers 24, n.º 09 (27 de agosto de 2015): 1550136. http://dx.doi.org/10.1142/s0218126615501364.
Texto completo da fontePrihozhy, Anatoly A. "Synthesis of quantum circuits based on incompletely specified functions and if-decision diagrams". Journal of the Belarusian State University. Mathematics and Informatics, n.º 3 (14 de dezembro de 2021): 84–97. http://dx.doi.org/10.33581/2520-6508-2021-3-84-97.
Texto completo da fonteYOUNES, AHMED. "REDUCING QUANTUM COST OF REVERSIBLE CIRCUITS FOR HOMOGENEOUS BOOLEAN FUNCTIONS". Journal of Circuits, Systems and Computers 19, n.º 07 (novembro de 2010): 1423–34. http://dx.doi.org/10.1142/s0218126610006736.
Texto completo da fonteHou, Yue Wei, Xin Xu, Wei Wang, Xiao Bo Tian e Hai Jun Liu. "Titanium Oxide Memristor Based Digital Encoder Circuit". Applied Mechanics and Materials 644-650 (setembro de 2014): 3430–33. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3430.
Texto completo da fonteBardales, Andrea C., Quynh Vo e Dmitry M. Kolpashchikov. "Singleton {NOT} and Doubleton {YES; NOT} Gates Act as Functionally Complete Sets in DNA-Integrated Computational Circuits". Nanomaterials 14, n.º 7 (28 de março de 2024): 600. http://dx.doi.org/10.3390/nano14070600.
Texto completo da fontePopkov, Kirill A. "Lower bounds for lengths of single tests for Boolean circuits". Discrete Mathematics and Applications 29, n.º 1 (25 de fevereiro de 2019): 23–33. http://dx.doi.org/10.1515/dma-2019-0004.
Texto completo da fonteMondal, Joyati, Bappaditya Mondal, Dipak Kumar Kole, Hafizur Rahaman e Debesh Kumar Das. "Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits". Journal of Circuits, Systems and Computers 28, n.º 12 (novembro de 2019): 1950212. http://dx.doi.org/10.1142/s0218126619502128.
Texto completo da fonteKhan, Wilayat, Farrukh Aslam Khan, Abdelouahid Derhab e Adi Alhudhaif. "CoCEC: An Automatic Combinational Circuit Equivalence Checker Based on the Interactive Theorem Prover". Complexity 2021 (25 de maio de 2021): 1–12. http://dx.doi.org/10.1155/2021/5525539.
Texto completo da fonteROZUM, JORDAN C., e RÉKA ALBERT. "CONTROLLING THE CELL CYCLE RESTRICTION SWITCH ACROSS THE INFORMATION GRADIENT". Advances in Complex Systems 22, n.º 07n08 (novembro de 2019): 1950020. http://dx.doi.org/10.1142/s0219525919500206.
Texto completo da fonteRedkin, Nikolay P. "The generalized complexity of linear Boolean functions". Discrete Mathematics and Applications 30, n.º 1 (25 de fevereiro de 2020): 39–44. http://dx.doi.org/10.1515/dma-2020-0004.
Texto completo da fonteLiu, Hui, Fukun Li e Yilin Fan. "Optimizing the Quantum Circuit for Solving Boolean Equations Based on Grover Search Algorithm". Electronics 11, n.º 15 (8 de agosto de 2022): 2467. http://dx.doi.org/10.3390/electronics11152467.
Texto completo da fonteLozhkin, Sergei A., e Vadim S. Zizov. "Asymptotically sharp estimates for the area of multiplexers in the cellular circuit model". Discrete Mathematics and Applications 34, n.º 2 (1 de abril de 2024): 103–15. http://dx.doi.org/10.1515/dma-2024-0009.
Texto completo da fonteSteinbach, Bernd, e Christian Posthoff. "Compact XOR-bi-decomposition for lattices of Boolean functions". Facta universitatis - series: Electronics and Energetics 31, n.º 2 (2018): 223–40. http://dx.doi.org/10.2298/fuee1802223s.
Texto completo da fonteSapozhnikov, Valeriy, Vladimir Sapozhnikov, Dmitriy Efanov e Dmitriy Pyvovarov. "Application of constant-weight code "1-out-if-5" for the organization of combinational circuits check". Proceedings of Petersburg Transport University, n.º 2 (20 de junho de 2017): 307–19. http://dx.doi.org/10.20295/1815-588x-2017-2-307-319.
Texto completo da fonteFan, Austen Z., Paraschos Koutris e Hangdong Zhao. "Tight Bounds of Circuits for Sum-Product Queries". Proceedings of the ACM on Management of Data 2, n.º 2 (10 de maio de 2024): 1–20. http://dx.doi.org/10.1145/3651588.
Texto completo da fonteEfanov, Dmitriy, e Eseniya Elina. "Study of algorithms for synthesis of self-checking digital devices based on Boolean correction of signals using weighted Bose – Lin codes". Transport automation research 10, n.º 1 (17 de março de 2024): 74–99. http://dx.doi.org/10.20295/2412-9186-2024-10-01-74-99.
Texto completo da fonteRushdi, Ali Muhammad Ali, e Waleed Ahmad. "Digital Circuit Design Utilizing Equation Solving over ‘Big’ Boolean Algebras". International Journal of Mathematical, Engineering and Management Sciences 3, n.º 4 (1 de dezembro de 2018): 404–28. http://dx.doi.org/10.33889/ijmems.2018.3.4-029.
Texto completo da fonteYasmin, Rojoba, e Russell Deaton. "Logical computation with self-assembling electric circuits". PLOS ONE 17, n.º 12 (7 de dezembro de 2022): e0278033. http://dx.doi.org/10.1371/journal.pone.0278033.
Texto completo da fonteIllner, Petr, e Petr Kučera. "A Compiler for Weak Decomposable Negation Normal Form". Proceedings of the AAAI Conference on Artificial Intelligence 38, n.º 9 (24 de março de 2024): 10562–70. http://dx.doi.org/10.1609/aaai.v38i9.28926.
Texto completo da fonteChen, Bor-Sen, Chih-Yuan Hsu e Jing-Jia Liou. "Robust Design of Biological Circuits: Evolutionary Systems Biology Approach". Journal of Biomedicine and Biotechnology 2011 (2011): 1–14. http://dx.doi.org/10.1155/2011/304236.
Texto completo da fonteBibilo, P. N., e V. I. Romanov. "Experimental Study of Algorithms for Minimization of Binary Decision Diagrams using Algebraic Representations of Cofactors". Programmnaya Ingeneria 13, n.º 2 (17 de fevereiro de 2022): 51–67. http://dx.doi.org/10.17587/prin.13.51-67.
Texto completo da fonteBibilo, P. N. "Synthesis of Modular Multipliers". Programmnaya Ingeneria 14, n.º 8 (14 de agosto de 2023): 377–87. http://dx.doi.org/10.17587/prin.14.377-387.
Texto completo da fonteBanik, Subhadeep, e Francesco Regazzoni. "Compact Circuits for Efficient Möbius Transform". IACR Transactions on Cryptographic Hardware and Embedded Systems 2024, n.º 2 (12 de março de 2024): 481–521. http://dx.doi.org/10.46586/tches.v2024.i2.481-521.
Texto completo da fonteDatta, Rajesh Kumar. "CVM: Crossbar-based Circuit Verification through Modeling". Indian Journal of VLSI Design 3, n.º 2 (30 de setembro de 2023): 1–4. http://dx.doi.org/10.54105/ijvlsid.b1219.093223.
Texto completo da fonteBach, Bao Gia, Akash Kundu, Tamal Acharya e Aritra Sarkar. "Visualizing Quantum Circuit Probability: Estimating Quantum State Complexity for Quantum Program Synthesis". Entropy 25, n.º 5 (7 de maio de 2023): 763. http://dx.doi.org/10.3390/e25050763.
Texto completo da fonteBerndt, Augusto André Souza, Brunno Abreu, Isac S. Campos, Bryan Lima, Mateus Grellert, Jonata T. Carvalho e Cristina Meinhardt. "CGP-based Logic Flow: Optimizing Accuracy and Size of Approximate Circuits". Journal of Integrated Circuits and Systems 17, n.º 1 (30 de abril de 2022): 1–12. http://dx.doi.org/10.29292/jics.v17i1.546.
Texto completo da fonteEfanov, D. V., e M. V. Zueva. "Modified Hamming Codes in Computing Devices Technical Diagnostic Systems". Informacionnye Tehnologii 29, n.º 1 (19 de janeiro de 2023): 12–22. http://dx.doi.org/10.17587/it.29.12-22.
Texto completo da fonteSeo, Jinyoung, Sungi Kim, Ha H. Park, Da Yeon Choi e Jwa-Min Nam. "Nano-bio-computing lipid nanotablet". Science Advances 5, n.º 2 (fevereiro de 2019): eaau2124. http://dx.doi.org/10.1126/sciadv.aau2124.
Texto completo da fonteWille, Robert, e Rolf Drechsler. "BDD-Based Synthesis of Reversible Logic". International Journal of Applied Metaheuristic Computing 1, n.º 4 (outubro de 2010): 25–41. http://dx.doi.org/10.4018/jamc.2010100102.
Texto completo da fonteBIRGET, JEAN-CAMILLE. "FACTORIZATIONS OF THE THOMPSON–HIGMAN GROUPS, AND CIRCUIT COMPLEXITY". International Journal of Algebra and Computation 18, n.º 02 (março de 2008): 285–320. http://dx.doi.org/10.1142/s0218196708004457.
Texto completo da fonteAwwad, Mohamad. "FROM BOOLE’S LOGIC TO BOOLEAN APPLICATIONS IN COMPUTER SCIENCE". Educational Discourse: collection of scientific papers, n.º 32(4) (5 de maio de 2021): 18–25. http://dx.doi.org/10.33930/ed.2019.5007.32(4)-2.
Texto completo da fonteSuman, Dr J. V., e Nekkali Ramya. "Harnessing Tunnel Field-Effect Transistors for Boolean Function Implementation". INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 07, n.º 12 (30 de dezembro de 2023): 1–13. http://dx.doi.org/10.55041/ijsrem27821.
Texto completo da fontePashukov, Artem. "Application of Weight-Based Sum Codes at the Synthesis of Circuits for Built-in Control by Boolean Complement Method". Automation on transport 8, n.º 1 (15 de março de 2022): 101–14. http://dx.doi.org/10.20295/2412-9186-2022-8-1-101-114.
Texto completo da fonteElliott, Conal. "Timely Computation". Proceedings of the ACM on Programming Languages 7, ICFP (30 de agosto de 2023): 895–919. http://dx.doi.org/10.1145/3607861.
Texto completo da fonteDong, Zhekang, Donglian Qi, Yufei He, Zhao Xu, Xiaofang Hu e Shukai Duan. "Easily Cascaded Memristor-CMOS Hybrid Circuit for High-Efficiency Boolean Logic Implementation". International Journal of Bifurcation and Chaos 28, n.º 12 (novembro de 2018): 1850149. http://dx.doi.org/10.1142/s0218127418501493.
Texto completo da fonteBen-Festus, B. N., M. O. Osinowo e Ben Festus. "Design and Construction of a Digital Logic Training Module for Laboratory Experimentation". International Journal of Research and Innovation in Applied Science VIII, n.º VII (2023): 93–98. http://dx.doi.org/10.51584/ijrias.2023.8511.
Texto completo da fonteK, Alice, e Surya K. "An instance of Satisfiability Problem learnt with Instance based, Decision trees, Naive Bayes". Knowledge Transactions on Applied Machine Learning 01, n.º 04 (20 de setembro de 2023): 21–30. http://dx.doi.org/10.59567/ktaml.v1.04.03.
Texto completo da fonteRepe, Madhavi, e Sanjay Koli. "A Solution to VLSI: Digital Circuits Design in Quantum Dot Cellular Automata Technology". International Journal of Electrical and Electronics Research 11, n.º 3 (10 de agosto de 2023): 696–704. http://dx.doi.org/10.37391/ijeer.110309.
Texto completo da fonteMukherjee, Shyamapada, e Suchismita Roy. "Via-Aware Dogleg Routing Using Boolean Satisfiability". Journal of Circuits, Systems and Computers 26, n.º 04 (6 de dezembro de 2016): 1750064. http://dx.doi.org/10.1142/s0218126617500645.
Texto completo da fonteConstantinides, G. A. "Rethinking arithmetic for deep neural networks". Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 378, n.º 2166 (20 de janeiro de 2020): 20190051. http://dx.doi.org/10.1098/rsta.2019.0051.
Texto completo da fontevon zur Gathen, Joachim, e Gadiel Seroussi. "Boolean circuits versus arithmetic circuits". Information and Computation 91, n.º 1 (março de 1991): 142–54. http://dx.doi.org/10.1016/0890-5401(91)90078-g.
Texto completo da fonteKumaresan, Raja Sekar, Marshal Raj e Lakshminarayanan Gopalakrishnan. "Design and implementation of a nano magnetic logic barrel shifter using beyond-CMOS technology". Journal of Electrical Engineering 73, n.º 1 (1 de fevereiro de 2022): 1–10. http://dx.doi.org/10.2478/jee-2022-0001.
Texto completo da fonteRahman, M. Sazadur, Adib Nahiyan, Fahim Rahman, Saverio Fazzari, Kenneth Plaks, Farimah Farahmandi, Domenic Forte e Mark Tehranipoor. "Security Assessment of Dynamically Obfuscated Scan Chain Against Oracle-guided Attacks". ACM Transactions on Design Automation of Electronic Systems 26, n.º 4 (abril de 2021): 1–27. http://dx.doi.org/10.1145/3444960.
Texto completo da fonteHoiriyah, Hoiriyah. "SIMULASI GERBANG DASAR LOGIKA DALAM APLIKASI". Jurnal Teknik Informatika dan Elektro 2, n.º 2 (21 de novembro de 2022): 01–08. http://dx.doi.org/10.55542/jurtie.v2i2.405.
Texto completo da fonteTAYARI, MAHSHID, e MOHAMMAD ESHGHI. "DESIGN OF 3-INPUT REVERSIBLE PROGRAMMABLE LOGIC ARRAY". Journal of Circuits, Systems and Computers 20, n.º 02 (abril de 2011): 283–97. http://dx.doi.org/10.1142/s0218126611007256.
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