Gotowa bibliografia na temat „Vth instability”
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Artykuły w czasopismach na temat "Vth instability"
Senzaki, Junji, Atsushi Shimozato, Kazutoshi Kojima, Shinsuke Harada, Keiko Ariyoshi, Takahito Kojima, Yasunori Tanaka i Hajime Okumura. "Threshold Voltage Instability of SiC-MOSFETs on Various Crystal Faces". Materials Science Forum 778-780 (luty 2014): 521–24. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.521.
Pełny tekst źródłaTadjer, Marko J., Karl D. Hobart, Eugene A. Imhoff i Fritz J. Kub. "Temperature and Time Dependent Threshold Voltage Instability in 4H-SiC Power DMOSFET Devices". Materials Science Forum 600-603 (wrzesień 2008): 1147–50. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.1147.
Pełny tekst źródłaSometani, Mitsuru, Dai Okamoto, Shinsuke Harada, Hitoshi Ishimori, Shinji Takasu, Tetsuo Hatakeyama, Manabu Takei, Yoshiyuki Yonezawa, Kenji Fukuda i Hajime Okumura. "Exact Characterization of Threshold Voltage Instability in 4H-SiC MOSFETs by Non-Relaxation Method". Materials Science Forum 821-823 (czerwiec 2015): 685–88. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.685.
Pełny tekst źródłaNa, Jeong-Hyeon, Jun-Hyeong Park, Won Park, Junhao Feng, Jun-Su Eun, Jinuk Lee, Sin-Hyung Lee i in. "Dependence of Positive Bias Stress Instability on Threshold Voltage and Its Origin in Solution-Processed Aluminum-Doped Indium Oxide Thin-Film Transistors". Nanomaterials 14, nr 5 (4.03.2024): 466. http://dx.doi.org/10.3390/nano14050466.
Pełny tekst źródłaKutsuki, Katsuhiro, Sachiko Kawaji, Yukihiko Watanabe, Masatoshi Tsujimura, Toru Onishi, Hirokazu Fujiwara, Kensaku Yamamoto i Takashi Kanemura. "Impact of Al Doping Concentration at Channel Region on Mobility and Threshold Voltage Instability in 4H-SiC Trench N-MOSFETs". Materials Science Forum 858 (maj 2016): 607–10. http://dx.doi.org/10.4028/www.scientific.net/msf.858.607.
Pełny tekst źródłaSenzaki, Junji, Atsushi Shimozato, Kozutoshi Kajima, Keiko Aryoshi, Takahito Kojima, Shinsuke Harada, Yasunori Tanaka, Hiroaki Himi i Hajime Okumura. "Electrical Properties of MOS Structures on 4H-SiC (11-20) Face". Materials Science Forum 740-742 (styczeń 2013): 621–24. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.621.
Pełny tekst źródłaKim, Sang Sub, Pyung Ho Choi, Do Hyun Baek, Jae Hyeong Lee i Byoung Deog Choi. "Abnormal Threshold Voltage Shifts in P-Channel Low-Temperature Polycrystalline Silicon Thin Film Transistors Under Negative Bias Temperature Stress". Journal of Nanoscience and Nanotechnology 15, nr 10 (1.10.2015): 7555–58. http://dx.doi.org/10.1166/jnn.2015.11167.
Pełny tekst źródłaOkamoto, Mitsuo, Mitsuru Sometani, Shinsuke Harada, Hiroshi Yano i Hajime Okumura. "Dynamic Characterization of the Threshold Voltage Instability under the Pulsed Gate Bias Stress in 4H-SiC MOSFET". Materials Science Forum 897 (maj 2017): 549–52. http://dx.doi.org/10.4028/www.scientific.net/msf.897.549.
Pełny tekst źródłaDeb, Arkadeep, Jose Ortiz-Gonzalez, Mohamed Taha, Saeed Jahdi, Phillip Mawby i Olayiwola Alatise. "Impact of Turn-Off Gate Voltage and Temperature on Threshold Voltage Instability in Pulsed Gate Voltage Stresses of SiC MOSFETs". Materials Science Forum 1091 (5.06.2023): 61–66. http://dx.doi.org/10.4028/p-lidhbt.
Pełny tekst źródłaRescher, Gerald, Gregor Pobegen i Thomas Aichinger. "Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs". Materials Science Forum 821-823 (czerwiec 2015): 709–12. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.709.
Pełny tekst źródłaRozprawy doktorskie na temat "Vth instability"
Leurquin, Camille. "Etude des mécanismes de dégradation et Fiabilité dynamique des composants GaN sur Si". Electronic Thesis or Diss., Université Grenoble Alpes, 2024. http://www.theses.fr/2024GRALT025.
Pełny tekst źródłaTo contribute significantly to the global reduction of energy consumption, it is essential to develop electrical energy converters based on new power components, such as GaN on Si. These more compact and efficient components offer promising prospects. MOS-HEMT (MOS channel High Electron Mobility Transistor) power transistors based on GaN-on-Si, developed at CEA-Leti, target the market for low-voltage power converters (< 900 V). This architecture has demonstrated excellent performance in both static and dynamic aspects. However, temporal degradations under gate and drain stresses, as well as the degradation mechanisms, remain relatively unknown. The objective of this thesis is to explore the instabilities of the on-state resistance RON and threshold voltage VTH of these transistors, both during and after stresses of several hundred volts applied to the component's drain. This study was conducted using specially designed innovative electrical characterization techniques called HVBTI. A significant portion of the work focused on identifying the defects causing these deviations and understanding the underlying physical mechanisms involved in these degradations. The influence of epitaxial layers and architecture on the instability of VTH has been thoroughly investigated. While these studies have significantly enriched our understanding of GaN-on-Si transistors manufactured at CEA-Leti, the comprehension of RON and VTH instabilities still requires further exploration
Denais, Mickael. "ETUDE DES PHENOMENES DE DEGRADATION DE TYPENEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI)DANS LES TRANSISTORS MOS SUBMICRONIQUES DESFILIERES CMOS AVANCEES". Phd thesis, Université de Provence - Aix-Marseille I, 2005. http://tel.archives-ouvertes.fr/tel-00011973.
Pełny tekst źródłafabrication où chaque nouvelle étape peut influer la fiabilité du composant. Les fabricants de semi-conducteurs
doivent garantir un niveau de fiabilité excellent pour garantir les performances à long terme du produit final.
Pour cela il est nécessaire de caractériser et modéliser les différents mécanismes de défaillance au niveau du
transistor MOSFET. Ce travail de thèse porte spécifiquement sur les mécanismes de dégradation de type «
Negative Bias Temperature Instability» communément appelé NBTI.
Basé sur la génération d'états d'interface, la génération de charges fixes et de piégeage de trous dans l'oxyde, le
modèle de dégradation proposé permet de prédire les accélérations en température et en champ électrique,
d'anticiper les phénomènes de relaxation, tout en restant cohérent avec les caractères intrinsèques de chaque
défauts et les modifications des matériaux utilisés.
Ce travail de thèse ouvre le champ à de nouvelles techniques d'analyse basées sur l'optimisation des méthodes
de tests et d'extraction de paramètres dans les oxydes ultra minces en évitant les phénomènes de relaxation qui
rendent caduques les techniques conventionnelles. Ainsi, une nouvelle technique dite « à la volée » a été
développée, et permet d'associer à la fois la mesure et le stress accéléré à l'aide de trains d'impulsions
appropriés.
Finalement, une nouvelle méthodologie est développée pour tenir compte des conditions réelles de
fonctionnement des transistors, et une approche novatrice de compensation du NBTI est proposée pour des
circuits numériques et analogiques.
Wang, Xuguang Kwong Dim-Lee. "A novel high-K SONOS type non-volatile memory and NMOS HfO₂ Vth instability studies for gate electrode and interface threatment effects". 2005. http://repositories.lib.utexas.edu/bitstream/handle/2152/2089/wangx82253.pdf.
Pełny tekst źródłaWang, Xuguang. "A novel high-K SONOS type non-volatile memory and NMOS HfO₂ Vth instability studies for gate electrode and interface threatment effects". Thesis, 2005. http://hdl.handle.net/2152/2089.
Pełny tekst źródłaCzęści książek na temat "Vth instability"
Goto, Shotaro, Shuichi Setoguchi, Kazuhisa Matsunaga i Jiro Takata. "Overcoming the Photochemical Problem of Vitamin K in Topical Application". W Vitamin K - Recent Advances, New Perspectives and Applications for Human Health [Working Title]. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.99310.
Pełny tekst źródłaPatterson, Caroline, i Derek Bell. "Thromboembolic Disease". W Oxford Textbook of Respiratory Critical Care, 397–402. Oxford University PressOxford, 2023. http://dx.doi.org/10.1093/med/9780198766438.003.0043.
Pełny tekst źródłaStreszczenia konferencji na temat "Vth instability"
Zhang, J. F., Z. Ji, M. H. Chang, B. Kaczer i G. Groeseneken. "Real Vth instability of pMOSFETs under practical operation conditions". W 2007 IEEE International Electron Devices Meeting - IEDM '07. IEEE, 2007. http://dx.doi.org/10.1109/iedm.2007.4419073.
Pełny tekst źródłaShen, C., T. Yang, M. f. Li, G. Samudra, Y. c. Yeo, C. Zhu, S. Rustagi, M. Yu i D. l. Kwong. "Fast Vth instability in HfO2 gate dielectric MOSFETs and Its impact on digital circuits". W 2006 IEEE International Reliability Physics Symposium Proceedings. IEEE, 2006. http://dx.doi.org/10.1109/relphy.2006.251308.
Pełny tekst źródłaChoi, Won Ho, Hoonki Kim i Chris H. Kim. "Circuit techniques for mitigating short-term vth instability issues in successive approximation register (SAR) ADCs". W 2015 IEEE Custom Integrated Circuits Conference - CICC 2015. IEEE, 2015. http://dx.doi.org/10.1109/cicc.2015.7338417.
Pełny tekst źródłaChen, Junting, Chengcai Wang, Jiali Jiang i Mengyuan Hua. "Investigation of Time-Dependent VTH Instability Under Reverse-bias Stress in Schottky Gate p-GaN HEMT". W 2020 IEEE 9th International Power Electronics and Motion Control Conference (IPEMC2020-ECCE Asia). IEEE, 2020. http://dx.doi.org/10.1109/ipemc-ecceasia48364.2020.9367779.
Pełny tekst źródłaGurfinkel, M., J. Suehle, J. B. Bernstein, Y. Shapira, A. J. Lelis, D. Habersat i N. Goldsman. "Ultra-Fast Measurements of VTH Instability in SiC MOSFETs due to Positive and Negative Constant Bias Stress". W 2006 IEEE International Integrated Reliability Workshop Final Report. IEEE, 2006. http://dx.doi.org/10.1109/irws.2006.305209.
Pełny tekst źródłaChoi, Woojin, Hojin Ryu, Namcheol Jeon, Minseong Lee, Neung-Hee Lee, Kwang-Seok Seo i Ho-Young Cha. "Impacts of conduction band offset and border traps on Vth instability of gate recessed normally-off GaN MIS-HEMTs". W 2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's (ISPSD). IEEE, 2014. http://dx.doi.org/10.1109/ispsd.2014.6856053.
Pełny tekst źródłaThareja, Gaurav, Jack Lee, Aaron Voon-Yew Thean, Victor Vartanian i Bich-Yen Nguyen. "NBTI Reliability of Strained SOI MOSFETs". W ISTFA 2006. ASM International, 2006. http://dx.doi.org/10.31399/asm.cp.istfa2006p0423.
Pełny tekst źródłaYamamoto, Marcio, Joji Yamamoto i Sotaro Masanobu. "Study on Riser System in Hang-Off Configuration for Deep-Sea Mining". W Offshore Technology Conference Asia. OTC, 2022. http://dx.doi.org/10.4043/31672-ms.
Pełny tekst źródłaCha, Soonyoung, Chang-Chih Chen, Taizhi Liu i Linda S. Milor. "Extraction of threshold voltage degradation modeling due to Negative Bias Temperature Instability in circuits with I/O measurements". W 2014 IEEE 32nd VLSI Test Symposium (VTS). IEEE, 2014. http://dx.doi.org/10.1109/vts.2014.6818769.
Pełny tekst źródłaMcGinnis, Pat, Dave Albert, Zhigang Song, Johns Oarethu, Phong Tran, John Sylvestri, Greg Hornicek i Mike Tenney. "Residual EG Oxide in FinFET Analyses and Its Impact to Yield, Product Performance, and Transistor Reliability". W ISTFA 2019. ASM International, 2019. http://dx.doi.org/10.31399/asm.cp.istfa2019p0317.
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