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1
Jeong, Timothy. "Zero Voltage Switching Hybrid Voltage Divider Converter". DigitalCommons@CalPoly, 2021. https://digitalcommons.calpoly.edu/theses/2290.
Pełny tekst źródłaStreszczenie:
This project proposes a new hybrid voltage divider DC-DC converter that utilizes switching capacitors and inductors to produce zero voltage switching (ZVS) at the turn on state of its switches. By achieving ZVS, the switching losses are significantly reduced; thus, increasing the overall efficiency of the converter at various loads. The goal for this thesis is to perform analysis of the operation of the converter, derive equations for sizing the main components, and demonstrate its functionality through computer simulation and hardware prototype. Results of the simulation and hardware testing show that the proposed converter produces the desired output voltage while providing the zero voltage switching benefits. The converter’s efficiency reaches above 92% starting from 1A load and continues to increase to 97.6% at 4A load. Overall, results from this thesis verifies the potential of the proposed converter as an alternative solution to achieve a very efficient DC-DC solution when half of the input voltage is required at the output without the use of complex feedback control circuitry.
2
El, Dbib Issa. "Low Voltage Current Conveyor Design Techniques". Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-233421.
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Disertační práce se zabývá proudovými konvejery CCII v proudovém modu s nízkým napájecím napětím. Potřeba velké rychlosti, vysokého výkonu a nízkého napájecího napětí pro mobilní elektroniku a komunikační systémy a potíže se současným stavem tlačí analogové návrháře k nalezení obvodové architektury a nové nízkopříkonové techniky. Je zde podrobně rozebrána technika složené kaskody a substrátu řízeného tranzistoru, která pomáhá produkci nízkopříkonových nízkovoltových obvodů. Dále jsou rozebrány a diskutovány základní funkční bloky, jako jsou proudová zrcadla, diferenční zesilovače a další, schopné pracovat při nízkých napájecích napětích. Jádrem práce je návrh konvejerů typu CCII s nízkým napájecím napětím. Jsou rozebrány jejich výhody a srovnání s konvenčními obvody. Princip a implementace operačního zesilovače založeného na proudovém konvejeru CCII je v práci navržen a popsán.
3
Patel, Chirag. "A time-to-voltage converter". Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1175794164.
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4
Xu, Ping. "High-frequency Analog Voltage Converter Design". PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4891.
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For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage converters are designed in CMOS technology. These converters can work in a frequency range from DC (OHz) up to lOOMHz and higher, and keep low distortion over a± 0.5V input range. They can replace transformers so that designing fully integrated differential circuits becomes possible. The designs are based on a MOSIS 2μm n-well process. SPICE simulations of these designs are given. The circuit was laid out with MAGIC layout tools and fabricated through MOSIS. The chip was measured at PSU and Intel circuit labs and the experimental results show the correctness of the designs.
5
Wang, Xiangcheng. "HIGH SLEW RATE HIGH-EFFICIENCY DC-DC CONVERTER". Doctoral diss., University of Central Florida, 2006. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3196.
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Active transient voltage compensator (ATVC) has been proposed to improve VR transient response at high slew rate load, which engages in transient periods operating in MHZ to inject high slew rate current in step up load and recovers energy in step down load. Main VR operates in low switching frequency mainly providing DC current. Parallel ATVC has largely reduced conduction and switching losses. Parallel ATVC also reduces the number of VR bulk capacitors. Combined linear and adaptive nonlinear control has been proposed to reduce delay times in the actual controller, which injects one nonlinear signal in transient periods and simplifies the linear controller design. Switching mode current compensator with nonlinear control in secondary side is proposed to eliminate the effect of opotocoupler, which reduces response times and simplifies the linear controller design in isolated DC-DC converters. A novel control method has been carried out in two-stage isolated DC-DC converter to simplify the control scheme and improve the transient response, allowing for high duty cycle operation and large step-down voltage ratio with high efficiency. A balancing winding network composed of small power rating components is used to mitigate the double pole-zero effect in complementary-controlled isolated DC-DC converter, which simplifies the linear control design and improves the transient response without delay time. A parallel post regulator (PPR) is proposed for wide range input isolated DC-DC converter with secondary side control, which provides small part of output power and most of them are handled by unregulated rectifier with high efficiency. PPR is easy to achieve ZVS in primary side both in wide range input and full load range due to 0.5 duty cycle. PPR has reduced conduction loss and reduced voltage rating in the secondary side due to high turn ratio transformer, resulting in up to 8 percent efficiency improvement in the prototype compared to conventional methods.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering
6
Rowley, Anna Kaspartian. "A new zero-voltage-mode resonant converter". Thesis, Brunel University, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.303182.
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7
Kazerani, Mehrdad. "Dyadic matrix converter theory : development, and application to voltage-source-converter type matrix converter". Thesis, McGill University, 1995. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=28794.
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For the past twenty years, the theoretical advance of the matrix converters has been impeded by the complexity arising from the time-varying trigonometric functions in their transformation matrix. In addition, the switching difficulties associated with the bidirectional switches have complicated the practical implementation of this class of converters.In this thesis, the dyadic matrix structure and the a-b-c to d-q-0 transformation have been melded together to develop the dyadic matrix converter theory which is a generalized theory for the three-phase to three-phase matrix converters.
The thesis addresses the zero-sequence interaction in the matrix converters and the role of the zero-sequence elements in the Displacement Power Factor (DPF) correction on the utility-side, based on the Static VAR Controller (SVC) principle. Also, it is proved that using all the control degrees of freedom available, the dual condition of Unity Displacement Power Factor (UDPF) on side-1 and Field Vector Control (FVC) on side-2 can be established.
In this thesis, a new matrix converter topology, based on the three-phase voltage-source converters, has been proposed in which the switching difficulties reported in the conventional nine-bidirectional-switch topology have been bypassed. The theoretical expectations have been verified by the simulation as well as experimental tests on a laboratory prototype of the new matrix converter topology composed of three units of voltage-source converters each rated at 1 kVA.
8
Xi, Youhao. "Zero voltage switching flyback and forward converter topologies". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp01/MQ40214.pdf.
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9
Whitney, Jonas Alan. "Alternative topologies for the low-voltage buck converter". Thesis, Massachusetts Institute of Technology, 2018. http://hdl.handle.net/1721.1/119559.
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Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2018.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 145-146).
In this thesis, investigative work on and development of alternative topologies for the buck converter for low voltage dc dc conversion was performed. The three level buck, Resonant Switch Capacitor (ResSC), and Cuk-Buck2 were selected to be studied further based on the fact that they contain few components and were discovered in this work to have the possibility of operating at fixed frequency while smoothly regulating output voltage over the entire conversion ratio of 0 to 1. All three use a capacitive storage element in addition to a small inductance/s, so it was believed this may allow for efficiency or density improvements due to the excellent energy storage capability of MLCCs. New control methods were developed in order to operate the ResSC and Cuk-Buck2 at fixed frequency over the entire output range. New work was done to in order to achieve flying capacitor balancing in the ResSC and Cuk-Buck2, practical for future implementation in a monolithic converter. Simulated efficiency and other characteristics of the three converters are compared. Prototypes were built and used to confirm functionality of the new control schemes and balancing methods..
by Jonas Alan Whitney.
M. Eng.
10
Borisov, Konstantin A. "Multifunctional voltage source converter for shipboard power systems". Diss., Mississippi State : Mississippi State University, 2007. http://library.msstate.edu/etd/show.asp?etd=etd-06042007-142951.
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11
McClusky, Scott Logan. "HIGH VOLTAGE RESONANT SELF-TRACKING CURRENT-FED CONVERTER". DigitalCommons@CalPoly, 2010. https://digitalcommons.calpoly.edu/theses/254.
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High voltage power supply design presents unique requirements, combining safety, controllability, high performance, and high efficiencies. A new Resonant Self-Tracking Current-Fed Converter (RST-CFC) is investigated as a proof-of-concept of a high voltage power supply particularly for an X-ray system. These systems require fast voltage rise times and low ripple to yield a clear image.
The proposed converter implements high-frequency resonance among discrete components and transformer parasitics to achieve high voltage gain, and the self-tracking nature ensures operation at maximum gain while power switches achieve zero-voltage switching across the full load range. This converter exhibits an inherent indefinite short-circuit capability. Theoretical results were obtained through simulations and verified by experimental results through a complete test configuration. Converter topology viability was confirmed through hardware testing and characterization.
12
Lei, Ernest. "Cascaded Linear Regulator with Negative Voltage Tracking Switching Regulator". DigitalCommons@CalPoly, 2020. https://digitalcommons.calpoly.edu/theses/2176.
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DC-DC converters can be separated into two main groups: switching converters and linear regulators. Linear regulators such as Low Dropout Regulators (LDOs) are straightforward to implement and have a very stable output with low voltage ripple. However, the efficiency of an LDO can fluctuate greatly, as the power dissipation is a function of the device’s input and output. On the other hand, a switching regulator uses a switch to regulate energy levels. These types of regulators are more versatile when a larger change of voltage is needed, as efficiency is relatively stable across larger steps of voltages. However, switching regulators tend to have a larger output voltage ripple, which can be an issue for sensitive systems. An approach to utilize both in cascaded configuration while providing a negative output voltage will be presented in this paper. The proposed two-stage conversion system consists of a switching pre-regulator that can track the negative output voltage of the second stage (LDO) such that the difference between input and output voltages is always kept small under varying output voltage while maintaining the high overall conversion efficiency. Computer simulation and hardware results demonstrate that the proposed system can track the negative output voltage well. Additionally, the results show that the proposed system can provide and maintain good overall efficiency, load regulation, and output voltage ripple across a wide range of outputs.
13
Chen, Wei. "Low Voltage High Current Power Conversion with Integrated Magnetics". Diss., Virginia Tech, 1998. http://hdl.handle.net/10919/30518.
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Very low voltage, high current output requirement have necessitated improvements in power supply's density and efficiency. Existing power conversion techniques cannot meet very stringent size and efficiency requirements. By applying the proposed magnetic integration procedure, new integrated magnetic circuits featuring low loss, simple structure, and ripple cancellation technique are then developed to overcome the limitations of prior art. Both cores and windings are integrated. Consequently, the power loss and the size of the integrated magnetic device are greatly reduced. Detailed analysis and design considerations of the proposed circuits are presented. As a result of applying the proposed technique, very high density, high efficiency, low voltage, high current power modules were developed. A typical example features an isolated 3.3V/30A power module with a power density of 130W/in3 and an efficiency of 90% at 500 KHz switching frequency.Ph. D.
14
Lee, Choong Hoon. "Design of high speed low voltage data converters for UWB communication systems". Texas A&M University, 2005. http://hdl.handle.net/1969.1/3798.
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For A/D converters in ultra-wideband (UWB) communication systems, the flash
A/D type is commonly used because of its fast speed and simple architecture. However,
the number of comparators in a flash A/D converter exponentially increases with an
increase in resolution; therefore, an interpolating technique is proposed in this thesis to
mitigate the exponential increase of comparators in a flash converter. The proposed
structure is designed to improve the system bandwidth degradation by replacing the
buffers and resistors of a typical interpolating technique with a pair of transistors. This
replacement mitigates the bandwidth degradation problem, which is the main drawback
of a typical interpolating A/D converter. With the proposed 4-bit interpolating structure,
3.75 of effective number of bits (ENOB) and 31.52dB of spurious-free dynamic range
(SFDR) are achieved at Nyquist frequency of 264MHz with 6.93mW of power
consumption. In addition, a 4-bit D/A converter is also designed for the transmitter part
of the UWB communication system. The proposed D/A converter is based on the
charge division reference generator topology due to its full swing output range, which is
attractive for low-voltage operation. To avoid the degradation of system bandwidth, resistors are replaced with capacitors in the charge division topology. With the
proposed D/A converter, 0.26 LSB of DNL and 0.06 LSB of INL is obtained for the
minimum input data stream width of 1.88ns. A 130 µm Ã286 µm chip area is required
for the proposed D/A converter with 19.04mW of power consumption. The proposed
A/D and D/A converter are realized in a TSMC 0.18 µm CMOS process with a 1.8
supply voltage for the 528MHz system frequency.
15
Thomas, Stephan [Verfasser]. "A Medium-Voltage Multi-Level DC/DC Converter with High Voltage Transformation Ratio / Stephan Thomas". Aachen : Shaker, 2014. http://d-nb.info/1049383176/34.
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16
Lu, Bin. "A feedback control algorithm for voltage-source matrix converter". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp01/MQ37268.pdf.
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17
Lu, Bin 1969. "A feedback control algorithm for voltage-source matrix converter /". Thesis, McGill University, 1997. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=28001.
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One application of the voltage-source, matrix converter is as an asynchronous link, joining two AC power systems with different frequencies (50Hz/60Hz), or at the same frequency (60Hz/60Hz) but at different phase angles. This thesis work shows that for this kind of link, there exists an automatic closed-loop feedback strategy to control the real and reactive powers quickly and independently.In this thesis, the new matrix converter topology, based on the three-phase voltage-source converters, has been used.
The thesis mixes the dyadic matrix structure the a-b-c to d-q-o transformation and feedback control theory together to get the results.
Digital simulations are presented.
18
Salazar, Nathaniel Jay Tobias. "High frequency AC power converter for low voltage circuits". Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/77026.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 74-76).
This thesis presents a novel AC power delivery architecture that is suitable for VHF frequency (50-100MHz) polyphase AC/DC power conversion in low voltage integrated circuits. A complete AC power delivery architecture was evaluated demonstrating the benefits of delivering power across the interconnect at high voltage and lower current with on- or over-die transformation to low voltage and high current. Two approaches to polyphase matching networks in the transformation stage are compared: a 3-phase system with separate single-phase matching networks and individual full bridge rectifiers, and a 3-phase delta-to-wye matching network and a 3-phase rectifier bridge. In addition, a novel switch-capacitor rectifier capable of 3V, 1W output, was evaluated as an alternative circuit to the diode rectifiers. A 50MHz prototype of each version of the system was designed and built for a 12:1 conversion ratio with 24Vpp line-to-line AC input, 2V DC output and 0.7W output power. The measured overall system efficiency is about 63 % for the 3-phase delta system. Although the application is intended for an integrated CMOS implementation, this thesis primarily focuses on discrete PCB level realizations of the proposed architectures to validate the concept and provide insights for future designs.
by Nathaniel Jay Tobias Salazar.
M.Eng.
19
Loh, Chee Keong Richard Marcus. "Phase shifted bridge converter for a high voltage application". Thesis, University of Edinburgh, 2003. http://hdl.handle.net/1842/12459.
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In airborne applications, the size and weight of equipment are critical parameters. The power supply for an airborne radar needs to have a high output power density while operating with a high efficiency. Conventional Travelling Wave Tube (TWT) radars require a high voltage power supply for operation and is prone to arcing. As the radar is a crucial piece of equipment, its power supply must be designed to withstand such operation. The Phase Shifted Pulse Width Modulation Zero Voltage Switching Full Bridge Converter has been the subject of many papers due to its ability to provide high output powers with high efficiency. As the output inductive/capacitive filters used by the present low voltage, high current, phase shifted converters are unsuitable for high output voltage applications, it is replaced with a capacitive filter, altering the basic operation of the converter. In this thesis the theory and design implementation of the Phase Shifted Bridge with Capacitive Filter (PSBCF) is described. Two auxiliary circuits developed for the conventional phase shifted bridge are analysed and implemented in the new PSBCF. Detailed cycle-by-cycle transient simulations on PSPICE are used to study the converters' behaviour and these are verified with experimental results. An averaged model of the PSBCF running in PSPICE is described and verified using the cycle-by-cycle transient simulations. Finally, the features and limitations of the PSBCF converter and the use of the auxiliary circuits are discussed and evaluated against each other and against the currently used airborne TWT radar power converter to demonstrate that this technology is a viable replacement.
20
Zhou, Yao. "High voltage DC/DC converter for offshore wind application". Thesis, University of Edinburgh, 2015. http://hdl.handle.net/1842/18749.
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With the increasing interest in offshore wind power, the related technologies, including HVDC networks, are gaining similar levels of attention. For large scale wind farms far from shore, high voltage DC transmission can provide several advantages over traditional high voltage AC transmission. This thesis focuses on DC/DC converters, a core part of the HVDC network, especially for use in the high voltage, high power and offshore wind environment. The thesis examines a wide range of possible DC/DC converter topologies for the application. Different topologies are compared and evaluated in detail for use in a high power situation. Based on these results, three DC/DC converter topologies are selected for more detailed modelling. The simulation processes and results are presented in the thesis, which reveals the limitations and behaviour of the topologies when they are used at the MW level. In addition, the high power semiconductor switching devices are discussed and evaluated for each topology. To assess the suitability of the DC/DC converter topologies in the offshore wind application, the selected converter topologies are also analysed and modelled combined with a PMSG wind turbine. Finally, a down-scaled DC/DC converter prototype is built to verify the analysis and simulation results.
21
DALAL, MANISH A. "High Voltage DC Converter Systems Modeling, Simulation and Analysis". Wright State University / OhioLINK, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=wright1248966912.
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22
Palakurthi, Praveen Kumar. "Design of a low voltage analog to digital converter". To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.
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23
Luc, Brian R. "Digitally Controlled Zero-Voltage-Switching Quasi-Resonant Buck Converter". DigitalCommons@CalPoly, 2015. https://digitalcommons.calpoly.edu/theses/1346.
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ABSTRACT
Digitally-Controlled Two-Phase Zero-Voltage-Switching Quasi-Resonant Buck Converter
Brian Luc
This thesis entails the design, construction, and performance analysis of a digitally-controlled two-phase Zero-Voltage Switching Quasi-Resonant (ZVS-QR) buck converter. The converter is aimed to address the issues associated with powering CPUs operating at lower voltage and high current. To evaluate its performance, the Two-Phase ZVS-QR buck converter is compared against a traditional Two-Phase buck converter. The design procedure required to implement both converters through utilizing the characterization curve and formulas derived from their circuit configurations will be presented. Computer simulation of the Two-Phase ZVS-QR buck converter is provided to exhibit its operation and potential for use in low voltage and high current applications. In addition, hardware prototypes for both ZVS-QR and traditional buck converters are constructed utilizing a Programmable Interface Controller (PIC). Results from hardware tests demonstrate the success of using digital controller for the 60W 12VDC to 1.5VDC ZVS-QR buck converter. Merits and drawbacks based on the operation and performance of both converters will also be assessed and described. Further work to improve the performance of ZVS-QR will also be presented.
Keywords: Buck Converter; Zero-Voltage-Switching; Multi-Phase; Efficiency; Switching Loss
24
Zhao, Shishuo. "High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC". Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/74969.
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Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which is also called solid state transformer is given including application, topology, device and magnetic transformer. Then developing trend of this research area is clearly shown following by research target.
State of art wide band gap device including silicon carbide (SiC) and gallium nitride (GaN) devices are characterized and compared, final selection is made based on comparison result. Mostly used high frequency high power DC/DC converter topology dual active bridge (DAB) is introduced and compared with novel CLLC resonant converter in terms of switching loss and conduction loss point of view. CLLC holds ZVS capability over all load range and smaller turn off current value. This is beneficial for high frequency operation and taken as our candidate. Device loss breakdown of CLLC converter is also given in the end.
Medium voltage high frequency transformer is the key element in terms of insulation safety, power density and efficiency. Firstly, two mostly used transformer structures are compared. Then transformer insulation requirement is referred for 4160 V application according to IEEE standard. Solid insulation material are also compared and selected. Material thickness and insulation distance are also determined. Insulation capability is preliminary verified in FEA electric field simulation. Thirdly two transformer magnetic loss model are introduced including core loss model and litz wire winding loss model. Transformer turn number is determined based on core loss and winding loss trade-off. Different core loss density and working frequency impact is carefully analyzed. Different materials show their best performance among different frequency range. Transformer prototype is developed following designed parameter. We test the developed 15 kW 500 kHz transformer under 4160 V dry type transformer IEEE Std. C57.12.01 standard, including basic lightning test, applied voltage test, partial discharge test.
500 kHz 15 kW CLLC converter gate drive is our design challenge in terms of symmetry propagation delay, cross talk phenomenon elimination and shoot through protection. Gate drive IC is carefully selected to achieve symmetrical propagation delay and high common mode dv/dt immunity. Zero turn off resistor is achieved with minimized gate loop inductance to prevent cross talk phenomenon. Desaturation protection is also employed to provide shoot through protection. Finally 15 kW 500 kHz CLLC resonant converter is developed based on 4160V 500 kHz transformer and tested up to full power level with 98% peak efficiency.Master of Science
25
Yu, Oscar Nando. "High Voltage Synchronous Rectifier Design Considerations". Diss., Virginia Tech, 2021. http://hdl.handle.net/10919/103384.
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The advent of wide band-gap semiconductors in power electronics has led to the scope of efficient power conversion being pushed further than ever before. This development has allowed for systems to operate at higher and higher voltages than previously achieved. One area of consideration during this high voltage transition is the synchronous rectifier, which is traditionally designed as an afterthought. Prior research in synchronous rectifiers have been limited to low voltage, high current converters. There is practically no research in high voltage synchronous rectification. Therefore, this dissertation focuses on discovering the unknown nuances behind high voltage synchronous rectifier design, and ultimately developing a practical, scalable solution. There are three main issues that must be addressed when designing a high voltage synchronous rectifier: (1) high voltage sensing; (2) light load effects; (3) accuracy.
The first hurdle to designing a high voltage SR system is the high voltage itself. Traditional methods of synchronous rectification (SR) attempt to directly sense voltage or current, which is not possible with high voltage. Therefore, a solution must be designed to limit the voltage seen by the sensing mechanism without sacrificing accuracy. In this dissertation, a novel blocking solution is proposed, analyzed, and tested to over 1-kV. The solution is practical enough to be implemented on practically any commercial drain-source SR controller.
The second hurdle is the light load effect of the SR system on the converter. A large amount of high voltage systems utilize a LLC-based DC transformers (DCX) to provide an efficient means of energy conversion. The LLC-DCX's attractive attributes of soft-switching and high efficiency allure many architects to combine it with an SR system. However, direct implementation of SR on a LLC-DCX will result in a variety of light load oscillation issues, since the rectifier circuitry can excite the resonant tank through a false load transient phenomena. A universal limiting solution is proposed and analyzed, and is validated with a commercial SR controller.
The final hurdle is in optimizing the SR system itself. There is an inherent flaw with drain-source sensing, namely parasitic inductance in the drain-source sense loop. This parasitic inductance causes an error in the sensed voltage, resulting in early SR turn-off and increased losses through the parallel diode. The parasitic will always be present in the circuit, and current solutions are too complex to be implemented. Two solutions are proposed depending on the rectifier architecture: (1) multilevel gate driving for single switch rectifiers; (2) sequential parallel switching for parallel switch rectifiers.
In summary, this dissertation focuses on developing a practical and reliable high voltage SR solution for LLC-DCX converters. Three main issues are addressed: (1) high voltage sensing; (2) light load effects; (3) accuracy. Novel solutions are proposed for all three issues, and validated with commercial controllers.Doctor of Philosophy
High voltage power electronics are becoming increasing popular in the electronics industry with the help of wide band-gap semiconductors. While high voltage power electronics research is prevalent, a key component of high voltage power converters, the synchronous rectifier, remains unexplored. Conventional synchronous rectifiers are implemented on high current circuits where diode losses are high. However, high voltage power electronics operate at much lower current levels, necessitating changes in current synchronous rectifier methods. This research aims to identify and tackle issues that will be faced by both systems and IC designers when attempting to implement high voltage synchronous rectifiers on LLC-DCXs. While development takes planes on a LLC-DCX, the research is applicable to most resonant converters and applications utilizing drain-source synchronous rectifier technology. This dissertation focuses primarily on three areas of synchronous rectifier developments: (1) high voltage compatibility; (2) light load effects; (3) accuracy. The first issue opens the gate to high voltage synchronous rectifier research, by allowing high voltage sensing. The second issue explores issues that high voltage synchronous rectifiers can inadvertently influence on the LLC-DCX itself - a light load oscillation issue. The third issue explores novel methods of improving the sensing accuracy to further reduce losses for a single and parallel switch rectifier. In each of these areas, the underlying problem is root-caused, analyzed, and a solution proposed. The overarching goal of this dissertation is to develop a practical, low-cost, universal synchronous rectifier system that can be scaled for commercial use.
26
Mwaniki, Fredrick Mukundi. "High voltage boost DC-Dc converter suitable for variable voltage sources and high power photovoltaic application". Diss., University of Pretoria, 2013. http://hdl.handle.net/2263/37320.
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Important considerations of a photovoltaic (PV) source are achieving a high voltage and drawing currents with very little ripple component from it. Furthermore, the output from such a source is variable depending on irradiation and temperature. In this research, literature review of prior methods employed to boost the output voltage of a PV source is examined and their limitations identified. This research then proposes a multi-phase tapped-coupled inductor boost DC-DC converter that can achieve high voltage boost ratios, without adversely compromising performance, to be used as an interface to a PV source. The proposed converter achieves minimal current and voltage ripple both at the input and output. The suitability of the proposed converter topology for variable input voltage and variable power operation is demonstrated in this dissertation. The proposed converter is also shown to have good performance at high power levels, making it very suitable for high power applications.
Detailed analysis of the proposed converter is done. Advantages of the proposed converter are explained analytically and confirmed through simulations and experimentally. Regulation of the converter output voltage is also explained and implemented using a digital controller. The simulation and experimental results confirm that the proposed converter is suitable for high power as well as variable power, variable voltage applications where high voltage boost ratios are required.Dissertation (MEng)--University of Pretoria, 2013.
gm2014
Electrical, Electronic and Computer Engineering
Unrestricted
27
Law, Yiu-yip Charles, i 羅耀業. "Loss analysis of a stepping inductor VRM converter". Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2003. http://hub.hku.hk/bib/B29477918.
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Van, Rhyn P. D. "High voltage DC-DC converter using a series stacked topology". Thesis, Link to the online version, 2006. http://hdl.handle.net/10019/1269.
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ANAND, ABHINAV. "STUDY AND DESIGN OF SECOND GENERATION VOLTAGE CONVEYER BASED ANALOG CIRCUITS". Thesis, 2022. http://dspace.dtu.ac.in:8080/jspui/handle/repository/19146.
Pełny tekst źródłaStreszczenie:
Second generation voltage controlled conveyers is an active block that is being widely explored in the field
of analog electronics. Many exciting and wide range applications are being realized using second generation
voltage conveyers. The applications such as sensor read out circuits, amplifiers, instrumentation amplifiers,
multivibrators, etc. The properties of VCII can be used to implement applications like current follower,
voltage follower, voltage to current converter, current to voltage converter, voltage differentiator, voltage
integrator, etc. The work done during the course of this project helps in realizing analog circuits based on
second generation voltage conveyer circuit. The analog circuits which have been implemented using VCII
in this project are voltage buffer, current buffer, current to voltage converter, voltage to current converter,
voltage differentiator, voltage integrator, Schmitt trigger, and Pulse Width Modulator.
The Schmitt Trigger and Pulse Width Modulator circuits that have been designed using VCII presents a
novel approach to realizing such non linear applications using active blocks. The circuits of Schmitt Trigger
and Pulse Width Modulator have been designed using CMOS technology of 180 nm. The operation of both
the circuits have been critically analyzed through mathematical computations and the feasibility of the
circuits have been validated using SPICE simulations.
30
PAN, GUANG-HUA, i 潘光華. "Resonant high voltage DC converter". Thesis, 1988. http://ndltd.ncl.edu.tw/handle/86954567194956024001.
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31
Cheng, Yu-Sung, i 鄭育松. "CMOS Integrated Buck Voltage Converter". Thesis, 2010. http://ndltd.ncl.edu.tw/handle/85998319352058519420.
Pełny tekst źródłaStreszczenie:
碩士龍華科技大學
電子工程研究所
98
In this thesis, a series of DC voltage regulators, such as Bandgap reference (BGR), Low dropout regulator (LDO) and DC-DC Buck Converter are developed. The BGR circuit is a low sensitivity to temperature and supply voltage. To increase the performances, an nMOS arrangement folded operational transconductance amplifier is developed for the BGR circuit. In addition, a small size, low cost and low ripple output voltage LDO regulator is introduced. Finally, in order to increase operating time of the battery powered devices, a high efficiency, high noise rejection Buck DC-DC Converter is also introduced. The LDO circuit consists of an error amplifier, buffer and feedback circuit, while the DC-DC Buck Converter circuit is composed of a frequency compensation circuit, PWM control circuit, non-overlapping circuit and pMOS power transistor. In the power converter, the PWM circuit included a ramp generator, a clock generator, a comparator, a clock generator and a flip-flop circuit. The clock generator provided a fixed frequency for the PWM controlled circuit. This PWM circuit generates a fixed-frequency and has a wide range controlled duty. In this thesis, the proposed circuit, had simulated with TSMC 0.35μm 2P4M models, and had implemented with TSMC 0.35μm 2P4M process. The measurement results show that the output voltage of the LDO and DC-DC Buck Converter Operating voltage are ranging 2V to 5V and the output voltage is 1.8V. The maximum efficiency of DC converter is over 90 %.
32
Jhao, Yi-Siang, i 趙奕翔. "Differential Voltage Current Conveyor (DVCC) Based Voltage-Mode First-Order Allpass Filter". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/6ku8k5.
Pełny tekst źródłaStreszczenie:
碩士中原大學
電子工程研究所
107
In this paper, we will present a new voltage-mode first-order filter circuit. This circuit using one differential voltage current conveyor (DVCC), one capacitor and two resistors. It can realize first-order filter functions which are lowpass and allpass responses. This filter have some characteristic, like: use less active component and passive component, grounded capacitor, no impedance matching required when used as lowpass filter. We use HSPICE and MATLAB to simulate this filter circuit. The results are close to theoretical predictions.
33
Wu, Lei. "Low-voltage pipeline A/D converter". Thesis, 1999. http://hdl.handle.net/1957/33270.
Pełny tekst źródłaStreszczenie:
Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor (SC) circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low voltage conditions. There exist three techniques to solve the problem, but with their own limitations. Multi-threshold process increases cost. Boosted clock will cause life time reliability issues. Switched-opamp slows down the speed of operation. A new low-voltage SC technique without special process and boosted-clock is studied to overcome these drawbacks.
To verify the speed advantage of the new scheme over the switched-opamp technique, a 10-bit 20 MS/s pipeline A/D converter operating at 1.5 V supply voltage was designed. A new pseudo-differential structure was proposed and some relevant design issues are discussed. Circuit implementations and layout floorplan are described. All designs are based on Matlab, SWITCAP and Hspice simulation.Graduation date: 2000
34
Lin, Chien-Hsun, i 林建勳. "Development of High-Voltage Boost Converter". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/q3w5n5.
Pełny tekst źródłaStreszczenie:
碩士國立臺北科技大學
電機工程系所
99
In this thesis, a high step-up converter, together with a passive voltage-clamping circuit is presented, which combines two charge pumps and one coupling inductor. Based on the traditional pulse width modulation (PWM) concept, such a converter is applied to a DC-DC converter with the input voltage of 5.1V and the output voltage of 60V. Since there are two charge pumps in this converter, there are two voltage conversion ratios to be obtained without changing any structure, depending on different PWM control strategies. In this thesis, first of all, the basic operating principles, associated mathematical deductions, and corresponding voltage conversion ratios of the proposed converter are described in detail, secondly, some simulation results are given based on simulation software called IsSpice to verify the feasibility of proposed converter, and finally, one PWM control integrated circuit (IC) is used as a control kernel of the overall system, so as to demonstrate the effectiveness of the proposed topology.
35
Lin, Wei-Jie, i 林暐捷. "Novel Interleaved Voltage Doubler Resonant Converter". Thesis, 2015. http://ndltd.ncl.edu.tw/handle/sduhgx.
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碩士國立雲林科技大學
電機工程系
103
This thesis presents a novel interleaved voltage doubler resonant converter. The circuit architecture of the proposed converter is used on DC-DC converter applications. The primary sides of the converter are two half-bridge LLC resonant converters connected in parallel. However, conventional LLC resonant converters have high current stress and current ripple on the secondary side. In order to reduce the current stress of power switches and decrease current ripple on the output capacitor, the interleaved PWM scheme is used in the proposed converter. Base on the LLC resonant converter features, such as zero voltage switching (ZVS) for power switch and zero current switching (ZCS) for rectifier diodes, the switching losses and the reverse recovery current on power components are reduced. For high voltage output applications, two Geinacher circuits of voltage doubler are connected in parallel at secondary side. Thus, the current stress of the secondary windings and rectifier diodes can be reduced. In the meantime, the envelope detector on the output side can also reduce the output current ripple. Finally, the theoretical analysis of the proposed converter is verified by SIMetris- SIMPLIS simulation and the experiment tests with input voltage 250V~300V and 1200W rated power (400V/3A).
36
Hsu, Shih-Chiang, i 許世強. "Low-Voltage Temperature to Digital Converter". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/12619276801742494938.
Pełny tekst źródłaStreszczenie:
碩士國立臺北大學
電機工程研究所
97
In this paper, we propose a new low voltage temperature sensor IC design which is proportional to absolute temperature. This circuit design can be applied to the front end of temperature sensors, and uses a new PMOS voltage divider to decrease the input common-mode voltage of OP amp. Test result shows that this circuit can be operated by a power supply of 1V. The temperature range of this circuit design is between -40℃ to 120℃ with a temperature coefficient of 1.6 mV/℃ that varies from 0.403 V to 0.658 V. The inaccuracy of this design is ±0.019℃. Moreover, this circuit can be operated by a power supply at 1 V to 2 V and achieves high linearity with low sensitivity to process variation. The power dissipation of this sensor is 16.03 uW and core area 0.421×0.403 mm2. In addition, by adding a traditional low voltage delta-sigma convertor structure to our new low voltage temperature sensor IC design, we put forward a new low-voltage temperature to digital converter. The power consumption of the whole system is 44.1uW, and has been realized by TSMC 0.18um 1P6M CMOS standard process.
37
Chiang, Chu-Yi, i 姜柱圯. "Lowest-Voltage-Switching and Zero-Voltage-Switching Control for Buck Converter". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/68830049900111453144.
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博士國立臺灣大學
電子工程學研究所
97
A new integrated circuit approach for Lowest-Voltage-Switching and ZVS control is presented for PWM buck converters under DCM/CCM boundary mode. This proposed technique compensates control circuit delay and hence turns on the power MOS at the exact instant of lowest/zero drain-to-source voltage. No complicated timing calculation circuits or additional external components are required. This proposed integrated Lowest-Voltage-Switching and ZVS control can be applied to other DC-DC converters as well. Circuit analysis, implementation and the die photo are shown. Experimental results for an example circuit with VIN of 5V and VOUT of 1.8V and 3.3V reveal that buck converters with the presented Lowest-Voltage-Switching and ZVS technique have higher efficiency than conventional ones, especially at higher frequencies. At about 1.35MHz and 3.6MHz operation, the measured conversion efficiency of the PWM buck converter under DCM/CCM boundary mode with the proposed Lowest-Voltage-Switching and ZVS approach is 9% and 11% higher, respectively. Also, the replenishing scheme for the holding capacitor in sample and hold circuit is designed and simulated. Its operation is analyzed and simulation results are illustrated. Furthermore, buck converter with synchronous rectifier and its related ZVS gating control is presented. Analysis and simulation results are conducted and shown.
38
Hsu, Chih-Ming, i 許智明. "The New Oscillator Using Differential Voltage Current Conveyor". Thesis, 2006. http://ndltd.ncl.edu.tw/handle/59453150976075800908.
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碩士中原大學
電子工程研究所
95
Abstract Due to the huge progress of the integrated circuit technology and the simplification of the digital circuit design, how to improve and reduce analogy circuit becomes the most important topic for scholar recently. So far, the active voltage-mode elements are used in analogy circuit very often. The Operational Amplifier (OPA) is the most popular part of the active voltage-mode elements, but the OPA is limited by its gain-bandwidth-product and slow slew rate in high frequency operations. Hence, scholar provides the active current-mode elements to improve this problem. In addition, cost is the most critical concern in industry. If we can use less components to achieve the same performances, it means that the product is cheaper and more competitive. The common active current-mode elements are Current Conveyor (CC) , Second-Generation Current Conveyor (CCII) , Operational Transconductance Amplifier (OTA) , Current Feedback Amplifier (CFA) , and Differential Voltage Current Conveyor (DVCC) 。 Only terminal Y is the high impedance input of the Second-Generation Current Conveyor (CCII), therefore, it can’t handle the differential signal directly. To solve this problem, Mr. K. Pal issued the new application circuit in 1989. This new application circuit is added a differential amplifier to terminal Y of CCII with voltage gain being unity . Mr. K Pal called it “ DVCCII”, which had three input terminals and two output terminals. In 1997, Mr. Soliman and Mr. Elwan proposed the improving circuit of DVCCII. They called it “ Differential Voltage Current Conveyor, DVCC”. This paper proposed a new sinusoidal oscillator employing a plus-type differential voltage current conveyor (DVCC+). Comparing with previous issued paper in regards to this topic, this paper provided a new design with less components, one single output DVCC+ plus two resistors and two capacitors. It’s easier to achieve in the integrated circuit because all the capacitors are grounded. This paper uses UMC’s 0.5um process parameters to design DVCC+ and uses HSpice to simulate. Passive elements are chosen as below, RX=5.1K Ω；R1＝10KΩ；CX=8nF；C1=2nF. The oscillation frequency is 7.879KHz. According to the simulation by Hspice, this new oscillator has good performance for the temperature and voltage operation deviations.
39
Chen, Chih-Wei, i 陳致瑋. "Low Voltage Wide Swing Second Generation Current Conveyor". Thesis, 2003. http://ndltd.ncl.edu.tw/handle/65168610546451334486.
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碩士國立中山大學
電機工程學系研究所
91
We developed low voltage wide swing second generation current conveyors(CCII) with the application to a insensitive Butterworth second-order low-pass filter. All circuits are designed using the parameters of TSMC 1P4M 0.35um process. The minimum supply voltage of CCII(1) circuit is |Vtp|+3Vod. The supply voltage of CCII(2) circuit is |Vtp|+2Vod. The voltage swing of the CCIIs are almost rail to rail.
40
Vishwanathan, Neti. "DC To DC Converter Topologies For High Voltage Power Supplies Under Pulsed Loading". Thesis, 2004. https://etd.iisc.ac.in/handle/2005/1162.
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Vishwanathan, Neti. "DC To DC Converter Topologies For High Voltage Power Supplies Under Pulsed Loading". Thesis, 2004. http://etd.iisc.ernet.in/handle/2005/1162.
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42
Yi-TingLin i 林義庭. "A New High Voltage-Gain Converter with Coupled-Inductors and Voltage Multiplier". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/79759125652189084636.
Pełny tekst źródłaStreszczenie:
碩士國立成功大學
電機工程學系
102
High step-up techniques have been explored and developed for industrial applications over the past decades. Especially for renewable energy systems, the relatively low voltage must be boosted to high one for grid-connection applications. In this thesis, a new current-fed, high step-up converter integrating coupled-inductors with voltage multiplier cell is proposed for applications in renewable energy systems. With the current-fed configuration, continuous low-ripple input current can be achieved, which can avoid the use of input electrolytic capacitor to enhance the reliability of the whole system. Also, by employing the voltage step-up cell, the voltage stress of the main switch is reduced and the leakage energy of coupled-inductors can be recycled to the output capacitor. Therefore, the low-voltage rated MOSFETs with low RDS_ON can be used to reduce the conduction losses. In addition, the reverse-recovery problem of the diodes is alleviated effectively by the leakage inductance, as designed in the proposed circuit. The operation principles, the voltage stress analyses, and the design guidelines of the components used in the proposed are discussed in detail in the thesis. Finally, a laboratory prototype circuit of 300 W, 400 V output voltage with input voltage ranging from 30 to 42 V is implemented to verify the effectiveness of the proposed converter. The results show that only one MOSFET is employed not only to simplify the circuit configuration, but improve the system reliability. A maximal efficiency of 95.63 % at 90 W and 92.98 % at the full load have been demonstrated in the experiments.
43
Lo, Shao-Wen, i 羅紹文. "Analysis and Implementation of Zero-Voltage Switching Converter with Output Voltage Doubler". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/55989743458698524819.
Pełny tekst źródłaStreszczenie:
碩士國立雲林科技大學
電機工程系碩士班
97
This thesis presents a zero-voltage switching (ZVS) converter with output voltage doubler which consists of two forward converter cells with common power switches to reduce cost and complexity of the circuit topology. The active clamping technique can clamp the voltage stress and create the ZVS conditions on switches. Therefore, the conversion efficiency can be improved. Finally, the circuit operation principle, design considerations, experimental results and simulations are presented to verify the effectiveness of the proposed converter.
44
Yu-ChenHsu i 許育晨. "A Boost Converter with Wide Input Voltage Range and Low Startup Voltage". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/54377859783424521807.
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45
Xu, Ning. "Nonlinear control of a voltage source converter". Master's thesis, 2010. http://hdl.handle.net/10048/1588.
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Due to its unique features such as controllable power factor, controllable bi-directional power flow, and rapid dynamic response, Voltage Source Converters (VSCs) have been widely used in various industrial applications such as distributed generation systems, power distribution systems, uninterruptible power supplies (UPS), AC motor drives, etc. To optimize the performance of the VSC, many control algorithms have been proposed. This thesis investigates development of the nonlinear control for the VSC in two applications: power factor control and active power filtering. A detailed description of the dynamic model of the VSC system is presented in different reference frames. A linearization-based control scheme is introduced for power factor regulation and verified by switched simulation and real-time experiment on a test stand which has been constructed at the Applied Nonlinear Control Lab (ANCL), University of Alberta. In addition, an internal model-based control scheme is introduced to perform active power filtering. This algorithm is verified by simulation.Controls
46
Wu, Ming-Shian, i 吳明憲. "A Linear CMOS Voltage to Current Converter". Thesis, 2005. http://ndltd.ncl.edu.tw/handle/42037852180078379348.
Pełny tekst źródłaStreszczenie:
碩士國立雲林科技大學
電子與資訊工程研究所
93
An improved CMOS voltage-to-current converter is presented. PMOS transistors are employed in the resistor-replacement and voltage-level shifting of the proposed converter to avoid the body effect. To accurately annihilate the non-linear voltage terms, a better modeling of the drain-to-source current of the MOS transistor operating in the linear region is essential and is adopted. Specifically the substrate-bias effect of the MOS transistor is treated more thoroughly in our design. Consequently, the non-linearity of the large-signal transresistance of the converter, caused mainly by the body effect of a NMOS transistor in a previously published converter, is greatly minimized. In order to compensate the resultant voltage inversion created by the switching from NMOS transistors to PMOS transistors in the resistor-replacement and voltage-level shifting in the proposed circuit, a voltage-inversion sub-circuit is devised and employed in our converter. The voltage-to-current converter is designed and fabricated in a 0.35μm CMOS technology. The fabricated circuit occupies an area of 267μm×197μm（~0.053mm2） and dissipates less than 3.92mW from a 3.3 V supply. The measured and simulated data are in good agreement. For a 1 input voltage, the total harmonic distortion (THD) of the output current is less than 1.5%.
47
Chen, Ming-Ren, i 陳明仁. "Interleaved Flyback Converter with Zero-Voltage-Transition". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/62814697601088122192.
Pełny tekst źródłaStreszczenie:
碩士國立東華大學
電機工程學系
97
This paper proposes a novel interleaved flyback converter which is composed of two parallel-operated basic flyback converters in addition to an auxiliary inductor and two snubber circuits. This circuit is able to transfer higher power at a much higher efficiency than conventional flyback converters. There are two efficiency boosting features in this proposed circuit. First, both the active power switches are zero- voltage-switched and therefore the switching losses are reduced. Second, the reverse recovery losss on the rectifying diodes are reduced. This is because of the auxiliary inductor which makes the diode currents smoothly ramp down to zero instead of abruptly turn off. The two basic flyback converters are identical, which makes operation analysis and circuit design simpler. A test circuit is built and the experimental result shows satisfactory agreement to the theoretical analysis. The experimental results show that this proposed converter promotes its conversion efficiency up to 91%.
48
Hsu, Ting-Chuan, i 許丁泉. "Zero-Voltage-Switching Interleaved DC/DC Converter". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/32964201312058939292.
Pełny tekst źródłaStreszczenie:
碩士雲林科技大學
電機工程系碩士班
97
An interleaved DC/DC converter with less power switches is presented in this thesis. Two forward converter cells are connected in parallel and unite common power switches without using extra switching devices to achieve the features of interleaving and zero-voltage-switching (ZVS). Active-clamping circuit is adopted at the primary side of transformers to circulate the energy stored in magnetizing inductor and leakage inductor of transformers and reduce the switching losses and noises on power switches. In addition, the paralleling manner with interleaving technique has shared the output current and diminished its ripple effectively. Principles of operation, steady state analyses and design procedure are explained. Finally, experimental results with a 75W prototype circuit are provided to verify the analysis.
49
Sui, Jay, i 隋杰. "Output Voltage Regulation of Twin-buck Converter". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/44689191941678257222.
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碩士國立中山大學
電機工程學系研究所
100
The purpose of this thesis is to design and implement a linear quadratic optimal controller for a twin-buck converter with zero-voltage-transition (ZVT). The controller calculates duty ratio every cycle based on voltage and current feedback, as well as estimates the time instances when the synchronous rectification power switch current is zero. These time instances are crucial for ZVT operation. Via frequency modulation, the controller is designed to automatically regulate the output voltage to a desired value under load and voltage source variation. Simulations indicate that the proposed control design works. The controller is implemented using a Field Programmable Gate Array (FPGA). The experimental results match the simulations, which further verifies the applicability of the proposed voltage regulation strategy.
50
Cheng, Yang-Chih, i 鄭仰智. "A Self-Calibration Capacitor to Voltage Converter". Thesis, 2018. http://ndltd.ncl.edu.tw/handle/7ds8w9.
Pełny tekst źródłaStreszczenie:
碩士國立臺北大學
電機工程學系
106
This paper propose a self-calibration capacitor to voltage converter. It used the external capacitor variation transfer to the corresponding time signal by the temperature and voltage insensitive capacitor to time converter. This time signal will be transferred to the corresponding digital signal by the time to digital converter. After the internal capacitor is calibrated by the digital control circuit, it is converted into the corresponding output voltage by the capacitor to voltage converter. The proposed temperature and voltage insensitive capacitor to voltage converter consists of temperature and voltage insensitive voltage reference and current reference. The error variation is much lower than ±1% when the voltage(1.62V to 1.98V) and temperature(-40oC to 120oC) variation. It would be effectively reduce the voltage and temperature variation. The chip is fabricated in TSMC 0.18μm 1P6M CMOS process, supply voltage use 1.8V, chip area is 1.4mm2 and the power consumption is 2.4mW.