Artykuły w czasopismach na temat „True Random Number Generator (TRNG)”
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Xingyuan, Wang, Qin Xue i Teng Lin. "A Novel True Random Number Generator Based on Mouse Movement and a One-Dimensional Chaotic Map". Mathematical Problems in Engineering 2012 (2012): 1–9. http://dx.doi.org/10.1155/2012/931802.
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We propose a novel true random number generator using mouse movement and a one-dimensional chaotic map. We utilize thex-coordinate of the mouse movement to be the length of an iteration segment of our TRNs and they-coordinate to be the initial value of this iteration segment. And, when it iterates, we perturb the parameter with the real value produced by the TRNG itself. And we find that the TRNG we proposed conquers several flaws of some former mouse-based TRNGs. At last we take experiments and test the randomness of our algorithm with the NIST statistical test suite; results illustrate that our TRNG is suitable to produce true random numbers (TRNs) on universal personal computers (PCs).
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Randa, Maulana, Mohammad Samie i Ian K. Jennions. "Delay-Based True Random Number Generator in Sub-Nanomillimeter IoT Devices". Electronics 9, nr 5 (15.05.2020): 817. http://dx.doi.org/10.3390/electronics9050817.
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True Random Number Generators (TRNGs) use physical phenomenon as their source of randomness. In electronics, one of the most popular structures to build a TRNG is constructed based on the circuits that form propagation delays, such as a ring oscillator, shift register, and routing paths. This type of TRNG has been well-researched within the current technology of electronics. However, in the future, where electronics will use sub-nano millimeter (nm) technology, the components become smaller and work on near-threshold voltage (NTV). This condition has an effect on the timing-critical circuit, as the distribution of the process variation becomes non-gaussian. Therefore, there is an urge to assess the behavior of the current delay-based TRNG system in sub-nm technology. In this paper, a model of TRNG implementation in sub-nm technology was created through the use of a specific Look-Up Table (LUT) in the Field-Programmable Gate Array (FPGA), known as SRL16E. The characterization of the TRNG was presented and it shows a promising result, in that the delay-based TRNG will work properly, with some constraints in sub-nm technology.
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Akashi, Nozomi, Kohei Nakajima, Mitsuru Shibayama i Yasuo Kuniyoshi. "A mechanical true random number generator". New Journal of Physics 24, nr 1 (1.01.2022): 013019. http://dx.doi.org/10.1088/1367-2630/ac45ca.
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Abstract Random number generation has become an indispensable part of information processing: it is essential for many numerical algorithms, security applications, and in securing fairness in everyday life. Random number generators (RNGs) find application in many devices, ranging from dice and roulette wheels, via computer algorithms, lasers to quantum systems, which inevitably capitalize on their physical dynamics at respective spatio-temporal scales. Herein, to the best of our knowledge, we propose the first mathematically proven true RNG (TRNG) based on a mechanical system, particularly the triple linkage of Thurston and Weeks. By using certain parameters, its free motion has been proven to be an Anosov flow, from which we can show that it has an exponential mixing property and structural stability. We contend that this mechanical Anosov flow can be used as a TRNG, which requires that the random number should be unpredictable, irreproducible, robust against the inevitable noise seen in physical implementations, and the resulting distribution’s controllability (an important consideration in practice). We investigate the proposed system’s properties both theoretically and numerically based on the above four perspectives. Further, we confirm that the random bits numerically generated pass the standard statistical tests for random bits.
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Prasannanjali, C. "Ring Oscillator Based True Random Number Generator". International Journal for Research in Applied Science and Engineering Technology 12, nr 2 (29.02.2024): 276–83. http://dx.doi.org/10.22214/ijraset.2024.58320.
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Abstract: A true random number generator (TRNG), also known as a hardware random number generator (HRNG), does not use a computer algorithm. Instead, it uses an external unpredictable physical variable such as stochastic models to generate random numbers. Here it gathers data from random electronic signals. Then, the data is converted into digital form and any patterns registered are removed to make it random. This data is used to create random numbers. It is mainly used in Cryptographic Security, authentication, secure communications, e-commerce transactions, Digital Signatures etc. In Existing Method, LFSR based TRNGs generate pseudo random numbers. They produce sequences of bits that appear random but are deterministic and repeat after a certain number of cycles known as the period. They are easy to predict and are not suitable for high security applications. This project aim is to overcome such circumstances, we use TERO(Three Edge Ring Oscillator) based TRNG. Three edges are simultaneously injected by each inverting NAND stage with enable signal Run. These edges will have an identical mean period since they propagate through the same stages. The TERO generates an oscillating signal with a frequency determined by the delay of inverters. TDC (Time to Digital Converter) is used to precisely measure the time intervals between the rising edges of TEROs output signal. Then, it converts time intervals into digital values, effectively generating truly random numbers. Power consumption depends on factors like operating frequency and load capacitance. The Software used is Xilinx Vivado/Xilinx ISE Tools. Here the Proposed Method exquisitely balances Low design effort and resource consumption with high throughput and high randomness.
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Zong, Yi, Lihua Dong i Xiaoxin Lu. "Entropy Model of Rosin Autonomous Boolean Network Digital True Random Number Generator". Electronics 13, nr 6 (20.03.2024): 1140. http://dx.doi.org/10.3390/electronics13061140.
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A True Random Number Generator (TRNG) is an important component in cryptographic algorithms and protocols. The Rosin Autonomous Boolean Network (ABN) digital TRNG has been widely studied due to its nice properties, such as low energy consumption, high speed, strong platform portability, and strong randomness. However, there is still a lack of suitable entropy models to deduce the requirement of design parameters to ensure true randomness. The current model to evaluate the entropy of oscillator-based TRNGs is not applicable for Rosin ABN TRNGs due to low-frequency noise. This work presents a new, suitable stochastic model to evaluate the entropy of Rosin ABN TRNGs. Theoretical analysis and simulation experiments verify the correctness and the effectiveness of the model, and, finally, the appropriate sampling parameters for Rosin ABN TRNGs are given for sufficient entropy per random bit to ensure true randomness.
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Gupta, Ramji, Alpana Pandey i R. K.Baghel. "Efficient design of chaos based 4 bit true random number generator on FPGA". International Journal of Engineering & Technology 7, nr 3 (22.08.2018): 1783. http://dx.doi.org/10.14419/ijet.v7i3.16586.
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True random number generator is a basic building block of any modern secure communication and cryptography system. FPGA implementation of any system has a flexible architecture and low-cost test cycle. In this paper, we present an FPGA implementation of a high speed true random number generator based on chaos oscillator which gives optimize ratio of bit rate to area. The proposed generator is faster and more compact than the existing chaotic oscillator based TRNGs. The Experimental result shows that the proposed TRNG gives 1439 Mbps with optimizing the use of LUTs and registers. It is verified that the generator passes all the NIST SP 800-22 tests. The proposed TRNG is implemented in two FPGA families Nexus 4 (Artix 7) DDR XC7A100TCSG-1 and Basys 3 XC7A35T1CPG236C (Artix 7) using Xilinx Vivado v.2017.3 design suite.
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Nor Hashim, Noor Alia, Julius Teo Han Loong, Azrul Ghazali i Fazrena Azlee Hamid. "Memristor based ring oscillators true random number generator with different window functions for applications in cryptography". Indonesian Journal of Electrical Engineering and Computer Science 14, nr 1 (1.04.2019): 201. http://dx.doi.org/10.11591/ijeecs.v14.i1.pp201-209.
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<span>Cryptographic applications require numbers that are random and pseudorandom. Keys must be produced in a random manner in order to be used in common cryptosystems. Random or pseudorandom inputs at different terminals are also required in a lot of cryptographic protocols. For example, producing digital signatures using supporting quantities or in verification procedures that requires generating challenges. Random number generation is an important part of cryptography because there are flaws in random number generation that can be taken advantage by attackers that compromised encryption systems that are algorithmically secure. True random number generators (TRNGs) are the best in producing random numbers. This paper presents a True Random Number Generator that uses memristor based ring oscillators in the design. The designs are implemented in 0.18 µm complementary metal oxide semiconductor (CMOS) technology using LT SPICE IV. Different window functions for the memristor model was applied to the TRNG and compared. Statistical tests results of the output random numbers produced showed that the proposed TRNG design can produce random output regardless of the window function.</span>
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Khan, Mohammad Nasim Imtiaz, Chak Yuen Cheng, Sung Hao Lin, Abdullah Ash-Saki i Swaroop Ghosh. "A Morphable Physically Unclonable Function and True Random Number Generator Using a Commercial Magnetic Memory". Journal of Low Power Electronics and Applications 11, nr 1 (14.01.2021): 5. http://dx.doi.org/10.3390/jlpea11010005.
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We use commercial magnetic memory to realize morphable security primitives, a Physically Unclonable Function (PUF) and a True Random Number Generator (TRNG). The PUF realized by manipulating the write time and the TRNG is realized by tweaking the number of write pulses. Our analysis indicates that more than 75% bits in the PUF are unusable without any correction due to their inability to exhibit any randomness. We exploit temporal randomness of working columns to fix the unusable columns and write latency to fix the unusable rows during the enrollment. The intra-HD, inter-HD, energy, bandwidth and area of the proposed PUF are found to be 0, 46.25%, 0.14 pJ/bit, 0.34 Gbit/s and 0.385 μm2/bit (including peripherals) respectively. The proposed TRNG provides all possible outcomes with a standard deviation of 0.0062, correlation coefficient of 0.05 and an entropy of 0.95. The energy, bandwidth and area of the proposed TRNG is found to be 0.41 pJ/bit, 0.12 Gbit/s and 0.769 μm2/bit (including peripherals). The performance of the proposed TRNG has also been tested with NIST test suite. The proposed designs are compared with other magnetic PUFs and TRNGs from other literature.
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Lee, Kyungroul, i Manhee Lee. "True Random Number Generator (TRNG) Utilizing FM Radio Signals for Mobile and Embedded Devices in Multi-Access Edge Computing". Sensors 19, nr 19 (24.09.2019): 4130. http://dx.doi.org/10.3390/s19194130.
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As transmissions of data between mobile and embedded devices in multi-access edge computing (MEC) increase, data must be protected, ensuring confidentiality and integrity. These issues are usually solved with cryptographic algorithms systems, which utilize a random number generator to create seeds and keys randomly. Their role in cryptography is so important that they need to be generated securely. In this paper, a true random number generator (TRNG) utilizing FM radio signals as a source is proposed. The proposed method can generate random numbers with high entropy, increased by at least 118% and up to 431% compared to existing generators.
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G, Anahita, Krishnapriya KPM, Shiva Prasad R i Mohan Kumar N. "HD-Sign: Hardware Based Digital Signature Generation Using True Random Number Generator". International Journal of Engineering & Technology 7, nr 3.8 (7.07.2018): 147. http://dx.doi.org/10.14419/ijet.v7i3.8.16850.
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With the recent advancements in the field of computing, a fair share of easier and safer practices to exchange and share information between multiple parties have propped up. While some of these are improvisations, a few such as the Digital Signatures, have fast replaced conventional signing practices. It’s wide use and acceptance in the industry as well as officially, has necessitated higher security to protect data integrity and privacy. These digital Signatures are generated on the basis of various schemes that are designed to accommodate efficiency, crypto security and algorithmic complexity. This paper proposes an alternate method named HD-SIGN for generating these digital signatures in accordance with Secure Hash Function and 512-bit SRNN cryptographic algorithm. With the aid of a TRNG module, a modification to produce a large number with two prime factors and a set of natural numbers in a pair of public and private keys has been incorporated. The LSFR based TRNG module which helps maintain the ‘True Randomness’ of any generated number has been used for this purpose. Further, the random nature of the generated sequence to be used in the digital signature, has been tested with the help of standard NIST tests. The Hamming distance has also been analyzed as a security metric for the proposal, implying the degree of unpredictability of the generated true random sequences.
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Wold, Knut, i Chik How Tan. "Analysis and Enhancement of Random Number Generator in FPGA Based on Oscillator Rings". International Journal of Reconfigurable Computing 2009 (2009): 1–8. http://dx.doi.org/10.1155/2009/501672.
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A true random number generator (TRNG) is an important component in cryptographic systems. Designing a fast and secure TRNG in an FPGA is a challenging task. In this paper, we analyze the TRNG designed by Sunar et al. (2007) based on XOR of the outputs of several oscillator rings. We propose an enhanced TRNG with better randomness characteristics that does not require postprocessing and passes the statistical tests. We have shown by experiment that the frequencies of the equal length oscillator rings in the TRNG are not identical. The difference is due to the placement of the inverters in the FPGA and the resulting routing between the inverters. We have implemented our proposed TRNG in an Altera Cyclone II FPGA. Our implementation has passed the NIST and DIEHARD statistical tests with a throughput of 100 Mbps and with a usage of less than 100 logic elements in the FPGA. The restart experiments have shown that the output from our TRNG behaves truly random and not pseudorandom.
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Zhang, Xu, Chunsheng Jiang, Gang Dai, Le Zhong, Wen Fang, Ke Gu, Guoping Xiao, Shangqing Ren, Xin Liu i Sanyong Zou. "Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure". Sensors 20, nr 21 (28.10.2020): 6132. http://dx.doi.org/10.3390/s20216132.
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Encryption is an important step for secure data transmission, and a true random number generator (TRNG) is a key building block in many encryption algorithms. Static random-access memory (SRAM) chips can be easily available sources of true random numbers, benefiting from noisy SRAM cells whose start-up values flip between different power-on cycles. Embarking from this phenomenon, a novel performance (i.e., randomness and throughput) improvement method of SRAM-based TRNG is proposed, and its implementation can be divided into two phases: irradiation exposure and hardware postprocessing. As the randomness of original SRAM power-on values is fairly low, ionization irradiation is utilized to enhance its randomness, and the min-entropy can increase from about 0.03 to above 0.7 in the total ionizing irradiation (TID) experiments. Additionally, while the data remanence effect hampers obtaining random bitstreams with high speed, the ionization irradiation can also weaken this impact and improve the throughput of TRNG. In the hardware postprocessing stage, Secure Hash Algorithm 256 (SHA-256) is implemented on a Field Programmable Gate Array (FPGA) with clock frequency of 200 MHz. It can generate National Institute of Standards and Technology (NIST) SP 800-22 compatible true random bitstreams with throughput of 178 Mbps utilizing SRAM chip with 1 Mbit memory capacity. Furthermore, according to different application scenarios, the throughput can be widely scalable by adjusting clock frequency and SRAM memory capacity, which makes the novel TRNG design applicable for various Internet of Things (IOT) devices.
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Peng, Bo, Qiqiao Wu, Zhongqiang Wang i Jianguo Yang. "A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications". Micromachines 14, nr 6 (8.06.2023): 1213. http://dx.doi.org/10.3390/mi14061213.
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Resistance random access memory (RRAM) based true random number generator (TRNG) has great potential to be applied to hardware security owing to its intrinsic switching variability. Especially the high resistance state (HRS) variation is usually taken as the entropy source of RRAM-based TRNG. However, the small HRS variation of RRAM may be introduced owing to fabrication process fluctuations, which may lead to error bits and be vulnerable to noise interference. In this work, we propose an RRAM-based TRNG with a 2T1R architecture scheme, which can effectively distinguish the resistance values of HRS with an accuracy of 1.5 kΩ. As a result, the error bits can be corrected to a certain extent while the noise is suppressed. Finally, a 2T1R RRAM-based TRNG macro is simulated and verified using the 28 nm CMOS process, which suggests its potential for hardware security applications.
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Raghunath, Avinash Krishnan, Dimple Bharadwaj, M. Prabhuram i Aju D. "Designing a secured audio based key generator for cryptographic symmetric key algorithms". Computer Science and Information Technologies 2, nr 2 (1.07.2021): 87–94. http://dx.doi.org/10.11591/csit.v2i2.p87-94.
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ryptography is a technique to secure data transmissions and ensure confiden-tiality, authenticity and integrity of data exchanged over the digital networks by utilizing mathematical algorithms to transform the plain text (original message) to cipher text (encrypted message) using a key or seed value. The general con-sensus regarding the use of non-deterministic true random numbers (TRN) which are generated from the physical environment such as entropy keys, at-mospheric noise, etc., as a public or private key has received limited encour-agement due to the demanding hardware requirements needed to extract the necessary data from the environment. Therefore, this research aims at design-ing and developing a lightweight program to generate a True Random Number (TRNG) key using live audio recordings which is further randomized using system date and time. These TRNs can be used to replace the deterministic pseudo random number cryptographic keys that are presently used by indus-tries for a symmetric key encryption algorithm which devolves the algorithm to being conditionally secured. Using the audio based TRNG key would render the same encryption algorithm as unconditionally secured.
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Avinash Krishnan Raghunath, Dimple Bharadwaj, M. Prabhuram i Aju D. "Designing a secured audio based key generator for cryptographic symmetric key algorithms". Computer Science and Information Technologies 2, nr 2 (1.07.2021): 87–94. http://dx.doi.org/10.11591/csit.v2i2.pp87-94.
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Cryptography is a technique to secure data transmissions and ensure confiden-tiality, authenticity and integrity of data exchanged over the digital networks by utilizing mathematical algorithms to transform the plain text (original message) to cipher text (encrypted message) using a key or seed value. The general con-sensus regarding the use of non-deterministic true random numbers (TRN) which are generated from the physical environment such as entropy keys, at-mospheric noise, as a public or private key has received limited encour-agement due to the demanding hardware requirements needed to extract the necessary data from the environment. Therefore, this research aims at design-ing and developing a lightweight program to generate a true random number (TRNG) key using live audio recordings which is further randomized using system date and time. These TRNs can be used to replace the deterministic pseudo random number cryptographic keys that are presently used by indus-tries for a symmetric key encryption algorithm which devolves the algorithm to being conditionally secured. Using the audio based TRNG key would render the same encryption algorithm as unconditionally secured.
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Meitei, Huirem Bharat, i Manoj Kumar. "Implementation of a secure wireless communication system using true random number generator for internet of things". Indonesian Journal of Electrical Engineering and Computer Science 30, nr 2 (1.05.2023): 982. http://dx.doi.org/10.11591/ijeecs.v30.i2.pp982-992.
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This paper describes the design and implementation of an internet of thing (IoT)-based application that uses a true random number generator (TRNG) with an all digital phase locked loop (ADPLL) for secure wireless communication. Field programmable gate array (FPGA) boards were used on the transmitter and receiver sides and were interfaced with Esp8266 chips to wirelessly send and receive encrypted sensor data. The MQ-2 gas sensor and tracking sensor were connected to the FPGA board on the transmitter side, where data from the sensors was encrypted using the exclusive-OR (XOR) function and the TRNG architecture. The system can be controlled by users through a web browser served by the ThingSpeak cloud. The Artix-7 FPGA device is used to implement the proposed wireless communication system, for which design and synthesis were done using the Xilinx Vivado 2015.2 tool. The proposed system uses a low amount of power and is suitable for a standalone, highly secure TRNG-based IoT application. The National Institute of Standard and Testing (NIST SP 800-22) test showed that ADPLL with finite impulse response (FIR) filter-based TRNGs are better for encrypting IoT devices for secure wireless communication.
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Rojas-Muñoz, Luis F., Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez i Piedad Brox. "True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices". Electronics 11, nr 23 (5.12.2022): 4028. http://dx.doi.org/10.3390/electronics11234028.
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This paper presents the validation of a novel approach for a true-random number generator (TRNG) based on a ring oscillator–physical unclonable function (RO-PUF) for FPGA devices. The proposal takes advantage of the different noise sources that affect the electronic implementation of the RO-PUF to extract the entropy required to guarantee its function as a TRNG, without anything more than minimal changes to the original design. The new RO-PUF/TRNG architecture has been incorporated within a hybrid HW/SW embedded system designed for devices from the Xilinx Zynq-7000 family. The degree of randomness of the generated bit streams was assessed using the NIST 800-22 statistical test suite, while the validation of the RO-PUF proposal as an entropy source was carried out by fulfilling the NIST 800-90b recommendation. The features of the hybrid system were exploited to carry out the evaluation and validation processes proposed by the NIST publications, online and on the same platform. To establish the optimal configuration to generate bit streams with the appropriate entropy level, a statistical study of the degree of randomness was performed for multiple TRNG approaches derived from the different implementation modes and configuration options available on the original RO-PUF design. The results show that the RO-PUF/TRNG design is suitable for secure cryptographic applications, doubling its functionality without compromising the resource–efficiency trade-off already achieved in the design.
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Yakut, Selman, Taner Tuncer i Ahmet Bedri Özer. "A New Secure and Efficient Approach for TRNG and Its Post-Processing Algorithms". Journal of Circuits, Systems and Computers 29, nr 15 (21.05.2020): 2050244. http://dx.doi.org/10.1142/s0218126620502448.
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Random numbers are important parameters for the security of cryptographic applications. In this study, a secure and efficient generator is proposed to generate random numbers. The first part of the generator is a true random number generator that consists of chaotic systems implemented on FPGA. The second part of the generator is a post-processing algorithm used to overcome the problems that emerge from the generator or environmental factors. As the post-processing algorithm, Keccak, the latest standard of hash algorithm, was rearranged and used. Random numbers with the proposed approach meet the security requirements for cryptographic applications. Furthermore, the NIST 800-22 test suite and autocorrelation test are used to ensure the generated numbers have no statistical weakness. The successful test results demonstrate the security of the generated numbers. An important advantage of the proposed generator does not cause any data loss and perform 100% efficiency although data loss can be up to 70% in some post-processing algorithms.
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Camara, Carmen, Honorio Martín, Pedro Peris-Lopez i Muawya Aldalaien. "Design and Analysis of a True Random Number Generator Based on GSR Signals for Body Sensor Networks". Sensors 19, nr 9 (30.04.2019): 2033. http://dx.doi.org/10.3390/s19092033.
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Today, medical equipment or general-purpose devices such as smart-watches or smart-textiles can acquire a person’s vital signs. Regardless of the type of device and its purpose, they are all equipped with one or more sensors and often have wireless connectivity. Due to the transmission of sensitive data through the insecure radio channel and the need to ensure exclusive access to authorised entities, security mechanisms and cryptographic primitives must be incorporated onboard these devices. Random number generators are one such necessary cryptographic primitive. Motivated by this, we propose a True Random Number Generator (TRNG) that makes use of the GSR signal measured by a sensor on the body. After an exhaustive analysis of both the entropy source and the randomness of the output, we can conclude that the output generated by the proposed TRNG behaves as that produced by a random variable. Besides, and in comparison with the previous proposals, the performance offered is much higher than that of the earlier works.
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Peetermans, Adriaan, Vladimir Rožić i Ingrid Verbauwhede. "Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling". ACM Transactions on Reconfigurable Technology and Systems 14, nr 2 (5.06.2021): 1–20. http://dx.doi.org/10.1145/3433166.
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True Random Number Generators (TRNGs) are indispensable in modern cryptosystems. Unfortunately, to guarantee high entropy of the generated numbers, many TRNG designs require a complex implementation procedure, often involving manual placement and routing. In this work, we introduce, analyse, and compare three dynamic calibration mechanisms for the COherent Sampling ring Oscillator based TRNG: GateVar , WireVar , and LUTVar , enabling easy integration of the entropy source into complex systems. The TRNG setup procedure automatically selects a configuration that guarantees the security requirements. In the experiments, we show that two out of the three proposed mechanisms are capable of assuring correct TRNG operation even when an automatic placement is carried out and when the design is ported to another Field-Programmable Gate Array (FPGA) family. We generated random bits on both a Xilinx Spartan 7 and a Microsemi SmartFusion2 implementation that, without post processing, passed the AIS-31 statistical tests at a throughput of 4.65 Mbit/s and 1.47 Mbit/s, respectively.
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Stoller, Scott, i Kristy A. Campbell. "Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components". Entropy 23, nr 3 (20.03.2021): 371. http://dx.doi.org/10.3390/e23030371.
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In this work, we build and test three memristor-based true random number generator (TRNG) circuits: two previously presented in the literature and one which is our own design. The functionality of each circuit is assessed using the National Institute of Standards and Technology (NIST) Statistical Test Suite (STS). The TRNG circuits were built using commercially available off-the-shelf parts, including the memristor. The results of this work confirm the usefulness of memristors for successful implementation of TRNG circuits, as well as the ease with which a TRNG can be built using simple circuit designs and off-the-shelf breadboard circuit components.
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Klein, Netanel, Eyal Harel i Itamar Levi. "The Cost of a True Random Bit—On the Electronic Cost Gain of ASIC Time-Domain-Based TRNGs". Cryptography 5, nr 3 (18.09.2021): 25. http://dx.doi.org/10.3390/cryptography5030025.
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Random number generators are of paramount importance in numerous fields. Under certain well-defined adversarial settings, True Random Number Generators (TRNGs) are more secure than their computational (pseudo) random number generator counterparts. TRNGs are also known to be more efficiently implemented on hardware platforms where, for various applications, efficiency in terms of electronic cost factors is critical. In this manuscript, we first provide an evaluation of robustness and reliability of efficient time-domain-based TRNG implementation over FPGA platform. In particular, we demonstrate sensitivities which imply a TRNG construction which is not agnostic to electronic-design-automation tools and to the level of designers’ know-how. This entails a large amount of effort and validation to make the designs robust, as well as requires a high degree of complexity from non-trivial FPGAs flows. This motivates the second part of the manuscript, where we propose an ASIC-based implementation of the TRNG, along with the optimization steps to enhance its characteristics. The optimized design improves the randomness-throughput by 42× for the same entropy level described in previous works, and it can provide maximal entropy level of 0.985 with 7× improvement in randomness throughput over the raw samples (no pre-processing). The proposed design simultaneously provides a reduced energy of 0.1 (mW/bit) for the same entropy level as previous works, and 1.06 (mW/bit) for the higher entropy flavor, and a lower area utilization of 0.000252 (mm2) on a 65 nm technology evaluation, situating it in the top-class of the discuss ratings. This leads to the quantitative question of the gain in electronic cost factors over ASIC TRNGs, and the minimum Cost Per Bit/Source possible to date. Finally, we exemplify a TRNG versus PRNG cost-extrapolation for security architects and designers, targeting an ASIC scenario feeding a lightweight encryption core.
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Risdianto, Dian Arief, i Bambang Nurcahyo Prastowo. "Pengembangan True Random Number Generator berbasis Citra menggunakan Algoritme Kaotis". IJEIS (Indonesian Journal of Electronics and Instrumentation Systems) 10, nr 1 (30.04.2020): 87. http://dx.doi.org/10.22146/ijeis.36517.
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The security of most cryptographic systems depends on key generation using a nondeterministic RNG. PRNG generates a random numbers with repeatable patterns over a period of time and can be predicted if the initial conditions and algorithms are known. TRNG extracts entropy from physical sources to generate random numbers. However, most of these systems have relatively high cost, complexity, and difficulty levels. If the camera is directed to a random scene, the resulting random number can be assumed to be random. However, the weakness of a digital camera as a source of random numbers lies in the resulting refractive pattern. The raw data without further processing can have a fixed noise pattern. By applying digital image processing and chaotic algorithms, digital cameras can be used to generate true random numbers. In this research, for preprocessing image data used method of floyd-steinberg algorithm. To solve the problem of several consecutive black or white pixels appearing in the processed image area, the arnold-cat map algorithm is used while the XOR operation is used to combine the data and generate the true random number. NIST statistical tests, scatter and histrogram analyzes show the use of this method can produce truly random numbers
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Rexha, Blerim, Dren Imeraj i Isak Shabani. "Using Efficient TRNGs for PSEUDO Profile in National eID Card". International Journal of Recent Contributions from Engineering, Science & IT (iJES) 6, nr 1 (19.03.2018): 57. http://dx.doi.org/10.3991/ijes.v6i1.8357.
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Applications that requires true random number generator (TRNG), which uses raw analog data generated from any noise source in nature, must convert the source normal distribution to uniform distribution. Many up to date implementations convert the raw analog data into digital data by employing a comparator or a Schmitt trigger. This method wastes a large amount of random input data, lowering the throughput of the TRNG. In new national electronic identity card (eID) beyond the true identity of his bearer and to address the increasing concern of user privacy while doing business in Internet an additional pseudo profile is set. This pseudo profile uses 20-byte random value generated by database server, using a script during personalization process. In this paper, we present a novel algorithm that enables efficient distribution conversion in low power devices. The low memory requirements and efficient processing make it suitable for implementation low power cryptographic devices but also in complex personalization systems. Furthermore, we compare the random data generated by our efficient TRNG vs. those generated by database server.
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Wang, Xinsheng, i Xiyue Wang. "Design of True Random Number Circuit with Controllable Frequency". Electronics 10, nr 13 (23.06.2021): 1517. http://dx.doi.org/10.3390/electronics10131517.
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True random number generators (TRNGs) have been a research hotspot due to secure encryption algorithm requirements. Therefore, such circuits are necessary building blocks in state-of-the-art security controllers. In this paper, a TRNG based on random telegraph noise (RTN) with a controllable rate is proposed. A novel method of noise array circuits is presented, which consists of digital decoder circuits and RTN noise circuits. The frequency of generating random numbers is controlled by the speed of selecting different gating signals. The results of simulation show that the array circuits consist of 64 noise source circuits that can generate random numbers by a frequency from 1 kHz to 16 kHz.
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Li, Gang, Haoyang Sun, Peiqi Wu, Yuedan Zhou, Xiaochuan Fang, Zhenbing Li, Jian Li, Yongjun Huang i Guangjun Wen. "A Novel TRNG Based on Traditional ADC Nonlinear Effect and Chaotic Map for IoT Security and Anticollision". Security and Communication Networks 2021 (23.10.2021): 1–16. http://dx.doi.org/10.1155/2021/2439427.
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In the rapidly developing Internet of Things (IoT) applications, how to achieve rapid identification of massive devices and secure the communication of wireless data based on low cost and low power consumption is the key problem to be solved urgently. This paper proposes a novel true random number generator (TRNG) based on ADC nonlinear effect and chaotic map, which can be implemented by traditional processors with built-in ADCs, such as MCU, DSP, ARM, and FPGA. The processor controls the ADC to sample the changing input signal to obtain the digital signal DADC and then extracts some bits of DADC to generate the true random number (TRN). At the same time, after a delay based on DADC, the next time ADC sampling is carried out, and the cycle continues until the processor stops generating the TRN. Due to the nonlinear effect of ADC, the DADC obtained from each sampling is stochastic, and the changing input signal will sharply change the delay time, thus changing the sampling interval (called random interval sampling). As the input signal changes, DADC with strong randomness is obtained. The whole operation of the TRNG resembles a chaotic map, and this method also eliminates the pseudorandom property of chaotic map by combining the variable input signal (including noise) with the nonlinear effect of ADC. The simulation and actual test data are verified by NIST, and the verification results show that the random numbers generated by the proposed method have strong randomness and can be used to implement TRNG. The proposed TRNG has the advantages of low cost, low power consumption, and strong compatibility, and the rate of generating true random number is more than 1.6 Mbps (determined by ADC sampling rate and processor frequency), which is very suitable for IoT sensor devices for security encryption algorithms and anticollision.
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Aksshaya, B., G. Madhura L. V., Nivethashri S, Vishnuvarthini T i Mohankumar N. "Design And Analysis of Analog TRNG Using Sample and Hold Circuit". International Journal of Engineering & Technology 7, nr 3.8 (7.07.2018): 69. http://dx.doi.org/10.14419/ijet.v7i3.8.15222.
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Implementation of analog True random number generators is inevitable in almost all the security applications and encryption protocols nowadays. Although many digital True Random Number Generators are available, we proposed a method of random number generation using analog module of mixed signals. In actual fact generation of True Random Numbers is by utilizing the sample and hold circuit which is controlled by another random clock source, and a post processing circuit for generation of unpredictable binary sequence of numbers. The primary input source is an analog signal, essentially highly random noise from the external environment. The high unpredictability, less resource and simple circuit design are some highlights of the proposed work. Finally, the randomness is evaluated using NIST test suites and results are plotted and analyzed.
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Kuka, Colin Sokol, Yihua Hu, Quan Xu, James Chandler i Mohammed Alkahtani. "A Novel True Random Number Generator in Near Field Communication as Memristive Wireless Power Transmission". J 4, nr 4 (11.11.2021): 764–83. http://dx.doi.org/10.3390/j4040052.
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The security of powering systems has been a major problem over the last decade, leading to an increased interest in wireless power and data transfer. In this research paper, a new inductive Wireless Power Transfer (WPT) circuit topology has been used. In traditional WPT circuits, the inverters are used to produce an oscillation for the transmitter coils. The classic WPT system includes intrinsic energy dissipation sources due to the use of switches, necessitating the need of an extra control circuit to ensure proper switching time. Furthermore, they have limited data encryption capabilities. As a result, an unique WPT system based on memristors has been developed, eliminating the need for switches. Furthermore, because this novel topology communicates a synchronised chaotic behaviour, it becomes highly beneficial. This circuit may be used in Near Field Communication (NFC), where chaotic true random numbers (TRNG) can be generated to increase security. The results of simulations indicate the functioning of the Memristor-based WPT (M-WPT) and its ability to generate random numbers. We experimentally proved the chaotic behaviour of the circuit and statistically demonstrated the development of the TRNG, using an Arduino board and the Chua circuit to build the M-WPT circuit.
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Chen, Chengying, Shuhui Li i Changkun Song. "A 200 kb/s 36 µw True Random Number Generator Based on Dual Oscillators for IOT Security Application". Electronics 12, nr 10 (22.05.2023): 2332. http://dx.doi.org/10.3390/electronics12102332.
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As a module of the internet of things (IOT) information security system, the true random number generator (TRNG) plays an important role in overall performance. In this paper, a low-power TRNG based on dual oscillators is proposed. Two high-frequency cross-coupled oscillators are used to generate high-jitter clock signals, and then the SR latch with power supply below standard power supply voltage is adopted to process the oscillator output to maintain its metastability and increase jitter. The circuit is realized by an SMIC 180 nm 1P6M mixed-signal process. The experimental results show that when power supply voltage is 1.8 V, the circuit outputs a random number bit rate of 200 kb/s, the core area is 0.0039 mm2, and the power consumption is only 36 µw. The output random sequences can pass the NIST SP 800-22 test.
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Camara, Carmen, Pedro Peris-Lopez, Honorio Martín i Mu’awya Aldalaien. "ECG-RNG: A Random Number Generator Based on ECG Signals and Suitable for Securing Wireless Sensor Networks". Sensors 18, nr 9 (21.08.2018): 2747. http://dx.doi.org/10.3390/s18092747.
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Wireless Sensor Networks (WSNs) are a promising technology with applications in many areas such as environment monitoring, agriculture, the military field or health-care, to name but a few. Unfortunately, the wireless connectivity of the sensors opens doors to many security threats, and therefore, cryptographic solutions must be included on-board these devices and preferably in their design phase. In this vein, Random Number Generators (RNGs) play a critical role in security solutions such as authentication protocols or key-generation algorithms. In this article is proposed an avant-garde proposal based on the cardiac signal generator we carry with us (our heart), which can be recorded with medical or even low-cost sensors with wireless connectivity. In particular, for the extraction of random bits, a multi-level decomposition has been performed by wavelet analysis. The proposal has been tested with one of the largest and most publicly available datasets of electrocardiogram signals (202 subjects and 24 h of recording time). Regarding the assessment, the proposed True Random Number Generator (TRNG) has been tested with the most demanding batteries of statistical tests (ENT, DIEHARDERand NIST), and this has been completed with a bias, distinctiveness and performance analysis. From the analysis conducted, it can be concluded that the output stream of our proposed TRNG behaves as a random variable and is suitable for securing WSNs.
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Mahalingam, Hemalatha, Sivaraman Rethinam, Siva Janakiraman i Amirtharajan Rengarajan. "Non-Identical Inverter Rings as an Entropy Source: NIST-90B-Verified TRNG Architecture on FPGAs for IoT Device Integrity". Mathematics 11, nr 4 (19.02.2023): 1049. http://dx.doi.org/10.3390/math11041049.
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True random key generator (TRNG) architectures play a notable role in strengthening information security infrastructure. The development of new entropy sources based on reconfigurable hardware is always in demand, especially for the integrity of devices in IoT applications. TRNGs can be adopted for generating unique device IDs that form the data network in the IoT. A ring oscillator (RO) is an efficient entropy source which can be implemented on FPGAs or realised as ASIC hardware. This work proposes a non-identical RO array as an entropy source. The TRNG architecture, based on an increasing odd number of inverters per ring, was extensively studied. The various statistical and hardware analyses provided encouraging results for this reliable entropy unit. The suggested device-independent non-identical RO structure was implemented on five different types of FPGA hardware belonging to the Xilinx and Intel families, consuming 13 registers and nearly 15 combinational functions. This TRNG achieved a throughput of 3.5 Mbps. While the emergence of the Gaussian response evaluated true randomness, the NIST 800-90B and NIST 800-22 tests yielded good results in terms of the justification of randomness evolving from the proposed TRNG architecture.
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Lee, Kyungroul, Sun-Young Lee, Changho Seo i Kangbin Yim. "TRNG (True Random Number Generator) Method Using Visible Spectrum for Secure Communication on 5G Network". IEEE Access 6 (2018): 12838–47. http://dx.doi.org/10.1109/access.2018.2799682.
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Cambou, Bertrand, Donald Telesca, Sareh Assiri, Michael Garrett, Saloni Jain i Michael Partridge. "TRNGs from Pre-Formed ReRAM Arrays". Cryptography 5, nr 1 (9.02.2021): 8. http://dx.doi.org/10.3390/cryptography5010008.
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Schemes generating cryptographic keys from arrays of pre-formed Resistive Random Access (ReRAM) cells, called memristors, can also be used for the design of fast true random number generators (TRNG’s) of exceptional quality, while consuming low levels of electric power. Natural randomness is formed in the large stochastic cell-to-cell variations in resistance values at low injected currents in the pre-formed range. The proposed TRNG scheme can be designed with three interconnected blocks: (i) a pseudo-random number generator that acts as an extended output function to generate a stream of addresses pointing randomly at the array of ReRAM cells; (ii) a method to read the resistance values of these cells with a low injected current, and to convert the values into a stream of random bits; and, if needed, (iii) a method to further enhance the randomness of this stream such as mathematical, Boolean, and cryptographic algorithms. The natural stochastic properties of the ReRAM cells in the pre-forming range, at low currents, have been analyzed and demonstrated by measuring a statistically significant number of cells. Various implementations of the TRNGs with ReRAM arrays are presented in this paper.
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Garipcan, Ali Murat, i Ebubekir Erdem. "DESSB-TRNG: A novel true random number generator using data encryption standard substitution box as post-processing". Digital Signal Processing 123 (kwiecień 2022): 103455. http://dx.doi.org/10.1016/j.dsp.2022.103455.
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Bernard, Florent, Arturo Garay, Patrick Haddad, Nathalie Bochard i Viktor Fischer. "Low Cost and Precise Jitter Measurement Method for TRNG Entropy Assessment". IACR Transactions on Cryptographic Hardware and Embedded Systems 2024, nr 1 (4.12.2023): 207–28. http://dx.doi.org/10.46586/tches.v2024.i1.207-228.
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Random number generators and specifically true random number generators (TRNGs) are essential in cryptography. TRNGs implemented in logic devices usually exploit the time instability of clock signals generated in freely running oscillators as source of randomness. To assess the performance and quality of oscillator-based TRNGs, accurate measurement of clock jitter originating from thermal noise is of paramount importance. We propose a novel jitter measurement method, in which the required jitter accumulation time can be reduced to around 100 reference clock periods. Reduction of the jitter accumulation time reduces the impact of the flicker noise on the measured jitter and increases the precision of the estimated contribution of thermal noise. In addition, the method can be easily embedded in logic devices. The fact that the jitter measurement can be placed in the same device as the TRNG is important since it can be used as a basis for efficient embedded statistical tests. In contrast to other methods, we propose a thorough theoretical analysis of the measurement error. This makes it possible to tune the parameters of the method to guarantee a relative error smaller than 12% even in the worst cases.
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Yuan, Zeshi, Hongtao Li, Yunchi Miao, Wen Hu i Xiaohua Zhu. "Digital-Analog Hybrid Scheme and Its Application to Chaotic Random Number Generators". International Journal of Bifurcation and Chaos 27, nr 14 (30.12.2017): 1750210. http://dx.doi.org/10.1142/s0218127417502108.
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Practical random number generation (RNG) circuits are typically achieved with analog devices or digital approaches. Digital-based techniques, which use field programmable gate array (FPGA) and graphics processing units (GPU) etc. usually have better performances than analog methods as they are programmable, efficient and robust. However, digital realizations suffer from the effect of finite precision. Accordingly, the generated random numbers (RNs) are actually periodic instead of being real random. To tackle this limitation, in this paper we propose a novel digital-analog hybrid scheme that employs the digital unit as the main body, and minimum analog devices to generate physical RNs. Moreover, the possibility of realizing the proposed scheme with only one memory element is discussed. Without loss of generality, we use the capacitor and the memristor along with FPGA to construct the proposed hybrid system, and a chaotic true random number generator (TRNG) circuit is realized, producing physical RNs at a throughput of Gbit/s scale. These RNs successfully pass all the tests in the NIST SP800-22 package, confirming the significance of the scheme in practical applications. In addition, the use of this new scheme is not restricted to RNGs, and it also provides a strategy to solve the effect of finite precision in other digital systems.
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Parrilla, Luis, Antonio García, Encarnación Castillo, Juan Antonio López-Villanueva i Uwe Meyer-Baese. "Revisiting Multiple Ring Oscillator-Based True Random Generators to Achieve Compact Implementations on FPGAs for Cryptographic Applications". Cryptography 7, nr 2 (10.05.2023): 26. http://dx.doi.org/10.3390/cryptography7020026.
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The generation of random numbers is crucial for practical implementations of cryptographic algorithms. In this sense, hardware security modules (HSMs) include true random number generators (TRNGs) implemented in hardware to achieve good random number generation. In the case of cryptographic algorithms implemented on FPGAs, the hardware implementation of RNGs is limited to the programmable cells in the device. Among the different proposals to obtain sources of entropy and process them to implement TRNGs, those based in ring oscillators (ROs), operating in parallel and combined with XOR gates, present good statistical properties at the cost of high area requirements. In this paper, these TRNGs are revisited, showing a method for area optimization independently of the FPGA technology used. Experimental results show that three ring oscillators requiring only three LUTs are enough to build a TRNG on Artix 7 devices from Xilinx with a throughput of 33.3 Kbps, which passes NIST tests. A throughput of 50 Kbps can be achieved with four ring oscillators, also requiring three LUTs in Artix 7 devices, while 100 Kbps can be achieved using an structure with four ring oscillators requiring seven LUTs.
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Guo, Chenyang, i Yujie Zhou. "A Dynamic Equilibrium Algorithm to Enhance Randomness in TRNG". Journal of Circuits, Systems and Computers 27, nr 06 (22.02.2018): 1850095. http://dx.doi.org/10.1142/s0218126618500950.
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In this paper, a new method is proposed for randomness enhancement. The approach is called the dynamic equilibrium algorithm (DEA). It is used to solve the problems existing in the true random number generator (TRNG). First, the advantages and defects of LFSR as a post-processing module are discussed. When sampling 1000 groups of data, only 517 groups can pass all 15 tests in SP800-22 with a pass rate of 0.981. DEA is actually a great solution to this problem. The essence of DEA is to guarantee the approximately uniform distribution of the overlapping template to improve the bit-entropy by the compression of the data. This method is easy to implement in both software and hardware. The pass rate increases more than 40% with a low compression rate.
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Nam, Jae-Won, Jaewoo Kim i Jong-Phil Hong. "Stochastic Cell- and Bit-Discard Technique to Improve Randomness of a TRNG". Electronics 11, nr 11 (30.05.2022): 1735. http://dx.doi.org/10.3390/electronics11111735.
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This paper presents a post-processing algorithm for a true random number generator (TRNG). Once the randomness of security key generation deteriorates for any reason, the entire chain of the security system can be compromised, increasing the odds of it being exploited by an attacker to retrieve information. Considering the change in the distribution of the RNG output sequence due to variations in the operating environment or the occurrence of aging phenomena in silicon-integrated circuits, a robust post-processing algorithm must be applied to an intrinsic TRNG to ensure the sustainability of a security system. Targeting high-level cryptography systems complying with the NIST 800-22a requirements, the proposed algorithm significantly improves the Hamming weight (HW) and successfully passes the NIST criteria while sacrificing approximately 20% of the entire number of available bits. The proposed algorithm improves the randomness of the TRNG through a sequential cell- and bit-level discarding technique, a cell-discard method, and focuses on improving the overall HW of the TRNG while the subsequent bit- discard method performs a Chi-square (χ2) test. To prove the concept, we programmed the proposed algorithm in a FPGA and configured the output of the manufactured TRNG chip to be post-processed and stored into on-board memory in real time. For five different ring-oscillator-based TRNG prototypes (fully custom designed in the 65 nm CMOS process), the failed intrinsic TRNG output sequences were respectively post-processed, resulting in all surpassing the NIST 800-22a requirements.
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Chen, Ethan, i Vanessa Chen. "Statistical RF/Analog Integrated Circuit Design Using Combinatorial Randomness for Hardware Security Applications". Mathematics 8, nr 5 (20.05.2020): 829. http://dx.doi.org/10.3390/math8050829.
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While integrated circuit technologies keep scaling aggressively, analog, mixed-signal, and radio-frequency (RF) circuits encounter challenges by creating robust designs in advanced complementary metal–oxide–semiconductor (CMOS) processes with the diminishing voltage headroom. The increasing random mismatch of smaller feature sizes in leading-edge technology nodes severely limit the benefits of scaling for (RF)/analog circuits. This paper describes the details of the combinatorial randomness by statistically selecting device elements that relies on the significant growth in subsets number of combinations. The randomness can be utilized to provide post-manufacturing reconfiguration of the selectable circuit elements to achieve required specifications for ultra-low-power systems. The calibration methodology is demonstrated with an ultra-low-voltage chaos-based true random number generator (TRNG) for energy-constrained Internet of things (IoT) devices in the secure communications.
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Ridha, Oday, i Ghassan Jawad. "Scheme for Generating True Random Numbers using Electro-mechanical Switches". Journal of Engineering 28, nr 3 (1.03.2022): 73–85. http://dx.doi.org/10.31026/j.eng.2022.03.06.
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This paper proposes a novel method for generating True Random Numbers (TRNs) using electromechanical switches. The proposed generator is implemented using an FPGA board. The system utilizes the phenomenon of electromechanical switch bounce to produce a randomly fluctuated signal that is used to trigger a counter to generate a binary random number. Compared to other true random number generation methods, the proposed approach features a high degree of randomness using a simple circuit that can be easily built using off-the-shelf components. The proposed system is implemented using a commercial relay circuit connected to an FPGA board that is used to process and record the generated random sequences. Applying statistical testing on the experimentally generated sequences revealed a high degree of randomness, which proves its viability to modern applications, such as cryptography and communication system simulation and modeling.
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Tressoldi, Patrizio E. "Mind control at distance of an electronic device: a proof-of-concept preregistered study". Journal of Scientific Exploration 34, nr 2 (7.06.2020): 233–45. http://dx.doi.org/10.31275/20201573.
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This study was aimed at verifying the possibility of mentally influencing from a distance an electronic device based on a True Random Number Generator (TRNG).Thirteen adult participants contributed to 100 trials, each comprised of three samples of data each of 15 minutes’ duration: one for pre-mental interaction, one for mental interaction, and one for post- mental interaction.For each of these three samples, at the end of each minute, the data sequence generated by the random number generator was analysed with the Frequency and Runs test, in order to determine the reduction of the degree of randomness of the sequence.Further 100 trials of three samples each of the same duration, were collected as control of the spontaneous functioning of the device.The only evidence of an effect of distant mental interaction is an increase of approximately 50%, with respect to control data, of the number of samples within which the pre-determined statistical threshold for the detection of a reduction of the randomness was surpassed in both tests.Although the effect of distant mental interaction is still weak, we believe that the results of this study represent a proof-of-concept for the construction of electronic devices susceptible to distant mental influence.
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Liu, Yixuan, Qiao Hu, Qiqiao Wu, Xuanzhi Liu, Yulin Zhao, Donglin Zhang, Zhongze Han i in. "Probabilistic Circuit Implementation Based on P-Bits Using the Intrinsic Random Property of RRAM and P-Bit Multiplexing Strategy". Micromachines 13, nr 6 (10.06.2022): 924. http://dx.doi.org/10.3390/mi13060924.
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Probabilistic computing is an emerging computational paradigm that uses probabilistic circuits to efficiently solve optimization problems such as invertible logic, where traditional digital computations are difficult to solve. This paper proposes a true random number generator (TRNG) based on resistive random-access memory (RRAM), which is combined with an activation function implemented by a piecewise linear function to form a standard p-bit cell, one of the most important parts of a p-circuit. A p-bit multiplexing strategy is also applied to reduce the number of p-bits and improve resource utilization. To verify the superiority of the proposed probabilistic circuit, we implement the invertible p-circuit on a field-programmable gate array (FPGA), including AND gates, full adders, multi-bit adders, and multipliers. The results of the FPGA implementation show that our approach can significantly save the consumption of hardware resources.
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Benea, Licinius, Mikael Carmona, Viktor Fischer, Florian Pebay-Peyroula i Romain Wacquez. "Impact of the Flicker Noise on the Ring Oscillator-based TRNGs". IACR Transactions on Cryptographic Hardware and Embedded Systems 2024, nr 2 (12.03.2024): 870–89. http://dx.doi.org/10.46586/tches.v2024.i2.870-889.
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Ring Oscillators (RO) are often used in true random number generators (TRNG). Their jittered clock signal, used as randomness source, originates from thermal and flicker noises. While thermal noise jitter is generally used as the main source of randomness, flicker noise jitter is not due to its autocorrelation. This work aims at qualitatively settling the issue of the influence of flicker noise in TRNGs, as its impact increases in newer technology nodes. For this, we built a RO behavioural model, which generates time series equivalent to a jittered RO signal. It is then used to generate the output of an elementary RO-TRNG. Despite general expectations, the autocorrelation inside the output bit stream is reduced when the amplitude of flicker noise increases. The model shows that this effect is caused by the sampling of the jittered signal by the second oscillator, which hides the behaviour of the absolute jitter, causes resetting of the perceived phase, and suppresses any memory effect. The inclusion of flicker noise as a legitimate noise source can increase the TRNG output bit rate by a factor of four for the same output entropy rate. This observation opens new perspectives towards more efficient stochastic models of the RO-TRNGs.
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Zhang, Zhiwen, i Tao Su. "Behavioral Analysis and Immunity Design of the RO-Based TRNG under Electromagnetic Interference". Electronics 10, nr 11 (4.06.2021): 1347. http://dx.doi.org/10.3390/electronics10111347.
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True random-number generators based on ring oscillators (RO-based TRNG) are widely used in the field of information encryption because of their simple structure and compatibility with CMOS technology. However, radiated or conducted electromagnetic interference can dramatically deteriorate the randomness of the output bitstream of the RO-based TRNG, which poses a great threat to security. Traditional research focuses on the innovation of the means of attack and the detection of circuit states. There is a lack of research on the interference mechanism and anti-interference countermeasures. In this paper, the response of the RO array to electromagnetic interference was analyzed, and the concept of synchronous locking was proposed to describe the locking scene of multiple ROs. On the basis of synchronous locking, the RF immunity of the RO-based TRNG was modeled, which can explain the degradation mechanism of bitstream randomness under RFI. Moreover, the design method of gate-delay differentiation is presented to improve the RF immunity of the RO-based TRNG at a low cost. Both transistor-level simulation and board-level measurement proved the rationality of this scheme.
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Cao, Yuan, Wanyi Liu, Lan Qin, Bingqiang Liu, Shuai Chen, Jing Ye, Xianzhao Xia i Chao Wang. "Entropy Sources Based on Silicon Chips: True Random Number Generator and Physical Unclonable Function". Entropy 24, nr 11 (30.10.2022): 1566. http://dx.doi.org/10.3390/e24111566.
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Entropy is a measure of uncertainty or randomness. It is the foundation for almost all cryptographic systems. True random number generators (TRNGs) and physical unclonable functions (PUFs) are the silicon primitives to respectively harvest dynamic and static entropy to generate random bit streams. In this survey paper, we present a systematic and comprehensive review of different state-of-the-art methods to harvest entropy from silicon-based devices, including the implementations, applications, and the security of the designs. Furthermore, we conclude the trends of the entropy source design to point out the current spots of entropy harvesting.
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Serrano, Ronaldo, Ckristian Duran, Marco Sarmiento, Tuan-Kiet Dang, Trong-Thuc Hoang i Cong-Kha Pham. "A Unified PUF and Crypto Core Exploiting the Metastability in Latches". Future Internet 14, nr 10 (17.10.2022): 298. http://dx.doi.org/10.3390/fi14100298.
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Hardware acceleration of cryptography algorithms represents an emerging approach to obtain benefits in terms of speed and side-channel resistance compared to software implementations. In addition, a hardware implementation can provide the possibility of unifying the functionality with some secure primitive, for example, a true random number generator (TRNG) or a physical unclonable function (PUF). This paper presents a unified PUF-ChaCha20 in a field-programmable gate-array (FPGA) implementation. The problems and solutions of the PUF implementation are described, exploiting the metastability in latches. The Xilinx Artix-7 XC7A100TCSG324-1 FPGA implementation occupies 2416 look-up tables (LUTs) and 1026 flips-flops (FFs), reporting a 3.11% area overhead. The PUF exhibits values of 49.15%, 47.52%, and 99.25% for the average uniformity, uniqueness, and reliability, respectively. Finally, ChaCha20 reports a speed of 0.343 cycles per bit with the unified implementation.
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Ahmed, Areeb, i Ferit Acar Savaci. "Covert Electromagnetic Nanoscale Communication System in the Terahertz Channel". Journal of Circuits, Systems and Computers 29, nr 08 (30.09.2019): 2050126. http://dx.doi.org/10.1142/s0218126620501261.
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In this paper, an electromagnetic nano random communication system (EM-nRCS) has been proposed which ensures covert communication in the terahertz (THz) band. In the proposed system, the skewed alpha-stable noise shift keying method has been used to transmit random noise signals (RNSs) from the nano-transmitter (NT) by utilizing single-walled/carbon nanotubes-based true random number generator (SWCNTs-TRNG) and a graphene-based nano-antenna. A line-of-sight THz transparency window between 0.1[Formula: see text]THz and 0.5[Formula: see text]THz in the THz channel with spreading loss, molecular absorption loss and molecular absorption noise has been considered. Due to the broadband nature of the RNSs, the proposed EM-nRCS provides efficient transmission by overcoming the high path loss and intense channel noise arising from random fluctuations in the THz band. Non-coherent nano-receiver (NR) consisting of the modified extreme value method (MEVM) estimator has been proposed to extract the hidden binary information in the received RNSs. The bit error rate performance shows that the proposed EM-nRCS ensures high performance and covertness for future EM nanoscale communication devices.
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Magyari, Alexander, i Yuhua Chen. "Integrating Lorenz Hyperchaotic Encryption with Ring Oscillator Physically Unclonable Functions (RO-PUFs) for High-Throughput Internet of Things (IoT) Applications". Electronics 12, nr 24 (7.12.2023): 4929. http://dx.doi.org/10.3390/electronics12244929.
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With the combined call for increased network throughput and security comes the need for high-bandwidth, unconditionally secure systems. Through the combination of true random number generators (TRNGs) for unique seed values, and four-dimensional Lorenz hyperchaotic systems implemented on a Stratix 10 Intel FPGA, we are able to implement 60 MB/s encryption/decryption schemes with 0% data loss on an unconditionally secure system with the NIST standard using less than 400 mW. Further, the TRNG implementation allows for unique encryption outputs for similar images while still enabling proper decryption. Histogram and adjacent pixel analysis on sample images demonstrate that without the key, it is not possible to extract the plain text from the encrypted image. This encryption scheme was implemented via PCIe for testing and analysis.
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Maache, Ahmed, i Abdesattar Kalache. "Design and Implementation of a flexible Multi-purpose Cryptographic System on low cost FPGA". International journal of electrical and computer engineering systems 14, nr 1 (26.01.2023): 45–58. http://dx.doi.org/10.32985/ijeces.14.1.6.
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The design of cryptographic hardware that supports multiple cryptographic primitives is common in literature. In this work, a new design is presented consisting of a multi-purpose cryptographic system featuring both 128-bit pipelined AES-CORE (Advanced Encryption Standard) for high-speed symmetric encryption and a Keccak hash core on a low-cost FPGA. The KECCAK-CORE’s security and performance parameters are tunable in the sense that capacity, bitrate, and the number of rounds can be user-defined. Such flexibility enables the core to suit a large range of security requirements. The structure of Keccak’s sponge construction is exploited to enable different modes of operation. An example application outlined in this work is Pseudo Random Number Generation (PRNG). With few adjustments, the KECCAK-CORE was also operated as a post-processing unit for True Random Number Generation (TRNG) that uses the analog Lorenz chaotic circuit as a physical entropy source. The multi-purpose design was implemented in VHDL targeting an IntelFPGA Cyclone-V FPGA. For AES symmetric encryption, a maximum throughput of 31.1Gbps was achieved and a logic usage of 25146LEs (23% of the FPGA) in the case of the pipelined variant of AES-CORE. For the KECCAK-CORE, maximum throughput figures of 5.81, 8.4, and 11Gbps were achieved for the three SHA-3 variants 512, 384, and 256-bit respectively, with an area usage of 8947LEs (8%). The system as a whole occupies an area of 26909LEs (26%). The random sequences generated by the system operating in PRNG and TRNG post- processing modes successfully passed the National Institute of Standards and Technology (NIST) statistical test suite (NIST SP 800-22). The information entropy analysis performed on the post-processed TRNG sequences indicates an average of 0.935.