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Artykuły w czasopismach na temat "SOC.045.040.001"
中川, 友紀子. "SoC". Journal of Japan Society for Fuzzy Theory and Intelligent Informatics 33, nr 1 (15.02.2021): 30. http://dx.doi.org/10.3156/jsoft.33.1_30_2.
Pełny tekst źródłaEhrlich, Cyril, i Dave Russell. "Soc. Pop." Musical Times 129, nr 1742 (kwiecień 1988): 192. http://dx.doi.org/10.2307/965320.
Pełny tekst źródłaMoch, S., M. Bereković, H. J. Stolberg, L. Friebe, M. B. Kulaczewski, A. Dehnhardt i P. Pirsch. "HIBRID-SOC". ACM SIGARCH Computer Architecture News 32, nr 3 (czerwiec 2004): 55–61. http://dx.doi.org/10.1145/1024295.1024303.
Pełny tekst źródłaBuchanan, Mark. "SOC revisited". Nature Physics 11, nr 6 (czerwiec 2015): 442. http://dx.doi.org/10.1038/nphys3354.
Pełny tekst źródłaSmith, Matthew. "The SOC is Dead, Long Live the SOC!" ITNOW 62, nr 1 (17.02.2020): 34–35. http://dx.doi.org/10.1093/itnow/bwaa015.
Pełny tekst źródłaChen, Jein-Shan, Xin Chen, Shaohua Pan i Jiawei Zhang. "Some characterizations for SOC-monotone and SOC-convex functions". Journal of Global Optimization 45, nr 2 (7.11.2008): 259–79. http://dx.doi.org/10.1007/s10898-008-9373-z.
Pełny tekst źródłaLee, Hyoung-Ro, Won-Jong Kim, Han-Jin Cho i Chi-Ho Lin. "Development and Verification of SoC Architecture using SoC Virtual Platform". Journal of the Institute of Electronics and Information Engineers 54, nr 11 (30.11.2017): 86–92. http://dx.doi.org/10.5573/ieie.2017.54.11.86.
Pełny tekst źródłaKOBLANOV, Nurbek, i Rasim SULIEV. "SOC Building Basics". Trudy Universiteta, nr 2 (2021): 168–71. http://dx.doi.org/10.52209/1609-1825_2021_2_168.
Pełny tekst źródłaKOBLANOV, Nurbek, i Rasim SULIEV. "SOC Building Basics". Trudy Universiteta, nr 2 (2021): 179–82. http://dx.doi.org/10.52209/1609-1825_2021_2_179.
Pełny tekst źródłaEshraghian, K. "SoC Emerging Technologies". Proceedings of the IEEE 94, nr 6 (czerwiec 2006): 1197–213. http://dx.doi.org/10.1109/jproc.2006.873615.
Pełny tekst źródłaRozprawy doktorskie na temat "SOC.045.040.001"
Pratomo, Istas. "Adaptive NoC for reconfigurable SoC". Phd thesis, Université Rennes 1, 2013. http://tel.archives-ouvertes.fr/tel-00980066.
Pełny tekst źródłaYap, S. Y. "SoC architectures for video compression". Thesis, Queen's University Belfast, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.411805.
Pełny tekst źródłaProcháska, František. "Implementace protokolu EtherCAT pro SoC". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-400616.
Pełny tekst źródłaNemoto, Rie. "Soil organic carbon (SOC) now and in the future. Effect of soil characteristics and agricultural management on SOC and model initialisation methods using recent SOC data". Phd thesis, Université Blaise Pascal - Clermont-Ferrand II, 2013. http://tel.archives-ouvertes.fr/tel-00973853.
Pełny tekst źródłaDing, Hao. "Key concepts for implementing SoC-Holter". Thesis, Clermont-Ferrand 2, 2011. http://www.theses.fr/2011CLF22166/document.
Pełny tekst źródłaAccording to the figures released by World Health Organization (WHO), cardiovascular disease is the number one cause of death in the world. In France every year more than 50,000 people die suddenly due cardiac arrhythmias. Identification of high risk sudden death patients is still a challenge. To detect cardiac arrhythmias, currently Holter is generally used to record 1~4 leads electrocardiogram (ECG) signals during 24h to 72h. However the use of Holter is limited among the population due to its form factor (not user-friendly) and cost. An integrated single chip wearable Holter named SoC-Holter that enables to record 1 to 4 leads ECG is introduced. Deployment of wireless sensor network requires each SoC-Holter with less power consumption, low-cost charging system and less die area.To minimize energy consumption and system cost, Complementary Metal Oxide Semiconductor (CMOS) technology (0.35μm) is used to prototype the first implementation of SoC-Holter. Then a novel method based on Compressed Sensing (CS) technique is introduced for solving the problems of power consumption and storage capacity of SoC-Holter. The main principle underlying this framework is to sample analog signals at sub-Nyquist rate and to classify directly compressed measurement into normal and abnormal state. Minimizing the wire connected electrodes to the platform can make the carrier more comfortable because two electrodes are attached closely on the surface of the body. Recording difference ECG is analyzed using Vectorcardiogram (VCG) theory. Experimental results show that an integrated, low cost, and user-friendly SoC-Holter is feasible. SoC-Holter consumes less than 10mW while the device is operating. It takes advantage of estimating parameters directly from compressed measurements, thereby eliminating the reconstruction stage and reducing the computational complexity on the platform. In addition, the framework provides compressed ECG signals without loss of information, reducing significantly the power consumption for message sending and memory storage space. The effect of electrode placement is evaluated by estimating QRS complex in recorded ECG signals by two adjacent electrodes. The method is based on the QRS-VCG loop alignment algorithm that estimates Least Square (LS) between an observed VCG loop and a reference loop with respect to the transformations of rotation and time synchronization. The electrode location with less sensitive to interference is investigated
Ding, Jian. "Electro-thermal models for highly integrated SoC". Thesis, Queen's University Belfast, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.486133.
Pełny tekst źródłaLü, Liang. "Reconfigurable SoC architectures for video motion compensation". Thesis, Queen's University Belfast, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.491876.
Pełny tekst źródłaBuitenga, John. "An embedded microcontroller core for SOC applications". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0032/MQ65868.pdf.
Pełny tekst źródłaFlynn, David Walter. "Energy-efficient SOC design technology and methodology". Thesis, Loughborough University, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.479318.
Pełny tekst źródłaBecker, Carlos André. "Detecção distribuída de falhas em SoC multiprocessado". Pontifícia Universidade Católica do Rio Grande do Sul, 2008. http://hdl.handle.net/10923/3207.
Pełny tekst źródłaIncreasing evolution in the microelectronic field within the last decades has resulted in an expansive growth of integration capacity of systems on a single chip, that has brought about the need for new technologies for analyzing the correct functioning of systems. Recently, new processor architectures have been observed moving from a single CPU (Central Processing Unit) to multiple cores (typically 2, 4 and 8 processors on a single chip). It is a scenario which evolves from mono electronic systems to multiprocessors that this paper lies, aiming at proposing an expansion of CFCSS (Control Flow Checking by Software Signatures) technique, which was developed by Edward J. McCluskey for monoprocessed systems, in a version applicable to systems with multiple processors in a single SoC (Systemon- Chip). This work is made of two parts. The first part presents taxonomy and basic concepts of fault-tolerating systems, followed by a bibliographical review of main techniques for detecting fault in software in monoprocessed systems, besides approaching reprogrammable technology evolution. The second part describes the development methodology for hardware and software platforms, as well the stages carried out and the difficulties found. In addition, it presents the CFCSS technique adapted to several processors, the communication protocol developed to carry out tests and the results obtained. This paper presents an innovative profile and is justified by the tendency of embedded systems to have, in the near future, multiple processors and applications being executed simultaneously.
A crescente evolução da área da microeletrônica nas últimas décadas acarretou um aumento expressivo da capacidade de integração de sistemas em um único chip, o que levou à necessidade de novas tecnologias para a análise do correto funcionamento dos sistemas. Observam-se, recentemente, novas arquiteturas de processadores, migrando de uma única CPU (Unidade Central de Processamento) para múltiplos núcleos (tipicamente, 2, 4 e 8 processadores em uma única pastilha). É neste cenário, que evolui de sistemas eletrônicos mono para multiprocessados, que este trabalho se insere, visando propor uma expansão da técnica CFCSS (Control Flow Checking by Software Signatures), desenvolvida por Edward J. McCluskey para sistemas monoprocessados, a uma versão aplicável a sistemas com vários processadores em um SoC (System-on-Chip). Quanto à sua estrutura, este trabalho constitui-se de duas partes. A primeira apresenta a taxonomia e os conceitos básicos de sistemas tolerantes a falhas e uma revisão bibliográfica das principais técnicas de detecção de falhas em software em sistemas monoprocessados, além de abordar a evolução da tecnologia reprogramável. A segunda parte descreve a metodologia de desenvolvimento das plataformas de hardware e de software, bem como as etapas realizadas e as dificuldades encontradas. Além disso, apresenta a técnica CFCSS adaptada a vários processadores, o protocolo de comunicação desenvolvido para a realização dos testes e os resultados obtidos. Assim, este trabalho demonstra caráter inovador e se justifica pela tendência de os sistemas embarcados possuírem, vários processadores e aplicações sendo executadas simultaneamente.
Książki na temat "SOC.045.040.001"
Nāṣir, Naṣīr Aḥmad. Soc. Lāhaur: Fīrozsanz, 1989.
Znajdź pełny tekst źródłaBrym, Robert J. SOC+. Toronto: Nelson Education, 2012.
Znajdź pełny tekst źródłaWitt, Jon. SOC. Wyd. 2. New York: McGraw-Hill, 2012.
Znajdź pełny tekst źródłaRāhī, Sājid. Soc samundar. Raḥīmyār K̲h̲ān: Sanjok Sirāʼīkī Adabī Sangat, 1994.
Znajdź pełny tekst źródłaʻAyān̲, Rashīdah. Soc samandar. Karācī: al- Ḥasanāt Buk, 2006.
Znajdź pełny tekst źródłaHazārah, Adabiyāt-i., red. Soc mināre. Aibaṭābād: Adabiyāt-i Hazārah, 2009.
Znajdź pełny tekst źródłaFriedrich Wilhelm Joseph von Schelling. Soc inenija: [...]. Moskva: Izdat. Mysl £, 1989.
Znajdź pełny tekst źródłaWalter, Podilchak, i University of Toronto. Dept. of Sociology., red. SOC 202Y. [Toronto]: Custom Publishing Service, University of Toronto, 2002.
Znajdź pełny tekst źródłaʻAlī, Nūrulʻain. Soc lījīʼe. Pūnah: Salīqah Kitāb Ghar, 1989.
Znajdź pełny tekst źródłaJon, Witt, red. Soc updated. Wyd. 2. New York: McGraw-Hill, 2010.
Znajdź pełny tekst źródłaCzęści książek na temat "SOC.045.040.001"
Chen, Jein-Shan. "SOC-Convexity and SOC-Monotonity". W Springer Optimization and Its Applications, 39–99. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-4077-2_2.
Pełny tekst źródłaChen, Jein-Shan. "SOC Means and SOC Inequalities". W Springer Optimization and Its Applications, 159–88. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-4077-2_4.
Pełny tekst źródłaChen, Jein-Shan. "SOC Functions". W Springer Optimization and Its Applications, 1–37. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-4077-2_1.
Pełny tekst źródłaChakravarthi, Veena S. "SOC Packaging". W A Practical Approach to VLSI System on Chip (SoC) Design, 215–24. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-23049-4_11.
Pełny tekst źródłaChakravarthi, Veena S. "SOC Constituents". W A Practical Approach to VLSI System on Chip (SoC) Design, 41–61. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-23049-4_3.
Pełny tekst źródłaChakravarthi, Veena S. "SOC Synthesis". W A Practical Approach to VLSI System on Chip (SoC) Design, 81–97. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-23049-4_5.
Pełny tekst źródłaTaraate, Vaibbhav. "SOC Prototyping". W Advanced HDL Synthesis and SOC Prototyping, 197–210. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-8776-9_11.
Pełny tekst źródłaTaraate, Vaibbhav. "SOC Design". W Advanced HDL Synthesis and SOC Prototyping, 17–24. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-8776-9_2.
Pełny tekst źródłaChakravarthi, Veena S. "SoC Packaging". W A Practical Approach to VLSI System on Chip (SoC) Design, 215–28. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-18363-8_10.
Pełny tekst źródłaChakravarthi, Veena S. "SoC Constituents". W A Practical Approach to VLSI System on Chip (SoC) Design, 37–57. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-18363-8_3.
Pełny tekst źródłaStreszczenia konferencji na temat "SOC.045.040.001"
Leuschel, Michael, Marisa Llorens, Javier Oliver, Josep Silva i Salvador Tamarit. "SOC". W the 2009 ACM SIGPLAN workshop. New York, New York, USA: ACM Press, 2008. http://dx.doi.org/10.1145/1480945.1480969.
Pełny tekst źródłaFerri, Cesare, Andrea Marongiu, Benjamin Lipton, R. Iris Bahar, Tali Moreshet, Luca Benini i Maurice Herlihy. "SoC-TM". W the seventh IEEE/ACM/IFIP international conference. New York, New York, USA: ACM Press, 2011. http://dx.doi.org/10.1145/2039370.2039380.
Pełny tekst źródłaReid, Alastair D., Krisztian Flautner, Edmund Grimley-Evans i Yuan Lin. "SoC-C". W the 2008 international conference. New York, New York, USA: ACM Press, 2008. http://dx.doi.org/10.1145/1450095.1450112.
Pełny tekst źródłaMarangozova-Martin, Vania, i Generoso Pagano. "SoC-TRACE". W the Posters and Demo Track. New York, New York, USA: ACM Press, 2012. http://dx.doi.org/10.1145/2405153.2405163.
Pełny tekst źródłaNguyen, Tan, Swathi Gurumani, Kyle Rupnow i Deming Chen. "FCUDA-SoC". W FPGA'16: The 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York, NY, USA: ACM, 2016. http://dx.doi.org/10.1145/2847263.2847344.
Pełny tekst źródłaNieuwoudt, Arthur, Tamer Ragheb i Yehia Massoud. "SOC-NLNA". W the 43rd annual conference. New York, New York, USA: ACM Press, 2006. http://dx.doi.org/10.1145/1146909.1147133.
Pełny tekst źródłaMoch, S., M. Bereković, H. J. Stolberg, L. Friebe, M. B. Kulaczewski, A. Dehnhardt i P. Pirsch. "HIBRID-SOC". W the 2003 workshop. New York, New York, USA: ACM Press, 2003. http://dx.doi.org/10.1145/1152923.1024303.
Pełny tekst źródłaCho, Hsun-Wei, i Kang G. Shin. "Unify: Turning BLE/FSK SoC into WiFi SoC". W ACM MobiCom '23: 29th Annual International Conference on Mobile Computing and Networking. New York, NY, USA: ACM, 2023. http://dx.doi.org/10.1145/3570361.3592512.
Pełny tekst źródłaMarshall, Andrew. "Advanced SoC components". W 2016 29th IEEE International System-on-Chip Conference (SOCC). IEEE, 2016. http://dx.doi.org/10.1109/socc.2016.7905479.
Pełny tekst źródłaVladimir, Hahanov, Litvinova Eugenia i Pobezhenko Irina. "SOC verification infrastructure". W 2010 IEEE Region 8 International Conference on "Computational Technologies in Electrical and Electronics Engineering" (SIBIRCON 2010). IEEE, 2010. http://dx.doi.org/10.1109/sibircon.2010.5555318.
Pełny tekst źródłaRaporty organizacyjne na temat "SOC.045.040.001"
Van Dyke, Anthony E. MEU(SOC) and CINC's. Fort Belvoir, VA: Defense Technical Information Center, luty 1993. http://dx.doi.org/10.21236/ada264141.
Pełny tekst źródłaHicks, Jacqueline. The Role of Gender in Serious and Organised/Transnational Crime. Institute of Development Studies, marzec 2021. http://dx.doi.org/10.19088/k4d.2021.059.
Pełny tekst źródłaCooperider, Stephen B. Expanding the MEU(SOC) Joint Task Force Enabler Concept. Fort Belvoir, VA: Defense Technical Information Center, maj 1998. http://dx.doi.org/10.21236/ada529533.
Pełny tekst źródłaNATURESERVE ARLINGTON VA. Species of Concern (SOC) on Department of Defense Installations. Fort Belvoir, VA: Defense Technical Information Center, lipiec 2002. http://dx.doi.org/10.21236/ada541486.
Pełny tekst źródłaHerndon, Timothy A. Training the MEU(SOC) ACE Commander: Making a MAGTF Officer. Fort Belvoir, VA: Defense Technical Information Center, styczeń 1997. http://dx.doi.org/10.21236/ada529536.
Pełny tekst źródłaKalkhoff, Bryan. Emulating Control-Flow and Memory Bus Attacks on an FPGA SoC. Ames (Iowa): Iowa State University, grudzień 2021. http://dx.doi.org/10.31274/cc-20240624-617.
Pełny tekst źródłaLaguna Sánchez, Gerardo Abel, i Jacobo Sandoval Gutiérrez. Reporte de investigación: Empleo del trans-receptor AD936x y una plataforma SoC, como banco de pruebas, para el desarrollo de aplicaciones Software Defined Radio. División de Ciencias Básicas e Ingeniería, listopad 2020. http://dx.doi.org/10.24275/uaml.ri.0001.
Pełny tekst źródłaGu, Zu Han, i Alexei A. Maradudin. A Proposal for the Purchase of SOC-500 Laser Interferometric Monostatic Reflectometer. Fort Belvoir, VA: Defense Technical Information Center, maj 2001. http://dx.doi.org/10.21236/ada394044.
Pełny tekst źródłaRankin, John J. MEU(SOC)s in the 21st Century: Will They Be Capable of Conducting Humanitarian Operations. Fort Belvoir, VA: Defense Technical Information Center, maj 1997. http://dx.doi.org/10.21236/ada328107.
Pełny tekst źródłaBando, Atsushi. Rapid Analysis Technology of SOC (Substance of Concern) Corresponding to the ELV Directive in Europe. Warrendale, PA: SAE International, maj 2005. http://dx.doi.org/10.4271/2005-08-0185.
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