Rozprawy doktorskie na temat „Silicon carbide”

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 1986.
Vita.
Includes bibliographical references (leaves 152-159).
by Ricardo I Fuentes.
Ph.D.

Silicon carbide fibre/silicon nitride matrix composites have been fabricated using the reaction bonded silicon nitride (RBSN) and sintered reaction bonded silicon nitride (SRBSN) processing routes. A filament winding and tape casting system was developed to produce sheets of parallel aligned fibres within a layer of green matrix ('prepreg') which were cut, stacked and hot pressed to form a plate. This was nitrided and (in the case of SRBSN matrix composites) hot pressed at 1700°C to density the matrix. The magnesia (MgO) and the yttria/alumina (Y2O3/AI2O3) additive SRBSN systems were investigated as matrices for ease of processing and compatibility with the matrix. The MgO additive Si3N4 matrix reacted with the outer carbon rich layer on the surface of the fibres, framing a reaction layer approx. 2pm in thickness. A reaction layer was also observed with the Y2O3/AI2O3 additive matrix, but was thinner (< 0.5um), and was identified as silicon carbide from the electron diffraction pattern. X-ray mapping in the SEM was used to investigate the spatial distribution of elements within the interface region to a resolution < lum, including light elements such as carbon. The 6wt%Y203/ 2wt%Al203 additive SRBSN system was chosen for more detailed investigation, and the majority of characterisation was performed using this composition. Oxidation of composite samples was carried out at temperatures between 1000°C and 1400°C for up to 1000 hours. Little damage was visible after 100 hours for all temperatures, corresponding to a relatively small drop in post oxidation bend strength. After 1000 hours at 1000°C both carbon rich outer layers and the central carbon core of the fibre were removed. Samples were severely oxidised after 1000 hours at 1400°C, having a glass layer on the outer surface and replacement of near surface fibre/matrix interfaces with glass. The post oxidation bend strengths for both conditions were approx.2/3 of the as fabricated strength. Less damage was observed after 1000 hours at 1200°C, and the post oxidation bend strength was higher than the 1000°C and 1400°C samples. Mechanical properties of the SRBSN matrix composite were investigated at room temperature and elevated temperatures (up to 1400°C). The average room temperature values for matrix cracking stress and ultimate strength (in bend) were 651.1 and 713.2 MPa respectively, with corresponding Weibull moduli of 5.7 and 8.7. The stresses are comparable to similar monolithic silicon nitrides. Room temperature tensile matrix cracking and ultimate strength were 232MPa and 413MPa, lower than the bend test results, which were attributed to bending stresses in the sample, lowering the apparent failure stresses. The samples failed in a composite like manner (i.e. controlled rather than catastrophic failure), with a substantially higher woric of fracture than monolithic materials. The average matrix cracking and ultimate bend strength at 1200°C were 516MPa and 554MPa, dropping to 178MPa and 486MPa at 1400°C (the matrix cracking stress was indistinct at 1400°C due to plasticity). The creep and stress rupture properties at 1300°C were investigated in four point bend, using dead-weight loading. The creep rate was KH/s at a stress of 200MPa, lower than a hot pressed silicon nitride with MgO additive, and higher than a hot isostatically pressed Y2O2/SÍO2 additive silicon nitride. A cavitation creep mechanism was deduced from the stress exponent, which was >1. Failure by stress rupture did not have a lower limit, which is also associated with cavitation of the amorphous grain boundary phase.

A low-temperature (<300°C) method to fabricate electrostatically actuated microelectromechanical (MEM) clamped-clamped beam resonators has been developed. It utilizes an amorphous silicon carbide (SiC) structural layer and a thin polyimide spacer. The resonator beam is constructed by DC sputtering a tri-layer composite of low-stress SiC and aluminum over the thin polyimide sacrificial layer, and is then released using a microwave O 2 plasma etch. Deposition parameters have been optimized to yield low-stress films (<50MPa), in order to minimize the chance of stress-induced buckling or fracture in both the SiC and aluminum. Characterization of the deposited SiC was performed using several different techniques including scanning electron microscopy, EDX and XRD.
Several different clamped-clamped beam resonator designs were successfully fabricated and tested using a custom built vacuum system, with measured frequencies ranging from 5MHz to 25MHz. A novel thermal tuning method is also demonstrated, using integrated heaters directly on the resonant structure to exploit the temperature dependence of the Young's modulus and thermally induced stresses.

Silicon carbide (SiC) is a promising material for high power and high frequency devices due to its wide bandgap, high break down field and high thermal conductivity. The most established technique for growth ofepitaxial layers of SiC is chemical vapor deposition (CVD) at around 1550 °C using silane, SiH4, and lighthydrocarbons e g propane, C3H8, or ethylene, C2H4, as precursors heavily diluted in hydrogen. For high-voltagedevices made of SiC thick (> 100 μm), low doped epilayers are needed. Normal growth rate in SiC epitaxy is~ 5 μm/h, rendering long growth times for such SiC device structures. The main problem when trying to achievehigher growth rate by increasing the precursor flows is the formation of aggregates in the gas phase; for SiCCVD these aggregates are mainly silicon droplets and their formation results in saturation of the growth ratesince if the gas flow does not manage to transport these droplets out of the growth zone, they will eventuallycome in contact with the crystal surface and thereby creating very large defects on the epilayer making theepilayer unusable. To overcome this problem, high temperature- as well as low pressure processes have beendeveloped where the droplets are either dissolved by the high temperature or transported out of the susceptor bythe higher gas flow. A different approach is to use chloride-based epitaxy that uses the idea that the silicondroplets can be dissolved by presence of species that bind stronger to silicon than silicon itself. An appropriatecandidate to use is chlorine since it forms strong bonds to silicon and chlorinated compounds of high purity canbe purchased. In this thesis the chloride-based CVD process is studied by using first a single molecule precursor,methyltrichlorosilane (MTS) that contributes with silicon, carbon and chlorine to the process. Growth of SiCepilayers from MTS is explored in Paper 1 where growth rates up to 104 μm/h are reported together withmorphology studies, doping dependence of growth rate and the influence of the C/Si- and Cl/Si-ratios on thegrowth rate and doping. In Paper 2 MTS is used for the growth of 200 μm thick epilayers at a growth rate of 100μm/h, the epilayers are shown to be of very high crystalline quality and the growth process stable. The growthcharacteristics of the chloride-based CVD process, is further studied in Paper 3, where the approach to add HClgas to the standard precursors silane and ethylene is used as well as the MTS approach. A comparison betweenliterature data of growth rates for different approaches is done and it is found that a precursor molecule withdirect Si-Cl bonds should be more efficient for the growth process. Also the process stability and growth ratedependence on C/Si- and Cl/Si are further studied. In Paper 4 the standard growth process for growth on 4° offaxis substrates is improved in order to get better morphology of the epilayers. It is also shown that the optimizedprocess conditions can be transferred to a chloride-based process and a high growth rate of 28 μm/h wasachieved, using the HCl-approach, while keeping the good morphology. In Paper 5 chloride-based CVD growthon on-axis substrates is explored using both the HCl- and MTS-approaches. The incorporation of dopants in SiCepilayers grown by the chloride-based CVD process is studied in Papers 6 and 7 using the HCl-approach. InPaper 6 the incorporation of the donor atoms nitrogen and phosphorus is studied and in Paper 7 theincorporation of the acceptor atoms boron and aluminum. The incorporation of dopants is found to follow thetrends seen in the standard growth process but it is also found that the Cl/Si-ratio can affect the amount ofincorporated dopants.
Kiselkarbid (SiC) är ett fascinerande material som samtidigt är mycket enkelt och mycketkomplicerat. Det är enkelt eftersom det byggs upp av bara två sorters atomer, kisel och kol.Atomerna bygger upp kristallens struktur genom att bilda Si-C bindningar och man kan beskrivakristallstrukturen som uppbyggd av tetraedrar med en kiselatom (eller kolatom) i mitten och enkolatom (eller kiselatom) i varje hörn på tetraedern. Samtidigt är SiC komplicerat eftersomberoende på hur man staplar dessa tetraedrar kan man få olika varianter på kristallstrukturen, såkallade polytyper. Det finns drygt 200 kända polytyper av kiselkarbid, men det är dock bara enhandfull av dessa polytyper som är tekniskt intressanta. Kiselkarbid är intressant eftersom det ärett hårt material som inte heller påverkas nämnvärt av kemiskt aggressiva miljöer ellertemperaturer upp till 2000 °C; dessutom är SiC en halvledare och tack vare dess tålighet är det ettmycket bra material för elektriska komponenter för högspänningselektronik eller för användningi aggressiva miljöer. För att kunna tillverka dessa komponenter måste man kunna odla kristaller av kiselkarbid. Detfinns i princip två typer av kristallodling; i) odling av bulkkristaller, där stora kristaller odlas föratt sedan kan skivas och poleras till kristallskivor (dessa skivor benämns oftast substrat), och ii)odling av epitaxiella skikt, där man odlar ett tunt lager kristall med mycket hög renhet ovanpå ettsubstrat (ordet epitaxi kommer från grekiskans epi = ovanpå och taxis = i ordning, epitaxiellaskikt odlas alltså ovanpå ett substrat och kopierar den kristallina ordningen hos substratet). I detepitaxiella skiktet, eller epilagret som det även kallas, kan man styra den elektriskaledningsförmågan med mycket hög precision genom att blanda in små mängder orenheter iepilagret, man pratar här om att dopa halvledarkristallen. För att odla epilager av SiC använderman CVD, CVD betyder Chemical Vapor Deposition, någon riktigt bra svensk översättningfinns inte men det är en teknik för att framställa ett tunt lager av ett material genom kemiskareaktioner med gaser som startmaterial. I standard CVD-processen för odling av SiC epilager använder man silan (SiH4) som kiselkälla och lätta kolväten som eten (C2H4) eller propan (C3H8) som kolkälla. Dessa gaser späds kraftigtut i vätgas och man odlar epilagret vid ungefär 1500-1600 °C. Med denna process kan man odlaca 5 mikrometer (mikrometer = miljondelsmeter) epilager på en timme. Men för vissakomponenter behöver man ett epilager som är över 100 mikrometer tjockt, vilket görtillverkningen av sådana komponenter både tidsödande och kostsam. Ett problem som manmåste lösa för att få högre tillväxthastighet i processen är att när man ökar mängden silan,kommer kiseldroppar att bildas i gasfasen och om de kommer i kontakt med substratet blirepilagret förstört. I denna avhandling undersöks ett sätt att lösa problemet med kiseldropparnaoch därmed kunna tillåta höga tillväxthastigheter för SiC epilager. Idén är att man kan lösa uppkiseldropparna genom att tillsätta något i gasblandningen som binder starkare till kisel än kisel.En mycket bra atom att använda för detta ändamål är klor eftersom klor binder mycket starkt tillkisel. Man kallar denna process för klorid-baserad CVD. Till att börja med använde vi molekylen metyltriklorsilan (MTS), som innehåller både kol, kiseloch klor, för klorid-baserad tillväxt av SiC epilager. Genom att använda MTS lyckades vi fåtillväxthastigheter mellan 2 och 104 mikrometer i timmen. Vi har även visat att det är möjligtanvända MTS för att odla 200 mikrometer tjocka epilager med en tillväxthastighet på 100mikrometer i timmen utan att den kristallina kvalitén på epilagren försämras. Ett alternativ till attanvända MTS är att addera saltsyra (HCl) i gasform till standard processen. För att förstå denklorid-baserade processen bättre, jämfördes de olika alternativen med litteraturdata från enprocess där man istället för vanlig silan hade använt triklorsilan (TCS) för att få en klorid-baserad process. Det visade sig att MTS- och TCS-processerna krävde mindre kiselhalt i gasfasen för attfå en hög tillväxthastighet, med andra ord var de mer effektiva. Vi förklarade detta med atteftersom dessa startmolekyler har tre kisel-kol bindningar är det enkelt att bilda SiCl2 molekylen,som har visat sig vara ett viktigt mellansteg i den klorid-baserade processen, eftersom man dåbara behöver bryta kemiska bindningar. Om man istället börjar från silan och saltsyra måstekemiska reaktioner ske för att skapa kisel-kol bindningar och därmed SiCl2. När man odlar kristaller underlättar man tillväxten genom att preparera ytan på substratet medatomära steg. Om man tittar på ytan med atomär förstoring kan säga att ytan liknar en trappa,detta är bra eftersom atomerna som bygger upp epilagret gärna fastnar vid atomära steg eftersomde kan binda in till kristallen både neråt och åt sidan. Vi har optimerat standard processen för attfå bättre morfologi, alltså en finare yta, när man odlar på substrat som har mindre andel atomärasteg på ytan och visat att denna optimering går att överföra till en klorid-baserad process medhög tillväxthastighet . Vi har även visat att man kan använda den klorid-baserade processen föratt odla epilager med hög tillväxthastighet på substrat helt utan atomära steg. Slutligen har vi studerat doping av kiselkarbid vid höga tillväxthastigheter med den kloridbaseradeprocessen, både n-typ doping (där man dopar med ämnen som har fler valenselektronerän kol och kisel så att man får ett överskott av elektroner i materialet) med kväve och fosfor, ochp-typ doping (där man dopar med ämnen som har färre valenselektroner än kol och kisel så attman får ett underskott av elektroner i materialet) med bor och aluminium.

Integrated photonics is a promising technology which has applications in many areas such as biomedical, aero-space, radar, distributed computing, sensors and high speed signal processing. The aim is to reduce the cost, size and power consumption of optical devices and components by integrating them on a nano-scale. Currently silicon (Si) is the main material of choice in integrated photonics, however it has drawbacks which limit its uses in particular for high efficiency optical sources and detectors. The focus of this thesis will therefore be on finding an optimized integrated photonics platform which can support the integration of an optical source, photodetector, optical modulator and waveguides with matched confinement factors, whilst maintaining compatibility with existing CMOS fabrication processes and techniques used in the microelectronics industry. Some potential materials include gallium arsenide (GaAs), silicon carbide (SiC), indium phosphide (InP), gallium nitride (GaN) and silicon germanium (SiGe).

The growth of bulk cubic silicon carbide has for a long time seemed to be something for the future. However, in this thesis the initial steps towards bulk cubic silicon carbide have been taken. The achievement of producing bulk cubic silicon carbide will have a great impact in various fields of science and industry such as for example the fields of semiconductor technology within electronic- and optoelectronic devices and bio-medical applications. The process that has been used to grow the bulk cubic silicon carbide is a modification of the seeded sublimation growth, and the seeds have been grown by sublimation epitaxy. Selected samples have been characterized with a variety of different methods. The surface morphology of the samples has been examined using optical microscope, atomic force microscope and scanning electron microscope. The crystal structure has been investigated by the methods X-ray diffraction and transmission electron microscopy. The electrical resistance of the grown seeds was evaluated by four probe measurements. High crystal quality seeds have been grown with semiconductor properties and bulk silicon carbide was demonstrated using the seeds.

This study focuses on various aspects of solid-state diffusion bonding of two ceramic-metal combinations, namely: silicon carbide-molybdenum (SiC-Mo), and silicon nitride-molybdenum (Si$ rm sb3N sb4$-Mo). Single SiC-Mo and $ rm Si sb3N sb4$-Mo joints were produced using hot-uniaxial pressing. The microstructure of the resulting interfaces were characterized by image analysis, scanning electron microscopy (SEM), electron probe micro-analysis (EPMA), and X-ray diffraction (XRD). The mechanical properties of the joints were investigated using shear strength testing, depth sensing nanoindentation, and neutron diffraction for residual stress measurement.
SiC was solid-state bonded to Mo at temperatures ranging from 1000$ sp circ$C to 1700$ sp circ$C. Diffusion of Si and C into Mo resulted in a reaction layer containing two main phases: $ rm Mo sb5Si sb3$ and Mo$ sb2$C. At temperatures higher than 1400$ sp circ$C diffusion of C into $ rm Mo sb5Si sb3$ stabilized a ternary phase of composition $ rm Mo sb5Si sb3$C. At 1700$ sp circ$C, the formation of MoC$ rm sb{1-x}$ was observed as a consequence of bulk diffusion of C into Mo$ sb2$C. A maximum average shear strength of 50 MPa was obtained for samples hot-pressed at 1400$ sp circ$C for 1 hour. Higher temperatures and longer times contributed to a reduction in the shear strength of the joints, due to the excessive growth of the interfacial reaction layer. $ rm Si sb3N sb4$ was joined to Mo in vacuum and nitrogen, at temperatures between 1000$ sp circ$C and 1800$ sp circ$C, for times varying from 15 minutes to 4 hours. Dissociation of $ rm Si sb3N sb4$ and diffusion of Si into Mo resulted in the formation of a reaction layer consisting, initially, of $ rm Mo sb3$Si. At 1600$ sp circ$C (in vacuum) Mo$ sb3$Si was partially transformed into $ rm Mo sb5Si sb3$ by diffusion of Si into the original silicide, and at higher temperatures, this transformation progressed extensively within the reaction zone. Residual N$ sb2$ gas, which originated from the decomposition of $ rm Si sb3N sb4,$ dissolved in the Mo, however, most of the gas escaped during bonding or remained trapped at the original $ rm Si sb3N sb4$-Mo interface, resulting in the formation of a porous layer. Joining in N$ sb2$ increased the stability of $ rm Si sb3N sb4,$ affecting the kinetics of the diffusion bonding process. The bonding environment did not affect the composition and morphology of the interfaces for the partial pressures of N$ sb2$ used. A maximum average shear strength of 57 MPa was obtained for samples hot-pressed in vacuum at 1400$ sp circ$C for 1 hour.

The indentation behaviour and erosion properties of two commercially available ceramic materials, a silicon carbide (Hexoloy SA) and silicon carbide-titanium diboride composite (Hexoloy ST) have been investigated over a range of experimental conditions. The microstructure of both materials has been examined using reflected light and scanning electron microscopy. Hexoloy SA is a single phase material with a grain size typically ranging from 4 to 8 mum, while Hexoloy ST is a two phase particulate composite, containing about 16 vol% of discrete titanium diboride particles in a silicon carbide matrix, with a more uniform grain size. The materials have both been shown to have weak grain boundaries. The silicon carbide-titanium diboride interface is weak and this is believed to be due to tensile residual stresses arising from the mismatch in coefficients of thermal expansion of the two phases. Vickers indentation testing indicated that both materials have similar hardness values, but that the composite was significantly tougher than the monolithic material. Sub-surface crack profiles have been examined with a particular regard to radial and lateral cracking. It was found that the scale of lateral cracking was not directly proportional to the length of radial cracks in these materials. Indeed, lateral cracks were not seen when the radial/median system was fully formed, but only when it was partially formed. This is an important observation since one of the fundamental assumptions of two models of erosion is that radial and lateral length are directly proportional. Another important finding of the indentation study was that lateral cracking occurred to a greater extent in the composite than in the monolithic materials at low loads, indicating that wear of the composite may be relatively more extensive for the smaller erodent sizes. Erosion testing has been performed using a gas blast apparatus. Different sizes of silica and silicon carbide erodent have been used for tests from room temperature to 1000°C. With the silica erodent, material loss progressed by small scale cracking. The mechanisms of material removal involved grain boundary cracking in the monolithic material and grain boundary cracking and cracking along the particuiate-matrix interface in the composite. For the silicon carbide erodent, lateral cracking has been shown to be the dominant mechanism of material removal. In the monolithic SIC the lateral cracking scales with erodent size, while in the composite the TiB2 particles inhibit growth of the laterals generated by the largest erodent, but proved to be detrimental when using the smallest erodent. This observation was consistent with the observations from quasi-static Indentation. The presence of an easily removed oxide on the surface of the TiB2 particles has led to an increase in the erosion rate of the composite at temperatures greater than 800 °C for the silica erodent. At lower temperatures both materials behaved similarly. When using the silicon carbide erodent, increasing the temperature resulted in an increase in the erosion rate for both materials although at the lower temperatures, the composite was more erosion resistant than the monolithic material. As the temperature increased, the erosion rates converged, suggesting that the toughening mechanisms of the composite were decreasing in effectiveness. Thus, it has been shown that the presence of TiB2 particles can lead to increased or decreased erosion resistance relative to the monolithic material, depending on the precise erosion conditions. In general, the composite has the lower wear rate at lower temperatures and larger erodent sizes. Also, it has been shown that cracking due to quasi-static indentation using a sharp indenter is consistent with the damage produced by hard, sharp erodent particles at room temperature.

The varied properties of Silicon Carbide (SiC) are helping to launch the material into many new applications, particularly in the field of novel semiconductor devices. In this work, the cubic form of SiC is of interest as a basis for developing integrated optical components. Here, the formation of a suitable SiO2 buried cladding layer has been achieved by high dose oxygen ion implantation. This layer is necessary for the optical confinement of propagating light, and hence optical waveguide fabrication. Results have shown that optical propagation losses of the order of 20 dB/cm are obtainable. Much of this loss can be attributed to mode leakage and volume scattering. Mode leakage is a function of the effective oxide thickness, and volume scattering related to the surface layer damage. These parameters have been shown to be controllable and so suggests that further reduction in the waveguide loss is feasible. Analysis of the layer growth mechanism by RBS, XTEM and XPS proves that SiO2 is formed, and that the extent of formation depends on implant dose and temperature. The excess carbon generated is believed to exit the oxide layer by a number of varying mechanisms. The result of this appears to be a number of stable Si-C-O intermediaries that form regions to either depth extreme of the SiO2 layer. Early furnace tests suggest a need to anneal at temperatures approaching the melting point of the silicon substrate, and that the quality of the virgin material is crutial in controlling the resulting oxide growth.

With mankind’s ever increasing curiosity to explore the unknown, including a variety of hostile environments where we cannot tread, there exists a need for machines to do work on our behalf. For applications in the most extreme environments and applications silicon based electronics cannot function, and there is a requirement for circuits and sensors to be built from wide band gap materials capable of operation in these domains. This work addresses the initial development of silicon carbide circuits to monitor conditions and transmit information from such hostile environments. The characterisation, simulation and implementation of silicon carbide based circuits utilising proprietary high temperature passives is explored. Silicon carbide is a wide band gap semiconductor material with highly suitable properties for high-power, high frequency and high temperature applications. The bandgap varies depending on polytype, but the most commonly used polytype 4H, has a value of 3.265 eV at room temperature, which reduces as the thermal ionization of electrons from the valence band to the conduction band increases, allowing operation in ambient up to 600°C. Whilst silicon carbide allows for the growth of a native oxide, the quality has limitations and therefore junction field effect transistors (JFETs) have been utilised as the switch in this work. The characteristics of JFET devices are similar to those of early thermionic valve technology and their use in circuits is well known. In conjunction with JFETs, Schottky barrier diodes (SBDs) have been used as both varactors and rectifiers. Simulation models for high temperature components have been created through their characterisation of their electrical parameters at elevated temperatures. The JFETs were characterised at temperatures up to 573K, and values for TO V , β , λ , IS , RS and junction capacitances were extracted and then used to mathematically describe the operation of circuits using SPICE. The transconductance of SiC JFETs at high temperatures has been shown to decrease quadratically indicating a strong dependence upon carrier mobility in the channel. The channel resistance also decreased quadratically as a direct result of both electric field and temperature enhanced trap emission. The JFETs were tested to be operational up to 775K, where they failed due to delamination of an external passivation layer. ii Schottky diodes were characterised up to 573K, across the temperature range and values for ideality factor, capacitance, series resistance and forward voltage drop were extracted to mathematically model the devices. The series resistance of a SiC SBD exhibited a quadratic relationship with temperature indicating that it is dominated by optical phonon scattering of charge carriers. The observed deviation from a temperature independent ideality factor is due to the recombination of carriers in the depletion region affected by both traps and the formation of an interfacial layer at the SiC/metal interface. To compliment the silicon carbide active devices utilised in this work, high temperature passive devices and packaging/circuit boards were developed. Both HfO2 and AlN materials were investigated for use as potential high temperature capacitor dielectrics in metal-insulator-metal (MIM) capacitor structures. The different thicknesses of HfO2 (60nm and 90nm) and 300nm for AlN and the relevance to fabrication techniques are examined and their effective capacitor behaviour at high temperature explored. The HfO2 based capacitor structures exhibited high levels of leakage current at temperatures above 100°C. Along with elevated leakage when subjected to higher electric fields. This current leakage is due to the thin dielectric and high defect density and essentially turns the capacitors into high value resistors in the order of MΩ. This renders the devices unsuitable as capacitors in hostile environments at the scales tested. To address this issue AlN capacitors with a greater dielectric film thickness were fabricated with reduced leakage currents in comparison even at an electric field of 50MV/cm at 600K. The work demonstrated the world’s first high temperature wireless sensor node powered using energy harvesting technology, capable of operation at 573K. The module demonstrated the world’s first amplitude modulation (AM) and frequency modulation (FM) communication techniques at high temperature. It also demonstrated a novel high temperature self oscillating boost converter cable of boosting voltages from a thermoelectric generator also operating at this temperature. The AM oscillator operated at a maximum temperature of 553K and at a frequency of 19.4MHz with a signal amplitude 65dB above background noise. Realised from JFETs and HfO2 capacitors, modulation of the output signal was achieved by varying the load resistance by use of a second SiC JFET. By applying a negative signal voltage of between -2.5 and -3V, a 50% reduction in the signal amplitude and therefore Amplitude Modulation was achieved by modulating the power within the oscillator through the use of this secondary JFET. Temperature drift in the characteristics were also observed, iii with a decrease in oscillation frequency of almost 200 kHz when the temperature changed from 300K to 573K. This decrease is due to the increase in capacitance density of the HfO2 MIM capacitors and increasing junction capacitances of the JFET used as the amplifier within the oscillator circuit. Direct frequency modulation of a SiC Voltage Controlled Oscillator was demonstrated at a temperature of 573K with a oscillation frequency of 17MHz. Realised from an SiC JFET, AlN capacitors and a SiC SBD used as a varactor. It was possible to vary the frequency of oscillations by 100 kHz with an input signal no greater than 1.5V being applied to the SiC SBD. The effects of temperature drift were more dramatic in comparison to the AM circuit at 400 kHz over the entire temperature range, a result of the properties of the AlN film which causes the capacitors to increase in capacitance density by 10%. A novel self oscillating boost converter was commissioned using a counter wound transformer on high temperature ferrite, a SiC JFET and a SiC SBD. Based upon the operation of a free running blocking oscillator, oscillatory behaviour is a result of the electric and magnetic variations in the winding of the transformer and the amplification characteristics of a JFET. It demonstrated the ability to boost an input voltage of 1.3 volts to 3.9 volts at 573K and exhibited an efficiency of 30% at room temperature. The frequency of operation was highly dependent upon the input voltage due to the increased current flow through the primary coil portion of the transformer and the ambient temperature causing an increase in permeability of the ferrite, thus altering the inductance of both primary and secondary windings. However due its simplicity and its ability to boost the input voltage by 250% meant it was capable of powering the transmitters and in conjunction with a Themoelectric Generator so formed the basis for a self powered high temperature silicon carbide sensor node. The demonstration of these high temperature circuits provide the initial stages of being able to produce a high temperature wireless sensor node capable of operation in hostile environments. Utilising the self oscillating boost converter and a high temperature Thermoelectric Generator these prototype circuits were showed the ability to harvest energy from the high temperature ambient and power the silicon carbide circuitry. Along with appropriate sensor technology it demonstrated the feasibility of being able to monitor and transmit information from hazardous locations which is currently unachievable.

The topological and electronic properties of nickel (Ni) contacts to 4H-SiC have been investigated on the nano-meter scale, using scanning tunnelling microscopy (STM), atomic force microscopy (AFM) and scanning tunnelling spectroscopy (STS). The main aim of this work is to understand and control the contact formation mechanisms which occur in Ni-SiC junctions as a function of temperature. The fundamental system consisting of a sub-monolayer coverage of Ni on atomically clean 4H-SiC was studied with STM, from room temperature to 1000°C. After deposition of Ni localised I-V measurements were performed on Ni clusters using variable tip-sample separation STS (VTSS-STS), a surface barrier height of 1.85eV was observed along with the formation of metal induced gap states (MIGS). The apparent band-gap increased by 0.3eV at 500°C, corresponding with the production of Ni-silicide. Alternatively, after annealing between 700 and 900°C a gradual reduction of 1.15eV was observed. Graphite surfaces with fully diffused clusters were seen with STM after annealing at 1000°C. The properties of these clusters varied with their diffusion depth. Clusters relatively close to the surface displayed dominating physical properties whilst others deeper exhibited both physical and electronic properties. A separate combined AFM and STM study further supported these results. A Si interlayer was used to control the reactions which occurred in the fundamental Ni-SiC system. The Si interlayer sample displayed Ohmic characteristics immediately after Ni deposition, without a post metal deposition anneal and an average contact resistance of 1.3xl0^-5Ωcm² was observed. The electrical properties of this surface were studied with circular transmission line measurements (CTLM), whilst the electronic and chemical properties were investigated using x-ray photoelectron spectroscopy (XPS). The nature of the contact remained Ohmic even after annealing at 1000°C.

Pressureless sintered silicon carbide is currently being evaluated for advanced aeroengine applications because it provides the best combination of strength retention and oxidation resistance at high temperatures. In the present work, tensile creep and creep fracture behaviour of sintered SiC has been investigated. Creep tests have been performed under constant stress and temperature ranges from 125 to 400 MPa and 1673 to 1873 K respectively. The sintered SiC exhibits primary dominated creep curves and little or no tertiary stage in all cases studied. It is established that the SiC displays a brittle-creep behaviour. The creep fracture behaviour has been studied by examining the fracture surfaces and longitudinal sections of failed test-pieces after creep exposure. It is concluded that creep fracture occurs by the formation and propagation of microcracks developed along the grain boundaries during creep deformation. All failures that have occurred immediately on loading are identified to be caused by pre-existing voids (large pores) which are the result from incomplete local sintering during manufacture.

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Nuclear Engineering, 2004.
Includes bibliographical references.
Ion implantation and diffusion couple experiments were used to study silver transport through and release from CVD silicon carbide. Results of these experiments show that silver does not migrate via classical diffusion in silicon carbide. Silver release is, however, likely dominated by vapor transport through cracks in SiC coatings. The results of silver ion implantation in silicon carbide and subsequent annealing at 1500ʻC place an upper limit on the silver diffusion coefficient in SiC of 5x10-21 m2/s, a value which is roughly 6 orders of magnitude less than the previous values reported in the literature. Silver diffusion should have been easily observable, but was not detected in SiC plates after heat treatments at 1500ʻC for times ranging between 200 h and 500 h. A detailed investigation of the silver morphology within the SiC both before and after heating showed that silver was immobilized at SiC grain boundaries and did not diffuse along them as expected. Novel spherical diffusion couples were fabricated containing silver inside shells of either graphite or SiC which were coated with CVD SiC. Mass measurements clearly revealed silver release from the diffusion couples after heating, but no silver was detected during concentration profile measurements in the SiC. Leak testing results, however, gave evidence of the presence of cracks in many of the SiC coatings, which may have provided pathways for silver escape. A simple vapor flow model was applied to estimate crack sizes that would account for silver release from SiC coatings in the current diffusion couples and coated fuel particle tests from the literature.
(cont.) These calculated crack sizes are small enough that they would not have been detected during normal investigation or post-irradiation examination. A diffusive mechanism has been assumed to control silver transport in silicon carbide based on silver release observations reported previously in the literature, but no direct evidence of silver diffusion has been offered. Additionally, variations in silver release from particle to particle indicate that silver transport does not occur equally in all silicon carbide samples and is not consistent with diffusion. The findings presented in this dissertation are important to coated particle fuel design and fabrication because they indicate that SiC can successfully retain silver but that some SiC coatings permit silver release. Future work must be directed at identifying the pathways for silver release and their root causes in order to prevent silver release from coated fuel particles.
by Heather J. MacLean.
Ph.D.

In the last decade or so, many prototype SiC devices and logic circuits have been demonstrated which have surpassed the performance of Si for the ability to function in extreme environments. The advance of silicon carbide technology has now reached a stage where commercialisation of high performance and energy efficient miniaturised devices and circuits is possible. These devices and circuits should be able to operate on the limited power resources available in harsh and hot hostile environments. These improvements require refining, experimenting and perhaps re-designing devices which can rightly claim their share in the current silicon dominant market. Consequently, there is a need for accurate simulation models for device engineers to understand device and circuit behaviour, examine performance trade-offs and verify the manufacturability of the design. This work includes the first comprehensive study, to the author’s knowledge, on the development and validation of 4H-SiC model parameters for high temperature, low power technology computer aided design (TCAD) finite element (FE) simulations. These model parameters are based on the physical and material properties of 4H-SiC and are derived from published data. The validation of these model parameters is performed using high temperature 4HSiC lateral junction field effect transistor (JFET) data, fabricated and characterised by our group at Newcastle University. TCAD tools and statistical techniques, such as design of experiment (DoE) and response surface modelling (RSM), play a key role in research to model and optimise semiconductor processes. These tools and statistical techniques also aid in studying the impact of process variability on device and circuit performance which ultimately affects the manufacturability and yield of the circuit. Based on TCAD tools and DoE and RSM statistical techniques, a iii systematic methodology is devised to optimise high temperature, four terminal SiC JFETs. Using calibrated FE simulation model, enhancement mode 4H-SiC (normally off) n- and p-JFETs are optimised for operation in extreme environments. The normally-off nature of these devices is desirable for logic devices in terms of reduced gate drive complexity and power dissipation. Unlike previously reported devices, the optimised SiC JFETs are designed such that not only the gate length is reduced to 2 μm (in contrast to the 10 μm reported elsewhere), but are also able to operate over a temperature range of −50 °C to 600 °C on a fixed voltage of 2 V, in contrast to the 20 V used in other work. Furthermore, the drain saturation current of the optimised JFETs increase with temperature which allows high on-to-off state current-ratio (Ion/Ioff) at elevated temperatures. High Ion/Ioff is essential for low power logic circuitry with fast switching. At 500 °C, Ion/Ioff ~ 103 for optimised (simulated) JFET as opposed to < 102 reported elsewhere. This is achieved by the choice of optimal gate bias, |Vg| = 2 V. The fourth, back-gate, terminal in the optimised JFET design provides an alternative route to tackle process variability. The effect of varying back-gate bias (Vsub) on the device performance parameters, such as threshold voltage (Vt), drain saturation current (Idss) and channel leakage current (Ioff) is also studied in detail. Using enhancement mode n- and p-JFETs, logic circuitry based on 4H-SiC complementary JFET (CJFET) technology is described for the first time, to the author’s knowledge. In order to assess the potential improvements in performance of digital logic functions as a result of using CJFET technology in their implementation, the static and dynamic characteristics of the most basic logic element, namely the inverter, are analysed using calibrated FE simulation model. The design and analysis of an inverter enables the design of more complex structures, such as NAND, NOR and XOR gates. These complex structures in turn form the building blocks for modules, such as adders, multipliers and microprocessors. The static and dynamic characteristics of CJFET logic inverters are analysed against operating frequency, temperature, supply voltage and fan-out. At 500 °C and operating at a supply voltage of 2 V, the inverter has noise margin high = 0.36 V, noise margin low = 0.57 V, undefined iv region = 0.51 V, propagation delay = 7ns, slew rate = 29.5 V/μs, maximum switching frequency = 10.6 MHz and static power = 353 nW. Apart from speed, these static and dynamic characteristics of the CJFET logic inverter, at 500 °C, are found to be comparable to those of silicon and strained silicon technology, at room temperature (RT). Currently, one of the biggest challenges faced by SiC technology in the development of complex ICs is high static power dissipation at 500 °C (~ 10−3 W). With the supply voltage scaled to 1 V, the static power of a CJFET inverter can further be reduced to 20.6 nW, but at an expense of degrading noise margin high to 0.15 V and noise margin low to 0.36 V. Finally, in CJFET logic arrays, random variations in manufacturing process parameters can cause significant variations in neighbouring gates or transistors and, therefore, can largely be accountable for poor yield. Using DoE and RSM based statistical approach, the effect of (±10%) process variability on CJFET logic inverter’s stability, in terms of noise margins, and efficiency, in terms of static power dissipation, are modelled and analysed at RT and 500 °C. It is found that the gate implant depth (tg) and channel doping (ND) have the most significant effect on the studied inverter responses. The fluctuation in these process parameters causes variations in threshold voltage (Vt) of the device which in turn affects the performance of the logic gate. However, these Vt variations can be tackled by the use of epitaxial gated devices which eliminate the issue of tg variations and by the adjustment of back-gate biasing (Vsub). Furthermore, with the continuing advances in SiC wafer quality, with minimum tolerances, it is inevitable that soon SiC CJFET technology can be integrated with SiC gas sensors for monitoring extreme environments.

Boron carbide is a popular candidate armour ceramic. During high velocity impact, however, amorphous bands form, leading to the collapse of the structure, and reducing the usefulness of boron carbide in such applications. Recent experimental data from the literature suggests that silicon (Si) doping of boron carbide nanowires reduces this amorphisation. This project focuses on creating a process for Si doping of boron carbide that could potentially be up-scaled to commercial quantities. As shown in this thesis, as long as free carbon, or, in fact, carbon-rich boron carbide is present, Si additions react with carbon to form silicon carbide. Therefore, three methods for reducing the carbon content in boron carbide powders were investigated: plasma cleaning, oxidation/reduction, and annealing in the presence of amorphous boron (B). This resulted in a range of boron carbide powders with various carbon contents covering a wide range of the phase diagram. The effect on the structure of the powder will be discussed. Si was mixed with these boron carbides, and evidence for Si-doped boron carbide phase B12(C,Si,B)3 was found in many of the powders produced, as well as with additional phases. An enhancement of the doping correlated with a reduction in initial carbon content for a comparable concentration of Si. A promising result of the reduction of the amorphisation on the doped powder was confirmed for one condition after high pressure diamond anvil testing. Similarly, the reduction of amorphisation was also confirmed by indentation at the interface of a diffusion couple formed from a wafer of Si annealed at 1400 °C between two pieces of boron carbide. The boron carbide at the interface exhibited Raman features similar to the Si-doped powder. These results of powder and interface suggest that a new type of lightweight armour material could be produced that overcomes one of the biggest challenges of this ceramic: the amorphisation.

Silicon carbide nanowires have been obtained via combustion synthesis route. X-ray diffraction analysis confirmed that the synthesized material is the 3C polytype of silicon carbide with zincblende unit cell. Detailed investigations of such SiC 1D nanostructures were carried out exploiting Fourier transform infrared spectroscopy. IR measurements we performed using BRUKER HYPERION FT-IR microscope. For the purpose of comparison, a series of powder samples were examined, including raw synthesis product, purified SiC nanowires and several commercially available microand nanopowders (from Alpha Aesar and PlasmaChem). Comprehensive comparative analysis of the MIR spectra has been performed. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/20632

High-melting temperature oxides, carbides and nitrides are superior in hardness and strength to metals, especially in severe conditions. However, the extensive use of such ceramics in structural engineering applications often encountered critical problems due to their lack of damage tolerance and to the limited mechanical reliability. Several ceramic composites and, in particular, laminated structures have been developed in recent years to enhance strength, toughness and to improve flaw tolerance. Significant strength increase and improved mechanical reliability, in terms of Weibull modulus or minimum threshold failure stress, can be achieved by the engineering of the critical surface region in the ceramic component. Such effect can be realized by using a laminated composite structure with tailored sub-surface insertion of layers with different composition. Such laminate is able to develop, upon co-sintering, a spatial variation of residual stress with maximum compression at specific depth from the surface due to the differences in thermal expansion coefficient of the constituting layers. In the present work silicon carbide has been selected as second phase to graduate the thermal expansion coefficient of alumina due to its relatively low specific density that could allow the production of lighter components with improved mechanical performance, also for high temperature applications. Ceramic laminates with strong interfaces composed of Al2O3/SiC composite layers were produced by pressureless sintering or Spark Plasma Sintering (SPS) of green layers stacks prepared by tape casting water-based suspensions. Monolithic composites containing up to 30 vol% silicon carbide were fabricated and thoroughly characterized. Five engineered ceramic laminates with peculiar layers combination that is able to promote the stable growth of surface defects before final failure were also designed and produced. By changing the composition of the stacked laminae and the architecture of the laminate, tailored residual stress profile and T-curve were generated after co-sintering and successive cooling in each multilayer. The results of the mechanical characterization show that the engineered laminates are sensibly stronger than parent monolithic composite ceramic and exhibit surface damage insensitivity, according to the design. Such shielding effect is especially observed when macroscopic cracks are introduced by high load Vickers indentations. Some designed multilayers exhibit reduced strength scatter and higher Weibull modulus, which implies superior mechanical reliability. Fractographic observations on fracture surfaces of the engineered laminates show a graceful crack propagation within the surface layers in residual compressive stress which can be attributed to the stable growth of superficial cracks before final failure as it is predicted by the apparent fracture toughness curve. Such fracture behaviour is considered to be responsible for the peculiar surface damage insensitivity and the improved mechanical performance.

High-melting temperature oxides, carbides and nitrides are superior in hardness and strength to metals, especially in severe conditions. However, the extensive use of such ceramics in structural engineering applications often encountered critical problems due to their lack of damage tolerance and to the limited mechanical reliability. Several ceramic composites and, in particular, laminated structures have been developed in recent years to enhance strength, toughness and to improve flaw tolerance. Significant strength increase and improved mechanical reliability, in terms of Weibull modulus or minimum threshold failure stress, can be achieved by the engineering of the critical surface region in the ceramic component. Such effect can be realized by using a laminated composite structure with tailored sub-surface insertion of layers with different composition. Such laminate is able to develop, upon co-sintering, a spatial variation of residual stress with maximum compression at specific depth from the surface due to the differences in thermal expansion coefficient of the constituting layers. In the present work silicon carbide has been selected as second phase to graduate the thermal expansion coefficient of alumina due to its relatively low specific density that could allow the production of lighter components with improved mechanical performance, also for high temperature applications. Ceramic laminates with strong interfaces composed of Al2O3/SiC composite layers were produced by pressureless sintering or Spark Plasma Sintering (SPS) of green layers stacks prepared by tape casting water-based suspensions. Monolithic composites containing up to 30 vol% silicon carbide were fabricated and thoroughly characterized. Five engineered ceramic laminates with peculiar layers combination that is able to promote the stable growth of surface defects before final failure were also designed and produced. By changing the composition of the stacked laminae and the architecture of the laminate, tailored residual stress profile and T-curve were generated after co-sintering and successive cooling in each multilayer. The results of the mechanical characterization show that the engineered laminates are sensibly stronger than parent monolithic composite ceramic and exhibit surface damage insensitivity, according to the design. Such shielding effect is especially observed when macroscopic cracks are introduced by high load Vickers indentations. Some designed multilayers exhibit reduced strength scatter and higher Weibull modulus, which implies superior mechanical reliability. Fractographic observations on fracture surfaces of the engineered laminates show a graceful crack propagation within the surface layers in residual compressive stress which can be attributed to the stable growth of superficial cracks before final failure as it is predicted by the apparent fracture toughness curve. Such fracture behaviour is considered to be responsible for the peculiar surface damage insensitivity and the improved mechanical performance.

Electrically active point defects in semiconductor materials are important because they strongly affect material properties like effective doping concentration and charge carrier lifetimes. This thesis presents results on point defects introduced by ion implantation in silicon and silicon carbide. The defects have mainly been studied by deep level transient spectroscopy (DLTS) which is a quantitative, electrical characterization method highly suitable for point defect studies. The method is based on measurements of capacitance transients and both standard DLTS and new applications of the technique have been used.

In silicon, a fundamental understanding of diffusion phenomena, like room-temperature migration of point defects and transient enhanced diffusion (TED), is still incomplete. This thesis presents new results which brings this understanding a step closer. In the implantation-based experimental method used to measure point defect migration at room temperature, it has been difficult to separate the effects of defect migration and ion channeling. For various reasons, the effect of channeling has so far been disregarded in this type of experiments. Here, a very simple method to assess the amount of channeling is presented, and it is shown that channeling dominates in our experiments. It is therefore recommended that this simple test for channeling is included in all such experiments. This thesis also contains a detailed experimental study on the defect distributions of vacancy and interstitial related damage in ion implanted silicon. Experiments show that interstitial related damage is positioned deeper (0.4 um or more) than vacancy related damage. A physical model to explain this is presented. This study is important to the future modeling of transient enhanced diffusion.

Furthermore, the point defect evolution in low-fluence implanted 4H-SiC is investigated, and a large number of new defect levels has been observed. Many of these levels change or anneal out at temperatures below 300 C, which is not in accordance with the general belief that point defect diffusion in SiC requires high temperatures. This thesis also includes an extensive study on a metastable defect which we have observed for the first time and labeled the M-center. The defect is characterized with respect to DLTS signatures, reconfiguration barriers, kinetics and temperature interval for annealing, carrier capture cross sections, and charge state identification. A detailed configuration diagram for the M-center is presented.

Power devices play key roles in the power electronics applications. In order for the power electronics designers to fully utilize the performance advantages of power devices, compact power device models are needed in the circuit simulator (Saber, P-spice, etc.). Therefore, it is very important to get accurate device models. However, there are many challenges due to the development of new power devices with new internal structure and new semiconductor materials (SiC, GaN, etc.). In this dissertation, enhanced power diode model is presented with an improvement in the reverse blocking region. In the current power diode model in the Saber circuit simulator, an empirical approach was used to describe the low-bias reverse blocking region by introducing an effect called â conduction loss,â a parameter that causes a linear relationship between the device voltage and current at low bias voltages with no physics meaning. Furthermore, this term is not sufficient to accurately describe the changes to the device characteristics as the junction temperature is varied. In the enhanced model, an analytical temperature dependent model for the reverse blocking characteristics has been developed for Schottky/JBS diodes by including the thermionic-emission mechanism in the low-bias range. The newly derived model equations have been implemented in Saber circuit simulator using MAST language. An automated parameter extraction software package developed for constructing silicon (Si) and silicon carbide (SiC) power diode models, which is called DIode Model Parameter extrACtion Tools (DIMPACT). This software tool extracts the data necessary to establish a library of power diode component models and provides a method for quantitatively comparing between different types of devices and establishing performance metrics for device development. This dissertation also presents a new Saber-compatible approach for modeling the inter-electrode capacitances of the Si CoolMOSTM transistor. This new approach accurately describes all three inter-electrode capacitances (i.e., gate-drain, gate-source, and drain-source capacitances) for the full operating range of the device. The model is derived using the actual charge distribution within the device rather than assuming a lumped charge or one-dimensional charge distribution. The comparison between the simulated data with the measured results validates the accuracy of the new physical model.
Ph. D.

Ceramic armour must offer protection against armour piercing threats at low weight and affordable cost. As a possible means of improving armour, a range of SiC-B4C composites have been produced and characterised. The degree of contact between the two phases has been quantified and shown to have a strong effect on the densification and microstructure in these materials. This understanding has enabled independent variation of microstructural parameters which are normally interrelated. These were; porosity, SiC:B4C mass ratio, B4C distribution in a SiC matrix and SiC grain size distribution. To assess effects of each of these parameters on ballistic performance V50 testing was carried out, using 7.62 mm armour piercing rounds. The amount of porosity is shown to have a slight effect on V50 and a marked effect on scatter in V50. The pore size distribution is also shown to be important; across a range of pairs of materials with similar total pore volumes but differing pore size distributions, larger pores consistently give lower V50. SiC:B4C mass ratio does not seem to greatly affect V50, potentially allowing application specific cost/weight balances at constant protection level. B4C distribution has a strong effect. In general, for B4C features with diameters ranging from 1 m to 100 m, the coarser features performed better. Using coarse B4C particles in a SiC matrix, a V50 of approximately 980 ± 20 m s-1 at a density of 3.00 g cm-3 was achieved reproducibly. This material is preferred due to a combination of relatively lower cost, reduced density and repeatability. Knoop indentation has been used to derive possible merit indices which could potentially be used to rank ballistic materials. These includes analysis of failure probability of indents and the indentation size effect. A preliminary study indicates ballistic impacts may affect SiC polytype composition.

Thesis (M.S.)--West Virginia University, 2008.
Title from document title page. Document formatted into pages; contains xii, 56 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 51-53).

Cálculos de estructura electrónica han sido utilizados para el estudio de la estructura, de la difusividad y de la actividad eléctrica de defectos puntuales en carburo de silicio. En particular, se han considerado impurezas de tipo n y de tipo p, boro, nitrógeno y fósforo, juntas con defectos intrínsecos, como las vacantes del cristal.
El proceso de transient enhanced diffusion del boro ha sido estudiado y se ha propuesto una descripción microscópica del mismo: el kick-out realizado por un auto-intersticial de silicio cercano ha resultado ser el responsable de la metaestabilidad del de otra forma altamente estable boro sustitucional.
El mecanismo de difusión de la vacante de carbono y de silicio ha sido discutido y caracterizado; se ha demostrado que la vacante de carbono migra solamente a través de un mecanismo de difusión a los segundos vecinos, mientras que la vacante de silicio es metaestable con respecto a la formación del par vacante-antisito y entonces el camino de difusión será mediado por la formación de dicha configuración.
El dopaje de tipo n en las condiciones de alta dosis obtenidas con nitrógeno y/o fósforo ha sido estudiado; se ha mostrado que la formación de complejos de nitrógenos eléctricamente inactivos hace que el fósforo sea la elección mas adecuada para obtener dopaje de tipo n bajo estas condiciones.
Electronic structure calculations have been used to study the structure, the diffusivity and the electrical activity of point defects in silicon carbide. Particularly, p-type and n-type impurities have been considered, namely boron, nitrogen and phosphorus, together with intrinsic defects, specifically vacancies of the host crystal.
The transient enhanced diffusion of boron have been approached and a microscopic picture of this process have been proposed; the kick-out operated by a nearby silicon self-interstitial have turned out to be the responsible of the induced metastability of the otherwise highly stable boron substitutional.
The diffusion mechanism of the carbon and the silicon vacancy have been discussed and characterised; it has been shown that the carbon vacancy can only migrate by means of a second neighbour diffusion mechanisms, while the silicon vacancy is metastable with respect to the formation of a vacancy-antisite pair, and therefore the diffusion path will be mediated by the formation of such configuration.
The n-type high-dose doping regime obtained with nitrogen and / or phosphorus have been studied; it has been demonstrated that the formation of electrically inactive nitrogen aggregate in the high-dose regime makes phosphorus the preferred choice to achieve n-type doping under such conditions.

Silicon carbide rectifiers are commercially available since 2001, and MESFET switches are expected to enter the market within a year. Moreover, three inch SiC wafers can be purchased nowadays without critical defects for the device performance and four inch substrate wafers are announced for the year 2005. Despite this tremendous development in SiC technology, the reliability issues like device degradation or high channel mobility still remain to be solved.

This thesis focuses on SiC surface passivation and termination, a topic which is very important for the utilisation of the full potential of this semiconductor. Three dielectrics with high dielectric constants, Al2O3, AlN and TiO2, were deposited on SiC with different techniques. The structural and electrical properties of the dielectrics were measured and the best insulating layers were then deposited on fully processed and well characterised 1.2 kV 4H SiC PiN diodes. For the best Al2O3 layers, the leakage current was reduced to half its value and the breakdown voltage was extended by 0.5 kV, reaching 1.6 kV, compared to non passivated devices.

As important as the proper choice of dielectric material is a proper surface preparation prior to deposition of the insulator. In the thesis two surface treatments were tested, a standard HF termination used in silicon technology and an exposure to UV light from a mercury lamp. The second technique is highly interesting since a substantial improvement was observed when UV light was used prior to the dielectric deposition. Moreover, UV light stabilized the surface and reduced the leakage current by a factor of 100 for SiC devices after 10 Mrad γ ray exposition. The experiments indicate also that the measured leakage currents of the order of pA are dominated by surface leakage.

This dissertation focuses on an electron microscopy investigation of the microstructure of SiC layers in TRISO coated particles deposited by chemical vapour deposition under different experimental conditions, which include temperature, concentration of gases and deposition time. The polycrystalline β-SiC was deposited from the decomposition of methyl trichlorosilane MTS in the presence of hydrogen (H2) as carrier gas. Scanning electron microscopy (SEM), using the backscattered electron (BSE) mode, was used to image the microstructure of and defects in the SiC layers of TRISO particles. Electron backscatter diffraction (EBSD) in the SEM was used to determine the SiC grain sizes and distribution thereof in TRISO particles deposited under different conditions. For samples with a poor EBSD indexing rate, transmission Kikuchi diffraction and transmission electron microscopy (TEM) investigations were also carried out. From the results, the effects of growth temperature on the SiC microstructure, specifically on the grain size and shape and the porosity were determined. The effects of cooling or non-cooling of the gas inlet nozzle on the SiC microstructure were also investigated. TEM and scanning TEM (STEM) analyses of the SiC layers in TRISO particles were performed to image the defects and reveal the crystallinity of SiC layers. The microstructure and composition of SiC tubes fabricated by reaction bonding (RB) was also investigated by using electron microscopy and Raman spectroscopy. SEM-BSE imaging of RBSiC samples allowed the identification of impurities and free silicon in the RBSiC. Finally, the penetration of the metallic fission product, palladium, in reaction bonded SiC at a temperature of a 1000ºC is determined. A brief comment on the suitability of RBSiC as candidate for fuel cladding in a PWR is made. A short discussion of the suitability of the characterisation techniques used is included at the end.