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1
Cho, SeongHwan 1974. "Energy efficient RF communication systems for wireless microsensors". Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/29240.
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.Includes bibliographical references (p. 131-137).
Emerging distributed wireless microsensor networks will enable the reliable and fault tolerant monitoring of the environment. Microsensors are required to operate for years from a small energy source while maintaining a reliable communication link to the base station. In order to reduce the energy consumption of the sensor network, two aspects of the system design hierarchy are explored: design of the communication protocol and implementation of the RF transmitter. In the first part of the thesis, energy efficient communication protocols for a coordinated static sensor network are proposed. A detailed communication energy model, obtained from measurements, is introduced that incorporates the non-ideal behavior of the physical layer electronics. This includes the frequency errors and start-up energy costs of the radio, which dominate energy consumption for short packet, low duty cycle communication. Using this model, various communication protocols are proposed from an energy perspective, such as MAC protocols, bandwidth allocation methods and modulation schemes. In the second part of the thesis, design methodologies for an energy efficient transmitter are presented for a low power, fast start-up and high data rate radio.
(cont.) The transmitter is based on a [Epsilon]-[Delta] fractional-N synthesizer that exploits trade-offs between the analog and digital components to reduce the power consumption. The transmitter employs closed loop direct VCO modulation for high data rate FSK modulation and a variable loop bandwidth technique to achieve fast start-up time. A prototype transmitter that demonstrates these techniques is implemented using 0.25[mu]m CMOS. The test chip achieves 20[mu]s is start-up time with an effective data rate of 2.5Mbps while consuming 22mW.
by SeongHwan Cho.
Ph.D.
2
An, Kyu Hwan. "CMOS RF power amplifiers for mobile wireless communications". Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31717.
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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.Committee Chair: Laskar, Joy; Committee Member: Cressler, John; Committee Member: Kohl, Paul; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanouil. Part of the SMARTech Electronic Thesis and Dissertation Collection.
3
Li, Kuo-Hui. "RF beamformers for high-speed wireless communications". Diss., Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/14768.
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López, Méndez Joan Lluís. "Application of CMOS-MEMS integrated resonators to RF communication systems". Doctoral thesis, Universitat Autònoma de Barcelona, 2009. http://hdl.handle.net/10803/5364.
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Els dispositius MEMS han demostrat la seva utilitat en un gran ventall d'aplicacions de sensat i actuació. L'extensió al domini de RF d'aquests elements mecànics són ara una de les peces clau per sistemes altament reconfigurables referències de freqüència i processadors de senyals. Aquesta tesi es centra en algunes de les aplicacions dels dispositius MEMS en el domini de RF: referències de freqüència per oscil·ladors, filtres i mescladors. Els resonadors que es presenten en aquesta tesi s'han fabricat completament en tecnologies CMOS comercials per aprofitar la integració de MEMS i circuiteria complementària i el baix cost de fabricació d'aquestes tecnologies.
Diferents tipus de ressonadors MEMS s'han dissenyat i fabricat a fi d'avaluar les seves prestacions en diferents propietats. La validesa de la tècnica emprada per fabricar els MEMS en tecnologies CMOS futures s'ha demostrat fabricant i testant amb èxit resonadors MEMS en dos tecnologies diferents: de diferents fàbriques i nodes tecnològics (0.35um i 0.18um). La freqüència de ressonància d'aquests dispositius mecànics es troben a les bandes de HF i VHF. Tots aquests dispositius basats en bigues flexurals, presenten un major factor de qualitat Q que els tancs LC integrats i són a més a més sintonizables en freqüència, amb una mida inferior a la dels citats tancs LC. Els ressonadors MEMS-CMOS descrita a la tesi presenten un valor de Qxf en el rang entre 1GHz i els 10GHz mesurats a l'aire. Aquests valors es milloren mesurant al buit arribant als 100GHz, majors a qualsevol altre ressonador basat en tecnologia CMOS.
Les aplicacions de mesclat i filtrat de senyals també s'estudien. Dins d'aquestes aplicacions, la meta és definir una banda passant plana combinant diferents ressonadors. El prototipus d'un filtre paral·lel basat en ponts i un amplificador diferencial CMOS monolític presenta una banda passant plana de 200kHz a una freqüència central de 21.66MHz quan es mesura a l'aire. També es demostra el filtrat emprant un únic ressonador del tipus tuning fork. Com a mesclador, és destacable la possibilitat de convertir a alta i baixa senyals de 1GHz amb un ressonador de 22MHz
Com a oscil·ladors monolítics, es mostra un oscil·lador operatiu per tensions DC baixes (<5V), gràcies a la reducció del gap del ressonador. L'oscil·lador basat en un tuning fork aconsegueix valors de soroll de fase de -87dBc/Hz@10kHz i -98.7dBc/Hz@100kHz, millor que altres oscil·ladors CMOS monolític reportats.
MEMS devices demonstrated a wide range of sensing and actuation applications. These mechanical elements present nowadays extension to the RF world as key elements for highly reconfigurable systems, frequency references and signal processors.
This thesis focuses on some of the applications of MEMS devices in the RF domain: frequency references for oscillators, filters and mixers. The resonators presented in this thesis are completely fabricated in commercial CMOS technologies to take profit of monolithic MEMS and complementary circuitry integration and low cost fabrication inherent of these technologies.
Several kinds of MEMS resonators (clamped-clamped beams, free-free beams and double ended tuning forks) were designed and fabricated to evaluate their performance according to different properties. Two different CMOS technologies, from two different foundries and also different technological node (0.35um and 0.18um) were successfully used to validate the monolithic fabrication approach on future CMOS technologies. The resonance frequencies of these resonators are located on the HF and VHF range. All these devices, based on flexural beams, show superior Q than integrated LC tanks and are also tunable. Moreover, their size is significatively lower than the one of the aforementioned LC tanks. The CMOS-MEMS resonators reported in this thesis show a Qxf value in the range between 1GHz and 10GHz in air and these values are further improved in vacuum up to 100GHz, higher than any other reported resonator based on CMOS technology.
Filtering and mixing applications were also studied. The goal in these applications was to define a flat band-pass combining different resonators. A prototype of parallel filter was measured using two CC-beams and a monolithic CMOS differential amplifier. The filter shows a flat bandpass up to 200kHz in air at a center frequency of 21.66MHz. Filtering with a single resonator was also demostrated with a DETF. A mixer based on a 22MHz CC-beam resonator was able to up and downconvert a signal from/to 1GHz.
Monolithic oscillators with MEMS elements as frequency references have shown oscillation with a reduced applied DC voltage (<5V) thanks to the reduction of the gap. The DETF based oscillator shows good phase noise performance of -87dBc/Hz@10kHz and -98.7dBc/Hz@100kHz better than previously reported monolithic oscillators whereas operating at a lower DC voltage.
5
Zou, Qiyue. "Signal processing for RF distortion compensation in wireless communication systems". Diss., Restricted to subscribing institutions, 2008. http://proquest.umi.com/pqdweb?did=1693067881&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.
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Parikh, Hemish K. "An RF system design for an ultra wideband indoor positioning system". Worcester, Mass. : Worcester Polytechnic Institute, 2008. http://www.wpi.edu/Pubs/ETD/Available/etd-031108-203800/.
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Palvai, Anoop Kumar. "Passive RF localization based on RSSI using non-linear Bayesian estimation". Fairfax, VA : George Mason University, 2008. http://hdl.handle.net/1920/3407.
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Thesis (M.S.)--George Mason University, 2008.Vita: p. 89. Thesis director: Bijan Jabbari. Submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering. Title from PDF t.p. (viewed Mar. 17, 2009). Includes bibliographical references (p. 87-88). Also issued in print.
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Ku, Hyunchul. "Behavioral modeling of nonlinear RF power amplifiers for digital wireless communication systems with implications for predistortion linearization systems". Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04052004-180035/unrestricted/ku%5Fhyunchul%5F200312%5Fphd.pdf.
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Sun, Wei-Long. "Data set simulation and RF path modeling of a QPSK radio communication system". Thesis, Monterey, California. Naval Postgraduate School, 2005. http://hdl.handle.net/10945/2112.
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This project simulates QPSK modulation signals and uses a laboratory environment to create deteriorating effects of real-world high frequency (HF) transmissions that may modify the ideal QPSK waveform. These modifications may be identifiable in order to "fingerprint" the source of the modifications. To simulate the transmission path in the real world a signal generator is used to create the QPSK I/Q signal at the HF operating frequencies and a digital sampling oscilloscope acts as a receiver and records the data for analysis. A computer with MATLAB Instrument-control Toolbox is used to generate a random-input data stream as an input to the signal generator, which modulates the RF signal. The RF signal was chosen to be at HF (5-15 MHz) and the QPSK modulation was at 9600 baud. The deterioration effects of a real-world transmitter site were chosen to be associated with the output amplifier linearity and with the transmission line condition between the transmitter and antenna.
10
Xia, Kejun Niu Guofu. "Improved RF noise modeling for silicon-germanium heterojunction bipolar transistors". Auburn, Ala., 2006. http://repo.lib.auburn.edu/2006%20Fall/Dissertations/XIA_KEJUN_35.pdf.
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Thanachayanont, Apinunt. "Continuous-time integrated filters and oscillators for IF/RF applications". Thesis, Imperial College London, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325356.
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Chen, Cheng. "Simultaneous transmission of baseband signal and in band RF signal". Thesis, University of Cambridge, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.708805.
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Ollars, Emil. "Design and characterization of a radio receiver for satellite communication". Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-87007.
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Due to the increase in volume and speed of data transmissions in recent years, the demand for high-speed satellite communication solutions has increased. This thesis investigates the possibility of making a receiver for satellite radio based on an Analog Devices ADC evaluation board. To do this, evaluation boards for each component were acquired and tested individually before connecting them. The system components include an I/Q demodulator, a local oscillator, and an ADC. Using these components a system design for the radio receiver has been proposed, and its performance analyzed. The SNR of the designed system was measured to26 dB. This performance was deemed to be sufficient for a signal using the BPSKmodulation scheme.
14
Zheng, Rong. "Photonic RF signal processors". Thesis, Edith Cowan University, Research Online, Perth, Western Australia, 2004. https://ro.ecu.edu.au/theses/812.
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The purpose of this thesis is to explore the emerging possibilities of processing radiofrequency (RF) or microwave signals in optical domain, which will be a key technology to implement next-generation mobile communication systems and future optical networks. Research activities include design and modelling of novel photonic architectures for processing and filtering of RF, microwave and millimeter wave signals of the above mentioned applications. Investigations especially focus on two basic functions and critical requirements in advanced RF systems, namely: • Interference mitigation and high Q tunable filters. • Arbitrary filter transfer function generation. The thesis begins with a review on several state-of-the-art architectures of in-fiber RF signal processing and related key optical technologies. The unique capabilities offered by in-fiber RF signal processors for processing ultra wide-band, high-frequency signals directly in optical domain make them attractive options for applications in optical networks and wide-band microwave signal processing. However, the principal drawbacks which have been demonstrated so far in the in-fiber RF signal processors arc their inflexible or expensive schemes to set tap weights and time delay. Laser coherence effects also limit sampling frequency and introduce additional phase-induced intensity noise.
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Tsui, Kenneth Kin Pun. "RF characterization and modeling of MOSFET power amplifier in wireless communication /". View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20TSUI.
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Woo, Wangmyong. "Hybrid Digital/RF Envelope Predistortion Linearization for High Power Amplifiers in Wireless Communication Systems". Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6924.
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Hybrid Digital/RF Envelope Predistortion Linearization for High Power Amplifiers in Wireless Communication Systems
Wangmyong Woo
151 Pages
Directed by Dr. J. Stevenson Kenney
The objective of this research is to implement a hybrid digital/RF envelope predistortion linearization system for high-power amplifiers used in wireless communication systems. It is well known that RF PAs have AM/AM (amplitude modulation) and AM/PM (phase modulation) nonlinear characteristics. Moreover, the distortion components generated by a PA are not constant, but vary as a function of many input conditions such as amplitude, signal bandwidth, self-heating, aging, etc. Memory effects in response to past inputs cause a hysteresis in the nonlinear transfer characteristics of a PA. This hysteresis, in turn, creates uncertainty in predictive linearization techniques. To cope with these nonlinear characteristics, distortion variability, and uncertainty in linearization, an adaptive digital predistortion technique, a hybrid digital/RF envelope predistortion technique, an analog-based RF envelope predistortion technique, and a combinational digital/analog predistortion technique have been developed.
A digital adaptation technique based on the error vector minimization of received PA output waveforms was developed. Also, an adaptive baseband-to-baseband test system for the characterization of RF PAs and for the validation of linearization algorithms was implemented in conjunction with the adaptation technique. To overcome disadvantages such as limited correction bandwidth and the need for a baseband input signal in digital predistortion, an adaptive, wideband RF envelope predistortion system was developed that incorporates a memoryless predistortion algorithm. This system is digitally controlled by a look-up table (LUT). Compared with conventional baseband digital approaches, this predistortion architecture has a correction bandwidth that is from 20 percent to 33 percent wider at the same clock speeds for third to fifth order IMDs and does not need a digital baseband input signal.
For more accurate predistortion linearization for PAs with memory effects, an RF envelope predistortion system has been developed that uses a combination of analog-based envelope predistortion (APD) working in conjunction with digital LUT-based adaptive envelope predistortion (DPD). The resulting combination considerably decreases the computational complexity of the digital system and significantly improves linearity and efficiency at high power levels.
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Shah, Alam Huhmmad. "RF modelling of deep-submicron CMOS and heterojunction bipolar transistor for wireless communication systems". Thesis, Queen's University Belfast, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.269173.
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Zhang, Xiuyin. "Novel RF resonators and bandpass filters for wireless communications : theory, design and application /". access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23750832f.pdf.
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Thesis (Ph.D.)--City University of Hong Kong, 2009."Submitted to the Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 141-158)
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Moon, Sung Tae. "Design of high performance frequency synthesizers in communication systems". Texas A&M University, 2005. http://hdl.handle.net/1969.1/2329.
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Frequency synthesizer is a key building block of fully-integrated wireless communication
systems. Design of a frequency synthesizer requires the understanding of
not only the circuit-level but also of the transceiver system-level considerations. This
dissertation presents a full cycle of the synthesizer design procedure starting from the
interpretation of standards to the testing and measurement results.
A new methodology of interpreting communication standards into low level circuit
specifications is developed to clarify how the requirements are calculated. A
detailed procedure to determine important design variables is presented incorporating
the fundamental theory and non-ideal effects such as phase noise and reference
spurs. The design procedure can be easily adopted for different applications.
A BiCMOS frequency synthesizer compliant for both wireless local area network
(WLAN) 802.11a and 802.11b standards is presented as a design example. The two
standards are carefully studied according to the proposed standard interpretation
method. In order to satisfy stringent requirements due to the multi-standard architecture,
an improved adaptive dual-loop phase-locked loop (PLL) architecture is
proposed. The proposed improvements include a new loop filter topology with an
active capacitance multiplier and a tunable dead zone circuit. These improvements
are crucial for monolithic integration of the synthesizer with no off-chip components.
The proposed architecture extends the operation limit of conventional integerN type synthesizers by providing better reference spur rejection and settling time
performance while making it more suitable for monolithic integration. It opens a
new possibility of using an integer-N architecture for various other communication
standards, while maintaining the benefit of the integer-N architecture; an optimal
performance in area and power consumption.
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Kashif, Ahsan-Ullah. "Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems". Doctoral thesis, Linköpings universitet, Halvledarmaterial, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-61599.
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The emergence of new communication standards has put a key challenge for semiconductor industry to develop RF devices that can handle high power and high data rates simultaneously. The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a heart of base-station. From economical point of view, a single wideband RF power module is more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode operation. Therefore, device modeling has now become much more crucial for such applications. In order to reduce the device design cycle time, the researchers also heavily rely on computer aided design (CAD) tools. With improvement in CAD technology the model extraction has become more accurate and device physical structure optimization can be carried out with less number of iterations. LDMOS devices have been dominating in the communication field since last decade and are still widely used for PA design and development. This thesis deals with the optimization of RFLDMOS transistor and its evaluation in different PA classes, such as linear, switching, wideband and multi-band applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are also developed in technology CAD (TCAD) using large signal time domain computational load-pull (CLP) methods. Initially the RF-LDMOS is studied in TCAD for the improved RF performance. The physical intrinsic structure of RF-LDMOS is provided by Infenion Technologies AG. A reduced surface field (RESURF) of low-doped drain (LDD) region is considered in detail because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage (BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance (Ron). The excess interface state charges at the RESURF region are introduced to reduce the Ron, which not only increases the dc drain current, but also improve the RF performance in terms of power, gain and efficiency. The important achievement is the enhancement in operating frequency up to 4 GHz. In LDD region, the effect of excess interface charges at the RESURF is also compared with dual implanted-layer of p-type and n-type. The comparison revealed that the former provides 43 % reduction in Ron with BVDS of 70 V, while the later provides 26 % reduction in Ron together with BVDS of 64 - 68 V. In the second part of my research work, computational load pull (CLP) simulation technique is used in TCAD to extract the impedances of RF-LDMOS at different frequencies under large signal operation. Flexible matching is an issue in the design of broadband or multi-band PAs. Optimum impedance of RF-LDMOS is extracted at operating frequencies of 1, 2 and 2.5 GHz in class AB PA. After this, CLP simulation technique is further developed in TCAD to study the non-linear behavior of RF devices. Through modified CLP technique, non-linear effects inside the transistor structure are studied by conventional two-tone RF signals in time domain. This is helpful to detect and understand the phenomena, which can be resolved to improve the device performance. The third order inter-modulation distortion (IMD3) of RF- LDMOS was observed at different power levels. The IMD3 of −22 dBc is obtained at 1-dB compression point (P1-dB), while at 10 dB back off the value increases to −36 dBc. These results were also verified experimentally by fabricating a linear PA. Similarly, CLP technique is developed further for the analysis of RF devices in high efficiency operation by investigating the odd harmonic effects for the design of class-F PA. RF-LDMOS can provide a power added efficiency (PAE) of 81.2 % in class-F PA at 1 GHz in TCAD simulations. The results are verified by design and fabrication of class-F PA using large signal model of the similar device in ADS. In fabrication, a PAE of 76 % is achieved.
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Lou, Shuzuo. "Design of CMOS RF low-noise amplifiers and mixer for wireless applications /". View abstract or full-text, 2007. http://library.ust.hk/cgi/db/thesis.pl?ECED%202007%20LOU.
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Haque, Muhammad Fahim Ul. "Pulse-Width Modulated RF Transmitters". Doctoral thesis, Linköpings universitet, Datorteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-134023.
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The market for wireless portable devices has grown signicantly over the recent years.Wireless devices with ever-increased functionality require high rate data transmissionand reduced costs. High data rate is achieved through communication standards such asLTE and WLAN, which generate signals with high peak-to-average-power ratio (PAPR),hence requiring a power amplier (PA) that can handle a large dynamic range signal. Tokeep the costs low, modern CMOS processes allow the integration of the digital, analogand radio functions on to a single chip. However, the design of PAs with large dynamicrange and high eciency is challenging due to the low voltage headroom. To prolong the battery life, the PAs have to be power-ecient as they consume a sizablepercentage of the total power. For LTE and WLAN, traditional transmitters operatethe PA at back-o power, below their peak efficiency, whereas pulse-width modulation(PWM) transmitters use the PA at their peak power, resulting in a higher efficiency.PWM transmitters can use both linear and SMPAs where the latter are more power efficient and easy to implement in nanometer CMOS. The PWM transmitters have a higher efficiency but suffer from image and aliasing distortion, resulting in a lower dynamic range,amplitude and phase resolution. This thesis studies several new transmitter architectures to improve the dynamicrange, amplitude and phase resolution of PWM transmitters with relaxed filtering requirements.The architectures are suited for fully integrated CMOS solutions, in particular forportable applications. The first transmitter (MAF-PWMT) eliminates aliasing and image distortions whileallowing the use of SMPAs by combining RF-PWM and band-limited PWM. The transmittercan be implemented using all-digital techniques and exhibits an improved linearity and spectral performance. The approach is validated using a Class-D PA based transmitter where an improvement of 10.2 dB in the dynamic range compared to a PWM transmitter for a 1.4 MHz of LTE signal is achieved. The second transmitter (AC-PWMT) compensates for aliasing distortion by combining PWM and outphasing. It can be used with switch-mode PAs (SMPAs) or linear PAs at peak power. The proposed transmitter shows better linearity, improved spectral performanceand increased dynamic range as it does not suffer from AM-AM distortion of the PAs and aliasing distortion due to digital PWM. The idea is validated using push-pull PAs and the proposed transmitter shows an improvement of 9 dB in the dynamic rangeas compared to a PWM transmitter using digital pulse-width modulation for a 1.4 MHzLTE signal. The third transmitter (MD-PWMT) is an all-digital implementation of the second transmitter. The PWM is implemented using a Field Programmable Gate Array(FPGA) core, and outphasing is implemented as pulse-position modulation using FPGA transceivers, which drive two class-D PAs. The digital implementation offers the exibility to adapt the transmitter for multi-standard and multi-band signals. From the measurement results, an improvement of 5 dB in the dynamic range is observed as compared to an all-digital PWM transmitter for a 1.4 MHz LTE signal. The fourth transmitter (EP-PWMT) improves the phase linearity of an all-digital PWM transmitter using PWM and asymmetric outphasing. The transmitter uses PWM to encode the amplitude, and outphasing for enhanced phase control thus doubling the phase resolution. The measurement setup uses Class-D PAs to amplify a 1.4 MHz LTEup-link signal. An improvement of 2.8 dB in the adjacent channel leakage ratio is observed whereas the EVM is reduced by 3.3 % as compared to an all-digital PWM transmitter. The fifth transmitter (CRF-ML-PWMT) combines multilevel and RF-PWM, whereas the sixth transmitter (CRF-MP-PMWT) combines multiphase PWM and RF-PWM. Both transmitters have smaller chip area as compared to the conventional multiphase and multilevel PWM transmitters, as a combiner is not required. The proposed transmitters also show better dynamic range and improved amplitude resolution as compared to conventional RF-PWM transmitters. The solutions presented in this thesis aims to enhance the performance and simplify the digital implementation of PWM-based RF transmitters.
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Metreaud, Leon T. "An RF-isolated real-time multipath testbed for performance analysis of WLANs". Link to electronic thesis, 2006. http://www.wpi.edu/Pubs/ETD/Available/etd-082206-234807/.
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Zheng, Guizhen. "Low power reconfigurable microwave circuits using RF MEMS switches for wireless systems". Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-05242005-135940/.
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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.John Papapolymerou, Committee Chair ; Joy Laskar, Committee Member ; John Cressler, Committee Member ; Alan Doolittle, Committee Member ; Clifford Henderson, Committee Member.
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Qureshi, Abdul Qader Ahsan. "Multilayer Micromachined RF MEMS Filters at Ka and L/S Band For On-Board Satellite Communication Systems". Doctoral thesis, Università degli studi di Trento, 2013. https://hdl.handle.net/11572/368469.
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This doctorate thesis focuses on the application of micromachining fabrication technologies for the realization of Radio Frequency (RF) bandpass filters. The work has been inspired and supported by the European Space Agency (ESA) Contract No. 22706/09/NL/GLC of the ARTES 5 Workplan 2008 “Micro-machined Filters in Multi-layer Technology for Satellite On-board Communication Systems†(MIGNON Project). The main purpose of the project is the design and realization of high performance bandpass filters in the Ka and L/S band for on board applications. The use of modern micromachining technologies should allow for space and weight reduction as well as for a cost effective realization of these devices. In addition the tight tolerances obtained with micromachining techniques facilitate an industrial fabrication of filters with high yield. The thesis proposes novel concepts to accomplish this task and provides also the fabrication processes suitable to realize the devices. In addition this work gives also a deeper insight into critical fabrication steps like wafer to wafer thermocompression bonding using gold (Au) and silver (Ag) as an intermediate layer and fabrication of Through Silicon Vias (TSV).
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Qureshi, Abdul Qader Ahsan. "Multilayer Micromachined RF MEMS Filters at Ka and L/S Band For On-Board Satellite Communication Systems". Doctoral thesis, University of Trento, 2013. http://eprints-phd.biblio.unitn.it/1018/1/AQAhsan-PhD-Thesis-updated-version-18-12-2013.pdf.
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This doctorate thesis focuses on the application of micromachining fabrication technologies for the realization of Radio Frequency (RF) bandpass filters. The work has been inspired and supported by the European Space Agency (ESA) Contract No. 22706/09/NL/GLC of the ARTES 5 Workplan 2008 “Micro-machined Filters in Multi-layer Technology for Satellite On-board Communication Systems” (MIGNON Project). The main purpose of the project is the design and realization of high performance bandpass filters in the Ka and L/S band for on board applications. The use of modern micromachining technologies should allow for space and weight reduction as well as for a cost effective realization of these devices. In addition the tight tolerances obtained with micromachining techniques facilitate an industrial fabrication of filters with high yield. The thesis proposes novel concepts to accomplish this task and provides also the fabrication processes suitable to realize the devices. In addition this work gives also a deeper insight into critical fabrication steps like wafer to wafer thermocompression bonding using gold (Au) and silver (Ag) as an intermediate layer and fabrication of Through Silicon Vias (TSV).
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Woo, Sang Hyun. "Low noise RF CMOS receiver integrated circuits". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50127.
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The objective of this research is to design and implement low-noise wideband RFIC components with CMOS technology for the direct-conversion architecture. This research proposes noise reduction techniques to improve the thermal noise and flicker noise contribution of a low noise amplifier (LNA) and a mixer. Of these techniques, the LNA is found to reduce noise, boost gain, and consume a relatively low amount of power without sacrificing the wideband and linearity advantages of a conventional common gate (CG) topology. The research concludes by investigating the proposed mixer topology, which senses and compensates local oscillator (LO) phase mismatches, the dominant cause of flicker noise.
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Chen, Chih-Hung Deen M. Jamal. "Noise characterization and modeling of MOSFETs for RF IC applications /". *McMaster only, 2002.
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Cresci, David John. "On-wafer characterization of ground vias in multilayer FR-4 printed circuit boards at RF/microwave frequencies". Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/15806.
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Morris, Matthew Leon. "The Impact of Antenna and RF System Characteristics on MIMO System Capacity". Diss., CLICK HERE for online access, 2005. http://contentdm.lib.byu.edu/ETD/image/etd978.pdf.
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Patterson, Chad E. "Exploration of liquid crystal polymer packaging techniques for rf wireless systems". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44800.
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In the past decade, there has been an increased interest in low-cost, low-power, high data rate wireless systems for both commercial and defense applications. Some of these include air defense systems, remote sensing radars, and communication systems that are used for unmanned aerial vehicles, ground vehicles, and even the individual consumer. All of these applications require state-of-the-art technologies to push the limits on several design factors such as functionality, weight, size, conformity, and performance while remaining cost effective. There are several potential solutions to accomplish these objectives and a highly pursued path is through the utilization of advanced integrated system platforms with high frequency, versatile, multilayered materials.
This work intends to explore advanced 3-D integration for state-of the art components in wireless systems using LCP multilayer organic platforms. Several packaging techniques are discussed that utilize the inherent benefits of this material. Wire bond, via interconnect, and flip-chip packages are implemented at RF and millimeter-wave (mm-wave) frequencies to explore the benefits of each in terms of convenience, reliability, cost, and performance. These techniques are then utilized for the demonstration of bulk acoustic waveguide (BAW) filter applications and for the realization of highly integrated phased-array antenna systems.
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Devarakond, Shyam Kumar. "Signature driven low cost test, diagnosis and tuning of wireless systems". Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47594.
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With increased and varied performance demands, it is essential that complex multi-standard radio/systems coexist on a same chip. To have cost and performance benefits, these analog/RF systems are implemented in scaled nanometer nodes. At these nodes, the high level of variability in process variations is making the task of manufacturing high fidelity systems a challenge leading to yield and reliability issues. Hence, in the post-manufacturing phase, test and diagnosis steps are critical to identify the cause and effect of the process variations. Further, intelligent post-manufacturing tuning techniques are required to correct the effect of process variations on analog/RF systems. In this work, a die-level concurrent test and diagnosis approach using optimized measurements obtained in high volume manufacturing environment is proposed for analog/RF circuits. Such a simultaneous test and diagnosis methodology enables monitoring parametric process shifts and providing rapid feedback to the fab to minimize or prevent yield loss. In the case of devices that are continuously operating in the field, an efficient on-line diagnosis approach has been developed to perform reliability related prognosis. For advanced RF technologies such as MIMO-OFDM systems, a rapid system-level testing scheme is presented that performs concurrent testing of the multiple RF chains. Depending on the availability of the computational resources and system tuning knobs, different low-cost methodologies for post-manufacture tuning or self-healing of RF SISO/MIMO systems are developed. These include faster digital monitoring and tuning techniques, on-chip tuning techniques using digital logic that enables die-level self-tuning, and DSP-based power conscious iterative techniques for SISO/MIMO RF systems. An adaptive power-performance tuning technique is developed for those devices that have a post-manufacture power consumption value that is more than the acceptable limit. These intelligent post-manufacturing techniques result in reduced manufacturing cost, improved yield, and reliability of analog/RF systems.
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Goyal, Abhilash. "Methodologies for low-cost testing and self-healing of rf systems". Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/44705.
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This thesis proposes a multifaceted production test and post-manufacture yield enhancement framework for RF systems. This framework uses low-cost test and post-manufacture calibration/tuning techniques. Since the test cost and the yield of the RF circuits/sub-system directly contribute to the manufacturing cost of RF systems, the proposed framework minimizes overall RF systems' manufacturing cost by taking two approaches. In the first approach, low-cost testing methodologies are proposed for RF amplifiers and integrated RF substrates with an embedded RF passive filter and interconnect. Techniques are developed to test RF circuits by the analysis of low-frequency signal of the order of few MHz and without using any external RF test-stimulus. Oscillation principles are used to enable testing of RF circuits without any external test-stimulus. In the second approach, to increase the yield of the RF circuits for parametric defects, RF circuits are tuned to compensate for a performance loss during production test using on-board or on-chip resources. This approach includes a diagnosis algorithm to identify faulty circuits within the system, and performs a compensation process that adjusts tunable components to enhance the performance of the RF circuits. In the proposed yield improvement methodologies, the external test stimulus is not required because the stimulus is generated by the RF circuit itself with the help of additional circuitry and faulty circuits are detected using low-cost test methods developed in this research. As a result, the proposed research enables low-cost testing and self-healing of RF systems.
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Carlowitz, Christian, Thomas Girg, Hatem Ghaleb i Xuan-Quang Du. "Efficient Ultra-High Speed Communication with Simultaneous Phase and Amplitude Regenerative Sampling (SPARS)". De Gruyter, 2017. https://tud.qucosa.de/id/qucosa%3A38596.
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For ultra-high speed communication systems at high center frequencies above 100 GHz, we propose a disruptive change in system architecture to address major issues regarding amplifier chains with a large number of amplifier stages. They cause a high noise figure and high power consumption when operating close to the frequency limits of the underlying semiconductor technologies. Instead of scaling a classic homodyne transceiver system, we employ repeated amplification in single-stage amplifiers through positive feedback as well as synthesizer-free self-mixing demodulation at the receiver to simplify the system architecture notably. Since the amplitude and phase information for the emerging oscillation is defined by the input signal and the oscillator is only turned on for a very short time, it can be left unstabilized and thus come without a PLL. As soon as gain is no longer the most prominent issue, relaxed requirements for all the other major components allow reconsidering their implementation concepts to achieve further improvements compared to classic systems. This paper provides the first comprehensive overview of all major design aspects that need to be addressed upon realizing a SPARS-based transceiver. At system level, we show how to achieve high data rates and a noise performance comparable to classic systems, backed by scaled demonstrator experiments. Regarding the transmitter, design considerations for efficient quadrature modulation are discussed. For the frontend components that replace PA and LNA amplifier chains, implementation techniques for regenerative sampling circuits based on super-regenerative oscillators are presented. Finally, an analog-to-digital converter with outstanding performance and complete interfaces both to the analog baseband as well as to the digital side completes the set of building blocks for efficient ultra-high speed communication.
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Zheng, Guizhen. "Low Power Reconfigurable Microwave Circuts Using RF MEMS Switches for Wireless Systems". Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/11656.
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This dissertation presents the research on several different projects. The first project is a via-less CPW RF probe pad to microstrip transition; The second, the third, and the fourth one are reconfigurable microwave circuits using RF MEMS switches: an X-band reconfigurable bandstop filter for wireless RF frontends, an X-band reconfigurable impedance tuner for a class-E high efficiency power amplifier using RF MEMS switches, and a reconfigurable self-similar antenna using RF MEMS switches. The first project was developed in order to facilitate the on-wafer measurement for the second and the third project, since both of them are microstrip transmission line based microwave circuits. A thorough study of the via-less CPW RF probe pad to microstrip transition on silicon substrates was performed and general design rules are derived to provide design guidelines. This research work is then expanded to W-band via-less transition up to 110 GHz. The second project is to develop a low power reconfigurable monolithic bandstop filter operating at 8, 10, 13, and 15 GHz with cantilever beam capacitive MEMS switches. The filter contains microstrip lines and radial stubs that provide different reactances at different frequencies. By electrically actuating different MEMS switches, the different
reactances from different radial stubs connecting to these switches will be selected, thus, the filter will resonate at different frequencies. The third project is to develop a monolithic reconfigurable impedance tuner at 10 GHz with the cantilever DC contact MEMS switch. The impedance tuner is a two port network based on a 3bit-3bit digital design, and uses 6 radial shunt stubs that can be selected via integrated DC contact MEMS switches. By selecting different states of the switches, there will be a total of 2^6 = 64 states, which means 64 different impedances will be generated at the output port of the tuner. This will provide a sufficient tuning range for the output port of the power amplifier to maximize the power efficiency. The last project is to integrate the DC contact RF MEMS switches with self-similar planar antennas, to provide a reconfigurable antenna system that radiates with similar patterns over a wide range of frequencies.
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Cui, Yan Niu Guofu. "High frequency noise modeling and microscopic noise simulation for SiGe HBT and RF CMOS". Auburn, Ala., 2006. http://repo.lib.auburn.edu/Send%2012-15-07/CUI_YAN_8.pdf.
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Sonalkar, Prachi Santosh. "Development of an Implantable Data Acquisition System". See Full Text at OhioLINK ETD Center (Requires Adobe Acrobat Reader for viewing), 2005. http://www.ohiolink.edu/etd/view.cgi?toledo1122671274.
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Thesis (M.S.B.)--University of Toledo, 2005.Typescript. "A thesis [submitted] as partial fulfillment of the requirements of the Master of Science degree in Bioengineering." Bibliography: leaves 73-75.
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Chung, David. "Development of system level integration of compact RF components on multilayer liquid crystal polymer (LCP)". Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/42763.
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A system packaging level approach on liquid crystal polymer (LCP) was proposed for low cost, lightweight, and compact wireless communication systems. Via technology was explored for V-band W-band transitions and an active cooling system that are essential for compact multilayer integration. RF MEMS switches were fabricated and integrated at the component level to enable multi-functional devices with optimal performance. A pattern reconfigurable antenna for MIMO applications and 3D phase shifters for phased array antennas that use RF MEMS switches were presented. In addition, a lightweight expandable array was designed and measured with up to 256 elements on multilayer LCP integrated at the system level. Furthermore, a 60 GHz multilayer transceiver front end device with simultaneous transmit and receive was designed and measured for low cost 60 GHz applications. The wide variety of multilayer LCP applications integrated at the system level shows a promising future for the next generation low cost lightweight wireless communication systems.
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Iyer, Gopal Balakrishnan. "Digital communication and control circuits for 60ghz fully integrated CMOS digital radio". Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/39589.
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Emerging "bandwidth hungry" applications such as high definition video distribution and ultra fast multimedia side-loading have extended the need for multi-gigabit wireless solutions beyond the reach of conventional WLAN technology or even more recently emerging UWB and MIMO systems. The availability of 7GHz of unlicensed bandwidth in the 60GHz spectrum, represents a unique opportunity to address such data-throughput requirements. The 60GHz Integrated CMOS digital radio chipset comprises of PHY and MAC layers, RF transceiver, High-Speed Digital Interface and an underlying Serial Communication Fabric.
To have a complete communication solution compliant with the latest ECMA-369, ISO/DIS 13156 and IEEE 802.15.3c standards, we build a million gate digital implementation of MAC and PHY. The Serial Peripheral Interface (SPI) serves as the bridge between the higher layers in the communication stack (PAL-MAC) and the lower layers like PHY-RF Front End. The MAC module can setup the communication link on the fly by tuning parameters such as operating channel, channel bonding and bandwidth, data rates, error correction mechanisms, handshaking mechanisms, etc, by using the SPI to communicate with internal components. The SPI interface plays a crucial rule in not only this, but also during the testing and debug phase. Operation of each of the RF modules is monitored through the serial interface using local SPI slaves which are hooked up to the 4-wire serial bus running all through the chip. The SPI host controller emulates an embedded protocol analyzer. For calibration and fine tuning purposes, digital settings can also be loaded onto these modules through the SPI interface. R-2R DACs are used to convert these commands into analog voltages which then provide a tunable bias to the RF and mixed-signal modules. Other key functions of this serial communication and control interface are: Initialization of all of the RF and mixed signal modules, DC calibration of data converter, PLL and other mixed-signal modules, data acquisition, parametric tuning for digital modules such as linear equalizer, Gain Control loops (AGC, VGA), etc.
Ultra high speed digital Input-Output buffers are used to provide an external data interface to the radio chipset. These high speed I/Os are also used in the gbps (gigabit-per-second) link for data transfer between the RF transceiver chip and the PHY-MAC baseband chip. The IOs are expected to comply with different signaling standards such as LVDS, SLVS200, SLVS400, etc. A robust system involves a meticulous pad ring design with proper power domains and power cuts. Full-chip integration of the digital PHY, MAC, peripheral logic and IO ring is done in a semi-custom fashion.
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Cook, Benjamin Stassen. "Vertical integration of inkjet-printed RF circuits and systems (VIPRE) for wireless sensing and inter/intra-chip communication applications". Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/51844.
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Inkjet-printing is a technology which has for the last decade been exploited to fabricate flexible RF components such as antennas and planar circuit elements. However, the limitations of feature size and single layer fabrication prevented the demonstration of compact, and high efficiency RF components operating above 10 GHz into the mm-Wave regime which is critical to silicon integration and fully-printed modules. To overcome these limitations, a novel vertically-integrated fully inkjet-printed process has been developed and characterized up to the mm-Wave regime which incorporates up to five highly conductive metal layers, variable thickness dielectric layers ranging from 200 nm to 200 um, and low resistance through-layer via interconnects. This vertically-integrated inkjet printed electronics process, tagged VIPRE, is a first of its kind, and is utilized to demonstrate fully additive RF capacitors, inductors, antennas, and RF sensors operating up to 40 GHz. In this work, the first-ever fully inkjet printed multi-layer RF devices operating up to 40 GHz with high-performance are demonstrated, along with a demonstration of the processing techniques which have enabled the printing of multi-layer RF structures with multiple metal layers, and dielectric layers which are orders of magnitude thicker than previoulsy demonstrated inkjet-printed structures. The results of this work show the new possibilities in utilizing inkjet printing for the post-processing of high-efficiency RF inductors, capacitors, and antennas and antenna arrays on top of silicon to reduce chip area requirements, and for the production of entirely printed wireless modules.
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Pelteku, Altin E. "Adaptive Suppression of Interfering Signals in Communication Systems". Digital WPI, 2013. https://digitalcommons.wpi.edu/etd-dissertations/138.
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The growth in the number of wireless devices and applications underscores the need for characterizing and mitigating interference induced problems such as distortion and blocking. A typical interference scenario involves the detection of a small amplitude signal of interest (SOI) in the presence of a large amplitude interfering signal; it is desirable to attenuate the interfering signal while preserving the integrity of SOI and an appropriate dynamic range. If the frequency of the interfering signal varies or is unknown, an adaptive notch function must be applied in order to maintain adequate attenuation. This work explores the performance space of a phase cancellation technique used in implementing the desired notch function for communication systems in the 1-3 GHz frequency range. A system level model constructed with MATLAB and related simulation results assist in building the theoretical foundation for setting performance bounds on the implemented solution and deriving hardware specifications for the RF notch subsystem devices. Simulations and measurements are presented for a Low Noise Amplifer (LNA), voltage variable attenuators, bandpass filters and phase shifters. Ultimately, full system tests provide a measure of merit for this work as well as invaluable lessons learned. The emphasis of this project is the on-wafer LNA measurements, dependence of IC system performance on mismatches and overall system performance tests. Where possible, predictions are plotted alongside measured data. The reasonable match between the two validates system and component models and more than compensates for the painstaking modeling efforts. Most importantly, using the signal to interferer ratio (SIR) as a figure of merit, experimental results demonstrate up to 58 dB of SIR improvement. This number represents a remarkable advancement in interference rejection at RF or microwave frequencies.
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Venugopalan, Nair Jalajakumari Aravind. "Power and spectrally efficient integrated high-speed LED drivers for visible light communication". Thesis, University of Edinburgh, 2018. http://hdl.handle.net/1842/28995.
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Recent trends in mobile broadband indicates that the available radio frequency (RF) spectrum will not be enough to support the data requirements of the immediate future. Visible light communication, which uses visible spectrum to transmit wirelessly could be a potential solution to the RF ’Spectrum Crunch’. Thus there is growing interest all over the world in this domain with support from both academia and industry. Visible light communication( VLC) systems make use of light emitting diodes (LEDs), which are semiconductor light sources to transmit information. A number of demonstrators at different data capacity and link distances has been reported in this area. One of the key problems holding this technology from taking off is the unavailability of power efficient, miniature LED drive schemes. Reported demonstrators, mostly using either off the shelf components or arbitrary waveform generators (AWGs) to drive the LEDs have only started to address this problem by adopting integrated drivers designed for driving lighting installations for communications. The voltage regulator based drive schemes provide high power efficiency (> 90 %) but it is difficult to realise the fast switching required to achieve the Mbps or Gbps data rates needed for modern wireless communication devices. In this work, we are exploiting CMOS technology to realise an integrated LED driver for VLC. Instead of using conventional drive schemes (digital to analogue converter (DAC) + power amplifier or voltage regulators), we realised a current steering DAC based LED driver operating at high currents and sampling rates whilst maintaining power efficiency. Compared to a commercial AWG or discrete LED driver, circuit realised utilisng complementary metal oxide semiconductor (CMOS) technology has resulted in area reduction (29mm2). We realised for the first time a multi-channel CMOS LED driver capable of operating up to a 500 MHz sample rate at an output current of 255 mA per channel and > 70% power efficiency. We were able to demonstrate the flexibility of the driver by employing it to realise VLC links using micro LEDs and commercial LEDs. Data rates up to 1 Gbps were achieved using this system employing a multiple input, multiple output (MIMO) scheme. We also demonstrated the wavelength division multiplexing ability of the driver using a red/green/blue commercial LED. The first integrated digital to light converter (DLC), where depending on the input code, a proportional number of LEDs are turned ON, realising a data converter in the optical domain, is also an output from this research. In addition, we propose a differential optical drive scheme where two output branches of a current DAC are used to drive two LEDs achieving higher link performance and power efficiency compared to single LED drive.
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Srirattana, Nuttapong. "High-Efficiency Linear RF Power Amplifiers Development". Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6899.
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Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers.
The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept.
The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique.
In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.
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Andraud, Martin. "Solutions pour l'auto-adaptation des systèmes sans fil". Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT037/document.
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La demande courante de connectivité instantanée impose un cahier des charges très strict sur la fabrication des circuits Radio-Fréquences (RF). Les circuits doivent donc être transférées vers les technologies les plus avancées, initialement introduites pour augmenter les performances des circuits purement numériques. De plus, les circuits RF sont soumis à de plus en plus de variations et cette sensibilité s’accroît avec l’avancées des technologies. Ces variations sont par exemple les variations du procédé de fabrication, la température, l’environnement, le vieillissement… Par conséquent, la méthode classique de conception de circuits “pire-cas” conduit à une utilisation non-optimale du circuit dans la vaste majorité des conditions, en termes de performances et/ou de consommation. Ces variations doivent donc être compensées, en utilisant des techniques d’adaptation.De manière plus importante encore, le procédé de fabrication des circuits introduit de plus en plus de variabilité dans les performances des circuits, ce qui a un impact important sur le rendement de fabrication des circuits. Pour cette raison, les circuits RF sont difficilement fabriqués dans les technologies CMOS les plus avancées comme les nœuds 32nm ou 22nm. Dans ce contexte, les performances des circuits RF doivent êtres calibrées après fabrication pour prendre en compte ces variations et retrouver un haut rendement de fabrication.Ce travail de these présente une méthode de calibration post-fabrication pour les circuits RF. Cette méthodologie est appliquée pendant le test de production en ajoutant un minimum de coût, ce qui est un point essentiel car le coût du test est aujourd’hui déjà comparable au coût de fabrication d’un circuit RF et ne peut être augmenté d’avantage. Par ailleurs, la puissance consommée est aussi prise en compte pour que l’impact de la calibration sur la consommation soit minimisé. La calibration est rendue possible en équipant le circuit avec des nœuds de réglages et des capteurs. L’identification de la valeur de réglage optimale du circuit est obtenue en un seul coup, en testant les performances RF une seule et unique fois. Cela est possible grâce à l’utilisation de capteurs de variations du procédé de fabrication qui sont invariants par rapport aux changements des nœuds de réglage. Un autre benefice de l’utilisation de ces capteurs de variation sont non-intrusifs et donc totalement transparents pour le circuit sous test. La technique de calibration a été démontrée sur un amplificateur de puissance RF utilisé comme cas d’étude. Une première preuve de concept est développée en utilisant des résultats de simulation.Un démonstrateur en silicium a ensuite été fabriqué en technologie 65nm pour entièrement démontrer le concept de calibration. L’ensemble des puces fabriquées a été extrait de trois types de wafer différents, avec des transistors aux performances lentes, typiques et rapides. Cette caractéristique est très importante car elle nous permet de considérer des cas de procédé de fabrication extrêmes qui sont les plus difficiles à calibrer. Dans notre cas, ces circuits représentent plus des deux tiers des puces à disposition et nous pouvons quand même prouver notre concept de calibration. Dans le détails, le rendement de fabrication passe de 21% avant calibration à plus de 93% après avoir appliqué notre méthodologie. Cela constitue une performance majeure de notre méthodologie car les circuits extrêmes sont très rares dans une fabrication industrielleThe current demand on ubiquitous connectivity imposes stringent requirements on the fabrication of Radio-Frequency (RF) circuits. Designs are consequently transferred to the most advanced CMOS technologies that were initially introduced to improve digital performance. In addition, as technology scales down, RF circuits are more and more susceptible to a lot of variations during their lifetime, as manufacturing process variability, temperature, environmental conditions, aging… As a result, the usual worst-case circuit design is leading to sub-optimal conditions, in terms of power and/or performance most of the time for the circuit. In order to counteract these variations, increasing the performances and also reduce power consumption, adaptation strategies must be put in place.More importantly, the fabrication process introduces more and more performance variability, which can have a dramatic impact on the fabrication yield. That is why RF designs are not easily fabricated in the most advanced CMOS technologies, as 32nm or 22nm nodes for instance. In this context, the performances of RF circuits need to be calibrated after fabrication so as to take these variations into account and recover yield loss.This thesis work is presenting on a post-fabrication calibration technique for RF circuits. This technique is performed during production testing with minimum extra cost, which is critical since the cost of test can be comparable to the cost of fabrication concerning RF circuits and cannot be further raised. Calibration is enabled by equipping the circuit with tuning knobs and sensors. Optimal tuning knob identification is achieved in one-shot based on a single test step that involves measuring the sensor outputs once. For this purpose, we rely on variation-aware sensors which provide measurements that remain invariant under tuning knob changes. As an auxiliary benefit, the variation-aware sensors are non-intrusive and totally transparent to the circuit.Our proposed methodology has first been demonstrated with simulation data with an RF power amplifier as a case study. Afterwards, a silicon demonstrator has then been fabricated in a 65nm technology in order to fully demonstrate the methodology. The fabricated dataset of circuits is extracted from typical and corner wafers. This feature is very important since corner circuits are the worst design cases and therefore the most difficult to calibrate. In our case, corner circuits represent more than the two third of the overall dataset and the calibration can still be proven. In details, fabrication yield based on 3 sigma performance specifications is increased from 21% to 93%. This is a major performance of the technique, knowing that worst case circuits are very rare in industrial fabrication
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Hamilton, Benjamin Russell. "Applications of bayesian filtering in wireless networks: clock synchronization, localization, and rf tomography". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44707.
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In this work, we investigate the application of Bayesian filtering techniques such as Kalman Filtering and Particle filtering to the problems of network time synchronization, self-localization and radio-frequency (RF) tomography in wireless networks. Networks of large numbers of small, cheap, mobile wireless devices have shown enormous potential in applications ranging from intrusion detection to environmental monitoring. These applications require the devices to have accurate time and position estimates, however traditional techniques may not be available. Additionally RF tomography offers a new paradigm to sense the network environment and could greatly enhance existing network capabilities.
While there are some existing works addressing these problems, they all suffer from limitations. Current time synchronization methods are not energy efficient on small wireless devices with low quality oscillators. Existing localization methods do not consider additional sources of information available to nodes in the network such as measurements from accelerometers or models of the shadowing environment in the network. RF tomography has only been examined briefly in such networks, and current algorithms can not handle node mobility and rely on shadowing models that have not been experimentally verified.
We address the time synchronization problem by analyzing the characteristics of the clocks in small wireless devices, developing a model for it, and then applying a Kalman filter to track both clock offset and skew. In our investigation into RF tomography, we present a method using a Kalman filter which jointly estimates and tracks static and dynamic objects in the environment. We also use channel measurements collected from a field test of our RF tomography testbed to compare RF shadowing models. For the localization problem, we present two algorithms incorporating additional information for improved localization: one based on a distributed extended Kalman filter that combines local acceleration measurements with signal strength measurements for improved localization, and another that uses a distributed particle filter to incorporate a model of the channel environment.
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Khlif, Wassim. "Design of Tunable Low-Noise Amplifier in 0.13um CMOS Technology for Multistandard RF Transceivers". Digital WPI, 2007. https://digitalcommons.wpi.edu/etd-theses/714.
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The global market of mobile and wireless communications is witnessing explosive growth in size as well as radical changes. Third generation (3G) wireless systems have recently been deployed and some are still in the process. 3G wireless systems promise integration of voice and data communications with higher data rates and a superior quality of service compared to second generation systems. Unfortunately, more and more communication standards continue to be developed which ultimately requires specific RF/MW and baseband communication integrated circuits that are designed for functionality and compatibility with a specific type of network. Although communication devices such as cellular phones integrate different services such as voice, Bluetooth, GPS, and WLAN, each service requires its own dedicated radio transceiver which results in high power consumption and larger PCB area usage. With the rapid advances in silicon CMOS integrated circuit technology combined with extensive research, a global solutionswhich aims at introducing a global communication system that encompasses all communication standards appears to be emerging. State of the art CMOS technology not only has the capability of operation in the GHz range, but it also provides the advantage of low cost and high level of integration. These features propel CMOS technology as the ideal candidate for current trends, which currently aim to integrate more RF/MW circuits on the same chip. Armed with such technology ideas such as software radio look more attainable than they ever were in the past. Unfortunately, realizing true software radio for mobile applications still remains a tremendous challenge since it requires a high sampling rate and a wide-bandwidth Analog-to-Digital converter which is extremely power hungry and not suitable for battery operated mobile devices. Another approach to realize a flexible and reconfigurable RF/MW transceiver that could operate in a diverse mobile environment and provides a multiband and multistandard solution. The work presented in this thesis focuses on the design of an integrated and tunable low-noise amplifier as part of software defined radio (SDR).
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Bushyager, Nathan Adam. "Novel adaptive time-domain techniques for the modeling and design of complex RF and wireless structures". Diss., Available online, Georgia Institute of Technology, 2005, 2004. http://etd.gatech.edu/theses/available/etd-11182004-145238/.
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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.Tentzeris, Manos, Committee Chair ; Laskar, Joy, Committee Member ; Peterson, Andrew, Committee Member ; Papapolymerou, Ioannis, Committee Member ; Sotiropoulos, Fotis, Committee Member. Vita. Includes bibliographical references.
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Cha, Jeongwon. "A CMOS radio-frequency front-end for multi-standard wireless communications". Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/37250.
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The explosive growth of wireless communication market has led the development of low-cost, highly-integrated wireless communication systems. Even though most blocks in the front-end have successfully been integrated by using the CMOS technology, it is still a formidable challenge to integrate the entire front-end. Thus, the objective of this research is to demonstrate the feasibility of the integrated front-end by using improved circuit techniques as well as the improved process technologies. This dissertation proposes an improved control scheme to enhance the high-power handling capability of an antenna switch.
As a part of this research, an antenna switch controller for a GaAs antenna switch was first developed to enhance the performances of the GaAs antenna switch by using the boosted control voltage. To enhance the efficiency of the front-end, efficiency improvement techniques for the antenna switch controller has also been studied. With the suggested efficiency improvement techniques, a fully-integrated antenna switch was implemented using the SOI technology, and exceeding performances over many commercial products for watt-level high-power applications have been successfully demonstrated. As an effort to improve the efficiency of a power amplifier, a linear envelope detector was also implemented, and the results show that the envelope detector is suitable for dynamic biasing of the power amplifier. The research presented in this dissertation, thus, provides a low-cost and high-performance solution for highly-integrated RF front-end used in various wireless communication systems.
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Kok, Wing Hang (Ronald). "Development of a wireless MEMS inertial system for health monitoring of structures". Link to electronic thesis, 2004. http://www.wpi.edu/Pubs/ETD/Available/etd-11244-122741/.
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Thesis (M.S.)--Worcester Polytechnic Institute.Keywords: angular rate; cantilever; wireless; RF; microcontroller; tilt and rotation; health monitoring; inertial sensors; MEMS. Includes bibliographical references (p. 139-145).
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Rida, Amin Hassan. "Integrated RF modules and passives on low-cost flexible materials for applications up to the mm-wave frequency range". Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/39552.
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The objective of the proposed research is to develop solutions for High-Performance Low-Cost Passives for Radar, Identification, and Communication Applications up to mm-Wave Frequencies. This research will bring to the table potential solutions that will meet three main requirements: small size (or low weight), high performance, and low cost. This research embarks on antenna design and development for passive RFID tags on LCP substrates, and then a transition towards lower cost modules investigates and explores the possibilities of using paper as RF substrates with inkjet printing as a low cost fabrication technology. Modules such as dual band antenna for Wifi frequencies (2.4 GHz and 5 GHz) and UWB (up to 10GHz) on paper substrate using inkjet printing are presented. This work then bridges into developing higher frequency modules. These include: highly selective filter design on LCP for X-band Radar application to be used as a benchmark for an easy adjustment for higher frequencies, and antenna modules LCP using inkjet printing for communication such as mm-Wave WLAN or WPAN.
A transition into mm-Wave Modules then takes place for the general realization of low-cost high-performance mm-Wave modules and more specifically the low cost automotive radar. After proposing an architecture for integrated mm-Wave module, this work then investigates 2D/3D interconnections (and their integration with antennas) on LCP using conventional etching design guidelines up to 100GHz. Antenna arrays that are implemented with phase shifters for beam steering are then designed using edge fed and multilayer technology. Furthermore, crosstalk reductions for highly dense transmission lines are analyzed via simulations for the optimum performance and space saving of such mm-Wave modules such as the IC interface where space restrictions are strictly enforced.