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Artykuły w czasopismach na temat "REVERSIBLE MULTIPLIER"
HAGHPARAST, MAJID, MAJID MOHAMMADI, KEIVAN NAVI i MOHAMMAD ESHGHI. "OPTIMIZED REVERSIBLE MULTIPLIER CIRCUIT". Journal of Circuits, Systems and Computers 18, nr 02 (kwiecień 2009): 311–23. http://dx.doi.org/10.1142/s0218126609005083.
Pełny tekst źródłaRashno, Meysam, Majid Haghparast i Mohammad Mosleh. "A new design of a low-power reversible Vedic multiplier". International Journal of Quantum Information 18, nr 03 (kwiecień 2020): 2050002. http://dx.doi.org/10.1142/s0219749920500021.
Pełny tekst źródłaRayudu, Kurada Verra Bhoga Vasantha, Dhananjay Ramachandra Jahagirdar i Patri Srihari Rao. "Design and testing of systolic array multiplier using fault injecting schemes". Computer Science and Information Technologies 3, nr 1 (1.03.2022): 1–9. http://dx.doi.org/10.11591/csit.v3i1.p1-9.
Pełny tekst źródłaDurgam, Veena, i Dr K. Ragini. "Design of 32x32 Reversible Unsigned Multiplier Using Dadda Tree Algorithm". ECS Transactions 107, nr 1 (24.04.2022): 16251–58. http://dx.doi.org/10.1149/10701.16251ecst.
Pełny tekst źródłaRaviteja, Ragoju, Mittapelli Kalyan Krishna, Gare Sandhya i N. Srinivasa Reddy. "Approximative Signed Wallace Tree Multiplier Using Reversible Logic". International Journal for Research in Applied Science and Engineering Technology 11, nr 4 (30.04.2023): 2474–78. http://dx.doi.org/10.22214/ijraset.2023.50668.
Pełny tekst źródłaZomorodi Moghadam, Mariam, i Keivan Navi. "Ultra-area-efficient reversible multiplier". Microelectronics Journal 43, nr 6 (czerwiec 2012): 377–85. http://dx.doi.org/10.1016/j.mejo.2012.02.004.
Pełny tekst źródłaEshack, Ansiya, i S. Krishnakumar. "Reversible logic in pipelined low power vedic multiplier". Indonesian Journal of Electrical Engineering and Computer Science 16, nr 3 (1.12.2019): 1265. http://dx.doi.org/10.11591/ijeecs.v16.i3.pp1265-1272.
Pełny tekst źródłaSaravanan. "NOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATES". Journal of Computer Science 10, nr 7 (1.07.2014): 1135–38. http://dx.doi.org/10.3844/jcssp.2014.1135.1138.
Pełny tekst źródłaAriafar, Zahra, i Mohammad Mosleh. "Effective Designs of Reversible Vedic Multiplier". International Journal of Theoretical Physics 58, nr 8 (24.05.2019): 2556–74. http://dx.doi.org/10.1007/s10773-019-04145-0.
Pełny tekst źródłaSaiAbhinav, B., M. Jaipal Reddy, Y. Siva Kumar i S. Sivanantham S.Sivanantham. "ASIC Design of Reversible Adder and Multiplier". International Journal of Computer Applications 109, nr 10 (16.01.2015): 6–10. http://dx.doi.org/10.5120/19222-0638.
Pełny tekst źródłaRozprawy doktorskie na temat "REVERSIBLE MULTIPLIER"
Bollinger, Patrick James. "Prime Factorization Through Reversible Logic Gates". Youngstown State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=ysu1558867948427409.
Pełny tekst źródłaMorrison, Matthew Arthur. "Design of a Reversible ALU Based on Novel Reversible Logic Structures". Scholar Commons, 2012. http://scholarcommons.usf.edu/etd/4175.
Pełny tekst źródłaCabbage, Sarah E. "Reversible regulatory T cell-mediated suppression of myelin basic protein-specific T cells /". Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/5034.
Pełny tekst źródłaBérut, Antoine. "Fluctuations and Interactions of Brownian particles in multiple Optical Traps". Thesis, Lyon, École normale supérieure, 2015. http://www.theses.fr/2015ENSL1003/document.
Pełny tekst źródłaWe experimentally study the fluctuations of Brownian micro-particles trapped with optical tweezers arranged in various spatial configurations. We give a general description of the set-up and detail four different experiments we conducted. We first use a single particle in a double-well potential to model a two-state memory system. We verify the Landauer principle on the minimal energetic cost to erase one bit of information, and we use a detailed version of a fluctuation theorem to retrieve the expected energetic bound. We then use two particles in two different traps to study the hydrodynamic interactions between two systems kept at different effective temperatures. Contrary to what was previously observed, we show that the sol-gel transition of gelatine does not provide any anomalous fluctuations for the trapped particle when the sample is quenched below gelification temperature. However, we show that an effective temperature is created when a well chosen random noise is added on one trap position. We demonstrate that the random forcing on one particle induces an instantaneous correlation between the two particles motions, and an energy exchange from the virtually hot particle to the cold one, which is in equilibrium with the thermal bath. We show a good agreement between the experimental data and the predictions from an hydrodynamic coupling model. Finally, we describe the use of micro-fluidic channels to create a shear flow at the micron size, and we discuss the possibility to interpret the force due to the shear-flow in terms of an effective temperature by testing a fluctuation-dissipation relation
O'Leary, Rebecca A. "Informed statistical modelling of habitat suitability for rare and threatened species". Thesis, Queensland University of Technology, 2008. https://eprints.qut.edu.au/17779/1/Rebecca_O%27Leary_Thesis.pdf.
Pełny tekst źródłaO'Leary, Rebecca A. "Informed statistical modelling of habitat suitability for rare and threatened species". Queensland University of Technology, 2008. http://eprints.qut.edu.au/17779/.
Pełny tekst źródłaKuhnert, Petra Meta. "New methodology and comparisons for the analysis of binary data using Bayesian and tree based methods". Thesis, Queensland University of Technology, 2003.
Znajdź pełny tekst źródłaAssareh, Hassan. "Bayesian hierarchical models in statistical quality control methods to improve healthcare in hospitals". Thesis, Queensland University of Technology, 2012. https://eprints.qut.edu.au/53342/1/Hassan_Assareh_Thesis.pdf.
Pełny tekst źródłaRUHELA, DIKSHA. "DESIGN AND IMPLEMENTATION OF EFFICIENT REVERSIBLE MULTIPLIER USING VEDIC MATHEMATICS TOOL". Thesis, 2016. http://dspace.dtu.ac.in:8080/jspui/handle/repository/14759.
Pełny tekst źródłaHua, Chen-Wei, i 華振崴. "Multiple Acceleration on Reversible Markov Chain". Thesis, 2019. http://ndltd.ncl.edu.tw/handle/2hd8vc.
Pełny tekst źródła國立臺灣大學
數學研究所
107
Chen and Hwang, 2013 proposed to improve a reversible Markov chain by adding an antisymmetric perturbation on a cycle. Since the perturbed Markov chain is no longer reversible, one can not iteratively apply this antisymmetric perturbation method on different cycles. Chen and Hwang, 2013 also showed that the method works on disjoint cycles. In this paper, we further investigate the case of two cycles sharing the same vertex. We will show that the method can work on two cycles under some additional conditions. In addition to the theory, we implement the antisymmetric perturbation method on the Ising model.
Książki na temat "REVERSIBLE MULTIPLIER"
K, Kokula Krishna Hari, red. Implementation of Novel Reversible Multiplier Architecture Using Reversible 4*4 TSG Gate: ICIEMS 2014. India: Association of Scientists, Developers and Faculties, 2014.
Znajdź pełny tekst źródłala, Torre Mónica de, i Wiegers Michael, red. Reversible monuments: Contemporary Mexican poetry. Port Townsend, Wash: Copper Canyon Press, 2002.
Znajdź pełny tekst źródłaReid, Alastair, Susan Jill Levine, Geoff Hargreaves, Mónica de la Torre i Margaret Sayers Peden. Reversible Monuments. Copper Canyon Press, 2002.
Znajdź pełny tekst źródłaSentissi, Kinza, i Stephanie Yacoubian. Physiologic Airflow Disruption. Redaktorzy Matthew D. McEvoy i Cory M. Furse. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190226459.003.0017.
Pełny tekst źródłaRubin, Mark N., i Alejandro A. Rabinstein. Electrolyte Disturbances. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780199937837.003.0183.
Pełny tekst źródłaPagnoux, Christian, i Richard H. Swartz. Vasculitis of the Central Nervous System. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780199937837.003.0099.
Pełny tekst źródłaGoodman, Wayne K., Nigel Kennedy, Kyle Lapidus i Brian H. Kopell. Deep Brain Stimulation for Intractable OCD. Redaktor Christopher Pittenger. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190228163.003.0046.
Pełny tekst źródłaBrooks, Melody, i Roland Kays. Kinkajou: the tree-top specialist. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780198759805.003.0026.
Pełny tekst źródłaNihoyannopoulos, Petros, i Fausto Pinto. Ischaemic heart disease. Oxford University Press, 2011. http://dx.doi.org/10.1093/med/9780199599639.003.0012.
Pełny tekst źródłaMease, Philip. Neurobiology of pain in osteoarthritis. Oxford University Press, 2016. http://dx.doi.org/10.1093/med/9780199668847.003.0013.
Pełny tekst źródłaCzęści książek na temat "REVERSIBLE MULTIPLIER"
Hänninen, Ismo, Hao Lu, Craig S. Lent i Gregory L. Snider. "Energy Recovery and Logical Reversibility in Adiabatic CMOS Multiplier". W Reversible Computation, 25–35. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38986-3_3.
Pełny tekst źródłaRotenberg, Eva, James Cranch, Michael Kirkedal Thomsen i Holger Bock Axelsen. "Strength of the Reversible, Garbage-Free 2 k ±1 Multiplier". W Reversible Computation, 46–57. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38986-3_5.
Pełny tekst źródłaDobbs, Evan E., Robert Basmadjian, Alexandru Paler i Joseph S. Friedman. "Fast Swapping in a Quantum Multiplier Modelled as a Queuing Network". W Reversible Computation, 256–65. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-79837-6_16.
Pełny tekst źródłaRangaraju, H. G., Aakash Babu Suresh i K. N. Muralidhara. "Design of Efficient Reversible Multiplier". W Advances in Computing and Information Technology, 571–79. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-31600-5_56.
Pełny tekst źródłaMamataj, Shefali, Biswajit Das i Saravanan Chandran. "An Approach for Designing an Optimized Reversible Parallel Multiplier by Reversible Gates". W Computational Advancement in Communication Circuits and Systems, 345–55. New Delhi: Springer India, 2015. http://dx.doi.org/10.1007/978-81-322-2274-3_38.
Pełny tekst źródłaHemalatha, K. N., i B. G. Sangeetha. "Performance Analysis of Array Multiplier Using Reversible Logic". W Lecture Notes in Electrical Engineering, 543–60. Singapore: Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-1906-0_46.
Pełny tekst źródłaAwade, Anirudh, Prachi Jain, S. Hemavathy i V. S. Kanchana Bhaaskaran. "Design of Vedic Multiplier Using Reversible Logic Gates". W Lecture Notes in Electrical Engineering, 435–48. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-15-9019-1_38.
Pełny tekst źródłaSwathi, U., i U. Smitha. "Implementation and Performance Evaluation of Various Reversible Vedic Multiplier Architectures for Reversible Digital Filters". W Lecture Notes in Electrical Engineering, 927–47. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-2761-3_81.
Pełny tekst źródłaSaravanan, P., P. Chandrasekar, Livya Chandran, Nikilla Sriram i P. Kalpana. "Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic". W Progress in VLSI Design and Test, 364–66. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-31494-0_45.
Pełny tekst źródłaNagamani, A. N., i Vinod Kumar Agrawal. "Design of Quantum Cost and Delay-Optimized Reversible Wallace Tree Multiplier Using Compressors". W Advances in Intelligent Systems and Computing, 323–31. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-2126-5_36.
Pełny tekst źródłaStreszczenia konferencji na temat "REVERSIBLE MULTIPLIER"
Banerjee, A., i A. Pathak. "Reversible Multiplier Circuit". W Third International Conference on Emerging Trends in Engineering and Technology (ICETET 2010). IEEE, 2010. http://dx.doi.org/10.1109/icetet.2010.70.
Pełny tekst źródłaThapliyal, H., i M. B. Srinivas. "Novel Reversible Multiplier Architecture Using Reversible TSG Gate". W IEEE International Conference on Computer Systems and Applications, 2006. IEEE, 2006. http://dx.doi.org/10.1109/aiccsa.2006.205074.
Pełny tekst źródłaOffermann, Sebastian, Robert Wille, Gerhard W. Dueck i Rolf Drechsler. "Synthesizing multiplier in reversible logic". W 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2010. http://dx.doi.org/10.1109/ddecs.2010.5491757.
Pełny tekst źródłaHatkar, A. P., A. A. Hatkar i N. P. Narkhede. "ASIC Design of Reversible Multiplier Circuit". W 2014 International Conference on Electronic Systems, Signal Processing and Computing Technologies (ICESC). IEEE, 2014. http://dx.doi.org/10.1109/icesc.2014.16.
Pełny tekst źródłaMoshnyaga, Vasily G. "Design of minimum complexity reversible multiplier". W TENCON 2015 - 2015 IEEE Region 10 Conference. IEEE, 2015. http://dx.doi.org/10.1109/tencon.2015.7373120.
Pełny tekst źródłaKole, Dipak K., Hafizur Rahaman, Debesh Kumar Das, Somnath Rakshit i Sraboni Mondal. "A novel reversible synthesis of array multiplier". W 2018 International Symposium on Devices, Circuits and Systems (ISDCS). IEEE, 2018. http://dx.doi.org/10.1109/isdcs.2018.8379667.
Pełny tekst źródłaRavali, B., M. Micheal Priyanka i T. Ravi. "Optimized reversible logic design for Vedic multiplier". W 2015 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT). IEEE, 2015. http://dx.doi.org/10.1109/iccicct.2015.7475262.
Pełny tekst źródłaSultana, Jakia, Sajib Kumar Mitra i Ahsan Raja Chowdhury. "On the Analysis of Reversible Booth's Multiplier". W 2015 28th International Conference on VLSI Design (VLSID). IEEE, 2015. http://dx.doi.org/10.1109/vlsid.2015.34.
Pełny tekst źródłaP, Koti Lakshmi, Santhosh Kumar B i Rameshwar Rao. "Implemenation of Vedic Multiplier Using Reversible Gates". W Fifth International Conference on Advances in Computing and Information Technology. Academy & Industry Research Collaboration Center (AIRCC), 2015. http://dx.doi.org/10.5121/csit.2015.51311.
Pełny tekst źródłaRuhela, Diksha, i Rajni Jindal. "All-Optical N-Bit Reversible Complex Multiplier". W 2022 8th International Conference on Signal Processing and Communication (ICSC). IEEE, 2022. http://dx.doi.org/10.1109/icsc56524.2022.10009114.
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