Książki na temat „Processor Architectures”

Fountain, T. J. Processor arrays: Architectures and applications. London: Academic Press, 1987.

1965-, Lapsley Phil, red. DSP processor fundamentals: Architectures and features. New York: IEEE Press, 1997.

Endecott, Philip Brian. Processor architectures for power efficiency and asynchronous implementation. Manchester: University of Manchester, 1993.

United States. National Aeronautics and Space Administration., red. Periodic application of concurrent error detection in processor array architectures. [Urbana, IL]: Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, College of Engineering, University of Illinois at Urbana-Champaign, 1993.

Johnson, Sally C. Evaluation of fault-tolerant parallel-processor architectures over long space missions. Hampton, Va: Langley Research Center, 1989.

Farooq, Umer. Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization. New York, NY: Springer New York, 2012.

Zatt, Bruno. 3D Video Coding for Embedded Devices: Energy Efficient Algorithms and Architectures. New York, NY: Springer New York, 2013.

United States. National Aeronautics and Space Administration., red. Processor-In-Memory (PIM) based architectures for petaflops potential massively parallel processing: Final report, NASA grant NAG 5-2998. [Washington, DC: National Aeronautics and Space Administration, 1996.

United States. National Aeronautics and Space Administration., red. Processor-In-Memory (PIM) based architectures for petaflops potential massively parallel processing: Final report, NASA grant NAG 5-2998. [Washington, DC: National Aeronautics and Space Administration, 1996.

United States. National Aeronautics and Space Administration., red. Processor-In-Memory (PIM) based architectures for petaflops potential massively parallel processing: Final report, NASA grant NAG 5-2998. [Washington, DC: National Aeronautics and Space Administration, 1996.

Kogge, Peter M. Processor-In-Memory (PIM) based architectures for petaflops potential massively parallel processing: Final report, NASA grant NAG 5-2998. [Washington, DC: National Aeronautics and Space Administration, 1996.

Stenström, Per. Transactions on High-Performance Embedded Architectures and Compilers IV. Berlin, Heidelberg: Springer-Verlag GmbH Berlin Heidelberg, 2011.

Ogras, Umit Y. Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures. Dordrecht: Springer Netherlands, 2013.

Chen, Mingsong. System-Level Validation: High-Level Modeling and Directed Test Generation Techniques. New York, NY: Springer New York, 2013.

Higuera-Toledano, M. Teresa. Self-Organization in Embedded Real-Time Systems. New York, NY: Springer New York, 2013.

IFIP TC 2/WG 2.7 Working Conference on Engineering for Human-Computer Interaction (7th 1998 Ērakleion, Greece). Engineering for human-computer interaction: IFIP TC2/TC13 WG2.7/WG13.4 Seventh Working Conference on Engineering for Human-Computer Interaction, September 14-18, 1998, Heraklion, Crete, Greece. Boston, MA: Springer, 1999.

Marković, Dejan. DSP Architecture Design Essentials. Boston, MA: Springer US, 2012.

Hillston, Jane Elizabeth. 7th UK Computer and Telecommunications Performance Engineering Workshop: Edinburgh, 22-23 July 1991. London: Springer London, 1992.

Chadha, Rakesh. An ASIC Low Power Primer: Analysis, Techniques and Specification. New York, NY: Springer New York, 2013.

Šilc, Jurij, Borut Robič i Theo Ungerer. Processor Architecture. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/978-3-642-58589-0.

Fasthuber, Robert. Energy-Efficient Communication Processors: Design and Implementation for Emerging Wireless Systems. New York, NY: Springer New York, 2013.

Athanas, Peter. Embedded Systems Design with FPGAs. New York, NY: Springer New York, 2013.

Schwaderer, W. David. Introduction to Open Core Protocol: Fastpath to System-on-Chip Design. New York, NY: Springer New York, 2012.

Bhattacharyya, Shuvra S. Handbook of Signal Processing Systems. Wyd. 2. New York, NY: Springer New York, 2013.

Rixner, Scott. Stream processor architecture. Boston: Kluwer Academic Publishers, 2002.

1954-, Pardalos P. M., i Rajasekaran Sanguthevar, red. Advances in randomized parallel computing. Dordrecht: Kluwer Academic Publishers, 1999.

Cardoso, João Manuel Paiva. Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach. New York, NY: Springer New York, 2013.

Khan, Nauman. Designing TSVs for 3D Integrated Circuits. New York, NY: Springer New York, 2013.

Aamodt, Tor M., Wilson Wai Lun Fung, Timothy G. Rogers i Margaret Martonosi. General-Purpose Graphics Processor Architectures. Morgan & Claypool Publishers, 2018.

Aamodt, Tor M., Wilson Wai Lun Fung i Timothy G. Rogers. General-Purpose Graphics Processor Architectures. Springer International Publishing AG, 2018.

Aamodt, Tor M., Timothy G. Rogers, Margaret Martonosi i Wilson Wai Lun. General-Purpose Graphics Processor Architectures. Morgan & Claypool Publishers, 2018.

Swimmer, Sandra. Designing Distributed Multi-Processor Architectures. Crc Pr I Llc, 1993.

Lapsley, Phil, Jeff Bier, Amit Shoham i Edward A. Lee. DSP Processor Fundamentals: Architectures and Features. Wiley & Sons, Incorporated, John, 2013.

Rousseau, Frédéric, i Liliana Andrade. Multi-Processor System-On-Chip 1: Architectures. Wiley & Sons, Incorporated, John, 2021.

Rousseau, Frédéric, i Liliana Andrade. Multi-Processor System-On-Chip 1: Architectures. Wiley & Sons, Incorporated, John, 2021.

Rousseau, Frédéric, i Liliana Andrade. Multi-Processor System-On-Chip 1: Architectures. Wiley & Sons, Incorporated, John, 2021.

Rousseau, Frédéric, i Liliana Andrade. Multi-Processor System-On-Chip 1: Architectures. Wiley & Sons, Incorporated, John, 2021.

Variation-aware processor architectures with agressive operating margins. 2009.

Deprettere, Ed F., i Stamatis Vassiliadis. Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Springer London, Limited, 2003.

Lapsley, Phil, Jeff Bier, Amit Shoham i Edward A. Lee. DSP Processor Fundamentals : Architectures and Features (IEEE Press Series on Signal Processing). Wiley-IEEE Press, 1997.

Ben-Asher, Yosi. Multicore Programming Using the ParC Language. Springer, 2012.

(Editor), Ed F. Deprettere, Jürgen Teich (Editor) i Stamatis Vassiliadis (Editor), red. Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS (Lecture Notes in Computer Science). Springer, 2002.

Mehrez, Habib, Umer Farooq i Zied Marrakchi. Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization. Springer, 2014.

Shafique, Muhammad, Bruno Zatt, Jörg Henkel i Sergio Bampi. 3D Video Coding for Embedded Devices: Energy Efficient Algorithms and Architectures. Springer, 2016.

Nurmi, Jari. Processor Design: System-On-Chip Computing for ASICs and FPGAs. Springer London, Limited, 2007.

Nurmi, Jari. Processor Design: System-on-Chip Computing for ASICs and FPGAs. Springer Netherlands, 2010.

Processor Design: System-On-Chip Computing for ASICs and FPGAs. Springer, 2007.

Stenström, Per. Transactions on High-Performance Embedded Architectures and Compilers IV. Springer, 2012.

Wang, Xingwei, JunJie Wu i Haibo Chen. Advanced Computer Architecture: 10th Annual Conference, ACA 2014, Shenyang, China, August 23-24, 2014. Proceedings. Springer London, Limited, 2014.

Wu, Junjie, i Lian Li. Advanced Computer Architecture: 11th Conference, ACA 2016, Weihai, China, August 22-23, 2016, Proceedings. Springer Singapore Pte. Limited, 2016.